T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
A Practical Design Approach for Broadband Class-C RF Power
Amplifiers
Firas Mohammed Ali
The Higher Institute of Yefren / Libya - Department of Electronics
E-mail: firas_raie@yahoo.com
Abstract
This article is concerned with the design and implementation of broadband class-C
RF power amplifiers for solid-state transmitting systems.
A simple and systematic procedure was developed and implemented practically.
This technique starts with extracting the optimum input and output large signal
impedances of the selected RF transistor. The behaviors of these impedances are
then modeled with suitable one-port networks over the desired frequency band. The
matching networks, terminated with these impedance models, are then optimized
with the microwave CAD program Touchstone to achieve matching between these
impedance models and the 50- system impedance across the entire frequency
band. Prior to computer optimization, an initial analytic design should be
performed.
As a practical confirmation to the proposed design technique, a 10 W power
amplifier circuit was designed and built to operate within the communication band
225-400 MHz and to achieve a power gain of 10 dB.
1.Introduction
The design of wideband high power microwave amplifiers is actually a challenging
problem. This is because the RF power device parameters change with signal level
as well as with frequency. There is a broad range of techniques used to represent
the behavior of the power device. The more complete the representation, the more
complicated the model usually becomes.
The large signal charge-control model of transistors [1,2] , and also the modified
Ebers-Moll model [3] were used at earlier work for modeling the RF power
transistor. The large signal S-parameters were also employed with an approximate
design of power amplifiers [4]. However, the difficulty of measuring these
parameters made the technique of limited use. Computer simulations were also
used to predict the operation of class-C power amplifiers through numerical
analysis [5,6]. Although this method can give accurate results, the design of class-
C amplifiers with such technique will be a tedious task. The harmonic balance
technique [7] made a revolution in the analysis of non-linear circuits in the mid of
1970’s. The basic limitation of this technique is its complexity and the large
amount of mathematics needed with the professional numerical methods required
to resolve the circuit.
Thus, due to the non-linear behavior of the RF power device, the full two-port
device model is not the optimum choice for designing input and output matching
networks. In this article, one-port impedance models have been used to
characterize the optimum load and source terminations of the power device.
Optimum load and source large signal impedances are usually specified by RF
device data books at several frequencies in the operating band of the RF power
transistor [8]. The effective input and output impedances of the RF device can be
represented as the complex conjugates of these optimum terminations.
2. One-port impedance modeling circuits
RF power transistor characterization is well done by measuring the optimum load
and source impedances with the aid of the load-pull technique over the frequency
band of interest [9]. This requires one-port representations to predict the complex
conjugate of these impedances from the lower band edge fL to the upper band edge
fH as shown in Fig.1.
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
Fig.1: Effective Impedance Device Model
In this case Zout = ZOL* and Zin = Zs*, where ZOL is the optimum load impedance and
Zs is the source impedance.
Fig.2 presents two topologies of the required modeling networks [10]. Note from
this figure that all losses were lumped into a single resistor, which terminates an
LC two-port network.
Fig.2: Two Possible Topologies for the Modeling Network
An analytic synthesis procedure can be used to realize the one-port networks that
can fit the measured impedance data at both band edges. But instead of this tedious
task, one can use a microwave CAD program, such as Touchstone, to optimize the
elements of the modeling networks directly for predicting the measured data across
the entire frequency band.
3. Gain compensation with frequency
It is well known that if the transistor amplifier is conjugately matched over a broad
frequency band, the maximum available gain will roll-off with increasing
frequency as shown in Fig.3.
One of the techniques used to compensate the transistor’s power gain variation
with frequency is by selectively reflecting some of the power at lower frequencies
of the band where the power gain is relatively high. The controlled mismatch
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
imposed in this technique will however degrade the input VSWR at lower band
frequencies. The approximate power gain of the RF transistor is given by [11]:
Fig.3: Gain Roll-off with Frequency for the RF Transistor
γ
§ f ·
G ( f ) = ¨¨ max ¸¸ (1)
© f ¹
Where fmax is the maximum frequency of oscillation, and is a constant related
with the slope of the gain roll-off. is given by:
x x
γ = ≅
10 log 2 3
Where x is the slope in dB/octave.
The transmission loss of the matching network due to the input reflection is:
2
α = 1 − Γin (2)
Where in is the reflection coefficient at the input. To obtain a constant G.
product across the band of interest, we must have:
γ γ
§ f · 2 §f ·
G.α = ¨¨ max ¸¸ .(1 − Γin ) = G H = ¨¨ max ¸¸
© f ¹ © fH ¹
Where GH is the gain at the upper band frequency fH. After re-arrangement:
1/ 2
ª § f ·γ º
Γin = «1 − ¨¨ ¸¸ » (3)
«¬ © f H ¹ »¼
The input-matching network can be designed to model equation (3) using the
optimization capabilities of the computer program Touchstone.
4. Design steps
The proposed computerized design technique for class-C broadband power
amplifiers can be summarized in the following systematic procedure:
1. Begin the design by taking the large signal input and output impedances (Zin and
ZOL*) from the device data sheet over the required frequency band and for the
desired output power, gain, and supply voltage.
2. Use numerical interpolation and extrapolation techniques to extend the
impedance data sample points. This is useful in determining the device terminal
impedances at fL, fo, and fH. Store these data in external data file. This process can
easily be done with Touchstone.
3. Select the appropriate one-port network topologies to model the above terminal
impedances over the entire band and optimize their element values with
Touchstone.
4. With the modeling circuits just designed, insert the input and output matching
networks between the modeling circuits and the source and load 50 terminations
respectively as shown in Fig.4. The elements of the matching networks can have
initial estimates from a rough graphical design procedure.
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
Fig.4: Matching Networks Design with Touchstone
5. Optimize the input and output matching networks to achieve the desired
matching at input and output. The output-matching network is designed to achieve
conjugate matching and present ZOL to transistor’s output across the entire band.
On the other hand, the input-matching network is designed to achieve gain-flatness
from fL to fH. This can be done by selective mismatch at lower frequencies. The
input reflection coefficient is evaluated from equation (3) at different sample
frequencies and stored at an external data file. The input-matching network is then
optimized to model the calculated input reflection coefficient across the entire
band.
6. The elements of the matching networks are then tuned, for practical purposes,
with Touchstone’s tuner window keeping the obtained response unchanged.
5. Implementation of a 10W RF power amplifier
To confirm the design procedure presented above, a practical power amplifier
circuit has been implemented. The desired requirements of the RF amplifier to be
designed are a 10W output power across the communication band 225-400 MHz
with a minimum power gain of 10 dB. Class-C operation with zero biased emitter-
base junction was adopted since it collects both higher efficiency and simplicity of
construction. The Motorola’s MRF321 UHF power transistor was chosen to
achieve good reliability and ruggedness. This transistor can deliver 10W RF power
at 400 MHz and operates from a 28V power supply.
5.1 Matching networks design
The design of the input and output matching networks begins by taking the large
signal input and output impedances (Zin and ZOL*) from device data sheet, and then
interpolating these data across the frequency band of interest. The Touchstone’s
simulation capabilities were employed to do this process. Table 1 presents the
interpolated sample values of these impedances across the band from 225 MHz to
400 MHz.
Table 1: Input and Output Large Signal Impedances for the RF Transistor MRF321
The graphical design of the input matching network is shown in Fig.5. The input
impedance at the center frequency (fo=312.5 MHz) is located at point A. The goal
is to move from point A to the center of the chart without exceeding the constant Q
circle where:
fo
Q= = 1.78
fH − fL
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
Fig.5: Graphical Design of the Input Matching Network
It is shown from Fig.5 that low-Q broadband matching circuits can be implemented
with multiple L-sections. This matching circuit consists of three low-pass L-type
sections and a shunt capacitor C4 to compensate the inductive reactance of Zin.
A similar design procedure produces the output matching circuit as shown in Fig.6.
However, this network has a band-pass topology consisting of two low-pass
sections (L5-C5 and L6-C6) and a high pass element C7. The shunt inductor L4 is
used to tune out the output capacitance of the device. The gain-bandwidth
restrictions of the output matching circuit are simpler than that of the input
matching circuit because the output impedance level is higher in this case. The
ladder form of this network is useful in harmonic suppression.
Fig.6: Graphical Design of the Output Matching Network
5.3 Computer optimization of the matching networks
The computer procedure begins by designing the modeling networks that predict
Zin and Zout from fL to fH. These networks are designed and optimized with
Touchstone. Fig.7 presents the final optimized element values of these networks.
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
Fig.7: Input and Output Optimized Modeling Networks
The input matching network was optimized to present the reflection coefficient
given by equation (3) at the input in order to compensate the –6dB/octave gain-
frequency slope of the transistor MRF321. The Touchstone’s circuit file used for
optimizing the input matching circuit is shown in the appendix. The values of the
required input reflection coefficient were saved at an external file (GMRF321.s1p).
Two compensating networks consisting of L7, C8, R1 and L8, C9, R2 were added in
order to control the input VSWR across the entire band. On the other hand, the
output matching network was optimized to present the optimum load impedance
ZOL to the collector of the transistor over the full band. A compensating network
was added in series with L4 to improve the matching requirements. The
Touchstone’s circuit file written for optimizing the output matching circuit is also
presented in the appendix. The final optimized amplifier circuit is sketched in
Fig.8.
Fig.8: The Optimized Amplifier Circuit
5.4 Amplifier construction
The amplifier design calculations are completed up to this point. However, these
calculations can become meaningless unless the final amplifier circuit is properly
implemented. The construction work begins by accurately selecting the
components of the matching networks. All components were measured and tuned
using the automatic network analyzer hp-8510B across the entire frequency band.
Variable trimmer capacitors were used for tuning purposes. Chip ceramic fixed
value capacitors were also used. All inductors were hand wound using #20 and #22
AWG enameled wires. The RF chokes used for isolating the DC circuit are of low-
Q molded type.
The circuit was built on a 10.8 X 8 cm double-sided printed circuit board. Board
material is epoxy-glass with a thickness of 1.2 mm. Epoxy-glass was selected due
to its availability and lower cost. The top side of the board was printed to hold the
components of the circuit, while the bottom side was fully covered with copper to
be a ground plane. To ensure good circuit stability, a ferrite bead was added in
series with the base choke to prevent low-frequency oscillations. The circuit was
then cased in a 11 X 9 X 3 cm box to isolate the amplifier from the external
spurious signals. This box was mounted on a suitable heat sink. BNC connectors
were fastened at input and output for signal feeding. A feed-through capacitor was
mounted on the box body for DC biasing. The RF transistor’s stud was tightened
with the heat sink using a suitable nut. Fig.9 shows a photograph of the finished
circuit.
Fig.9: A Photograph showing the Assembled Amplifier Circuit
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
5.5 Amplifier performance
The measurement test setup of the amplifier circuit is shown in Fig.10.
Fig.10: Block Diagram of the Amplifier Test Setup
In Fig.11, the output power versus frequency is displayed. This curve was plotted
from the spectrum analyzer using the hp-7475A electronic plotter.
Fig.11: Output Power versus Frequency
It was noted from this sweep that the power gain is 9.5±1dB. However no
empirical attempt was made to adjust this characteristic. Better broadbanding can
be accomplished by tuning for equal peaks at the band edges using the trimmer
capacitors of the circuit. When proceeding to do this process, a three-port circulator
should be placed at the amplifier input to protect the driving amplifier from
possible reflected power that may result from VSWR degradation through this
process. Within the operating band, it was found that the 2nd harmonic level is
between 16 and 20 dB below the fundamental signal power.
6. Conclusion
A systematic procedure for designing broadband RF power amplifiers has been
presented and discussed. This technique depends on modeling the optimum
terminations of the device by simple one-port networks at input and output rather
than the characterization of the power transistor through a complicated equivalent
circuit. Microwave computer aided design tools were utilized for the design and
optimization of the matching networks. The design procedure was then confirmed
by a practical design and implementation of a broadband power amplifier circuit. It
was proved that simple synthesis tools could be employed for successful RF circuit
design.
APPENDIX
1. The Touchstone’s circuit file used for the design of the input matching
network:
DIM
FREQ MHz
IND nH
CAP pF
CKT
! MATCHING NETWORK
CAP 1 0 C#3 3 40
IND 1 5 L=150
CAP 5 6 C#4 12 500
RES 6 0 R#10 433 560
IND 1 2 L#5 12 40
CAP 2 0 C#1 7 40
IND 2 7 L=330
CAP 7 8 C#2 30 500
RES 8 0 C#10 800 800
IND 2 3 L#5 15 50
CAP 3 0 C#4 32 40
IND 3 4 L#3 3 20
CAP 4 0 C=80
IND 4 0 L=220 ! RFC
! INPUT PORT MODELING CIRCUIT
CAP 4 0 C=25.337
IND 4 0 L=19.7473
CAP 4 9 C=263.82
T he Libyan Arab International Conference on Electrical and Electronic Engineering LAICEEE 20-23/3/06
IND 9 10 L=1.6
RES 10 0 R=0.706
DEF1P 1 ZI
S1PB 1 0 GMRF321 ! DESIRED INSERTION LOSS
DEF1P 1 ZI’
OUT
ZI VSWR1 GR1
ZI’ VSWR1 GR1
ZI S11 SC2
ZI’ S11 SC2
FREQ
SWEEP 225 400 25
OPT
RANGE 225 400 25
ZI MODEL ZI’
GRID
RANGE 225 400 25
GR1 0 10 1
2. The Touchstone’s circuit file used for the design of the output matching network:
DIM
FREQ MHz
IND nH
CAP pF
CKT
! MATCHING NETWORK
CAP 1 2 C#2 40 40
CAP 2 0 C#1 2 40
IND 2 3 L#8 23 50
CAP 3 0 C#4 14 30
IND 3 4 L#10 20 40
IND 4 5 L#10 35 60
CAP 5 6 C#5 40 40
RES 6 0 R=5
IND 4 0 L=330 ! RFC
! OUTPUT PORT MODELING CIRCUIT
CAP 4 0 C=17
IND 4 0 L=94
CAP 4 7 C=25.2
IND 7 8 L=3.13
RES 8 0 R=31
DEF1P 1 ZM1
OUT
ZM1 S11 SC2
ZM1 VSWR1 GR1
FREQ
SWEEP 225 400 25
OPT
RANGE 225 400 25
ZM1 VSWR1 < 1.25
GRID
RANGE 225 400 25
GR1 0 5 1
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