Chapter 5

Arithmetic and Logic Instructions

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Addition
Addition (ADD) instruction is 8, 16, and 32 bit
binary addition. A second form of addition is
called add with carry (ADC) instruction. Finally
the increment instruction (INC) is presented.
Increment is a special type of addition that adds
one to a number.

ADD AL, BL
ADD CL, [BP]
ADD BX, [EAX+2*ECX]
ADD [BX+DI], DL
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 However, there are over 32,000 variations of the
ADD instructions in the instruction set. It is
impossible to list all of them. The only types of
addition not allowed are memory-to-memory and
segment register. The segment registers can
only be moved, pushed, or popped.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Register Addition
This example shows the addition of the contents
of AX, BX, CX, and DX to form a 16-bit result
stored in the AX register.

ADD AX, BX
ADD AX, CX
ADD AX, DX
Whenever arithmetic and logic instructions
execute, the contents of the flag register
change. Any add instruction modifies the
contents of the sign, zero, carry, auxiliary carry,
parity, and overflow flags.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Immediate addition
MOV DL, 12H
ADD DL,33H

Memory to register addition

This example shows the addition of two
consecutive bytes of data, stored at the data
segment offset locations NUMB and NUMB+1.
to the AL register
MOV DI, OFFSET NUMB
MOV AL, 0
ADD AL, [DI]
ADD AL, [DI+1]
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Array addition
Suppose that an array of data contains 10 bytes,
numbered from element 0 though element 9. the
example below shows the addition of array
elements 3,5, and 7.

MOV AL, O
MOV SI, 3
ADD AL, ARRAY[SI]
ADD AL, ARRAY[SI+2]
ADD AL, ARRAY[SI+4]

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Increment addition
Increment addition (INC) adds 1 to a register or
a memory location. INC instruction can add 1 to
any register or memory location, except a
segment register. With indirect memory
increment, the size of data must be described by
using the BYTE PTR, WORD PTR, DWORD
PTR directives.

INC BL
INC EAX
INC WORD PTR [EAX]
INC EAX
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Increment instructions affect the flag bits, as do
most other arithmetic and logic operations. The
difference is that increment instruction do not
affect the carry lag bit. Carry does not change
because we often use increments in programs
that depend upon the contents of the carry flag.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Addition with Carry
An addition with carry instruction (ADC) adds
the bit in the carry flag (C) to the operated data.
This instruction mainly appears in software that
adds number that are wider than 16 bits in the
8086-80286 or wider than 32 bits in the 80386-
Pentium 4.
For 32-bit additions in 8086 to 80286
ADD AX, CX
ADC BX, DX
For 64 bits addition in 80386 and above.
ADD EAX, ECX
ADC EBX, EDX
Dr Nidal Al-Dmour Microprocessor and Assembly Language
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 XADD
Exchange and ADD for the 80486-Pentium 4
Processors. The XADD instruction adds the
source to the destination and stores the sum in
the destination, as with any addition. The
difference is that after the addition takes place,
the original value of the destination is copied
into the source operand.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Subtraction
Subtraction (SUB) instruction is 8, 16, and 32 bit
binary subtraction. A second form of subtraction
is called subtract with borrow (SBB) instruction.
SBB is used for numbers that are wider than
16-bits or 32 bits. Finally the decrement
instruction (DEC) is presented. decrement is a
special type of subtraction that subtracts a one
from a register or a memory location.
SUB CL, DL
SUB ECX, EDX
SUB CH, [DI]
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Register Subtraction
SUB BX, CX
SUB BX, DX
After each subtraction the microprocessor
modifies the contents of the flag register.

Immediate subtraction
For example:
MOV CH, 22H
SUB CH, 44H
This example subtracted 34 from 68, resulting in
a DEH (-34). There is no overflow because the
overflow is greater than +127 or less than -128.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Decrement Subtraction
Decrement subtraction subtracts (DEC)
subtracts a 1 from register or the contents of the
memory location. The decrement indirect
memory data instructions require BYTE PTR,
WORD PTR, and DWORD PTR.

DEC BH
DEC CH
DEC BYTE PTR [BP]

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Subtraction with Borrow
Subtraction with borrow (SBB) instruction
functions as a regular subtraction, except that
the carry flag (C), which holds the borrow, also
subtracts from the difference. The immediate
subtract from memory instructions requires a
BYTE PTR, WORD PTR, and DWORD PTR.

DEC BH
DEC WORD PTR [BP]
SBB AH, AL
SBB DI, [BP+2]
SBB BYTE PTR [BP+2], 3
Dr Nidal Al-Dmour Microprocessor and Assembly Language
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Compare

• The CMP instruction is a special form of the SUB instruction. A

compare does not result in a difference that is saved, on the flag bits
change to reflect the difference.

CMP AL,3
;if AL = 3 the result to zero (flag)

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 This example shows a comparison followed by a
conditional jump instruction. In this example, the
contents of AL are compared with a 10H.
Conditional jump instructions that often follow
the comparison are JA (jump above) or JB (jump
below). If the JA follows the comparison, the
jump occurs if the value in AL is below 10H. In
this example, the JAE instruction follows the
comparison. This instruction causes the
program to continue at memory location SUBER
if the value in Al is 10H or above.
CMP AL, 10H
JAE SUBER
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Compare and Exchange (80486-
Pentium 4 only)
The compare and exchange instruction
(CMPXCHG) compare the destination operand
with the accumulator. If they are equal, the
source operand is copied into the destination; if
they are not equal, the destination operand is
copied into the accumulator. This instruction
functions with 8-, 16-, or 32-bit data.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 COMPXCHG CX, DX instruction is an example
of the compare and exchange instruction. This
instruction first compares the contents of CX
with AX. If CX equals AX, DX is copied into AX;
if CX is not equal to AX, CX is copied into AX.
This instruction also compares AL with 8-bit data
and EAX with 32 bit data if the operands are
either 8 or 32 bits.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Multiplication
Multiplication is performed on bytes, words, or
doublewords, and can be signed integer (IMUL)
or unsigend integer (MUL). The product after
multiplication is always a double width product.
If two 8-bit numbers are multiplied, they
generate a 16-bit product; if two 16-bit numbers
are multiplied, they generate a 32-bit product;
and if two 32-bit numbers are multiplied, a 64 bit
product s generated.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 With 8-bit multiplication, the multiplicand is
always in the AL register, whether signed or
unsigned. The multiplier can be any 8-bit
register or any memory location. The
multiplication instruction contains one operand
because it always multiplies the operand times
the contents of register AL.
MUL CL AL is multiplied by CL; the
unsigned product is in AX
IMUL DH , AL is multiplied by DH; the signed
product I in AX.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 For example:
MOV BL, 5
MOV CL, 10
MOV AL, CL
MUL BL
MOV DX, AX

16-bit Multiplication
Word multiplication is very similar to byte
multiplication. The difference is that AX contains
the multiplicand instead of AL, and the product
appears in DX-AX instead of AX.
For example: MUL CX
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 32-bit Multiplication
In 0386 and above, 32 bit multiplication is
allowed because these microprocessors contain
32-bit registers. The contents of EAX are
multiplied by the operand specified with the
instruction. The product (64 bits wide) is found in
EDX-EAX.

For example: MUL ECX

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Division
As with multiplication, a division occurs on 8- or
16- bit numbers in the 8086-80286 processors,
and on 32-bit numbers in the 80386-Pentium 4.
These numbers are signed (IDIV) or unsigned
(DIV) integers. The dividend is always a double
width dividend that is divided by the operand.
This means that an 8-bit division divides a 16-bit
number by an 8-bit number; a 16-bit division
divides a 32-bit number by a 16-bit number; and
a 32-bit division divides a 64-bit number by a 32-
bit number. There is no immediate division.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 8-bit Division
An 8-bit division uses the AX register to store
the dividend that is divided by the contents f an
8-bit register or memory location. The quotient
moves into AL after the division and AH contains
the reminder.

For unsigned number, the most significant 8-bit

must be cleared to zero.
For signed numbers, the CBW convert byte to
word is used .

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 For example of unsigned division:
MOV AL, NUMB
MOV AH, 0
DIV NUMB1

For example of signed division:

MOV AL, NUMB
CBW
IDIV NUMB1

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 16-bit division
The dividend 32-bit is in DX-AX. The quotient
appears in AX and the reminder appears in DX
after division.

For unsigned number, the most significant 16-bit

must be cleared to zero DX=0.
For signed numbers, the CWD convert word to
doubleword is used .

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 32-bit division
The dividend 64-bit is in EDX-EAX. The quotient
appears in EAX and the reminder appears in
EDX after division.

For unsigned number, the EDX=0.

For signed numbers, the CDQ convert double
word to quadword is used .

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 BCD and ASCII
The microprocessor allows arithmetic
manipulation of both BCD and ASCII data.

BCD Arithmetic: two arithmetic techniques

appear with BCD data: addition and subtraction.
The instruction set provides two instructions that
correct the result of a BCD addition and a BCD
subtraction. The DAA (Decimal Adjust after
Addition) instruction follows BCD addition, and
the DAS (Decimal Adjust after Subtraction)
follows BCD subtraction. The AL is the register
used by DAA and DAS.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 DAA instruction
The DAA instruction follows the ADD or ADC
instruction to adjust the result into a BCD result.
Suppose that DX and BX each contains 4-digit
packed BCD numbers. The example in the next
slide shows a short sample program that ads the
BCD numbers in DX and BX, and stores the
result in CX.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 MOV DX , 1234H
MOV BX, 3099H
MOV AL, BL
ADD AL, DL
DAA
MOV CL, AL
MOV AL, BH
ADC AL, DH
DAA
MOV CH, CL
Because the DAA instruction functions only with
the AL register, this instruction must occur eight
bits at a time. The result is 4333.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 DAS Instruction
The DAS instruction functions as does DAA
instruction except that it follows a subtraction
instead of an addition.

MOV DX , 1234H
MOV BX, 3099H
MOV AL, BL
SUB AL, DL
DAS
MOV CL, AL
MOV AL, BH
SBB AL, DH
DAS
MOV CH, CL
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Basic Logic Instructions
The basic logic instructions include AND, OR,
Exclusive-OR, NOT, NEG, and TEST. Logic
instructions allow bits to be set, cleared, or
complemented. All logic instructions affect the
flag bits.

When binary data are manipulated in a register

or memory location, the rightmost bit position is
always numbered bit 0.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 AND

• The AND instruction performs logical multiplication (the AND

operation).

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 The AND operation clears bits of a binary
number. The task of clearing a bit in a binary
number is called masking. For example:

MOV BX, 3135H

AND BX 0F0F

The AND instruction uses any addressing mode

except memory to memory and segment register
addressing.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 OR

• The OR instruction generates the logical sum (OR operation).

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Exclusive OR

• The XOR instruction performs the Exclusive OR operation.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 TEST
• The TEST instruction is a special form of the AND instruction
that produces no result except for a change of the flags.
• This instruction is often used to test multiple bits of a number.
• The test instruction functions in the same manner as a CMP
instruction. The difference is that the CMP instruction tests the
entire byte or word.
• The zero flag (Z) is a logic 1 (indicating a zero result) if the bit
under test is zero, and Z=0 (indicating a non zero result) if the
bit under test is not zero.
• Usually the TEST instruction is followed by either the JZ (jump if
zero) or JNZ (jump if not zero) instruction.

TEST AL,3 ;test the right two bits (if both are zero the result is zero)

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Bit Test Instructions

• There are four bit test instructions BT (bit test), BTR

(bit test and reset), BTS (bit test and set), and BTC
(bit test and complement).
• Each tests the prescribed bit by moving it into carry.
Then the bit is modified (except for BT)
BT AL,3 ;bit 3 is moved to carry
BTS AL,3 ;bit 3 is moved to carry then set
BTR AL,3 ;bit 3 is moved to carry then reset
BTC AL,3 ;bit 3 is moved to carry then inverted.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 NEG and NOT

• The NEG (negate) instruction 2’s complements a number,

• The NOT instruction 1’s complements a number.
NOT EAX
NEG DWORD PTR [EBX]

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 Shifts

• There are 4 shift instructions. Two are logical shifts and two are
arithmetic shifts.
• The logical shifts reposition the bits in a number. The arithmetic
shifts multiply or divide signed numbers by powers of two.
• SHR and SHL are logical and SAR and SAL are arithmetic shifts.
SHL AL,3 or SHL AL,CL

Dr Nidal Al-Dmour Microprocessor and Assembly Language

Dr Nidal Al-Dmour Microprocessor and Assembly Language
 Rotates

• Rotates are shifts that re-circulate the bit that moves out of an end of
the register or memory location.
• Four rotates exist where two just rotate the target and two rotate the
target through the carry flag.
ROL AL,3 or RCL AL,3

Dr Nidal Al-Dmour Microprocessor and Assembly Language

Dr Nidal Al-Dmour Microprocessor and Assembly Language
 String Comparison
Addition string instructions will be introduced
that allow a section of memory to be tested
against a constant or against another section of
memory. These instructions are SCAS (string
scan) and CMPS ( string compare).

SCAS
The SCAS (string scan) instruction compares
the AL register with a byte block of memory, the
AX register with a word block of memory, or the
EAX register with a double word block of
memory.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 The opcode used for byte comparison is
SCASB, the opcode used for word comparison
is SCASW, and the opcode used for a
doubleword comparison is SCASD. In all cases
the contents of the extra segment memory
location addressed by DI is compared with AL,
AX, or EAX.

Like the other string instructions, SCAS

instruction use the direction flag (D) to select
either auto-increment or auto-decrement
operation for DI. They also repeat of if prefixed
by a conditional repeat prefix.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 The Repeat Prefix (REP)
The repeat prefix is used to any string data
transfer instruction, except the LODS instruction.
The REP prefix causes the CX to decrement by
1 each time the string instruction executes. After
CX decrements, the string instruction repeats. If
CX reaches a value of 0, the instruction
terminates and the program continues with the
next sequential instruction.

Dr Nidal Al-Dmour Microprocessor and Assembly Language

 For the program below a section of memory is
100 bytes long and begins at location BLOCK.
This section of memory must be tested to see
whether to see whether any location contain 00.
The REPNE causes the SCASB instruction to
repeat until either CX register reaches 0, or until
an equal condition exists as the outcome of
SCAB instruction’s comparison.
MOV DI , OFFSET BLOCK
CLD
MOV CX, 100
XOR AL, AL
REPNE SCASB
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 CMPS
The CMPS (compare string instruction) always
compares two sections of memory data as bytes
(CMPSB), words (CMPSW), or doublewords
(CMPSD). Note that only 80386 can only use
doublewords. The contents of the data segment
memory location addressed by SI is compared
with the contents of the extra segment memoy
location addressed by DI. The CMPS instruction
increments or decrements both SI and DI. The
CMPS is normally used the REPE or REPNE
prefix. REPZ (repeat while zero) and REPNZ
(repeat with not zero) are also used.
Dr Nidal Al-Dmour Microprocessor and Assembly Language
 For example, this program compares two
sections of memory searching for a match. The
CMPSB is prefixed with a REPE. This causes
the search to continues as long as an equal
condition exist. When the CX register 0 or an
unequal condition exists, the CMPSB instruction
stops execution.

MOV SI, OFFSET LINE

MOV DI, OFFSET TABLE
CLD
MOV CX, 10
REPE CMPSB
Dr Nidal Al-Dmour Microprocessor and Assembly Language