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Lab Task (1,2,3) .PPTM

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0% found this document useful (0 votes)
27 views17 pages

Lab Task (1,2,3) .PPTM

Uploaded by

fayyazashraf215
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Digital Logic Design(Lab)

Experiment No 1: Analyze the performance of given ICs and


draw its truth table
Teacher : Isra Nazir
Components Required:
• Relevant Ics, 7408, 7400, 7432, 7402, 7486, 74226, 7404
• Wires
• Virtual Breadboard
1. Theory
• The basic logic gates are the building blocks of more complex logic
circuits.
• These logic gates perform the basic Boolean functions such as AND,
OR, NAND, NOR, Inversion, Exclusive-OR, Exclusive-NOR.
• Each gate has one or two binary inputs, A and B and one binary
output, C. The small circle on the output of the circuit symbol
designates the logic complement.
• The AND, OR, NAND and NOR gates can be extended to have more
than two inputs. A gate can be extended to have multiple inputs if the
binary operation it represents is commutative and associative.
IC for AND gate:
• These basic logic gates are implemented as small scale integrated
circuit (SSICs) or as a part of more complex medium scale (MSI) or
very large scale integrated circuit(VLSI).
• Digital logic gates are classified not only by their logic operation but
also the specific logic circuit family to which they belong. Each logic
family has its own basic electronic circuit upon which more complex
digital circuits and functions are developed.
Logic Family and relevant Ics:
• AND : 7408
• OR : 7432
• NOT : 7404
• NAND : 7400
• NOR : 7402
• XOR : 7486
• XNOT : 74266
Digital Logic Design(Lab)
Experiment No 2: Implementation of Boolean Expression
through logic gates and also verification of Demorgan’s law
Teacher : Isra Nazir
Components Required:
• Relevant Ics, 7408, 7432, 7404
• Wires
• Virtual Breadboard and Multisim version 13.0 and above
1. Theory
• Boolean Algebra deals with binary variables and logic operations. A
Boolean function described by algebraic expression consists of binary
variables, the constant 0 and 1 and logic operations symbols.
• For a given value of binary variables the function can be equal to
either 0 or 1
Lab Task:
• Task 1:
Given the Boolean Expression
F = X + Y’Z
Drive its truth table and draw its circuit diagram
Implement the circuit on Multisim using relevant ICs
• Task 2:
Given the Boolean Expression
F = X’Y’Z + X’YZ + XY’
Lab Task(Continue…)
• Task 3:
Verification of Demorgan’s Law
1. (X.Y)’ = X’ + Y’
2. (X+Y)’ = X’.Y’
Drive its truth table and draw its circuit diagram
Implement the circuit on Multisim using relevant ICs
Digital Logic Design(Lab)
Experiment No 3: Implementation of XOR and XNOR using NAND gate
Teacher : Isra Nazir
• Digital circuits are more frequently constructed with NAND and NOR
gates than AND and OR gates. NAND and NOR gates are easier
fabricate with electronic components and are the basic gates in all IC
digital logic families.
Components Required:
• Relevant Ics: 7400
• Wires
• Virtual Breadboard
Lab Task:
• Task 1:
F = X’.Y + XY’
Given the Boolean expression for XOR
Implement its circuit diagram using NAND gate
• Task 2:
F = X’.Y’ + XY
Given the Boolean expression for XNOR
Implement its circuit diagram using NAND gate
X Y F = X OR
Example 1
Consider the Boolean expression as given:
F = X’.Y + XY’ 0 0 0
The logical operation to be performed to
reach the Boolean function F can be
implemented using the NAND logic gate.
These logic operations can be represented 0 1 1
using the mathematical symbols in this
expression.
A truth table represents the relationship
between the LHS of the expression and RHS.
1 0 1

1 1 0
X Y F = X OR
Example 2
Consider the Boolean expression as given:
F = X.’Y’ + X.Y 0 0 1
The logical operation to be performed to
reach the Boolean function F can be
implemented using the NAND logic gate.
These logic operations can be represented 0 1 0
using the mathematical symbols in this
expression.
A truth table represents the relationship
between the LHS of the expression and RHS.
1 0 0

1 1 1

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