W515GU

Preface

Notebook Computer

W515GU

Service Manual

Preface
I
 Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.

This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface

Version 1.0
February 2018

Trademarks
Intel, Pentium and Celeron are trademarks/registered trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.

II
 Preface

About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.

It is organized to allow you to look up basic information for servicing and/or upgrading components of the W515GU
series notebook PC.

The following information is included:

Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Appendix A, Part Lists

Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

III
 Preface

IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 2.1A (40 Watts) minimum AC/DC Adapter.
Preface

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

IV
 Preface

Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:

1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.

2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on

Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.

3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

V
 Preface

4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.

Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.

 Power Safety
Preface

Power Safety The computer has specific power requirements:

Warning
Before you undertake • Only use a power adapter approved for use with this computer.
any upgrade proce- • Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
dures, make sure that unsure of your local power specifications, consult your service representative or local power company.
you have turned off the
• The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
power, and discon-
nected all peripherals
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
and cables (including • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
telephone lines and • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
power cord). • Before cleaning the computer, make sure it is disconnected from any external power supplies.

You must also remove

your battery in order to Do not plug in the power Do not use the power cord if Do not place heavy objects
prevent accidentally cord if you are wet. it is broken. on the power cord.
turning the machine
on. Before removing
the battery discon-
nect the AC/DC
adapter from the
computer.

VI
 Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have.

Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.

Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII
 Preface

Related Documents
You may also need to consult the following manual for additional information:

User’s Manual on DVD

This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

System Startup
Preface

1. Remove all packing materials.

2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Attach the AC/DC adapter to the DC-In jack on the right of
the computer, then plug the AC power cord into an outlet,
and connect the AC power cord to the AC/DC adapter.
5. Use one hand to raise the lid/LCD to a comfortable viewing
angle (do not exceed 130 degrees); use the other hand
(as illustrated in Figure 1) to support the base of the 130°
computer (Note: Never lift the computer by the lid/LCD).
6. Press the power button to turn the computer “on”.

Figure 1
Opening the Lid/LCD/Computer with
AC/DC Adapter Plugged-In

VIII
 Preface

Contents
Introduction ..............................................1-1 Bottom ........................................................................................... A-4
MB ................................................................................................. A-5
Overview .........................................................................................1-1 LCD ............................................................................................... A-6
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4 Schematic Diagrams................................. B-1
External Locator - Front & Right Side Views .................................1-5 System Block Diagram ...................................................................B-2
External Locator - Left Side & Rear View .....................................1-6 SOC DDR .......................................................................................B-3
External Locator - Bottom View .....................................................1-7 SOC Display Interface ....................................................................B-4
Mainboard Overview - Top (Key Parts) .........................................1-8 SOC PCIE/SATA/USB ..................................................................B-5
Mainboard Overview - Bottom (Key Parts) ....................................1-9 GPIO ...............................................................................................B-6
Mainboard Overview - Top (Connectors) .....................................1-10 SMB/CNV ......................................................................................B-7
Mainboard Overview - Bottom (Connectors) ...............................1-11 RTC/PLU/CLK/SVID ....................................................................B-8
Disassembly ...............................................2-1 Audio/LPC/SPI/eMMC ..................................................................B-9

Preface
SOC Power ...................................................................................B-10
Overview .........................................................................................2-1 SOC VSS ......................................................................................B-11
Maintenance Tools ..........................................................................2-2 Level Shifter .................................................................................B-12
Connections .....................................................................................2-2 DDR4 SO-DIMM_0 .....................................................................B-13
Maintenance Precautions .................................................................2-3 HDMI Port ....................................................................................B-14
Disassembly Steps ...........................................................................2-4 RTD2136 ......................................................................................B-15
Removing the Battery ......................................................................2-5
Panel Con ......................................................................................B-16
Removing the Keyboard ..................................................................2-6 RTD2168-CG, CRT ......................................................................B-17
Removing the Hard Disk Drive .......................................................2-7 TPM/USB .....................................................................................B-18
Removing the System Memory (RAM) ..........................................2-9
WLAN, 3G, MSATA ...................................................................B-19
Removing the Wireless LAN Module ...........................................2-11 KBC-ITE IT8987t .........................................................................B-20
Wireless LAN, and Combo Module Cables ..................................2-12
Audio Codec .................................................................................B-21
Removing the 4G Module .............................................................2-13 Conn, CCD, Fan, Click .................................................................B-22
Removing the Click Board Module ..............................................2-14 eMMC / LED / Hole / Nut ............................................................B-23
Removing the CCD Module ..........................................................2-15
System Power ...............................................................................B-24
Part Lists ..................................................A-1 1.05VS / 1.8VAI ...........................................................................B-25
Parts List Illustration Location ....................................................... A-2 VDD3, VDD5 ...............................................................................B-26
Top ................................................................................................. A-3 VTT_MEM / 1.35V ......................................................................B-27

IX
 Preface

VCGI & VNN .............................................................................. B-28

VCore ........................................................................................... B-29
AC-In, Charger ............................................................................. B-30
I/O Board ...................................................................................... B-31
RTL8411 ...................................................................................... B-32
AC-In Conn .................................................................................. B-33
Power SW Board .......................................................................... B-34
Click Board .................................................................................. B-35
Updating the FLASH ROM BIOS......... C-1
Download the BIOS ....................................................................... C-1
Unzip the downloaded files to a bootable CD/DVD or
USB Flash drive ............................................................................. C-1
Set the computer to boot from the external drive ........................... C-1
Preface

Use the flash tools to update the BIOS .......................................... C-2

Restart the computer (booting from the HDD) .............................. C-2

X
 Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W515GU series notebook computer. Information
about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about dri-
vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer.

Operating systems (e.g. Windows 10, etc.) has its own manuals as do application softwares (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

The W515GU series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description

1.Introduction
of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated
by the “” symbol.

The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1
 Introduction

Specifications Processor Options Pointing Device

Intel® Pentium® Processor Built-in Touchpad
Silver N5000 (1.10GHz) Keyboard
4MB Smart Cache, 14nm, DDR4-2400MHz, TDP 6W
 Intel® Celeron® Processor
“WinKey” keyboard (with embedded numeric keypad)

Latest Specification Information N4100 (1.10GHz), N4000 (1.10GHz) Audio

4MB Smart Cache, 14nm, DDR4-2400MHz, TDP 6W High Definition Audio Compliant Interface
The specifications listed here are correct at the
time of sending them to the press. Certain items BIOS 2 * Built-In Speakers
(particularly processor types/speeds) may be 64Mb SPI Flash ROM Built-In Microphone
changed, delayed or updated due to the manu-
Insyde BIOS Security
facturer's release schedule. Check with your
service center for more details. LCD Security (Kensington® Type) Lock Slot
11.6" (29.46cm), 16:9, HD (1366x768) (Thickness: 3.6mm) BIOS Password
Intel PTT for Systems Without TPM Hardware
1.Introduction

Memory
Slots
One 260 Pin SO-DIMM Socket Supporting DDR4 2400 MHz
Memory Slot 1 (M.2) for WLAN and Bluetooth Combo Module
 Memory Expandable up to 8GB (Factory Option) Slot 2 for 4G LTE Module
CPU Compatible with 4GB or 8GB Modules Interface
The CPU is not a user serviceable part. Ac- (The real memory operating frequency depends on the FSB Two USB 2.0 Ports
cessing the CPU in any way may violate your of the processor.) One USB 3.0 (USB 3.1 Gen 1) Port
warranty.
Video Adapter One HDMI-Out Port
Intel GPU (CPU integrated) One External Monitor Port
One Microphone-In Jack
Intel HD Graphics 605 (Pentium CPU integrated) One Headphone-Out Jack
Dynamic Frequency One RJ-45 LAN Jack
Intel Dynamic Video Memory Technology
One DC-in Jack
Microsoft DirectX®12 Compatible
Intel HD Graphics 600 (Celeron CPU integrated)
Dynamic Frequency
Intel Dynamic Video Memory Technology
Microsoft DirectX®12 Compatible
Storage
One Changeable 2.5" 7mm (h) SATA HDD/SSD
(Factory Option) eMMC 32GB/64GB/128GB

1 - 2 Specifications
 Introduction

Communication
Built-In Gigabit Ethernet LAN
1.0M HD PC Camera Module
(Factory Option) 4G LTE M.2 Module

WLAN/ Bluetooth M.2 Modules:

(Factory Option) Intel® Dual Band Wireless-AC 9260 Wire-
less LAN (802.11ac) + Bluetooth
(Factory Option) Intel® Dual Band Wireless-AC 9560 Wire-
less LAN (802.11ac) + Bluetooth
(Factory Option) Intel® Dual Band Wireless-AC 9462 Wire-
less LAN (802.11ac) + Bluetooth
Card Reader
Embedded Multi-In-1 Card Reader

1.Introduction
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC
MS (Memory Stick) / MS Pro / MS Duo
Environmental Spec
Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Power
Full Range AC/DC Adapter
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19V, 2.1A (40W)
Removable 3 Cell Smart Lithium-Ion Battery Pack, 31WH
(Factory Option) Removable 3 Cell Smart Lithium-Ion Bat-
tery Pack, 24WH
Dimensions & Weight
292.4mm (w) * 210.5mm (d) * 22.7mm (h)
(Height Excluding Battery Area)
1.2kg (Barebone with 31WH Battery)

Specifications 1 - 3
 Introduction

Figure 1
External Locator - Top View with LCD Panel Open
Top View

1. PC Camera
2 1 3
2. *PC Camera LED
*When the PC
camera is in use,
the LED will be
illuminated in red
4
3. Built-In Microphone
4. LCD
5. Power Button
1.Introduction

6. Keyboard
7. Touchpad & Buttons

1 - 4 External Locator - Top View with LCD Panel Open

 Introduction

External Locator - Front & Right Side Views Figure 2

Front View
1. LED Indicators

FRONT VIEW

1.Introduction
RIGHT SIDE VIEW
Figure 3
Right Side View
1. USB 2.0 Ports
2. Multi-in-1 Card
Reader
1 1
2 3 4 3. RJ-45 LAN Jack
4. DC-In Jack

External Locator - Front & Right Side Views 1 - 5

 Introduction

External Locator - Left Side & Rear View

Figure 4
Left Side View
1. Security Lock Slot
2. External Monitor /
Port LEFT SIDE VIEW
3. Vent
4. HDMI-Out Port
5. USB 3.0/3.1 Port
6. Microphone-In
1 4 5 6 7
Jack 2 3
7. Headphone-Out
1.Introduction

Jack

Figure 5
Rear View REAR VIEW
1. Battery
1

1 - 6 External Locator - Left Side & Rear View

 Introduction

External Locator - Bottom View

Figure 6
Bottom View
1. Battery
2. Speakers
3. Fan Intake/Vent
1

1.Introduction
3

2 2 Overheating

To prevent your com-

puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.

External Locator - Bottom View 1 - 7

 Introduction

Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1. KBC ITE IT8987E

2. ALC269
1.Introduction

5
3

1
4

1 - 8 Mainboard Overview - Top (Key Parts)

 Introduction

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts

1. HDD Connector
2. M.2 Connector
(WLAN Module)
3. Memory Slot
DDR4 SO-DIMM
4. CPU

1.Introduction
4

Mainboard Overview - Bottom (Key Parts) 1 - 9

 Introduction

Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors

1. External Monitor
Port
2. HDMI-Out Port
3. USB 3.0 Port
4. Microphone-In
Jack
1
5. Headphone-Out
Jack
6. Keyboard Cable
1.Introduction

Connector

2
6

1 - 10 Mainboard Overview - Top (Connectors)

 Introduction

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
Connectors

1. CCD Cable
Connector
2. LCD Connector
3. Fan Cable
Connector
1 5 4. Touchpad
Connector
2 5. Power Switch
Connector

1.Introduction
6. Speaker
Connectors

4
6

10 6

Mainboard Overview - Bottom (Connectors) 1 - 11

 Introduction
1.Introduction

1 - 12
 Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W515GU series notebook’s parts and subsystems.
When it comes to reassembly, reverse the procedures (unless otherwise indicated).

We suggest you completely review any procedure before you take the computer apart.

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.

A box with a  will also provide any possible helpful information. A box with a  contains warnings.

An example of these types of boxes are shown in the sidebar. 

Warning

Overview 2 - 1
 Disassembly

NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly

Connections
Connections within the computer are one of four types:

Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry
the locking collar away from its base. When replacing the connection, make
sure the connector is oriented in the same way. The pin1 side is usually not
indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side
to side as you pull it out. Do not pull on the wires themselves. When replac-
ing the connection, do not try to force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently
lift the connector away from its socket. When replacing the connection,
make sure the connector is oriented in the same way. The pin1 side is usually
not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them
apart. If the connection is very tight, use a small flat-head screwdriver - use
just enough force to start.

2 - 2 Overview
 Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or 
replacement job, take the following precautions: Power Safety
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components Warning
could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. Before you undertake
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. any upgrade proce-
These can hinder proper performance and damage components and/or data. You should also monitor the position of magnet- dures, make sure that
you have turned off the
ized tools (i.e. screwdrivers).
power, and discon-
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
nected all peripherals
5. Be careful with power. Avoid accidental shocks, discharges or explosions. and cables (including
• Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. telephone lines and
• When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. power cord). It is advis-
6. Peripherals – Turn off and detach any peripherals. able to also remove

2.Disassembly
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before han- your battery in order to
dling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do prevent accidentally
not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap turning the machine
instead. on.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils
which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged
surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws,
loose inside the computer.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
(For Computer Models Supplied with Light Blue Cleaning Cloth) Some computer models in this series come supplied with a
light blue cleaning cloth. To clean the computer case with this cloth follow the instructions below.
• Power off the computer and peripherals.
• Disconnect the AC/DC adapter from the computer.
• Use a little water to dampen the cloth slightly.
• Clean the computer case with the cloth.
• Dry the computer with a dry cloth, or allow it time to dry before turning on.
• Reconnect the AC/DC adapter and turn the computer on.

Overview 2 - 3
 Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery: To remove the 4G Module:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 6
To remove the Keyboard: 3. Remove the HDD page 2 - 7
1. Remove the battery page 2 - 5 4. Remove the 4G page 2 - 13
2. Remove the keyboard page 2 - 6
To remove the Click Board:
2.Disassembly

To remove the HDD: 1. Remove the battery page 2 - 5

1. Remove the battery page 2 - 5 2. Remove the keyboard page 2 - 6
2. Remove the keyboard page 2 - 6 3. Remove the HDD page 2 - 7
3. Remove the HDD page 2 - 7 4. Remove the wireless LAN page 2 - 11
5. Remove the click board page 2 - 14
To remove the System Memory:
To remove the CCD:
1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 6 1. Remove the battery page 2 - 5
3. Remove the HDD page 2 - 7 2. Remove the CCD page 2 - 15
4. Remove the system memory page 2 - 9

To remove the Wireless LAN Module:

1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 6
3. Remove the HDD page 2 - 7
4. Remove the wireless LAN page 2 - 11

2 - 4 Disassembly Steps
 Disassembly

Removing the Battery

1. Turn the computer off, and turn it over.
Figure 1
2. Slide the latch 1 in the direction of the arrow (Figure 1a).
Battery Removal
3. Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a).
4. Slide the battery 63 in the direction of the arrow 4 (Figure 1b). a. Slide the latch and hold in
place.
b. Slide the battery in the di-
a. rection of the arrow.
b.

2.Disassembly
2 1


3. Battery

Removing the Battery 2 - 5

 Disassembly

Removing the Keyboard

Figure 2
1. Turn off the computer and remove the battery (page 2 - 5).
Keyboard Removal
2. Use only the small tool A provided (see picture below) to carefully press the four keyboard latches 1 - 4 at the
top of the keyboard to elevate the keyboard from its normal position (Figure 2a).
a. Press the four latches to
release the keyboard. 3. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cable 6 (Figure 2b).
b. Lift the keyboard up and 4. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 (Figure 2b)
disconnect the cable 5. Carefully lift up the keyboard 5 (Figure 2c) off the computer.
from the locking collar. 6. Remove screws 8 - 12 to release the bottom case (Figure 2d).
c. Remove the keyboard.
d. Remove screws to re-
lease bottom case. a. c.
2.Disassembly

1 2 3 4


Re-Inserting the Key-
board 5
When re-inserting the
keyboard, align first A
the three keyboard d. 11
tabs (Figure 2e) that 9
are located at the bot-
tom, to the slots in the
case.
10
12
b. 8

 6 e.
5. Keyboard 5
7 7
• 5 Screws

Keyboard Tabs

2 - 6 Removing the Keyboard

 Disassembly

Removing the Hard Disk Drive Figure 3

The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 7mm HDD Assembly
(h) and a speed of 5400 RPM or lower. Follow your operating system’s installation instructions, and install all necessary Removal
drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Remove the cover and
screws.
Hard Disk Upgrade Process b. Remove the bottom case
1. Turn off the computer, remove the battery (page 2 - 5) and keyboard (page 2 - 6). and locate the hard disk.
2. Remove the SD card cover 16 and screws 2 - 6 (Figure 3a).
3. Carefully lift the bottom case 86 up in the direction of the arrow 7 and remove it (Figure 3b).
4. The hard disk will be visible at point 9 on the computer. (Figure 3b)

a. 3

2.Disassembly
2

HDD System Warning

New HDD’s are blank. Before you begin make sure:

1 You have backed up any data you want to keep from your old
HDD.

You have all the CD-ROMs and FDDs required to install your
operating system and programs.
6 5 4
If you have access to the internet, download the latest appli-
cation and hardware driver updates for the operating system
you plan to install. Copy these to a removable medium.

b.

1. SD Card Cover
8. Bottom case
7 8
9 8
• 5 Screws

Removing the Hard Disk Drive 2 - 7

 Disassembly

5. Slightly lift and pull the hard disk in the direction of arrow 10 (Figure 4c).
Figure 4 6. Lift the hard disk 11 out of the bay 12 (Figure 4d).
HDD Assembly 7. Reverse the process to install a new hard disk (do not forget to replace all the screws and cover).
Removal (cont’d.)

c. Slightly lift and pull the c. d.

HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
12
11
10
2.Disassembly


11. HDD

2 - 8 Removing the Hard Disk Drive

 Disassembly

Removing the System Memory (RAM) Figure 5

RAM Module
The computer has a memory socket for 260 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting Removal
DDR4 Up to 1866/2133/2400MHz. The main memory can be expanded up to 8GB. The total memory size is automati-
cally detected by the POST routine once you turn on your computer. a. The RAM module will
Memory Upgrade Process be visible at point 1
on the mainboard.
1. Turn off the computer, remove the battery (page 2 - 5), keyboard (page 2 - 6), and bottom case (page 2 - 7). b. Pull the release lat-
2. The RAM modules will be visible at point 1 on the mainboard (Figure 5a). ches.
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket in the direction indicated by the c. Remove the module.
arrows (Figure 5b).
4. The RAM module 64 will pop-up (Figure 5c), and you can then remove it.

2.Disassembly
a. c.

Contact Warning

Be careful not to touch

the metal pins on the
4 module’s connecting
edge. Even the cleanest
1 hands have oils which
can attract particles, and
degrade the module’s
performance.
b.


4. RAM Module
2 3

Removing the System Memory (RAM) 2 - 9

 Disassembly

Figure 6 5. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
RAM Module 6. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
Removal (cont’d) as it will go. DO NOT FORCE IT; it should fit without much pressure.
7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
d. Replace the bottom 8. Replace the bottom case and tighten the screws and cover (Figure 6d).
case and tighten the 9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
screws.

d.
2.Disassembly

2 - 10 Removing the System Memory (RAM)

 Disassembly

Removing the Wireless LAN Module Figure 7

1. Turn off the computer, remove the battery (page 2 - 5), keyboard (page 2 - 6), and bottom case (page 2 - 7). Wireless LAN
2. Carefully disconnect cables 1 & 2 , then remove screw 3 from the module socket (Figure 7a). Module Removal
3. The Wireless LAN module 4 (Figure 7b) will pop-up.
4. Lift the Wireless LAN module 4 (Figure 7c) up and off the computer. a. Disconnect the cables
and remove the screw.
b. The WLAN module will
pop up.
c. Lift the WLAN module
a. b. c. out.

1
2 Note: Make sure you re-
4 connect the antenna ca-

2.Disassembly
3
ble to ‘’1’’ + ‘’2’’socket
(Figure 7a). (See over-
leaf)

4

4. WLAN Module.

• 1 Screw

Removing the Wireless LAN Module 2 - 11

 Disassembly

Wireless LAN, and Combo Module Cables

Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, and LTE modules are not
labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for identifi-
cation as outlined in the table below.

Antenna Cable Cover

Module Type Cable Color
Type Type

WLAN/WLAN & Bluetooth WM 1 Black Transparent

Combo WM 2 Black White

LTE 1 Black Black

2.Disassembly

LTE Broadband
LTE 2 Black Blue

Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).

2 - 12 Wireless LAN, and Combo Module Cables

 Disassembly

Removing the 4G Module Figure 8

1. Turn off the computer, remove the battery (page 2 - 5), keyboard (page 2 - 6), and bottom case (page 2 - 7). 4G Module Removal
2. Carefully disconnect cables 1 & 2 , then remove screw 3 from the module socket (Figure 8a).
3. The 4G module 4 (Figure 8b) will pop-up. a. Disconnect the cables
and remove the screw.
4. Lift the 4G module 4 (Figure 8c) up and off the computer.
b. The 4G module will pop
up.
c. Lift the 4G module out.
a. b. c.

Note: Make sure you re-

1 connect the antenna ca-
ble to ‘’1’’ + ‘’2’’socket
4 4 (Figure 8a). (See over-

2.Disassembly
3
leaf)
2


4. 4G LTE Module.

• 1 Screw

Removing the 4G Module 2 - 13

 Disassembly

Figure 9 Removing the Click Board Module

Click Board Module 1. Turn off the computer, remove the battery (page 2 - 5), keyboard (page 2 - 6), bottom case (page 2 - 7), and
Removal WLAN (page 2 - 11).
2. Carefully disconnect cables 1 & 2 , then remove screws 3 & 4 from the module (Figure 9a).
a. Disconnect the cables 3. Lift the click board module 5 (Figure 9b) up and off the computer.
and remove the screw.
b. Lift the click board out.
a. b.
2.Disassembly

1 2
3 4


5. Click Board Module

• 2 Screws

2 - 14 Removing the Click Board Module

 Disassembly

Removing the CCD Module Figur

1. Turn off the computer, remove the battery (page 2 - 5). CCD M
2. Turn the computer over, run your fingers around the inner frame of the LCD panel at the points indicated by the Remo
arrows 1 - 4 (Figure 10a).
3. Carefully remove the LCD panel cover 5 off (Figure 10b). a. Run your fin
the inner fr
4. Disconnect the cable 6 (Figure 10c).
LCD panel
5. Remove the CCD module 7 off (Figure 10d). indicated by
b. Remove the
cover.
a. c. c. Disconnect
3 d. Remove the
ule.
6

2.Disassembly
4
2
d.
7

b.


5. LCD Fro
Cover
7. CCD Mod

Removing the CCD Module 2 - 15

 Disassembly
2.Disassembly

2 - 16 Removing the CCD Module

 Part Lists

Appendix A:Part Lists

This appendix breaks down the W515GU series notebook’s construction into a series of illustrations. The component part
numbers are indicated in the tables opposite the drawings.

Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.

Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the

A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1
 Part Lists

Parts List Illustration Location

The following table indicates where to find the appropriate parts list illustration.
Table A - 1
Parts List Illustration
Parts
Location
Top page A - 3
Bottom page A - 4
MB page A - 5
LCD page A - 6
A.Part Lists

A - 2 Parts List Illustration Location

 Part Lists

Top

A.Part Lists
Figure A - 1
Top

Top A - 3
 Part Lists

Bottom
A.Part Lists

Figure A - 2
Bottom

A - 4 Bottom
 Part Lists

MB

A.Part Lists
Figure A - 3
MB

MB A - 5
 Part Lists

LCD
A.Part Lists

Figure A - 4
LCD

A - 6 LCD
 Schematic Diagrams

Appendix B: Schematic Diagrams

Table B - 1
This appendix has circuit diagrams of the W515GU notebook’s PCB’s. The following table indicates where to find the SCHEMATIC
appropriate schematic diagram. DIAGRAMS

Diagram - Page Diagram - Page Diagram - Page

System Block Diagram - Page B - 2 RTD2136 - Page B - 15 VCGI & VNN - Page B - 28
SOC DDR - Page B - 3 Panel Con - Page B - 16 VCore - Page B - 29

B.Schematic Diagrams
SOC Display Interface - Page B - 4 RTD2168-CG, CRT - Page B - 17 AC-In, Charger - Page B - 30
SOC PCIE/SATA/USB - Page B - 5 TPM/USB - Page B - 18 I/O Board - Page B - 31
GPIO - Page B - 6 WLAN, 3G, MSATA - Page B - 19 RTL8411 - Page B - 32
SMB/CNV - Page B - 7 KBC-ITE IT8987t - Page B - 20 Power SW Board - Page B - 34
RTC/PLU/CLK/SVID - Page B - 8 Audio Codec - Page B - 21 Click Board - Page B - 35

Audio/LPC/SPI/eMMC - Page B - 9 Conn, CCD, Fan, Click - Page B - 22
Version Note
SOC Power - Page B - 10 eMMC / LED / Hole / Nut - Page B - 23
The schematic dia-
SOC VSS - Page B - 11 System Power - Page B - 24 grams in this chapter
Level Shifter - Page B - 12 1.05VS / 1.8VAI - Page B - 25 are based upon ver-
sion 6-7P-W51G5-002.
DDR4 SO-DIMM_0 - Page B - 13 VDD3, VDD5 - Page B - 26 If your mainboard (or
HDMI Port - Page B - 14 VTT_MEM / 1.35V - Page B - 27 other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).

B - 1
 Schematic Diagrams

System Block Diagram

5 4 3 2 1

5 IN 1 6-7P-W51G5-002 1.8VS,3.3VA,3.3V,3.3VS
5V,5VS
W510GU MAIN BOARD
SHEET 2~29 6-71-W51G0-D02 W515GU Gemini Lake System Block Diagram SHEET 23

E IO BOARD 1.8VA,1.05VS E
USB2.0 x2,SPEAK CONN SHEET 24
CARD READER CON,RJ45 CONN 85ohm 6.5 inch
1866/2133/2400MHz
SHEET 30~31 6-71-W51G1-D02 RTD2136N DDR4 / 1.2V DDR4 VDD5,VDD3
(eDP to LVDS) SO-DIMM A SHEET 25
AC CONNECTOR BOARD SHEET 14
SYSTEM SMBUS SHEET 12
SHEET 32 6-71-W51PC-D01
Gemini lake VTT_MEM,1.2V,2.5V
POWER SWITCH BOARD SHEET 26
SHEET 33 6-71-W51PS-D02
eDP LCD 6w SoC
SHEET 15
VCGI,VNN
B.Schematic Diagrams

CLICK BOARD 6-71-W51P2-D03-B SHEET 27

SHEET 34 6-71-W51P2-D03-C RTD2168-CG
CRT
SHEET 16 SHEET 16 VCORE NCP81218
D D
INT SPKER-L SHEET 28
1.5W/4ohm
HDMI SHEET 13
VIN,V_BAT
SYNAPTICS 88ohm 7.5 inch SHEET 29
Sheet 1 of 31 TOUCH PAD EC BIOS
MIC
IN
HP
OUT
SHEET 21 SPI SPI
System Block SHEET 19 SHEET 4 BGA 25x24mm SHEET 20
GPIO 50 ohm 9 inch
Diagram EC
I2C 50 ohm 13 inch
ITE 8987 50ohm SPI 50 ohm 5 inch I/O BOARD
QFPS128 LPC 25 MHz SM bus 50 ohm 13 inch
14*14*1.6mm RELTEK Codec
C OPTION INT SPKER-R C
SHEET 19 ALC269 VC2 1.5W/4ohm
TPM
50ohm SHEET 30
EC SMBUS SHEET 17 SHEET 20

19.2MHz
THERMAL SMART SMART AZALIA LINK 50ohm 24 MHz
INT. K/B
SENSOR BATTERY FAN
DEVICE DOWN 2.5G 7 inch
SHEET 19 50ohm
SHEET 2 AC-IN
SHEET 29
SHEET 21 PCIE 85ohm 7 inch 100 MHz 5G 7 inch
32.768KHz
SHEET 2, 3, 4, 5, 6, 7, 8, CNVI
9,10
50ohm WLAN(PCIE1) LAN/Card reader(PCIE0)
SATA III 6Gbps 85ohm 7 inch NGFF SOCKET
CNVI
USB3.0 6Gbps 85ohm 8 inch BT (SOC USB7) RTL8411B
B SHEET 18 SHEET 31 B

USB2.0 480Mbps 25 MHz

HDD 3G CARD USB3.0 port1 RJ-45 4IN1

SHEET 18 (SOC USB0) SOCKET
SATA 0 OPTION
SHEET 21
CCD+INT MIC SHEET 31 SHEET 31
USB Charge (SOC USB6)
SLG55593VTR SHEET 21
SHEET 17
USB2.0 PORT 1/2
SHEET 30

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[01] BLOCK DIAGRAM
Size Document Number Rev
Custom SCHEMATIC1 6-7P-W51G5-002 3.0

Date: Tuesday, January 30, 2018 Sheet 1 of 35

5 4 3 2 1

B - 2 System Block Diagram

 Schematic Diagrams

SOC DDR

5 4 3 2 1

U25B
U25A DDR4_LP3_LP4 DDR4_LP3_LP4
AY3 BJ24
DDR4_LP3_LP4 DDR4_LP3_LP4 BD3 MEM_CH1_DQ40 MEM_CH1_DQS0_P BK25
BJ36 AT53 M_A_DQSP0 [12] MEM_CH1_DQ41 MEM_CH1_DQS0
[12] M_A_DQ40 MEM_CH0_DQ40 MEM_CH0_DQS0_P BD1
BK37 AT55 M_A_DQSN0 [12] MEM_CH1_DQ42
[12] M_A_DQ41 MEM_CH0_DQ41 MEM_CH0_DQS0 BC3 BD25
BJ35 MEM_CH1_DQ43 MEM_CH1_DQS1_P
[12] M_A_DQ42 MEM_CH0_DQ42 AY1 BF25
D BL36 AW49 M_A_DQSP1 [12] MEM_CH1_DQ44 MEM_CH1_DQS1 D
[12] M_A_DQ43 MEM_CH0_DQ43 MEM_CH0_DQS1_P BA3
BJ39 AW48 M_A_DQSN1 [12] MEM_CH1_DQ45
[12] M_A_DQ44 MEM_CH0_DQ44 MEM_CH0_DQS1 BA2 BL18
BL40 MEM_CH1_DQ46 MEM_CH1_DQS2_P
[12] M_A_DQ45 MEM_CH0_DQ45 BE2 BJ18
BJ40 BC54 M_A_DQSP2 [12] MEM_CH1_DQ47 MEM_CH1_DQS2
[12] M_A_DQ46 MEM_CH0_DQ46 MEM_CH0_DQS2_P AR8
BK41 BB53 M_A_DQSN2 [12] MEM_CH1_DQ32
[12] M_A_DQ47 MEM_CH0_DQ47 MEM_CH0_DQS2 AN15 AV19
BA35 MEM_CH1_DQ33 MEM_CH1_DQS3_P
[12] M_A_DQ32 MEM_CH0_DQ32 AN17 AV21
AY33 AR41 M_A_DQSP3 [12] MEM_CH1_DQ34 MEM_CH1_DQS3
[12] M_A_DQ33 MEM_CH0_DQ33 MEM_CH0_DQS3_P AU12
BA33 AR43 M_A_DQSN3 [12] MEM_CH1_DQ35
[12] M_A_DQ34 MEM_CH0_DQ34 MEM_CH0_DQS3 AN12 AR13
AY35 MEM_CH1_DQ36 MEM_CH1_DQS4_P
[12] M_A_DQ35 MEM_CH0_DQ35 AN13 AR15
BA37 AV37 M_A_DQSP4 [12] MEM_CH1_DQ37 MEM_CH1_DQS4
[12] M_A_DQ36 MEM_CH0_DQ36 MEM_CH0_DQS4_P AU13
AY37 AV35 M_A_DQSN4 [12] MEM_CH1_DQ38
[12] M_A_DQ37 MEM_CH0_DQ37 MEM_CH0_DQS4 AU15 BB3
AY39 MEM_CH1_DQ39 MEM_CH1_DQS5_P
[12] M_A_DQ38 MEM_CH0_DQ38 AP3 BC2
BA39 BL38 MEM_CH1_DQ56 MEM_CH1_DQS5

B.Schematic Diagrams
[12] M_A_DQ39 MEM_CH0_DQ39 MEM_CH0_DQS5_P M_A_DQSP5 [12] AU2
BL34 BJ38 M_A_DQSN5 [12] MEM_CH1_DQ57
[12] M_A_DQ56 MEM_CH0_DQ56 MEM_CH0_DQS5 AV3 AW7
BL30 MEM_CH1_DQ58 MEM_CH1_DQS6_P
[12] M_A_DQ57 MEM_CH0_DQ57 AW3 AW8
BJ29 BF31 M_A_DQSP6 [12] MEM_CH1_DQ59 MEM_CH1_DQS6
[12] M_A_DQ58 MEM_CH0_DQ58 MEM_CH0_DQS6_P AN2
BK29 BD31 M_A_DQSN6 [12] MEM_CH1_DQ60
[12] M_A_DQ59 MEM_CH0_DQ59 MEM_CH0_DQS6 AP1 AT1
BJ33 MEM_CH1_DQ61 MEM_CH1_DQS7_P
[12] M_A_DQ60 MEM_CH0_DQ60 AR3 AT3
BK33 BJ32 M_A_DQSP7 [12] MEM_CH1_DQ62 MEM_CH1_DQS7
[12] M_A_DQ61 MEM_CH0_DQ61 MEM_CH0_DQS7_P AV1
BJ34 BK31 M_A_DQSN7 [12] MEM_CH1_DQ63
[12] M_A_DQ62 MEM_CH0_DQ62 MEM_CH0_DQS7 AR5 BH9
BJ30 MEM_CH1_DQ48 MEM_CH1_MA0
[12] M_A_DQ63 MEM_CH0_DQ63 BA8 DDR1 BC13
BD29 BG54 MEM_CH1_DQ49 MEM_CH1_MA1
[12] M_A_DQ48 MEM_CH0_DQ48 NCTF1 AU7 BD11
BF29 DDR0 BH54 MEM_CH1_DQ50 MEM_CH1_MA2
[12] M_A_DQ49 MEM_CH0_DQ49 NCTF2 AU5 BD13
BH29 BJ42 MEM_CH1_DQ51 MEM_CH1_MA3
[12] M_A_DQ50 MEM_CH0_DQ50 NCTF3 BA5 BF11
BF33 BF39 MEM_CH1_DQ52 MEM_CH1_MA10
[12] M_A_DQ51 MEM_CH0_DQ51 MEM_CH0_ODT1 M_A_ODT1 [12] BA7 BE5
BC29 BK43 MEM_CH1_DQ53 MEM_CH1_MA13
[12] M_A_DQ52 MEM_CH0_DQ52 MEM_CH0_CS1 M_A_CS1_N [12] AU8 BH5
BD33 MEM_CH1_DQ54 MEM_CH1_MA16
[12] M_A_DQ53 MEM_CH0_DQ53 BA10 BH6
BF35 BL44 MEM_CH1_DQ55 MEM_CH1_BA0
[12] M_A_DQ54 MEM_CH0_DQ54 NCTF4 BF13
BH35 BD39 MEM_CH1_BA1
[12] M_A_DQ55 MEM_CH0_DQ55 MEM_CH0_ODT0 M_A_ODT0 [12] BJ26 BG4
BJ43
Sheet 2 of 31
C MEM_CH1_DQ0 MEM_CH1_BG1 C
MEM_CH0_CS0 M_A_CS0_N [12] BL26 BE7
AR53 BF54 MEM_CH1_DQ1 MEM_CH1_ACT
[12] M_A_DQ0 MEM_CH0_DQ0 MEM_CH0_CKE1 M_A_CKE1 [12] BJ27
AP55 BF55 MEM_CH1_DQ2
[12] M_A_DQ1 MEM_CH0_DQ1 MEM_CH0_CKE0 M_A_CKE0 [12] BK27 BK11
AP53 MEM_CH1_DQ3 MEM_CH1_MA11
[12] M_A_DQ2 MEM_CH0_DQ2 BJ23 BJ12
[12]
[12]
[12]
M_A_DQ3
M_A_DQ4
M_A_DQ5
AN54
AU54
AV53
AV55
MEM_CH0_DQ3
MEM_CH0_DQ4
MEM_CH0_DQ5
MEM_CH0_CLK0_P
MEM_CH0_CLK0
BE49
BE51

BC49
M_A_CKP0 [12]
M_A_CKN0 [12]
BK23
BJ22
BL22
MEM_CH1_DQ4
MEM_CH1_DQ5
MEM_CH1_DQ6
MEM_CH1_DQ7
MEM_CH1_MA12
MEM_CH1_MA14
MEM_CH1_MA15
MEM_CH1_BG0
BK9
BJ11
BJ10
SOC DDR
[12] M_A_DQ6 MEM_CH0_DQ6 MEM_CH0_CLK1_P M_A_CKP1 [12] BD27 BJ4
AW53 BC48 MEM_CH1_DQ8 MEM_CH1_MA4
[12] M_A_DQ7 MEM_CH0_DQ7 MEM_CH0_CLK1 M_A_CKN1 [12] BF27 BL6
AU51 MEM_CH1_DQ9 MEM_CH1_MA5
[12] M_A_DQ8 MEM_CH0_DQ8 BH27 BJ5
AU48 BD45 MEM_CH1_DQ10 MEM_CH1_MA6
[12] M_A_DQ9 MEM_CH0_DQ9 MEM_CH0_MA0 M_A_MA0 [12] BC27 BJ9
AU49 BH50 MEM_CH1_DQ11 MEM_CH1_MA7
[12] M_A_DQ10 MEM_CH0_DQ10 MEM_CH0_MA1 M_A_MA1 [12] BH21 BJ6
BA46 BH47 MEM_CH1_DQ12 MEM_CH1_MA8
[12] M_A_DQ11 MEM_CH0_DQ11 MEM_CH0_MA2 M_A_MA2 [12] BF23 BJ8
BA48 BF45 MEM_CH1_DQ13 MEM_CH1_MA9
[12] M_A_DQ12 MEM_CH0_DQ12 MEM_CH0_MA10 M_A_MA10 [12] BD23
BA49 BH43 MEM_CH1_DQ14
[12] M_A_DQ13 MEM_CH0_DQ13 MEM_CH0_MA13 M_A_MA13 [12] BF21 BF17
BA51 BD41 MEM_CH1_DQ15 MEM_CH1_CLK0_P
[12] M_A_DQ14 MEM_CH0_DQ14 MEM_CH0_MA16 M_A_MA16 [12] BK19 BD17
AR51 BH51 MEM_CH1_DQ16 MEM_CH1_CLK0
[12] M_A_DQ15 MEM_CH0_DQ15 MEM_CH0_BA1 M_A_BA1 [12] BJ20
AY55 BD43 MEM_CH1_DQ17
[12] M_A_DQ16 MEM_CH0_DQ16 MEM_CH0_BA0 M_A_BA0 [12] BL20 BF15
BA54 BF43 MEM_CH1_DQ18 MEM_CH1_CLK1_P
[12] M_A_DQ17 MEM_CH0_DQ17 MEM_CH0_BG1 M_A_BG1 [12] BJ21 BH15
BA53 BF41 MEM_CH1_DQ19 MEM_CH1_CLK1
[12] M_A_DQ18 MEM_CH0_DQ18 MEM_CH0_ACT M_A_ACT_N [12] BJ17
AY53 BG52 MEM_CH1_DQ20
[12] M_A_DQ19 MEM_CH0_DQ19 MEM_CH0_MA3 M_A_MA3 [12] BJ16 BJ13
BC53 MEM_CH1_DQ21 NCTF3
[12] M_A_DQ20 MEM_CH0_DQ20 BK15 BL12
BD55 BK45 MEM_CH1_DQ22 NCTF4
[12] M_A_DQ21 MEM_CH0_DQ21 MEM_CH0_MA4 M_A_MA4 [12] BL16 BF1
BE54 BJ46 MEM_CH1_DQ23 NCTF1 D02 DEL R124
[12] M_A_DQ22 MEM_CH0_DQ22 MEM_CH0_MA5 M_A_MA5 [12] BA21 BF2
BD53 BJ44 MEM_CH1_DQ24 MEM_CH1_CS1
[12] M_A_DQ23 MEM_CH0_DQ23 MEM_CH0_MA6 M_A_MA6 [12] AY23 BC7
AN43 BJ47 MEM_CH1_DQ25 MEM_CH1_ODT1
[12] M_A_DQ24 MEM_CH0_DQ24 MEM_CH0_MA7 M_A_MA7 [12] BA23
AN44 BJ45 MEM_CH1_DQ26
[12] M_A_DQ25 MEM_CH0_DQ25 MEM_CH0_MA8 M_A_MA8 [12] BA17 BH2
AR48 BK47 MEM_CH1_DQ27 MEM_CH1_CS0
[12] M_A_DQ26 MEM_CH0_DQ26 MEM_CH0_MA9 M_A_MA9 [12] AY21 BC8
AU41 BJ51 MEM_CH1_DQ28 MEM_CH1_ODT0
B [12] M_A_DQ27 MEM_CH0_DQ27 MEM_CH0_MA11 M_A_MA11 [12] AY17 BG2 B
AU43 BJ52 MEM_CH1_DQ29 NCTF2
[12] M_A_DQ28 MEM_CH0_DQ28 MEM_CH0_MA12 M_A_MA12 [12] AY19 BK13
AN41 BJ48 MEM_CH1_DQ30 MEM_CH1_CKE0
[12] M_A_DQ29 MEM_CH0_DQ29 MEM_CH0_MA14 M_A_MA14 [12] BA19 BJ14
AN39 BJ50 MEM_CH1_DQ31 MEM_CH1_CKE1
[12] M_A_DQ30 MEM_CH0_DQ30 MEM_CH0_MA15 M_A_MA15 [12]
AU44 BL50
[12] M_A_DQ31 MEM_CH0_DQ31 MEM_CH0_BG0 M_A_BG0 [12] AY29 M_A_RCOMP 110_1%_04 R141
MEM_CH0_RCOMP
AY31 TP_+M0_VREF_DQ
MEM_CH0_VREFDQ BC15
AV29 MEM_CH1_RESET
MEM_CH0_VREFCA M0_VREF_CA [12] AY27 M_B_RCOMP 110_1%_04 R138
MEM_CH1_RCOMP
1 OF 13 AV27 M1_VREF_CA
MEM_CH1_VREFCA AY25 TP_+M1_VREF_DQ
MEM_CH1_VREFDQ
BC43
MEM_CH0_RESET M_A_RESET_N [12]

2 OF 13

Analog Thermal Sensor

6-17-10320-732
3.3V PTH1
A EW TF02-104F4F-N A
1 2
THERM_VOLT [19]
1:2 (4mils:8mils)

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
R69

20K_1%_04
[11,15,17,18,19,23,26] 3.3V
Title
[02] SOC DDR3L
Size Document Number Rev
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 2 of 35

5 4 3 2 1

SOC DDR B - 3
 Schematic Diagrams

SOC Display Interface

5 4 3 2 1

U25C
1.8VS
AH1 AL2

HDMI [13]
[13]
HDMI_DATA0P
HDMI_DATA0N
AH3

AE2
DDI0_TXP_0
DDI0_TXN_0
MDSI_A_CLKP
MDSI_A_CLKN
AM3

AG13
[13] HDMI_DATA1P DDI0_TXP_1 MDSI_C_CLKP
AE3 AG12

2
[13] HDMI_DATA1N DDI0_TXN_1 DDI0/DDI_B MDSI_C_CLKN Q14A

G
AJ2 HDMI_CTRLCLK
[13] HDMI_DATA2P DDI0_TXP_2 1 6 HDMI_SCL-C [13]
1.8VS AJ3 AN5

D
[13] HDMI_DATA2N DDI0_TXN_2 MDSI_A_DP_0 AN7 MTDK3S6R

5
AG2 MDSI_A_DN_0 Q14B

G
[13] HDMI_CLOCKP DDI0_TXP_3
AG3 AJ15 HDMI_CTRLDATA
R104 [13] HDMI_CLOCKN DDI0_TXN_3 MDSI_A_DP_1 4 3 HDMI_SDA-C [13]
AJ17

D
D *10K_04 MDSI_A_DN_1 D
AC12 MDSI MTDK3S6R
AC10 DDI0_AUXP AJ7
DDI0_AUXN MDSI_A_DP_2 AJ5
HDMI_HPD C39 MDSI_A_DN_2
DDI0_HPD AJ10

D
R1402.2K_04 HDMI_CTRLCLK B43 MDSI_A_DP_3 AJ12
1.8VS DDI0_DDC_SCL MDSI_A_DN_3
Q11 HDMI_CTRLDATA C43
G 2SK3018S3 R1352.2K_04 DDI0_DDC_SDA AG15
[13] HDMI_HPD-C MDSI_C_DP_0 AG17

S
AA2 MDSI_C_DN_0
[16] VGA_LANE0P DDI1_TXP_0
AA3 AG8

VGA [16]

[16]
VGA_LANE0N

VGA_LANE1P
Y3
Y1
DDI1_TXN_0

DDI1_TXP_1 DDI1/DDI_C
MDSI_C_DP_1
MDSI_C_DN_1
AG10

AG7
[16] VGA_LANE1N DDI1_TXN_1 MDSI_C_DP_2 AG5
AD1 MDSI_C_DN_2
AD3 DDI1_TXP_2 AE15
B.Schematic Diagrams

DDI1_TXN_2 MDSI_C_DP_3 AE17

1.8VS AC2 MDSI_C_DN_3
AC3 DDI1_TXP_3
DDI1_TXN_3
AC7
R125 [16] VGA_AUX_CH_P DDI1_AUXP
AC5
*10K_04 [16] VGA_AUX_CH_N DDI1_AUXN

1.8VS R133 *2.2K_04 DDI1_CTRLCLK C42

DDI1_DDC_SCL MIPI_I2C_SCL
R53 ⸛㗪ľōŐŘ
DDI1_CTRLDATA A42
Sheet 3 of 31 [16] VGA_HPD
R60
0_04
R132 *2.2K_04 VGA_HPD_R C38 DDI1_DDC_SDA
DDI1_HPD MIPI_I2C_SDA
R54 ⮓ℍľʼnŊ
Hi=override

D
C
D30 Lo=No Override C

SOC Display G
Q36
*2SK3018S3
[14] EDP_TXP_0
AE12
AE13 EDP_TXP_0
MDSI_C_TE
MDSI_A_TE
T53 SOC_GPIO43
T55 SOC_GPIO42
RB751S-40G
A C ME_W E [19]

eDP [14] EDP_TXN_0

S
EDP_TXN_0
D02 㕘⡆枸䔁
Interface [14]
[14]
EDP_TXP_1
EDP_TXN_1
AC15
AC17

AE10
EDP_TXP_1
EDP_TXN_1
eDP/DDI_A

MDSI_RCOMP
AL5 MDSI_RCOMP R121 150_1%_04

1.8VS AE8 EDP_TXP_2

EDP_TXN_2
AE5
AE7 EDP_TXP_3
R122 EDP_TXN_3
*100K_04
W17
[14] EDP_AUXP EDP_AUXP
W15
[14] EDP_AUXN EDP_AUXN
R127 EDP_HPD_R B39
*0_04 EDP_HPD
D

SOC_BRIGHTNESS B41
[11] SOC_BRIGHTNESS SOC_BKLTEN PNL0_BKLCTL
Q35 C40
[11] SOC_BKLTEN SOC_ENAVDD PNL0_BKLTEN
G 2SK3018S3 C41
[14,15] EDP_HPD [15] SOC_ENAVDD PNL0_VDDEN
S

R110 100_1%_04 EDP_PLLOBS_DP AA5

D02 ADDQ35 FOR 㺷暣ISSUE EDP_RCOMP_P
EDP_PLLOBS_DN AA7
EDP_RCOMP

3 OF 13

B B
1.8VS
Hardware Straps (1)
GPIO_43
Ensure that this strap is pulled HIGH when Flash Descriptor Override 1.8VA
RSM_RST_N de-asserts for normal platform operation. 0=No Override (Normal Operation)
Internal PU 20K CMOS SOC_GPIO43 1=Override R108 R131 R126
*100K_04 *100K_04 *100K_04
Internal PD 20K CMOS SOC_GPIO42 R422 4.7K_1%_04

SOC_BKLTEN
SOC_BRIGHTNESS
SOC_ENAVDD

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[03] SOC DISPLAY INTERFACE
Size Document Number Rev
[5,17,20,23]
[4,5,6,7,8,9,11,17,18,19,22,23,24]
1.8VS
1.8VA A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 3 of 35

5 4 3 2 1

B - 4 SOC Display Interface

 Schematic Diagrams

SOC PCIE/SATA/USB
5 4 3 2 1

U25D

R109 56_1%_04 PCIECLK_RCOMP L10 H1

PCIE_REF_CLK_RCOMP SATA_P1_USB3_P5_TXP H2
R12 SATA_P1_USB3_P5_TXN
[21] CLK_PCIE0_GLAN PCIE_CLKOUT0P
CARDREADER(100MHz) R10 SATA/USB3 H4
[21] CLK_PCIE0_GLAN# PCIE_CLKOUT0N SATA_P1_USB3_P5_RXP G5
N7 SATA_P1_USB3_P5_RXN
N5 PCIE_CLKOUT1P M/B USB port(2.0+3.0)
PCIE_CLKOUT1N PCIe B15
USB3_P0_TXP USB3_TX0_P [17]
D R7 C15 USB3_TX0_N [17] D
[18] CLK_PCIE2_MINI PCIE_CLKOUT2P USB3_P0_TXN
WLAN(100MHz) R5
[18] CLK_PCIE2_MINI# PCIE_CLKOUT2N F15 left
USB3_P0_RXP USB3_RX0_P [17]
N8 D15 USB3_RX0_N [17]
N10 PCIE_CLKOUT3P USB3_P0_RXN
PCIE_CLKOUT3N USB3 C14
USB3_P1_TXP A14
C306 0.1u_10V_X7R_04 PCIE_TXP0_C E2 USB3_P1_TXN
[21] PCIE_TXP0_GLAN PCIE_TXN0_C PCIE_P0_TXP
C313 0.1u_10V_X7R_04 F2 J11
LAN/CARD READER [21] PCIE_TXN0_GLAN PCIE_P0_TXN USB3_P1_RXP H11
G7 USB3_P1_RXN
[21] PCIE_RXP0_GLAN PCIE_P0_RXP
H6
[21] PCIE_RXN0_GLAN PCIE_P0_RXN C10
PCIE_P3_USB3_P4_TXP A10
A7 PCIE_P3_USB3_P4_TXN
C7 PCIE_P1_TXP PCIe/USB3 H9
PCIE_P1_TXN PCIE_P3_USB3_P4_RXP F9

B.Schematic Diagrams
D4 PCIE_P3_USB3_P4_RXN
E5 PCIE_P1_RXP C11
PCIE_P1_RXN PCIE_P4_USB3_P3_TXP USB3_TX3_P [18]
B11 USB3_TX3_N [18]
C300 0.1u_10V_X7R_04 PCIE_TXP2_C C9 PCIE_P4_USB3_P3_TXN
[18] PCIE_TXP2_W LAN
C298 0.1u_10V_X7R_04 PCIE_TXN2_C B9 PCIE_P2_TXP D11 3G
[18] PCIE_TXN2_W LAN PCIE_P2_TXN PCIE_P4_USB3_P3_RXP USB3_RX3_P [18]
F11 USB3_RX3_N [18]
WLAN E7 PCIE_P4_USB3_P3_RXN
[18] PCIE_RXP2_W LAN PCIE_P2_RXP
F6 B13
[18] PCIE_RXN2_W LAN PCIE_P2_RXN PCIE_P5_USB3_P2_TXP C13
PCIE_P5_USB3_P2_TXN
F13
D02 㚜㎃wlan CLKREQ & WAKE PORT PCIE_P5_USB3_P2_RXP D13
C
[11] LAN_CLKREQ#_R
PCIECLKRQ1#
A46
C45
B45
PCIE_CLKREQ0
PCIE_CLKREQ1
PCIE_P5_USB3_P2_RXN

PCIE2_USB3_SATA3_RCOMP
C5
C6
PCIE_USB3_OBS0 R351
PCIE_USB3_OBS1
100_1%_04
C
Sheet 4 of 31
[11] W LAN_CLKREQ#_R PCIE_CLKREQ2 PCIE2_USB3_SATA3_RCOMP_P
C44

1.8VA R139
R137
10K_04
10K_04
PCIECLKRQ1#
PCIECLKRQ3#
F47
D47
PCIE_CLKREQ3

PCIE_WAKE0 NC1
AA10
AA8
SOC PCIE/SATA/
PCIE_WAKE1 NC2
[11]

[11]
PCIE_W AKE0_N

PCIE_W AKE2_N
F45
D50 PCIE_WAKE2
PCIE_WAKE3 SSIC NC5
NC4
W13
W12
USB
U15
SATA NC3

[21] SATATXP0 J3 U7 USB_PP0 [17]

J2 SATA_P0_TXP USB2_DP0 U5 M/B Left USB port(2.0+3.0)
[21] SATATXN0 SATA_P0_TXN USB2_DN0 USB_PN0 [17]
SATA HDD J7 N2
[21] SATARXP0 SATA_P0_RXP USB2_DP1 USB_PP1 [21]
J5 N3
[21] SATARXN0 SATA_P0_RXN USB2_DN1 USB_PN1 [21] USB 2.0 port1
L2 USB_PP2 [21]
USB2_DP2 L3 USB 2.0 port2
USB2_DN2 USB_PN2 [21]
R13 USB_PP3 [18]
USB2
USB2_DP3 R15 3G
USB2_DN3 USB_PN3 [18]
M1
USB2_DP4 M3
B USB2_DN4 B
R2
USB2_DP5 R3
USB2_DN5
P1 USB_PP6 [21]
USB2_DP6 P3 CCD
USB2_DN6 USB_PN6 [21]
U8 USB_PP7 [18]
USB2_DP7 U10 BT
USB2_DN7 USB_PN7 [18]
U12 USB_RCOMP R115 113_1%_04
USB2_RCOMP
V1 USB_OTG_ID R100 *0_04
USB2_DUALROLE V3 USB_VBUSSNS *20mil_short_04
USB2_VBUS_SNS U54 USB_OC#01
USB2_OC0 USB_OC#02 R365
U53
USB2_OC1

4 OF 13

Hardware Straps (2)

Top swap override
1=Enable
0=Disable (default)
Internal PD 20K CMOS USB_OC#02
A A
GPIO_44
Ensure that this strap is pulled LOW when RSM_RST_N
de-asserts for normal platform operation.
D02 DEL 枸䔁
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Internal PD 20K CMOS

USB_OC#01
Title
[04] SOC PCIE/SATA/USB
[3,5,6,7,8,9,11,17,18,19,22,23,24] 1.8VA Size Document Number Rev
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 4 of 35

5 4 3 2 1

SOC PCIE/SATA/USB B - 5
 Schematic Diagrams

GPIO
5 4 3 2 1

U25E

AG53 EDP_DET
JTAG GPIO_8 AG54 TPM_DET
GPIO_9 AE54 FANLESS
TP_JTAGX AH53 GPIO_10 AE53 EMMC_DET
R432 51_04 JTAG_TCK AM53 JTAGX GPIO_11 AD55 BOARD_ID0
R430 51_04 JTAG_TDI AJ54 JTAG_TCK GPIO_12 AD53
1.8VA JTAG_TDI GPIO_13
R431 150_04 JTAG_TDO AL53 AC54 BOARD_ID1
R171 51_04 JTAG_TMS AL54 JTAG_TDO GPIO_14 AC53
R429 51_04 JTAG_TRST_N AK53 JTAG_TMS GPIO_15 AB53
JTAG_TRST GPIO_16
AA49
ITP
GPIO_17 AC48
D D
GPIO_18 AC46
GPIO_19 AE51
R165 150_04 JTAG_PRDY_N AH55 GPIO_20 AE49
JTAG_PREQ_N JTAG_PRDY GPIO_21 CNVI_MFUART2_RXD [18]
R428 51_04 AJ53 AC51
JTAG_PREQ GPIO_22 CNVI_MFUART2_TXD [18]
AC49
GPIO_23 CNVI_GNSS_PA_BLANKING [18]
AA51
GPIO_24 AA46
GPIO_25
AE41
GPIO_26 AE39 SOC_GPIO27
GPIO_27 AE46 SOC_GPIO28
GPIO_28 AE44
GPIO_29 AC41
GPIO_30 AC39
GPIO_31 AC44 D02 DEL GPIO_31 枸䔁
GPIO_32 AC43
GPIO_33 AA44
B.Schematic Diagrams

GPIO_34
AA54 PCH_SPKR [20]
GPIO_35 AA53
GPIO_36 Y55 SCI#_N
GPIO_37 Y53 SW I#_N
GPIO_38 W54
GPIO_39 W53
GPIO_40 V53 SMI#_N
GPIO_41 D02 ADD RESET NET 11/4

Sheet 5 of 31 C
3.3V/1.8V
3.3V/1.8V
GPIO_105
GPIO_134
L46
H45
H47
W LAN_PLTRST# [18]
1.8VS
C
3.3V/1.8V GPIO_135 LAN_PLTRST# [21]

GPIO L43 SB_KBCRST#_R

3.3V/1.8V GPIO_136 SOC_GPIO137
M43 SOC_GPIO137 [11]
3.3V/1.8V GPIO_137 SATA_GP0
H37 R119
3.3V/1.8V GPIO_138 SATA_GP1
H43
3.3V/1.8V GPIO_139 SATA_DEVSLP0
J43 10K_04
3.3V/1.8V GPIO_140 D43 SATA_DEVSLP1
3.3V/1.8V GPIO_141 SATA_LED#_N
3.3V/1.8V F43
GPIO_142 SATA_LED#_N [11,22]
H41
3.3V/1.8V GPIO_143 F39
3.3V/1.8V GPIO_144
3.3V/1.8V L41
GPIO_145 F41
3.3V/1.8V GPIO_146
GPIO H27
GPIO_210 U43 STDBY
GPIO_212 U41
GPIO_213 U39 D02 DEL TEST 枸䔁
GPIO_214

Hardware Straps (3)

Allow eMMC as a boot source
1=enable (default)
5 OF 13 0=disable D02 DEL R113枸䔁
D02 DEL R159 ,R152 1.8VA
B Internal PU 20K CMOS SOC_GPIO27 R117 4.7K_1%_04 B

Allow SPI as a boot source

1=enable (default)
R424

R161

R425

R427

R164

0=disable
SOC_GPIO8,9,10,11,12,13,14,15,31 Internal PU 20K CMOS SOC_GPIO28 D02 DEL R417 枸䔁
eMMC

eDP
FAN

TPM

Internal PD 20K CMOS

*4.7K_04

4.7K_04

4.7K_04

4.7K_04

4.7K_04

GPIO_8 eDP_DET 0=>LVDS PANEL 1=>eDP PANEL SB_KBCRST#_R

[11] SB_KBCRST#_R
Internal PD 20K CMOS
EDP_DET GPIO_9 TPM_DET 0=>W/O TPM 1=>W/ TPM
TPM_DET R105 *10K_04
GPIO_10 FANLESS 0=>FANLESS 1=>FAN 1.8VA
FANLESS
SW I#_N
EMMC_DET GPIO_42 ME_WE# 0=>Write ME 1=>Write Protection [11] SW I#_N Internal PU 20K CMOS

BOARD_ID0 GPIO_11 eMMC_DET 0=>W/O eMMC_DET 1=>W/ eMMC_DET R150 *4.7K_04

1.8VA
GPIO_12 BOARD_ID0 0=>N24 1=>N25 SCI#_N
[11] SCI#_N Internal PU 20K CMOS
GPIO_14 BOARD_ID1 Modify,7/10 Max
R421

R156

R423

R426

R163

1.8VA R420 *4.7K_04

GPIO_15 SOC_BLON
PWM_FAN
W/O eMMC

W/O TPM

LVDS

GPIO_38 SWI# SMI#_N

Modify GPIO,7/17 Max [11] SMI#_N Internal PD 20K CMOS
*10K_04

10K_04

*10K_04

10K_04

*10K_04

GPIO_37 SCI#
A 1.8VA R160 4.7K_1%_04 A
GPIO_31 NA

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[05] GPIO
[3,4,6,7,8,9,11,17,18,19,22,23,24] 1.8VA Size Document Number Rev
[3,17,20,23] 1.8VS
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 5 of 35

5 4 3 2 1

B - 6 GPIO
 Schematic Diagrams

SMB/CNV
5 4 3 2 1

U25F

U49 M39 SOC_GPIO79

U51 SIO_I2C0_SCL SIO_SPI_0_CLK
LPSS_SPI
SIO_I2C0_SDA J37 SOC_GPIO83
U46 LPSS_I2C SIO_SPI_0_TXD L39
U48 SIO_I2C1_SCL SIO_SPI_0_RXD L37 SOC_GPIO80
SIO_I2C1_SDA SIO_SPI_0_FS0 J39 SOC_GPIO81
AA39 SIO_SPI_0_FS1
AA41 SIO_I2C2_SCL M37 SOC_GPIO84
SIO_I2C2_SDA SIO_SPI_2_CLK
R44 M33 SOC_GPIO89
R43 SIO_I2C3_SCL SIO_SPI_2_TXD P35
D SIO_I2C3_SDA SIO_SPI_2_RXD P33 SOC_GPIO85 D
R49 SIO_SPI_2_FS0 P37 SOC_GPIO86
R51 SIO_I2C4_SCL SIO_SPI_2_FS1 L35 SOC_GPIO87
SIO_I2C4_SDA SIO_SPI_2_FS2
C50
A50 SIO_I2C5_SCL
SIO_I2C5_SDA
C48
C47 SIO_I2C6_SCL N54 UART0_TXD
SIO_I2C6_SDA SIO_UART0_TXD P53 UART0_RXD
B47 SIO_UART0_RXD N53 SOC_GPIO62
C46 SIO_I2C7_SCL SIO_UART0_RTS M55
SIO_I2C7_SDA SIO_UART0_CTS
R368 *1K_04 SMB_ALERT# A26 UART2_TXD

B.Schematic Diagrams
3.3VA L54
B27 SMB_ALERT SIO_UART2_TXD M53 UART2_RXD
[11] SMB_CLK SMB_CLK SIO_UART2_RXD SOC_GPIO66
3.3VA C27 LPSS SMBus K53
[11] SMB_DATA SMB_DATA SIO_UART2_RTS L53
1K_04 R376 SIO_UART2_CTS
1K_04 R378
H29
[18] CNVI_W GR_CLK_DP CNV_WGR_CLK_P
H31
[18] CNVI_W GR_CLK_DN CNV_WGR_CLK
M31
[18] CNVI_W GR_D0P CNV_WGR_D0_P
P31 LPSS_UART
[18] CNVI_W GR_D0N CNV_WGR_D0
1.8VA D29

C [18]
[18]
[18]
CNVI_W GR_D1P
CNVI_W GR_D1N

CNVI_W T_CLK_DP
F29

F35
CNV_WGR_D1_P
CNV_WGR_D1

CNV_WT_CLK_P
CNVI

C
Sheet 6 of 31
D35
D02 CNVI㕘⡆ CLOSE TO PCH
R446 20K_04 SOC_GPIO193
[18]

[18]
[18]
CNVI_W T_CLK_DN

CNVI_W T_D0P
CNVI_W T_D0N
J35
H35
CNV_WT_CLK

CNV_WT_D0_P
CNV_WT_D0
SMB/CNV
L31
[18] CNVI_W T_D1P CNV_WT_D1_P
J31
[18] CNVI_W T_D1N CNV_WT_D1
FCM1005KF-121T03
SOC_CLKIN_XTAL_LCP
R388 J29
[18] CLKIN_XTAL_LCP SOC_GPIO196 CLKIN_XTAL_LCP
R102 0_04 F19
[18] XTAL_CLKREQ XTAL_CLKREQ
R381 33_04 SOC_GPIO191 H17
[18] CNVI_BRI_DT SOC_GPIO192 CNV_BRI_DT
R387 33_04 J17
[18] CNVI_BRI_RSP SOC_GPIO193 CNV_BRI_RSP
R383 33_04 D19
[18] CNVI_RGI_DT SOC_GPIO194 CNV_RGI_DT
R380 33_04 D17
[18] CNVI_RGI_RSP CNV_RGI_RSP
F17
[18] CNVI_RF_RST# CNV_RF_RESET
D02 CLOSE TO CONN
R129 150_1%_04 CNVI_W T_RCOMP F33
CNV_WT_RCOMP

6 OF 13

PLACE CLOSE TO SOC

B SOC_CLKIN_XTAL_LCP B

R385 C332
3.3p_50V_NPO_04

10K_04
Hardware Straps (4) D02 ⇒昌枸䔁
6-07-3R374-1A0

GPIO_62,79,80,85,86,87,89,192,194,196 Enable TXE ROM Bypass

Ensure that this strap is pulled LOW when RSM_RST_N 1=enable bypass
de-asserts for normal platform operation. 0=disable bypass (default)
Internal PD 20K CMOS SOC_GPIO62 Internal PD 20K CMOS UART0_TXD 1.8VA 1.8VA

Internal PD 20K CMOS SOC_GPIO79 Force DNX FW Load

AMI Debug Use
1=Force
Internal PD 20K CMOS SOC_GPIO80 0=Do not force (default)
D02 ⇒昌枸䔁
Internal PD 20K CMOS UART2_TXD R168 R154 D02 ⇒昌枸䔁
Internal PD 20K CMOS SOC_GPIO85 *2.2K_04 *2.2K_04
UART0_TXD

5
LPC boot BIOS strap

G
Internal PD 20K CMOS SOC_GPIO86 1=boot from LPC
0=do not boot from LPC (default) UART2_TXD R178 *0_04 4 3 UART1_TXD_Q
1.8VA

D
Internal PD 20K CMOS SOC_GPIO87 Internal PD 20K CMOS SOC_GPIO66

2
*MTDK3S6R

G
Internal PD 20K CMOS SOC_GPIO89 LPC 1.8V/3.3V mode select Q15B
1=buffers set to 1.8V mode R106 10K_04 UART0_RXD 1 6 UART1_RXD_Q
0=buffers set to 3.3V mode (default)

D
Internal PD 20K CMOS SOC_GPIO192
Internal PD 20K CMOS SOC_GPIO83 UART2_RXD R158 *0_04 *MTDK3S6R
Internal PD 20K CMOS SOC_GPIO194 Q15A
Allow SPI as a boot source D02 ⇒昌枸䔁
Internal PD 20K CMOS SOC_GPIO196 1=disable
0=enable (default)
A A
GPIO_81,193 Internal PU 20K CMOS SOC_GPIO84 R120 4.7K_1%_04
Ensure that this strap is pulled HIGH when
RSM_RST_N de-asserts for normal platform operation. eSPI Flash Sharing Mode
Internal PU 20K CMOS SOC_GPIO81 1=slave attached flash sharing (SAFS);

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
0=master attached flash sharing (MAFS;default)
Internal PU 20K CMOS SOC_GPIO193 Internal PD 20K CMOS SOC_GPIO191
Title
[7,8,9,19,22,23,24,26] 3.3VA [06] SMB/CNV
[3,4,5,7,8,9,11,17,18,19,22,23,24] 1.8VA
Size Document Number Rev
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 6 of 35

5 4 3 2 1

SMB/CNV B - 7
 Schematic Diagrams

RTC/PLU/CLK/SVID
5 4 3 2 1

C319

18p_50V_NPO_04

XTAL_SOC_IN R362

4
XTAL_SOC_OUT X1
200K_04
FSX3M 19.200000M15FAQ

3
U25H C311
D R46 B17 OSC_CLK_OUT0 18p_50V_NPO_04 D
R48 PMC_I2C_SCL OSC_CLK_OUT_0 C17 OSC_CLK_OUT1 C323
PMC_I2C_SDA OSC_CLK_OUT_1 U2
L48 iCLK OSCIN T1

1
PMC_SPI_CLK OSCOUT 18p_50V_NPO_04
N48
PMC_SPI_FS0 RTC_X1 D02 FOR ㍉岤 㚜㎃X5R R364 X2
N44 D23
PMC_SPI_FS1 RTC_X1 RTC_X2 10M_04 CM315D_32.768KHZ
L49 F23
L51 PMC_SPI_FS2 RTC RTC_X2 J23 BVCCRTC_EXTPAD C96 0.1u_10V_X5R_04

2
C320
N49 PMC_SPI_RXD VCC_RTC_EXTPAD H25 RTC_INTRUDER R101 330K_04
PMC_SPI_TXD INTRUDER VCC_RTC
PMC D25 SOC_PW ROK
SOC_PWROK R369 *0_04
F27 PM_PW ROK [19,28] 18p_50V_NPO_04
RSM_RST R366 0_04
R398 *0402_short D54 F25 SRTCRTC# DELAY_ALL_SYS_PW RGD [19]
B.Schematic Diagrams

[17,18,19,21,22] BUF_PLT_RST# PMU_PLTRST RTC_TEST

[19] PW R_BTN# E54 D27 RTCRST# RSMRST# [23]
PMU_PWRBTN RTC_RST R128 100K_04
C52
[19] PMU_SLP_S0# PMU_SLP_S0
D51 J53
[19,23] SUSB#_PCH PMU_SLP_S3 THERMTRIP PMIC_THERMTRIP_N [11]
J49 J54
[19,23] SUSC#_PCH PMU_SLP_S4 PROCHOT H_PROCHOT# [28]
F54 AG43
[19] SUS_PW R_ACK SUSPWRDNACK NC3
[19] PMU_BATLOW # J48 Thermal H53
RST_BTN# C51 PMU_BATLOW NC15 AG44
G49 PMU_RSTBTN PMU NC4 H55
[18] SUSCLK SUS_STAT_N PMU_SUSCLK NC16
E52
[19] SUS_STAT_N SUS_STAT A4
D02 ⇒昌枸䔁 F55 NC1 BH1
[28] H_CPU_SVIDCLK SVID0_CLK NC5
G53 SVID A53 TP_SKTOCC_N
[28] H_CPU_SVIDDAT H_CPU_SVIDALRT#_R G54 SVID0_DATA Spare SKTOCC F37

Sheet 7 of 31
[28] H_CPU_SVIDALRT# SVID0_ALERT_B NC14
R403 220_04 BL2
DEBUG_OBS_PORT_A0 D1 NC6 BL3
DEBUG_OBS_PORT_A1 D2 DEBUG_PORT_A0 Misc NC7 BL53
A54 DEBUG_PORT_A1 NC8 C2

RTC/PLU/CLK/SVID
C NC2 NC9 C
C54 C3
NC11 NC10 R41
NC17

8 OF 13

SVID Signals
R408 240_1%_04 H_CPU_SVIDDAT
1.05VS 1.8VA
R411 68_04 H_CPU_SVIDALRT# VCC_RTC
VDD3
CAD Note: the PU resistors close to CPU ijıŮŪŭŴ A 1 ijıŮŪŭŴ
3.3VA R123 C59 1u_6.3V_X5R_04 3 C
1K_04 A 2 R96 1K_04 RTC_VBAT
ijıŮŪŭŴ ijıŮŪŭŴ
D5
H_PROCHOT# R98
SUS_STAT_N R144 BAT54CS3
100K_04 20K_1%_04
SRTCRTC#
SUS_PW R_ACK R400 *10K_04
C95

D
BUF_PLT_RST# R395 C78
*10K_04 Q12
1u_6.3V_X5R_04

*47p_50V_NPO_04
R393
*100K_04 [19] H_PROCHOT_EC G

2SK3018S3
R468 R97

S
PMU_SLP_S0# *100K_04
20K_1%_04
D02 ADD R468枸䔁 R116 RTCRST#
B *100K_04 B

2
C77
J10
1u_6.3V_X5R_04
3.3VA VDD3 *OPEN-1mm

1
PW R_BTN# R401 1K_04
R467 *1K_04
PMU_BATLOW # R142 100K_04 D02 ADD R466 ,R467枸䔁
R466 *100K_04

RST_BTN# R399 10K_04

R370 *10K_04

SOC_PW ROK R373 100K_04

A A

[11,18,19,21,22,23,24,25,26,28,29] VDD3 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

[9] VCC_RTC
Title
[21] RTC_VBAT
[6,8,9,19,22,23,24,26] 3.3VA [07] RTC/PLU/CLK/SVID
[3,4,5,6,8,9,11,17,18,19,22,23,24] 1.8VA
Size Document Number Rev
[9,24,26,28] 1.05VS
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 7 of 35

5 4 3 2 1

B - 8 RTC/PLU/CLK/SVID
 Schematic Diagrams

Audio/LPC/SPI/eMMC
5 4 3 2 1

U25G

C26 L29
B25 AVS_I2S0_MCLK RSVD RSVD6
C25 AVS_I2S0_BCLK M29
SOC_GPIO159 C24 AVS_I2S0_WS_SYNC RSVD5 P29
B23 AVS_I2S0_SDI RSVD7 M27
AVS_I2S0_SDO AUDIO-AVS RSVD8 P27
M23 RSVD9 L27
L21 AVS_I2S1_MCLK RSVD3 L25
SOC_GPIO163 J21 AVS_I2S1_BCLK RSVD4 P25
SOC_GPIO164 M21 AVS_I2S1_WS_SYNC RSVD2 L23
D P23 AVS_I2S1_SDI RSVD10 D
AVS_I2S1_SDO J25 SDCARD_RCOMP R130 *200_1%_04
33_1%_04 R363 A22 RSVD1
[20] HDA_BITCLK AVS_HDA_BCLK
33_1%_04 R357 C23
[20] HDA_SYNC AVS_HDA_WS_SYNC
B21
[20] HDA_SDIN0 33_1%_04 R360 C22 AVS_HDA_SDI C37 LPC_CLKOUT0 33_04 R394
[20] HDA_SDOUT AVS_HDA_SDO LPC_CLKOUT0 PCLK_KBC [19]
[20] AZ_RST#_R
33_1%_04 R355 C21
AVS_HDA_RST LPC_CLKOUT1
A38 LPC_CLKOUT1 33_04 TPM R396 PCLK_TPM [17] TPM
CLOSE TO SOC B19 LPC/eSPI A34
AVS_DMIC_CLK_A1 LPC_AD0 LPC_AD0 [17,19]
SOC_GPIO172 C20 C34
AVS_DMIC_CLK_B1 LPC_AD1 LPC_AD1 [17,19]
C19 B35 LPC_AD2 [17,19]
SOC_GPIO174 C18 AVS_DMIC_DATA_1 LPC_AD2 C35
AVS_DMIC_CLK_AB2 LPC_AD3 LPC_AD3 [17,19]

B.Schematic Diagrams
SOC_GPIO175 A18
AVS_DMIC_DATA_2 R389 8.2K_04 1.8VA
C33
LPC_CLKRUN ECCLKRUN# [19]
*10p_50V_NPO_04 EC9 B33 LPC_FRAME# [17,19]
ER1 0_04J13 LPC_FRAME B37
[22] EMMC_CLK EMMC_CLK LPC_SERIRQ SERIRQ [17,19]
L15
[22] EMMC_STROBE EMMC_RCLK R391 10K_04
[22] EMMC_DAT0 M19
H19 EMMC_D0 B29 SOC_SPI_CLK R371 33_04 SPI_SCLK
[22] EMMC_DAT1 EMMC_D1 FST_SPI_CLK
[22]
[22]
[22]
EMMC_DAT2
EMMC_DAT3
EMMC_DAT4
J19
P17
P19
EMMC_D2
EMMC_D3
EMMC_D4
FST_SPI_MOSI_IO0
FST_SPI_MISO_IO1
B31
C30
SOC_SPI_D0_MOSI
SOC_SPI_D1_MISO
SOC_SPI_D2_W P
R379
R377
0_04
0_04
SPI_SI
SPI_SO
SPI_W P#
Sheet 8 of 31
[22] EMMC_DAT5 J15 eMMC FAST_SPI A30 R372 0_04
[22]
[22]
[22]
EMMC_DAT6
EMMC_DAT7
EMMC_CMD
L17
M17
M13
EMMC_D5
EMMC_D6
EMMC_D7
EMMC_CMD
FST_SPI_IO2
FST_SPI_IO3

FST_SPI_CS0
C29

C31
SOC_SPI_D3_HOLD

SOC_SPI_CS0#
R374

R375
0_04

0_04
SPI_HOLD#

SPI_CS0#
Audio/LPC/SPI/
C32 SOC_SPI_CS1#
C
[22]
[22] EMMC_RST#
EMMC_PW R_EN_N
R112
U44
G51
EMMC0_RCOMP L13
EMMC_RST
EMMC_PWR_EN
EMMC_RCOMP
FST_SPI_CS1
C
eMMC
200_1%_04

7 OF 13
3.3VA
10K_04 R145 EMMC_PW R_EN_N

HDA_SYNC R354 *249_1%_04 HDA_SDIN0

Hardware Straps (5)
D02 ⇒昌枸䔁 1.8VA
6-13-24901-28B GPIO_159 SMBus 1.8V/3.3V mode select
Ensure that this strap is pulled LOW when RSM_RST_N 1=buffers set to 1.8V mode
R358 de-asserts for normal platform operation. 0=buffers set to 3.3V mode (default) SPI_* = 1.5"~6.5"
NC1
*680_1%_04 Internal PD 20K CMOS SOC_GPIO159 Internal PD 20K CMOS SOC_GPIO163 SHORT
6-13-68001-28C
Internal PD 20K CMOS SOC_GPIO164 PMU (Power Management Unit) 1.8V/3.3V mode select
BIOS ROM
1=buffers set to 1.8V mode C333 0.1u_16V_Y5V_04
0=buffers set to 3.3V mode (default) U24
64Mbit
Internal PD 20K CMOS HDA_SDIN0 SPI_VDD 8 5 SPI_SI
VDD SI
SMBus No Re-Boot 2 SPI_SO
1 = Enable R367 SO
0 = Disable (default) 3.3K_1%_04 SPI_W P# SPI_CS0# R382
3 1 *3.3K_1%_04
Internal PD 20K CMOS SOC_GPIO172 WP# CE#
6 SPI_SCLK
VDD2 1.24V vs. 1.20V select R390 SCK
1=VDD2 is 1.24V; 3.3K_1%_04 SPI_HOLD# 7 4
0=VDD2 is 1.20V (default) HOLD# VSS
B B
Internal PD 20K CMOS SOC_GPIO174
CRB PU 3.3K MX25U6435F
M-SOP8B
eSPI vs. LPC
1=eSPI mode;
0=LPC mode (default)
Internal PD 20K CMOS SOC_GPIO175

A A

[6,7,9,19,22,23,24,26] 3.3VA ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

[3,4,5,6,7,9,11,17,18,19,22,23,24] 1.8VA
Title
[08] AUDIO/LPC/SPI/eMMC
Size Document Number Rev
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 8 of 35

5 4 3 2 1

Audio/LPC/SPI/eMMC B - 9
 Schematic Diagrams

SOC Power
5 4 3 2 1

VCGI_SVID
U25I
VNN_SVID
25A AA28 AF35 4A
AA29 VCC_VCG1 VNN1 AG27
C124 C113 C110 C123 C104 C105 AA31 VCC_VCG2 VNN2 AG28 C130 C116 C136 C138 C315
AA33 VCC_VCG3 VNN3 AG36
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 AC28 VCC_VCG4 VNN4 AG46 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *22u_6.3V_X5R_06
AC31 VCC_VCG5 VNN5 AG48
VCC_VCG6 VNN6 VNN_SVID
AE28 AJ27
AE29 VCC_VCG7 VNN7 AJ28
AE31 VCC_VCG8 VNN8 AJ46
AF31 VCC_VCG9 VNN9 AJ48
AF33 VCC_VCG10 VNN10 AL27 C316 C317 C134 C131 C119 C118
C100 C109 C125 C117 C58 C60 AG31 VCC_VCG11 VNN11 AL28
D D
AG33 VCC_VCG12 VNN12 AL48 *22u_6.3V_X5R_06 *22u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 AJ31 VCC_VCG13 VNN13 AL49
AJ33 VCC_VCG14 VNN14 AM27
AJ35 VCC_VCG15 VNN15 AM28
AL31 VCC_VCG16 VNN16 VNN_SVID
AL33 VCC_VCG17
AL35 VCC_VCG18
VCC_VCG19 C275 C276 C302
C36 C53 C288 C292 C94 C90 AM33
AM35 VCC_VCG20
VCC_VCG21 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06
22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 AM36
D31 VCC_VCG22
D33 VCC_VCG23 AJ49
B.Schematic Diagrams

VCC_VCG24 NC1 D02 ㍉岤天㯪㚜㎃0603

D37
D02 ㍉岤天㯪㚜㎃0603 D39 VCC_VCG25
P39 VCC_VCG26
P41 VCC_VCG27
C62 C31 C287 C380
C106 C102 C99 T28 VCC_VCG28
T29 VCC_VCG29
22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 *22u_6.3V_X5R_06 *22u_6.3V_X5R_06 *22u_6.3V_X5R_06 T31 VCC_VCG30
T33 VCC_VCG31 AW44
T35 VCC_VCG32 NC2

Sheet 9 of 31 T36
V28
V29
V31
VCC_VCG33
VCC_VCG34
VCC_VCG35
VCC_VCG36 VCC_VCG_SENSE
NC3
BH55

AG41
AG39
VCGI_SENSE_P [28]
C103 C126 C285 C286 C72 C284 VCGI_SENSE_N [28]

SOC Power V33 VCC_VCG37

VCC_VCG38
VSS_VCG_SENSE

*47uF_6.3V_X5R_08

*47uF_6.3V_X5R_08

*47uF_6.3V_X5R_08
*0.1u_16V_X7R_04 *1u_6.3V_X5R_04 *22u_6.3V_X5R_06 V35 AJ41 VNNCC_SENSE [28]
V36 VCC_VCG39 VNN_SENSE AJ43
VCC_VCG40 VNN_VSS_SENSE VNNSS_SENSE [28]
Y28
Y29 VCC_VCG41 BL54
C Y33 VCC_VCG42 NC4 C
Y35 VCC_VCG43
VCC_VCG44
9 OF 13
U25J 1.05VS
1.2V
+VDDQ_VR=+VCCDDQ=VDDQ=1.2V(DDR4) 3A 4.5A +VCCIOA=+V1P05_S=1.05VS
AP18 AC33
AP21 VDDQ1 VCCRAM_1P053 AC35
C108 C139 C111 C135 C121 C115 AP36 VDDQ2 VCCRAM_1P054 AE33
VDDQ3 VCCRAM_1P057 C325 C296 C330 C122 C329
AP38 AE35
1u_6.3V_X5R_04 1u_6.3V_X5R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 0.1u_16V_X7R_04 AT18 VDDQ4 VCCRAM_1P058 AE36
VDDQ5 VCCRAM_1P059 22u_6.3V_X5R_06 22u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
AT20 AE38
1.2V AT21 VDDQ6 VCCRAM_1P0510 AF27
AT35 VDDQ7 VCCRAM_1P0511 AF28
VDDQ8 VCCRAM_1P0512 D02 ㍉岤天㯪㚜㎃0603
AT36 AF36
C133 C142 C143 C137 AT38 VDDQ9 VCCRAM_1P0513 AF38
BA13 VDDQ10 VCCRAM_1P0514
22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 BA15 VDDQ11 AG51
BA25 VDDQ12 VCC_1P05_INT2 AG49
VDDQ13 VCC_1P05_INT1 1.05VS
BA31
D02 ㍉岤天㯪㚜㎃0603 VDDQ14
BA41 AJ51
BA43 VDDQ15 VCC_1P05_INT3
1.05VS VDDQ16 AA36 C331 C128 C297
+VCCIOA=+V1P05_S=1.05VS 4.5A AP25 VCCRAM_1P051 AA38
AP31 VCCIOA1 VCCRAM_1P052 AC36 1u_6.3V_X5R_04 1u_6.3V_X5R_04 22u_6.3V_X5R_06
C129 C127 C114 C120 C328 C327 VCCIOA2 VCCRAM_1P055
AT25 AC38
AT27 VCCIOA3 VCCRAM_1P056 Y36
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 2.2u_6.3V_X5R_04 22u_6.3V_X5R_06 22u_6.3V_X5R_06 VCCIOA4 VCCRAM_1P0515
AT28 Y38
AT29 VCCIOA5 VCCRAM_1P0516
AT31 VCCIOA6
1.8VA VCCIOA7 VCCRAM(1.05V)
B VCC_RTC B
0.4A T21
T23 VCC_1P8V_A3 P15
C48 C47 C46 T25 VCC_1P8V_A4
VDD1(1.8V) RTC VCCRTC_3P3V
VCC_1P8V_A5 C68
V21
1u_6.3V_X5R_04 1u_6.3V_X5R_04 22u_6.3V_X5R_06 V23 VCC_1P8V_A6 AJ21
VCC_1P8V_A7 VCC_3P3V_A2 1u_6.3V_X5R_04
V25
VCC_1P8V_A8 U17
AJ23 VCC_3P3V_A5
AG23 VCC_1P8V_A2
D02 ㍉岤天㯪㚜㎃0603 VCC_1P8V_A1
1.24VA
2A MPHY AC21 AG21
AE20 VDD2_1P2_MPHY1 VCC_3P3V_A1 T18
C101 C89 C112 C84 AE21 VDD2_1P2_MPHY2 VCC_3P3V_A3 T20
AF20 VDD2_1P2_MPHY3 VCC_3P3V_A4 V18
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 22u_6.3V_X5R_06 AF21 VDD2_1P2_MPHY4 VCC_3P3V_A6 V20
VDD2_1P2_MPHY5 VCC_3P3V_A7 3.3VA
VDD3(3.3V) Y18
VCC_3P3V_A8 Y20 O.15A
AUD AC18
VDD2_1P2_AUD1
VCC_3P3V_A9
AC20 C67 C87 C83
C107 C88 D02 AUDIO 㕟嶗㍍崟Ἦ VDD2_1P2_AUD2
DSI AW12 1u_6.3V_X5R_04 1u_6.3V_X5R_04 22u_6.3V_X5R_06
1u_6.3V_X5R_04 22u_6.3V_X5R_06 VDD2_1P2_DSI_CSI
AL36
AL38 VDD2_1P2_GLM1
AP20 VDD2_1P2_GLM2 D02 ㍉岤天㯪㚜㎃0603
C66 C324 C322 VDD2_1P2_GLM4
AM20
1u_6.3V_X5R_04 22u_6.3V_X5R_06 22u_6.3V_X5R_06 VDD2_1P2_GLM3
AL18
A
PLL AM18 VDD2_1P2_PLL1 A
VDD2_1P2_PLL2
C81 C65 C326 VNNAON AA18
AA20 VDD2_1P2_VNNAON1
1u_6.3V_X5R_04 1u_6.3V_X5R_04 22u_6.3V_X5R_06 VDD2_1P2_VNNAON2
AG18
USB
C132
AJ20 VDD2_1P2_USB2
VDD2_1P2_USB3
VDD2(1.2V)
[7,24,26,28] 1.05VS
[26] 1.24VA
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[12,26] 1.2V Title
1u_6.3V_X5R_04
10 OF 13
[3,4,5,6,7,8,11,17,18,19,22,23,24] 1.8VA [09] SOC POWER
[6,7,8,19,22,23,24,26] 3.3VA
[7] VCC_RTC Size Document Number Rev
[27,28] VCGI_SVID
[24,27,28] VNN_SVID
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 9 of 35

5 4 3 2 1

B - 10 SOC Power
 Schematic Diagrams

SOC VSS

5 4 3 2 1

U25K

D A3 AF44 U25M D
VSS6 VSS53 U25L
A6 AF45 AL23
A12 VSS13 VSS54 AF47 BJ54 VSS1 J51
VSS1 VSS55 VSS2 VSS51 AN48 BC11
A16 AF48 BK1 K1 VSS_111 VSS_165
VSS2 VSS56 VSS3 VSS53 AN49 BC17
A20 AF50 BK17 K3 VSS_112 VSS_166
VSS3 VSS57 VSS4 VSS55 AN51 BC19
A24 AF52 BK21 K28 VSS_113 VSS_167
VSS4 VSS58 VSS5 VSS54 AN53 BC21
A28 AF53 BK35 K55 VSS_114 VSS_168
VSS5 VSS59 VSS6 VSS56 AP23 BC23
A32 AF55 BK39 L5 VSS_115 VSS_169
VSS7 VSS60 VSS7 VSS59 AP27 BC25
A36 AG20 BK55 L7 VSS_116 VSS_170
VSS8 VSS64 VSS8 VSS60 AP28 BC31
A40 AL21 BL5 L8 VSS_117 VSS_171
VSS9 VSS87 VSS17 VSS61 AP29 BC33
A44 AG25 BL8 L19 VSS_118 VSS_172

B.Schematic Diagrams
VSS10 VSS65 VSS19 VSS57 AP33 BC35
A48 AG29 BL10 L33 VSS_119 VSS_173
VSS11 VSS66 VSS9 VSS58 AP35 BC37
A51 AG35 BL14 M15 VSS_120 VSS_174
VSS12 VSS67 VSS10 VSS62 AR2 BC39
AA12 AG38 BL24 M25 VSS_124 VSS_175
VSS14 VSS68 VSS11 VSS63 AR7 BC41
AA13 AJ8 BL28 M28 VSS_130 VSS_176
VSS15 VSS77 VSS12 VSS64 AR10 BC45
AA15 AJ13 BL32 M35 VSS_121 VSS_177
VSS16 VSS69 VSS13 VSS65 AR12 BC51
AA17 AJ18 BL42 M41 VSS_122 VSS_179
VSS17 VSS70 VSS14 VSS66 AR17 BD9
AA21 AJ25 BL46 N12 VSS_123 VSS_187
VSS18 VSS71 VSS15 VSS67 AR39 BD15
AA23
AA25
AA27
AA35
VSS19
VSS20
VSS21
VSS72
VSS73
VSS74
AJ29
AJ36
AJ38
AJ39
BL48
BL51
C1
C12
VSS16
VSS18
VSS20
VSS68
VSS69
VSS70
N28
N46
N51
P21
AR44
AR46
AR49
VSS_125
VSS_126
VSS_127
VSS_180
VSS_181
VSS_182
BD19
BD21
BD28
Sheet 10 of 31
AR54 VSS_128 VSS_183 BD35
AA43
AA48
AB1
VSS22
VSS23
VSS24
VSS25
VSS75
VSS76
VSS78
VSS79
AJ44
AK1
AK3
C16
C28
C36
VSS21
VSS22
VSS23
VSS24
VSS71
VSS72
VSS74
VSS73
P55
R8
R28
AT23
AT33
AU3
VSS_129
VSS_131
VSS_132
VSS_184
VSS_185
VSS_186
BD37
BD47
BE3
SOC VSS
AB3 AK55 D6 T27 VSS_135 VSS_189
VSS26 VSS80 VSS30 VSS75 AU10 BE28
AB55 AL3 D9 T38 VSS_133 VSS_188
VSS27 VSS90 VSS31 VSS77 AU28 BE53
C AC8 AL7 D21 U13 VSS_134 VSS_190 C
VSS33 VSS97 VSS25 VSS78 AU46 BF9
AC13 AL8 D28 V27 VSS_136 VSS_194
VSS28 VSS98 VSS26 VSS80 AU53 BF19
AC23 AL10 D41 V38 VSS_137 VSS_191
VSS29 VSS81 VSS27 VSS81 AV15 BF37
AC25 AL12 D45 V55 VSS_138 VSS_192
VSS30 VSS82 VSS28 VSS82 AV17 BF47
AC27 AL13 D55 W2 VSS_139 VSS_193
VSS31 VSS83 VSS29 VSS84 AV23 BG1
AC29 AL15 E28 W3 VSS_140 VSS_195
VSS32 VSS84 VSS32 VSS85 AV25 BG6
AE18 AL17 E50 W5 VSS_141 VSS_199
VSS34 VSS85 VSS33 VSS93 AV31 BG28
AE23 AL20 E55 W7 VSS_142 VSS_196
VSS35 VSS86 VSS34 VSS95 AV33 BG50
AE25 AL25 F1 W8 VSS_143 VSS_197
VSS36 VSS88 VSS35 VSS96 AV39 BG55
AE27 AL29 F4 W10 VSS_144 VSS_198
VSS37 VSS89 VSS38 VSS83 AV41 BH11
AE43 AL39 F21 W39 VSS_145 VSS_200
VSS38 VSS91 VSS36 VSS86 AW2 BH13
AE48 AL41 F31 W41 VSS_147 VSS_201
VSS39 VSS92 VSS37 VSS87 AW5 BH17
AF1 AL43 G28 W43 VSS_150 VSS_202
VSS40 VSS93 VSS39 VSS88 AW10 BH19
AF3 AL44 H13 W44 VSS_146 VSS_203
VSS49 VSS94 VSS40 VSS89 AW28 BH23
AF4 AL46 H15 W46 VSS_148 VSS_204
VSS50 VSS95 VSS41 VSS90 AW46 BH25
AF6 AL51 H21 W48 VSS_149 VSS_205
VSS61 VSS96 VSS42 VSS91 AW51 BH28
AF8 AM1 H23 W49 VSS_151 VSS_206
VSS62 VSS99 VSS43 VSS92 AW54 BH31
AF9 AM21 H28 W51 VSS_152 VSS_207
VSS63 VSS100 VSS44 VSS94 AY13 BH33
AF11 AM23 H33 Y21 VSS_153 VSS_208
VSS41 VSS101 VSS45 VSS97 AY15 BH37
AF12 AM25 H39 Y23 VSS_154 VSS_209
VSS42 VSS102 VSS46 VSS98 AY28 BH39
AF14 AM29 J8 Y25 VSS_155 VSS_210
VSS43 VSS103 VSS52 VSS99 AY41 BH41
AF16 AM31 J27 Y27 VSS_156 VSS_211
VSS44 VSS104 VSS47 VSS100 AY43 BH45
AF18 AM38 J33 Y31 VSS_157 VSS_212
VSS45 VSS105 VSS48 VSS101 B2 BJ2
AF23 AM55 J41 T3 VSS_158 VSS_215
VSS46 VSS106 VSS49 VSS76 B55 BJ15
AF25 AN3 J45 U3 VSS_159 VSS_213
VSS47 VSS108 VSS50 VSS79 BA27 BJ19
AF29 AN8 VSS_160 VSS_214
VSS48 VSS110 BA29 BJ25
AF40 AN10 VSS_161 VSS_216
VSS51 VSS107 BB1 BJ28
B AF42 AN46 13 OF 13 VSS_162 VSS_217 B
VSS52 VSS109 BB28 BJ31
BB55 VSS_163 VSS_218 BJ37
11 OF 13 BC5 VSS_164 VSS_219 BJ41
VSS_178 VSS_220

12 OF 13

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[10] SOC VSS
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 10 of 35

5 4 3 2 1

SOC VSS B - 11
 Schematic Diagrams

Level Shifter

5 4 3 2 1

SB_KBCRST#

SB_KBCRST#_R [5]

D02 DEL 枸䔁
D D

SB_KBCRST# R454 *10mil_04 SB_KBCRST#_R

[19] SB_KBCRST#
D02 DEL 枸䔁

SUSB VDD3 PCIE_WAKE#

B.Schematic Diagrams

SOC_GPIO137 SB_BLON R287

100K_04
3.3V
D02 DEL 枸䔁
SUSB [13]

D
R281
*10K_04 R274 *10mil_04

Sheet 11 of 31 D02 DEL 枸䔁 ADD R281 枸䔁

R288 *10mil_04
[15,17,23,24] SUSB#
G
Q28
2SK3018S3 C222
[21] PCIE_W AKE0# PCIE_W AKE0_N [4]

S
[5] SOC_GPIO137 SB_BLON [15] *0.1u_16V_Y5V_04
R280 *10mil_04

Level Shifter R295

100K_04 ON
[18] PCIE_W AKE2# PCIE_W AKE2_N [4]

C ON C

WLAN_CLKREQ#
3.3VS

SCI# 1.8VA
SMBUS
D02 DEL 枸䔁 SWI# R303
D02 R303 㓡SHORT PIN
R241 R240

SMI# Q19A 2.2K_04 2.2K_04

2
*10mil_04 MTDK3S6R
R235 *10mil_04
[12] SMB_CLK_DDR

G
6 1 SMB_CLK_T [21]
[6] SMB_CLK

S
5
R459 *10mil_04 Q19B
[18] W LAN_CLKREQ# W LAN_CLKREQ#_R [4]
MTDK3S6R

G
R136 *1K_04
3 4 SMB_DATA_T [21]
[6] SMB_DATA

S
G
R236 *10mil_04
[12] SMB_DAT_DDR
1 6
[5] SMI#_N SMI# [19]
Q30A

D
MTDK3S6R

5
LAN_CLKREQ#_R

G
4 3
[5] SCI#_N SCI# [19]
Q30B

D
G
MTDK3S6R
B B

S D
D02 DEL 枸䔁 [5] SW I#_N SW I# [19]
Q27
2SK3018S3

R94 *10mil_04
[21] LAN_CLKREQ# LAN_CLKREQ#_R [4]

R95 *1K_04
PCH_BRIGHTNESS THERMTRIP VDD3
D02 㓡VDD3 FOR F10

R234 R243
10K_04 10K_04

3.3VS PMIC_THERMTRIP [19,23]

SATA_LED#

6
D
Q18A
D02 DEL 枸䔁 MTDK3S6R
2 G C189
S

1
3
D *0.1u_16V_Y5V_04
R252 R253 Q18B
10K_04 *10K_04 [3] SOC_BRIGHTNESS R27 *10mil_04 MTDK3S6R
EDP_BRIGHTNESS [14] 5 G
[7] PMIC_THERMTRIP_N S

4
LED_HDD# [22]
D

Q21 [3] SOC_BKLTEN R40 *10mil_04

BLON [15]
A G 2SK3018S3 C198 A
C

*0.1u_16V_Y5V_04
B Q22
[5,22] SATA_LED#_N
2N3904

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
DE

Q23 R270 [7,18,19,21,22,23,24,25,26,28,29] VDD3

Title
[19,22] EC_EMMC_LED#
G 2SK3018S3 *0_04 [2,15,17,18,19,23,26]
[12,14,15,16,17,18,20,21,22,23,24,28]
3.3V
3.3VS
[11] LEVELSHIFTER
S

R257 [6,7,8,9,19,22,23,24,26] 3.3VA

3.3VS Size Document Number Rev
*10K_04
[3,5,17,20,23]
[3,4,5,6,7,8,9,17,18,19,22,23,24]
1.8VS
1.8VA Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 11 of 35

5 4 3 2 1

B - 12 Level Shifter
 Schematic Diagrams

DDR4 SO-DIMM_0

5 4 3 2 1

JDIMM1A 1.2V VTT_MEM

JDIMM1B

[2] M_A_CKP0
137 8
CK0_T DQ0 M_A_DQ1 [2]
[2] M_A_CKN0 139 7 163 258
CK0_C DQ1 M_A_DQ0 [2] VDD19 VTT 2.5V
[2] M_A_CKP1 138 20 160
CK1_T DQ2 M_A_DQ5 [2] VDD18
[2] M_A_CKN1 140 21 159
CK1_C DQ3 M_A_DQ7 [2] VDD17
4 154 259
DQ4 M_A_DQ2 [2] VDD16 VPP2
[2] M_A_CKE0
109 3 153 257
CKE0 DQ5 M_A_DQ3 [2] VDD15 VPP1
[2] M_A_CKE1 110 16 148
CKE1 DQ6 M_A_DQ6 [2] VDD14 3.3VS
17 147
DQ7 M_A_DQ4 [2] VDD13
149 28 142
[2]
[2]
M_A_CS0_N
M_A_CS1_N 157 S0*
S1*
DQ8
DQ9
29
41
M_A_DQ24
M_A_DQ29
[2]
[2] BOT 141
136
VDD12
VDD11 255
155 DQ10 42
M_A_DQ28 [2] JDIMM1 = CHA DIMM0 000 135 VDD10 VDDSPD
[2] M_A_ODT0 ODT0 DQ11 M_A_DQ26 [2] VDD9
D [2] M_A_ODT1 161 24 130 C371 C370 D
ODT1 DQ12 M_A_DQ25 [2] VDD8
25 129
DQ13 M_A_DQ30 [2] Modify,7/10 Max VDD7
[2] M_A_BG0 115 38 124 0.1u_16V_X7R_04 2.2u_6.3V_X5R_04
BG0 DQ14 M_A_DQ31 [2] VDD6
[2] M_A_BG1
113 37 123
BG1 DQ15 M_A_DQ27 [2] VDD5
[2] M_A_BA0 150 50 118
BA0 DQ16 M_A_DQ19 [2] VDD4
[2] M_A_BA1 145 49 117
BA1 DQ17 M_A_DQ18 [2] VDD3
62 112
DQ18 M_A_DQ23 [2] VDD2
[2] M_A_MA0 144
133 A0 DQ19
63
46
M_A_DQ22 [2]
111
VDD1 W>>K^dKW/E
[2] M_A_MA1 A1 DQ20 M_A_DQ17 [2]
132 45 GND1
[2]
[2]
[2]
[2]
M_A_MA2
M_A_MA3
M_A_MA4
M_A_MA5
131
128
126
A2
A3
A4
A5
DQ21
DQ22
DQ23
DQ24
58
59
70
M_A_DQ16
M_A_DQ21
M_A_DQ20
M_A_DQ8
[2]
[2]
[2]
[2]
SO-DIMM A MT1
MT2
GND2

127 71 251 252

B.Schematic Diagrams
[2] M_A_MA6 A6 DQ25 M_A_DQ9 [2] VSS VSS
[2] M_A_MA7 122 83 247 248
A7 DQ26 M_A_DQ12 [2] VSS VSS
125 84 1.2V 243 244
[2]
[2]
M_A_MA8
M_A_MA9 121 A8
A9
DQ27
DQ28
66
M_A_DQ13
M_A_DQ10
[2]
[2] W>>K^dK^K/DD 239 VSS
VSS
VSS
VSS
238
[2] M_A_MA10 146 67 235 234
A10_AP DQ29 M_A_DQ15 [2] VSS VSS
[2] M_A_MA11
120 79 M_A_EVENT_N 240_1%_04 R227
231 230
A11 DQ30 M_A_DQ11 [2] VSS VSS
[2] M_A_MA12 119 80 227 226
A12 DQ31 M_A_DQ14 [2] VSS VSS
[2] M_A_MA13 158 174 M_A_ALERT_N 240_1%_04 R230 223 222
A13 DQ32 M_A_DQ37 [2] VSS VSS
[2] M_A_MA14 151 173 217 218
A14_WE* DQ33 M_A_DQ38 [2] VSS VSS
240_1%_04 R206

Sheet 12 of 31
[2] M_A_MA15 156 187 M_A_PARITY 213 214
1.2V A15_CAS* DQ34 M_A_DQ32 [2] VSS VSS
[2] M_A_MA16
152 186 209 210
A16_RAS* DQ35 M_A_DQ34 [2] VSS VSS
170 205 206
DQ36 M_A_DQ36 [2] VSS VSS
169 201 202
DQ37 M_A_DQ39 [2] VSS VSS
114 183 197 196

R224
1k_1%_04
[2] M_A_ACT_N

R226
M_A_PARITY
M_A_ALERT_N
143
116
ACT*

PARITY
ALERT*
DQ38
DQ39
DQ40
DQ41
182
195
194
M_A_DQ35
M_A_DQ33
M_A_DQ44
M_A_DQ45
[2]
[2]
[2]
[2]
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
DDR4 SO-DIMM_0
M_A_EVENT_N 134 207 181 180
M_A_RESET_N_R EVENT* DQ42 M_A_DQ42 [2] VSS VSS
C
[2] M_A_RESET_N 108 208 175 176 C
RESET* DQ43 M_A_DQ43 [2] VSS VSS
191 171 172
DQ44 M_A_DQ47 [2] VSS VSS
+DIMM0_VREF_CA_R_1 164 190 W>d,W>K^dK^K/DD 167 168
0_04 VREFCA DQ45 M_A_DQ46 [2] VSS VSS
203 107 106
DQ46 M_A_DQ41 [2] VSS VSS
254 204 +DIMM0_VREF_CA_R_1 103 102
[11] SMB_DAT_DDR SDA DQ47 M_A_DQ40 [2] VSS VSS
253 216 99 98
[11] SMB_CLK_DDR SCL DQ48 M_A_DQ53 [2] VSS VSS
215 93 94
DQ49 M_A_DQ54 [2] VSS VSS
166 228 89 90
SA2 DQ50 M_A_DQ50 [2] C178 VSS VSS
260 229 85 86
SA1 DQ51 M_A_DQ48 [2] VSS VSS
256 211 81 82
SA0 DQ52 M_A_DQ55 [2] *0.1u_16V_X7R_04 VSS VSS
212 77 78
DQ53 M_A_DQ51 [2] VSS VSS
224 73 72
DQ54 M_A_DQ49 [2] VSS VSS
225 69 68
DQ55 M_A_DQ52 [2] VSS VSS
92 237 65 64
CB0_NC DQ56 M_A_DQ60 [2] VSS VSS
91 236 61 60
CB1_NC DQ57 M_A_DQ62 [2] VSS VSS
101 249 57 56
CB2_NC DQ58 M_A_DQ59 [2] VSS VSS
105 250 51 52
CB3_NC DQ59 M_A_DQ58 [2] VSS VSS
88 232 47 48
CB4_NC DQ60 M_A_DQ56 [2] VSS VSS
87 233 43 44
CB5_NC DQ61 M_A_DQ61 [2] VSS VSS
100 245 39 40
1.2V CB6_NC DQ62 M_A_DQ63 [2] VSS VSS
104 246 35 36
CB7_NC DQ63 M_A_DQ57 [2] VSS VSS
31 30
12 13 27 VSS VSS 26
DM0*/DBI0* DQS0_T M_A_DQSP0 [2] VSS VSS
33 34 23 22
DM1*/DBI1* DQS1_T M_A_DQSP3 [2] VSS VSS
54 55 19 18
DM2*/DBI2* DQS2_T M_A_DQSP2 [2] VSS VSS
75 76 15 14
DM3*/DBI3* DQS3_T M_A_DQSP1 [2] VSS VSS
178 179 9 10
DM4*/DBI4* DQS4_T M_A_DQSP4 [2] VSS VSS
199 200 5 6
DM5*/DBI5* DQS5_T M_A_DQSP5 [2] VSS VSS
220 221 1 2
DM6*/DBI6* DQS6_T M_A_DQSP6 [2] VSS VSS
241 242
DM7*/DBI7* DQS7_T M_A_DQSP7 [2]
96 97
B DM8*/DBI8* DQS8_T B
11 D4AS0-26001-1P40
DQS0_C M_A_DQSN0 [2]
32
DQS1_C M_A_DQSN3 [2]
53
DQS2_C M_A_DQSN2 [2]
74
DQS3_C M_A_DQSN1 [2]
177
DQS4_C M_A_DQSN4 [2]
198
DQS5_C M_A_DQSN5 [2]
219
DQS6_C M_A_DQSN6 [2] 1.2V
240
DQS7_C M_A_DQSN7 [2]
95
TP_DDR0_NC_CS1A 162 DQS8_C
TP_DDR0_NC_CS0B 165 S2*/C0
S3*/C1

VTT_MEM
2.5V D4AS0-26001-1P40 R231 +DIMM1_VREF_CA_RC
3.65K_1%_04
R229
C170 C174 C176 C366 C367 +DIMM0_VREF_CA_R_1 +DIMM0_VREF_CA
M0_VREF_CA [2]
10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 1u_6.3V_X5R_04 2_1%_04 R222 0_04
R228 C177 C175
3.65K_1%_04
*0.1u_16V_X7R_04 0.022u_16V_X7R_04
1.2V

R223
C352 C161 C162 C179 C181 C183 C185 C159 C160 24.9_1%_04
+
22u_6.3V_X5R_06 22u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06
A A
*330uF_2.5V_12m_6.6*6.6*4.2

D02, 10u ㎃22u 妋ripple

1.2V

C164 C165 C166 C163 C180 C182 C184 C186

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[11,14,15,16,17,18,20,21,22,23,24,28] 3.3VS
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
[9,26] 1.2V [12] DDR4 SO-DIMM_0
[26] VTT_MEM
Size Document Number Rev
[26] 2.5V
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 12 of 35

5 4 3 2 1

DDR4 SO-DIMM_0 B - 13
 Schematic Diagrams

HDMI Port
5 4 3 2 1

60950-1⬱ 夷 天㯪,
HDMI CONNECTOR HDMI_5VS

D
⢾ ὃ暣 㸸 䫎⎰LPS
ʀ 8A 姕 妰
(W/O LEVELSHIFT) D

For ESD

A
HDMI_5VS RB751S-40H D9
5VS

C
5VS

A
D9 劍SMBUS㛒㺷暣炻⇯⎗Short.
6-02-75495-9C0
C342 U26

C
D8 D7 D10
5 1

AC

AC

AC
VIN VOUT *BAV99 RECTIFIER
*10u_6.3V_X5R_06
R146 R153 *BAV99 RECTIFIER
ᶵ⎗ⷞ

22u_6.3V_X5R_06

22u_6.3V_X5R_06
C345 C347 J_HDMI1
FOR ℙ䓐 2
2.2K_04 2.2K_04 *BAV99 RECTIFIER
SY6288DAAC GND ⮵⛘旣ῤBY PLATFROMᾖ㬋 BY platform 婧㔜℞ῤ
㚫㺷暣 D02 ㍉岤天㯪㚜㎃0603
R188 100K_04 HDMI_SCL-C
4 3
[11] SUSB EN# OC#
19 HDMI_HPD-C HDMI_SDA-C
uP7549UMA5-20 HOT PLUG DETECT HDMI_HPD-C [3]
18
B.Schematic Diagrams

PCB Footprint = M-SOT23-5A +5V HDMI_HPD-C

17
HDMI_SDA-C 16 DDC/CEC GND
[3] HDMI_SDA-C SDA 15 HDMI_SCL-C
SCL HDMI_SCL-C [3]
14
R405 470_04 RESERVED 13 HDMI_CEC

Sheet 13 of 31 TMDS_CLOCK#

TMDS_CLOCK
TMDS_CLOCK#

TMDS_CLOCK
TMDS_CLOCK#J

TMDS_CLOCKJ
12

10
TMDS CLOCK-
CEC

CLK SHIELD
11
R418 470_04
R404 470_04 R437 TMDS CLOCK+ 9 TMDS_DATA0#J TMDS_DATA0# TMDS_DATA0#

HDMI Port C

TMDS_DATA1#
R397 470_04
180_1%_04

TMDS_DATA1# TMDS_DATA1#J
8

6
SHIELD0
TMDS DATA0-

TMDS DATA0+
7 TMDS_DATA0J TMDS_DATA0
R433 R419 470_04
TMDS_DATA0
C

TMDS DATA1- 5 180_1%_04

TMDS_DATA1 TMDS_DATA1 TMDS_DATA1J 4 SHIELD1 R406 470_04
R392 470_04 TMDS DATA1+ 3 TMDS_DATA2#J TMDS_DATA2# TMDS_DATA2#
2 TMDS DATA2-
SHIELD2 1 TMDS_DATA2J TMDS_DATA2 TMDS_DATA2
BY platform 婧㔜℞ῤ R438 TMDS DATA2+ R407 470_04
180_1%_04
BY platform 婧㔜℞ῤ
GND_HDMI
6-13-18001-28B-1 R434
D

Q16 5VS 180_1%_04

2SK3018S3
GND_HDMI
G 16-A1030-1003-0
PIN GND1~4=GND
S

6-21-14230-019

C340 0.1u_10V_X7R_04 TMDS_DATA0#

[3] HDMI_DATA2N HDMI ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP
B B
[3] HDMI_DATA2P
C341 0.1u_10V_X7R_04 TMDS_DATA0
廠↢␥⎵ẍINTEL IC PIN ⭂佑,㍍䶂䡢娵 D32

TMDS_CLOCK# 6 5 TMDS_CLOCK#J

[3] HDMI_DATA1N
C335 0.1u_10V_X7R_04 TMDS_DATA1# IC䪗 CONNECTOR䪗 TMDS_CLOCK 7
8
4
3
TMDS_CLOCKJ

C334 0.1u_10V_X7R_04 TMDS_DATA1

DATA2 DATA0 TMDS_DATA1# 9 2 TMDS_DATA1#J
[3] HDMI_DATA1P TMDS_DATA1 10 1 TMDS_DATA1J
DATA1 DATA1
DATA0 DATA2
DT1140-04LP-7
[3] HDMI_DATA0N
C336 0.1u_10V_X7R_04 TMDS_DATA2# CLOCK CLOCK
TMDS_DATA2 D31
C337 0.1u_10V_X7R_04
[3] HDMI_DATA0P
TMDS_DATA2 6 5 TMDS_DATA2J
⤪㚱ᶵ⎴,ℵὅIC天㯪⍣婧㔜 TMDS_DATA2# 7 4 TMDS_DATA2#J
TMDS_CLOCK# 8 3
C339 0.1u_10V_X7R_04 TMDS_DATA0 TMDS_DATA0J
[3] HDMI_CLOCKN 9 2
TMDS_DATA0# 10 1 TMDS_DATA0#J
C338 0.1u_10V_X7R_04 TMDS_CLOCK
[3] HDMI_CLOCKP

DT1140-04LP-7

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[15,16,20,21,23] 5VS
[13] HDMI PORT
Size Document Number Rev
SCHEMATIC1 6-71-W51G0-D02 3.0
Date: Tuesday, January 30, 2018 Sheet 13 of 35
5 4 3 2 1

B - 14 HDMI Port
 Schematic Diagrams

RTD2136
5 4 3 2 1

暞 ẞ 㔠:33pcs
LVDSᶲ ẞ LVDSᶲ ẞ VVCCK_V12

3.3VS Power A_VCC33 3.3VS DVCC33

LVDS R338 0_06 LVDS R326 0_06

C32
C267 C264 C254 C257 LVDS
40mils LVDS 40mils LVDS 80mils LVDS 80mils LVDS
0.1u_10V_X5R_04
2.2u_6.3V_X5R_04 0.1u_10V_X5R_04 2.2u_6.3V_X5R_04 0.1u_10V_X5R_04

P_DDC_DATA
MODE_CFG1

MODE_CFG0
D D

P_DDC_CLK

LVDS-L0N

LVDS-L1N

LVDS-L2N
LVDS-L0P

LVDS-L1P

LVDS-L2P
ENBLT
ENBLT ENBLT [15]

[3,15] EDP_HPD LVDS R63 0_04 HPD R54

LVDS

49

48

47

46

45

44

43

42

41

40

39

38

37
U1
D02 FOR ㍉岤 㚜㎃X5R
LVDSᶲ ẞ 10K_04

EPAD_GND

MODE_CFG1

MODE_CFG0

MIICSCL

MIICSDA

BL_EN

VCCK

TXO0-

TXO0+

TXO1-

TXO1+

TXO2-

TXO2+
LVDS C38 0.1u_10V_X7R_04 DAUXn
[3] EDP_AUXN
LVDS C39 0.1u_10V_X7R_04 DAUXp
[3] EDP_AUXP
LVDS-L0N LVDS-L0N [15]
eDP R73 0_04 DP_AUX# [15]
LVDSᶲ ẞ HPD 1 36 LVDS-LCLKN
LVDS-L0P LVDS-L0P [15]
eDP R74 0_04 DP_AUX [15] DP_HPD TXOC- LVDS-L1N LVDS-L1N [15]
LVDS R64 100K_04 TEST_MODE 2 35 LVDS-LCLKP Single link LVDS-L1P LVDS-L1P [15]
TEST_MODE TXOC+

B.Schematic Diagrams
LVDS
DAUXn 3 34 LVDS-L2N LVDS-L2N [15]
AUX_CH_N TXO3- LVDS-L2P
LVDS C41 0.1u_10V_X7R_04 DRX0p A_VCC33 LVDS-L2P [15]
[3] EDP_TXP_0 DAUXp 4 33
AUX_CH_P TXO3+

Sheet 14 of 31
LVDS-LCLKN LVDS-LCLKN [15]
LVDS C42 0.1u_10V_X7R_04 DRX0n
[3] EDP_TXN_0 5 32 LVDS-U0N LVDS-LCLKP LVDS-LCLKP [15]
C40 DP_V33 TXE0-
eDP R75 0_04 DP_TXP0 [15] LVDS 6 31 LVDS-U0P
eDP R76 0_04 DP_TXN0 [15]
0.1u_10V_X5R_04
DRX0p 7
DP_GND

LANE0_P
RTD2136N TXE0+

TXE1-
30 LVDS-U1N
LVDS-U0N
LVDS-U0P
LVDS-U0N
LVDS-U0P
[15]
[15]
RTD2136
DRX0n 8 29 LVDS-U1P LVDS-U1N
C LVDS C43 0.1u_10V_X7R_04 DRX1p LANE0_N TXE1+ LVDS-U1N [15] C
[3] EDP_TXP_1 LVDS-U1P LVDS-U1P [15]
DRX1p 9 28 LVDS-U2N
LVDS C44 0.1u_10V_X7R_04 DRX1n VVCCK_V12 LANE1_P TXE2-
[3] EDP_TXN_1 LVDS-U2N LVDS-U2N [15]
DRX1n 10 27 LVDS-U2P LVDS-U2P LVDS-U2P [15]
eDP R77 0_04 DP_TXP1 [15]
near pin 6 LANE1_N TXE2+
11 26 LVDS-UCLKN LVDS-UCLKN

SWR_VCCK/LDO_VCCK
eDP R78 0_04 DP_V12 TXEC- LVDS-UCLKN [15]
DP_TXN1 [15] C283 LVDS-UCLKP

SWR_VDD/LDO_VDD
LVDS-UCLKP [15]
LVDS DP_REXT 12 25 LVDS-UCLKP
DP_REXT TXEC+

SWR_LX/LDO_FB
P_DDC_CLK
P_DDC_CLK [15]
R65 P_DDC_DATA
P_DDC_DATA [15]

PANEL_VCC
0.1u_10V_X5R_04 LVDS

PWMOUT
CIICSDA
CIICSCL
EDPᶲ ẞ

PWMIN

TXE3+

TXE3-
PVCC
12K_1%_04

GND
EDP R342 0_04 PANEL_PW M
PANEL_PW M [15] RTD2136N-CG

13

14

15

16

17

18

PANEL_PWM 19

20

21

22

23

24
BRIGHTNESS_EC_PS Note: LVDS
LVDS R341 0_04
[11] EDP_BRIGHTNESS 1. Cap should be closed to chip 6-03-02136-031

BRIGHTNESS_EC_PS
R343
LVDSᶲ ẞ

PIN17
SMD_EDP_DAT
SMC_EDP_CLK
10K_04
R340
*100K_04 LVDS
LVDS Dual Mode Regulator Configuration
3.3VS 3.3VS
VVCCK_V12 80mils 2.2-uH(L) 0 Olm(R)
B
Mode Configure Table(Power On Latch) R68
LVDS
LVDSᶲ ẞ DVCC33 DVCC33
SWR Connect NC
B

R71
*4.7K_04 4.7K_04 LDO NC Connect
MODE_CFG0(PIN47)
LVDSᶲ ẞ
MODE_CFG0

MODE_CFG1

C18 C261 C20 Del L1,7/26 Tim

LVDS LVDS LVDS
0 1 SWR MODE VVCCK_V12

4.7u_6.3V_X5R_06
X EP MODE 0.1u_10V_X5R_04 0.1u_10V_X5R_04
MODE_CFG1(PIN48)
0
LVDSᶲ ẞ R58
LVDS
R66
6-19-41001-019
1 ROM ONLY MODE EEPROM MODE
4.7K_04 *4.7K_04 LVDS_PLVDD_EN [15]
follow common design,Ivy0420
3.3VS
PIN47 PIN48 C28 C29
LDO MODE LVDS LVDS

0.1u_10V_X5R_04
2.2u_6.3V_X5R_04
冯LVDS CONNECTOR 2㑯1
PIN17 R47 0_06

LVDS
R61 R56
LVDS LVDS

4.7K_04 4.7K_04

LVDSᶲ ẞ Cap closed to PIN17

A A
[19] SMC_EDP_CLK
[19] SMD_EDP_DAT

[11,12,15,16,17,18,20,21,22,23,24,28] 3.3VS
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[14] RTD2136 (eDP to LVDS)
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D01 3.0

Date: Tuesday, January 30, 2018 Sheet 14 of 35

5 4 3 2 1

RTD2136 B - 15
 Schematic Diagrams

Panel Con
5 4 3 2 1

PANEL CONN LVDS Default eDP +w/o driver ic 40pin(M116XW05-V1FH/N116XW05)

LED PANEL (LVDS Dual Channel).CO-LAYOUT eDP-old PANEL
eDP +w/o driver ic 40pin(M116XW05-V1FH/N116XW05)
eDP + w/ driver ic 40pin(N116BGE-EB2)
J_LCD1
3.3VS PLVDD
LVDS-UCLKN-R 1 2 LVDS-UCLKP-R
LVDS-U1N-R 3 1 2 4 LVDS-U2N-R
D 2A LVDS-U1P-R 5 3 4 6 LVDS-U2P-R D

C
A
D29 5 6
LVDS-U0N-R 7 8
eDP C269 7 8
LVDS-U0P-R 9 10

1u_6.3V_X5R_04
BAV99 RECTIFIER 9 10
3.3VS
1A

AC
11 12
eDP 13 11 12 14 PANEL_VCC_EN
R335 1K_04 HPD_L 15 13 14 16
[3,14] EDP_HPD 15 16
C260 DAUX# 17 18 DRX3#

*220p_50V_NPO_04
eDP R336
100K_04
DAUX 19
21
17
19
18
20
20
22
DRX3 FOR eDP
21 22
FOR eDP eDP DRX2# 23
23 24
24 DRX1# C30 eDP 0.1u_10V_X7R_04
DP_TXN1 [14]
B.Schematic Diagrams

DRX2 25 26 DRX1 C33 eDP 0.1u_10V_X7R_04

25 26 DP_TXP1 [14]
27 28
BRIGHTNESS_R 29 27 28 30 DRX0# C35 eDP 0.1u_10V_X7R_04
29 30 DP_TXN0 [14]
3.3VS R32 eDP *100K_04 31 32 DRX0 C37 eDP 0.1u_10V_X7R_04
INV_BLON 31 32 DP_TXP0 [14]
eDP 33 34
C17 0.1u_10V_X7R_04 33 34

Sheet 15 of 31 [14]

[14]
DP_AUX#

DP_AUX
C19
eDP
0.1u_10V_X7R_04
DAUX#
2A
35
37
39
35
37
39
36
38
40
36
38
40
2A
VLED

R44 eDP *100K_04 DAUX

FOR eDP
Panel Con
88107-40001
6-20-41A30-220
C310 C312 D02 DEL R359ℙ䓐嬲㚜
0.01u_50V_X7R_04 0.1u_50V_Y5V_06

FOR LVDS LVDS Dual Panel or old eDP Panel

LVDS Dual Channel 40PIN
[14] LVDS-UCLKN
R21 LVDS *0_04 LVDS-UCLKN-R
PANEL POWER 旸䓐UP7553 -- 6-02-07553-9C0
C R24 LVDS *0_04 LVDS-UCLKP-R 5VS C
[14] LVDS-UCLKP
R13 LVDS *0_04 LVDS-U2N-R
[14] LVDS-U2N J1
R20 LVDS *0_04 LVDS-U2P-R
[14] LVDS-U2P 1 2
R22 LVDS *0_04 LVDS-U1N-R
[14] LVDS-U1N
R26 LVDS *0_04 LVDS-U1P-R 3.3VS PLVDD
[14] LVDS-U1P *3mm
R19 LVDS *0_04 LVDS-U0N-R U19
[14] LVDS-U0N J2 2A
R18 LVDS *0_04 LVDS-U0P-R 2A
[14] LVDS-U0P 1 2 5 1
Default VIN VOUT

FOR LVDS 3.3VS C262 1u_6.3V_X5R_04

LVDS
*3mm 4
VIN/SS
C270 C271 C272

R325 *0_04 PANEL_VCC_EN 3 2 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 22u_6.3V_X5R_06

LVDS + w/ driver ic 30pin(N116BGE-L42V1R) [14] LVDS_PLVDD_EN EN GND
eDP UP7553PMA5-25
PLVDD 3.3VS
R31 R25
FOR eDP NB_ENAVDD R323 0_04 6-02-07553-9C0 D02 ㍉岤天㯪㚜㎃0603
J_LCD2 LVDS LVDS R331
1 2 *2.2K_04 *2.2K_04 100K_04
3 1 2 4 PANEL_VCC_EN
3 4
FOR LVDS HPD_L 5
5 6
6 㬌㕁嘇䁢3A,⤪䓐2nd source㗪天㲐シㅱ䓐
R38 LVDS *0_04 DAUX# 7 8 DRX3# R30 LVDS *0_04
[14] LVDS-LCLKN R42 LVDS *0_04 DAUX 9 7 8 10 DRX3 R29 LVDS *0_04
P_DDC_CLK [14] ⤪Panel PLVDD 2A⎗䓐ẍᶳ㕁
[14] LVDS-LCLKP 9 10 P_DDC_DATA [14] S: AP2821KTR-G1 6-02-02821-9C0
11 12
R51 LVDS *0_04 DRX2# 13 11 12 14 DRX1# R49 LVDS *0_04
[14] LVDS-L2N 13 14 LVDS-L1N [14]
R50 LVDS *0_04 DRX2 15 16 DRX1 R52 LVDS *0_04
[14] LVDS-L2P 15 16 LVDS-L1P [14]
FOR eDP 枸䔁ᶵᶲ
17 18
BRIGHTNESS_R 19 17 18 20 DRX0# R57 LVDS *0_04 R322 *10K_04
19 20 LVDS-L0N [14] PLVDD
21 22 DRX0 R62 LVDS *0_04
INV_BLON 21 22 LVDS-L0P [14] R59
23 24
23 24 *10mil_short
25 26 VLED BRIGHTNESS_R
27 25 26 28 PANEL_PW M [14]
29 27 28 30 VLED
B 29 30 B
*88107-30001
6-21-41A00-215

3.3V
J9 defaul D02 DEL 枸䔁
*OPEN_2A
2 1 VLED
VIN
R291 0_04 NB_ENAVDD
Q10A [3] SOC_ENAVDD
R244
*MTS3572G6
100K_04
C75 C70
3.3V 4 3
S2 D2

*0.1u_50V_Y5V_06

*0.1u_50V_Y5V_06
㚱INVERTER POWER ἧ䓐G5966婳枸䔁 3.3V

G2
U11A
14

D02 FOR ℙ䓐 㬌暣旣 RC delay炻㰺㚱婳䚜㍍㍍ C61

74LVC08APW U11B
14

From EC *0.22u_50V_Y5V_06
1 74LVC08APW R80

5
[19] BKL_EN 3.3V Csjhiuoftt!ᾉ!嘇!枸!䔁!㓦!暣!ᾅ!嬟!!!暣!!!嶗
3 BLON1 4 3.3V *4.7K_06
From APL eDP D02 0122 2 6 BLON2 R84 㚱暨㯪ℵᶲẞ
[11] BLON C
5 *10K_04 BRIGHTNESS_R
eDP 6 AC
R254 100K_04 R89 D C12 A
7

U11C *150K_1%_04
14

R90 Q8A C10

7

74LVC08APW LVDD_EN# 2 G
*100K_04 *MTDK5S6R *0.1u_16V_Y5V_04 D3
R261 *100K_04 9
3.3V INV_BLON S *0.1u_16V_Y5V_04
8 *BAV99 RECTIFIER
From APL GPIO 10
1
[11] SB_BLON
U11D R86
14

3
From EC 74LVC08APW D02 FOR ㍉岤 㚜㎃X5R *100K_04 D
7

12
[19,21] LID_SW # Q8B [11,12,14,16,17,18,20,21,22,23,24,28] 3.3VS
11 LID_SW #1 R265 C211 Q10B

6
From RTD2136 5 G *MTDK5S6R [2,11,17,18,19,23,26] 3.3V
A 13 100K_04 0.1u_10V_X5R_04 *MTS3572G6 A
[14] ENBLT S [13,16,20,21,23] 5VS

D1
R85
4 [23,24,25,26,27,28,29] VIN
PANEL_VCC_EN *0_04
R266 0_04 1 [21,23,26] 5V
7

[19] ALL_SYS_PW RGD G1

S1
D02 FOR ℙ䓐 R87

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
*0_04
[11,17,23,24] SUSB#

2
枸䔁 婧㔜POWER SEQUENCE Title
[15] PANEL CON
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 15 of 35

5 4 3 2 1

B - 16 Panel Con
 Schematic Diagrams

RTD2168-CG, CRT
5 4 3 2 1

Embedded LDO
CRT CPU
Select VCCK_V12 source from external 1.2V or embedded LDO
3.3VS
POWER

VGA_HPD 3.3VS
[3] VGA_HPD
L5
AVCC33
C278 0.1u_10V_X5R_04 AUX_CH_N R9 Ra
EP Mode [3] VGA_AUX_CH_N
AUX_CH_P
FCM1005MF-600T01 C25
C277 0.1u_10V_X5R_04 4.7K_04 Ra R156 pull up VCCK_V12 from LDO enable
[3] VGA_AUX_CH_P Rb R157 pull down VCCK_V12 from external
Pin2, Pin3 should be connected to EC for EP mode *1u_6.3V_X5R_04
C280 0.1u_10V_X5R_04 LANE0_N 1.2V_LDO_EN
[3] VGA_LANE0N
D I2C protocol is used C279 0.1u_10V_X5R_04 LANE0_P 3.3VS
D
[3] VGA_LANE0P LDO_EN(PIN21) L3
C282 0.1u_10V_X5R_04 LANE1_N R15 VDD_DAC_33
RTD2168 Slave Address: [3] VGA_LANE1N Rb 0 1
0x64/0x65 [3] VGA_LANE1P
C281 0.1u_10V_X5R_04 LANE1_P *4.7K_04 VCCK_V12 from VCCK_V12 from FCM1005MF-600T01 C251
3.3VS
External 1.2V Embedded LDO *1u_6.3V_X5R_04
R337 *4.7K_04

R333 *4.7K_04
From EC
R339 12K_1%_04
CSDA
[19] CSDA

B.Schematic Diagrams
CSCL
[19] CSCL
C22

0.1u_16V_Y5V_04
Mode Configure Table(Power On Latch)
Sheet 16 of 31

AUX_CH_N

AUX_CH_P

VCCK_V12
RTD2168 Supports three operation mode for system design.

LANE1_N

LANE0_N
5VS_CRT

LANE1_P

LANE0_P

RRX
R2 *4.7K_04 Reserve 4.7K resistor pull high/low for mode selection

RTD2168-CG, CRT
U16
ROM ONLY Mode : PIN22 pull low, PIN23 pull high
1
5

*U74LVC1G125G-AL5-R

33

32

31

30

29

28

27

26

25
VGA_VS 2 4 VGA_VS_R U20 EP Mode : PIN22 pull high, PIN23 pull low

EPAD_GND

LANE1N

LANE1P

LANE0N

LANE0P

RRX

AUX_N

AUX_P

AVCC_12
EEPROM Mode : PIN22 pull high, PIN23 pull high
C C
3

POL1_SDA (PIN22)
R55 100K_04 VGA_HPD 1 24 AVCC33
R317 0_04
HPD AVCC_33 0 1
CSCL 2 23 POL2_SDC
SMB_SCL POL2_SCL C21 C24
CSDA 3 22 POL1_SDA
0.1u_16V_Y5V_04 10u_6.3V_X5R_06
0 X EP MODE
SMB_SDA POL1_SDA POL2_SCL
5VS_CRT
3.3VS VGA_SCL

3.3VS
4

5
VGA_SCL

DVCC_33
RTD2168 LDO_EN

DVCC_33
21

20
1.2V_LDO_EN 3.3VS (PIN23)
1 ROM ONLY MODE EEPROM MODE
3.3VS
R5 *4.7K_04 VGA_SDA VCCK_V12
6 19 C15
U17 C259 VGA_SDA VCCK_12
1
5

*U74LVC1G125G-AL5-R VGA_VS POL1_SDA

7 18 0.1u_16V_Y5V_04 R10 *4.7K_04
0.1u_16V_Y5V_04 VSYNC XO
VGA_HS VGA_HS_R C14 C23
2 4 VGA_HS 8 17 R16 4.7K_04

VDD_DAC_33
HSYNC XI/CKIN 0.1u_16V_Y5V_04 2.2u_6.3V_X5R_04

GND_DAC
POL2_SDC

GREEN_N
GREEN_P
R11 4.7K_04

BLUE_N
BLUE_P
3

RED_N
RED_P
R17 *4.7K_04

R14 R8
R318 0_04 RTD2168-CG 3.3VS
9

10

11

12

13

14

15

16
4.7K_04 *4.7K_04

VDD_DAC_33
B B

C252 C253
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 DAC_RED
DAC_GREEN
DAC_BLUE

J_CRT1 5VS_CRT D4 5VS

DS15146BAC067 RB751S-40C2
DAC_RED L4 FCM1005MF-600T01 FRED 1 C A
9 24 mil
DAC_GREEN L2 FCM1005MF-600T01 FGRN 2
10 R321 R3
DAC_BLUE L1 FCM1005MF-600T01 FBLU 3 2.2K_04 2.2K_04
11
4
12 VGA_SDA
R12 R7 R4 C13 C9 C7 C6 C8 C11
5
13 VGA_HSYNC R319 36_1%_04 VGA_HS_R
15p_50V_NPO_04

15p_50V_NPO_04

15p_50V_NPO_04

15p_50V_NPO_04

15p_50V_NPO_04

6
15p_50V_NPO_04

14 VGA_VSYNC R316 36_1%_04 VGA_VS_R

75_1%_04

75_1%_04

75_1%_04

7
15 VGA_SCL
8
C246 C245 C250 C4
[11,12,14,15,17,18,20,21,22,23,24,28] 3.3VS
GND1
GND2

A A
10p_50V_NPO_04

10p_50V_NPO_04

1000p_50V_X7R_04

1000p_50V_X7R_04
[13,15,20,21,23] 5VS

GND GND GND GND GND GND GND GND GND

GND
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
CRT Port ᷕ ⽫ H=3 Title
PN:6-20-14X60-015 [16] RTD2168-CG(DDI to CRT), CRT
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 16 of 35

5 4 3 2 1

RTD2168-CG, CRT B - 17
 Schematic Diagrams

TPM/USB

5 4 3 2 1

暞ẞ㔠:7 pcs
SLB9665TT Only SLB9665TT
NOTE:LPC POWER 3.3VA U27 SLB9665TT
R470 4.7K_04
D02 DEL R446 11/6

1.8VS 㺷暣D02 㓡1.8VS C344 0.1u_16V_Y5V_04

C348 0.1u_16V_Y5V_04 R436 TPM *0_04 3.3V
C338 0.1u_16V_Y5V_04
1.8VA 3.3VS C337 0.1u_16V_Y5V_04 R435 TPM 0_04

12
3.3VS
D U28 R471 0_04 D
1 11 TPM U31

E0
2 VCCA VCCB 10 LPC_AD0_3.3V 26 5
[8,19] LPC_AD0 A1 B1 LPC_AD1_3.3V LAD0 VDD1
3 9 23 10
[8,19] LPC_AD1 A2 B2 LPC_AD2_3.3V LAD1 VDD2
4 8 20 19 TPM TPM TPM TPM

GND
[8,19] LPC_AD2 A3 B3 LPC_AD3_3.3V LAD2 VDD3
5 7 17 24 C354 C359 C344 C346
[8,19] LPC_AD3 A4 B4 LAD3 VDD4 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
TPM G2129BAE1U PCLK_TPM_3.3V 21 TPM

6
LCLK
PIN5 PIN10 PIN19 PIN24
LPC_FRAME#_3.3V22
16 LFRAME#
[7,18,19,21,22] BUF_PLT_RST# LRESET#_1
LRESET# 9
LRESET#_2
B.Schematic Diagrams

SERIRQ_3.3V 27
SERIRQ
R442 TPM 4.7K_04 TPM_PP 7 6 TPM_GPIO
PP GPIO
1
NC_1
2
NC_2
㺷暣D02 㓡1.8VS
3
8 NC_3 1.8VS
BUF_PLT_RST# TPM NC_4
R443 *0_04 LRESET# 12 4

Sheet 17 of 31 13 NC_5 GND_1 11

NC_6 GND_2
GPS!҂ٰёૈᡂ୏ 14 18 1.8VA 3.3VS

12
15 NC_7 GND_3 25 U27
28 NC_8 GND_4
1 11

TPM/USB

E0
NC_9 VCCA VCCB
2 10 PCLK_TPM_3.3V
SLB9665TT_5.61 [8] PCLK_TPM A1 B1 LPC_FRAME#_3.3V
3 9
Asserted before entering S4 6-03-09665-0H2
[8,19] LPC_FRAME#
4 A2 B2 8

GND
5 A3 B3 7 SERIRQ_3.3V
C LPC reset timing: [8,19] SERIRQ A4 B4 C
TPM G2129BAE1U
LPCPD# inactive to LRST# inactive 32~96us

6
USB CHARGER PORT VDD5
U7
80 mil
USBVCC_CH

5 1
W/ USB CHARGER C190
VIN VOUT
2
GND C171
CB Smart CDP VDD5 10u_6.3V_X5R_06 4 3
Function EN# OC#
pin8 pin4 0.1u_16V_Y5V_04
For W/ or W/O standby VDD5 SY6288D20AAC
DCP autodetect with change parts stuff
0 X mouse/keyboard wake up R232
100K_04
2A/90mohm USB PORT Charge
[19,23,25] USB_CHARGE_EN
1 0 S0 Charging with SDP USBVCC_CH

1 1 S0 Charging with CDP USB_DD_ON#

D02 ㍉岤天㯪㚜㎃0603
B 80 mil B
R237 C173 22u_6.3V_X5R_06
VDD5 1M_04 C172 22u_6.3V_X5R_06
If select CB pin contact to SUSB#, you can Support

6
D
DCP mode and Apple-compliant devices charge in Q17A
D33
2G
S3 status. R250 S DT1140-04LP-7
J_USB3_1

1
MTDK3S6R 1
USB_CHG 10 1
USB3_TX0PJ 9 VBUS GND1
C378 9 2
USB_CHG SSTX+ SHIELD

3
D 8 3 USB3_TX0NJ 8

Standard-A
[11,15,23,24] SUSB# R259 *0_04 10K_04 0.1u_16V_Y5V_04
USB3_TX0N SSTX-
U10 USB_CHG Q17B [4] USB3_TX0_N C372 0.1u_10V_X7R_04 7 4
USB_CHG USB3_RX0PJ 6
[19,23] DD_ON R262 0_04 8 1 5G 6 5
CB PRE# S MTDK3S6R C373 0.1u_10V_X7R_04 USB3_TX0P USB3_RX0NJ 5 SSRX+
[4] USB3_TX0_P SSRX-

4
USB_PN0 7 2 USB_PN0_R 7
[4] USB_PN0 TDM DM GND_D
USB_PP0 6 3 USB_PP0_R
[4] USB_PP0 TDP DP R247 GND2
D02 㓡SHORT PIN
GND

D17 USB_PN0RJ 2 SHIELD

VDD5 5 4 USB_CHG DT1140-04LP-7
VCC CDP USB_PP0RJ 3 D-
USB_PN0_R L12 USB_PN0R
4 3 D+
SLG55593VTR
C200 10 1
9

100K_04 4
TDFN8-2X2MM USB_PP0_R USB_PP0R
1 2 9 2 GND
USB_CHG
*W CM2012F2S-161T03-short 8 3
0.1u_16V_Y5V_04 USB3_RX0_P 7 4
[4] USB3_RX0_P UB251H-009G11M
USB3_RX0_N 6 5 6-20-B4Z10-009
[4] USB3_RX0_N
SLG55583VTR : 6-02-55583-9D0
USB3.0 Max Trace length USB2.0 ESD 暨ᶲẞ
Follow Design Guide PCBfootprint:
USB_W /O CHG
dfn10-2_5x1mm-short
A
W/O USB CHARGER USB_PN0 R249 0_04 USB_PN0_R A

USB_PP0 USB_W /O CHG USB_PP0_R

R248 0_04

[21,23] DD_ON#
DD_ON# R239
USB_W /O CHG
0_04 USB_DD_ON# [3,5,20,23] 1.8VS ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[3,4,5,6,7,8,9,11,18,19,22,23,24] 1.8VA
Title
[2,11,15,18,19,23,26]
[6,7,8,9,19,22,23,24,26]
3.3V
3.3VA
[17] TPM /USB3.0
[11,12,14,15,16,18,20,21,22,23,24,28] 3.3VS
Size Document Number Rev
[23,24,25,26,27,28] VDD5
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 17 of 35

5 4 3 2 1

B - 18 TPM/USB
 Schematic Diagrams

WLAN, 3G, MSATA

5 4 3 2 1

CURRENT2A㗪,DON'T DROP

3G,LTE CARD 3G_3.3V 80 mils

BELOW 3.135V
3G POWER
J_3G1 C289 220u_6.3V_6.3*4.4
3G ⤪㚱ᶵἧ䓐3G, ⎒ἧ䓐mSATA䘬BOM怠枭㗪, 婳䁢mSATA⣂䔁3.3VS POWER

+
CHECK EC, 1.8V LEVEL 75 74 C73 0.1u_16V_Y5V_04
FOR NB Ra,Caᶵ䓐姕妰 73 CONFIG_2 3.3V4 72 3G
FOR PAD Ra,Ca天ᶲ 71 GND10 3.3V3 70 C74 0.1u_16V_Y5V_04
Ra 69 GND9 3.3V2 68 3G
R79 *0_04 67 CONFIG_1 SUSCLK(32Khz)(O) 66 SIM_DET
[19] 3G_RST# Reset#(O)1.8V SIM Detect(O) IVBXFJ!NV847ԜQJOࣁ2/9W!MFWFM
3G 65 64
D 3G_REST#㍍⇘EC pinᶨ⭂天open Ca 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62 IJ;!Qsftfou D
drain, ANTCTL2(I)1.8V COEX2(I/O)1.8V 3G_3.3V
㲐シ䘬㗗EC㛒姕⭂㬌pin C51 61 60 C76 DPOOFDUPS٬ҔOPSNBM!DMPTFE)
㗗open drain㗪㬌EC㬌pin *33p_50V_NPO_04 59 ANTCTL1(I)1.8V COEX3(I/O)1.8V 58 470p_50V_X7R_04 ܎HOE* >3A 6-15-03415-7E0 >3A
暨䁢low. 3G 57 ANTCTL0(I)1.8V NC1 56 3G
GND8 NC0 >120 mil 4 3 >120 mil
2014/5/30 CLOSED 55 54 ӵό٬Ҕፎዴᇡቷ୘ࢂցሡाQVMM 3.3V S2 D2
GND 53 REFCLKP PEWake#(IO) 52 GND
CONNECTOR REFCLKN CLKREQ#(IO) IJHI-ࡌ᝼ጕၡคQVMM!IJHIႝߔ 3G_POW ER_EN 3G

G2
51 50 C56
GND7 PERST#(O) C64 Q9A
49 48
PETp0/SATA-A+ GPIO_4(IO)1.8V 3G MTS3572G6 3G
47 46 3G C71 0.1u_16V_Y5V_04

5
PETn0/SATA-A- GPIO_3(IO)1.8V

0.1u_16V_Y5V_04
45 44

1u_6.3V_X5R_04
GND6 GPIO_2(IO)1.8V R88
43 42 R99 R81
41 PERp0/SATA-B- GPIO_1(IO)1.8V 40 *100_06
PERn0/SATA-B+ GPIO_0(IO)1.8V 3G 3G
39 38 3G
] USB3_TX3_P C49 0.1u_10V_X7R_04 1 L8 2 USB3_TX3PJ 37 GND5 DEVSLP(O) 36 UIM_PW R
PW R_ON_OFF 100K_04 10_06
3G 35 PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) 34 UIM_DATA 3G
USB3_TX3NJ PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) UIM_CLK R103 330K_04
4 3 33 32

D
C50 0.1u_10V_X7R_04 C52 Q7

6
] USB3_TX3_N GND4 UIM_CLK(I)
3G *W CM2012F2S-short 31 30 UIM_RST
PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) R82 3G
1 L7 2 3G

D1
USB3_RX3_PJ 29 28 0.1u_16V_Y5V_04

B.Schematic Diagrams
4] USB3_RX3_P PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V 3G G
27 26 R70 0_06 3G *12K_06 2SK3018S3
USB3_RX3_NJ GND3 GPIO_10(IO)1.8V 1 Q9B
4 3 25 24 3G [19] 3G_POW ER_EN

S
4] USB3_RX3_N 3G G1 MTS3572G6
GPIO_12(IO)1.8V GPIO_7(IO)1.8V

S1
*W CM2012F2S-short 23 22 6-15-00056-7B0
21 GPIO_11(IO)1.8V GPIO_6(IO)1.8V 20 ᶵ㓗㎜GPS≇傥ẍPULL DOWN
3G CONFIG_0 GPIO_5(IO)1.8V

2
B KEY 娵姤䓐
3G
R53 *4.7K_04

[4]
[4]
USB_PN3
USB_PP3
1

4
2 L6
*W CM2012F2S-short
3 3G
11
9
7
5
GND2
USB_D-
USB_D+
GPIO_9/DAS/DSS#(I)(OD)
W_DISABLE#1(O)
Full_Card_Power_Off#(O)1.8V
10
8
6
4
3G_EN
PW R_ON_OFF R83 10K_04
3G 80 mils
3G_EN [19] SIM CONN D02 FOR ℙ䓐
J_SIM1 3G

(TOP VIEW)
Sheet 18 of 31
GND1 3.3V1 SIM_DET 9 8

WLAN, 3G, MSATA

3 2 DETECT_SW UIM_MCMD UIM_DATA
C GND0 3.3V0 3G_3.3V 7 6 C
1 NGFF_B
UIM_CLK UIM_DATA UIM_I/O UIM_VPP
CONFIG_3 5 4
UIM_RST 3 UIM_CLK UIM_VPP 2
+ C318 C265 C268 UIM_PW R UIM_RST UIM_GND
1

GNG
GND
GND
GND
NFSB0-S6701-TP40 UIM_PWR
C26
3G 220u_6.3V_6.3*4.4 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
3G 3G 3G 3G
6-21-84K50-075

GND1
GND2
GND3
GND4
6-21-84KP0-075 C27 C34

*22p_50V_NPO_04
0.01u_16V_X7R_04

*0.1u_16V_Y5V_04
MSMPS-SN2(01T) D02 FOR N24ℙ䓐
GND

3G

3G
6-86-2B010-005
GND Layout㗪
1.SIMᷳ㇨㚱ᾉ嘇䶂≈䰿(10mil)
2.㇨㚱ᾉ嘇䶂ᷳ攻≈GND
3.SIM hold㛔橼⚃␐≈GND⚵丆
4.SIM CONN月役MINI CARD CONN
5.SIM ᷳ㭷ᶨᾉ嘇䶂䘬Layout 嵹䶂暨⮷㕤10℔↮

D02 ADD RESET NET 11/4 㷔溆bot 朊

WLAN J_W LAN1

PERST0# R462
R463
0_04
*0_04
BUF_PLT_RST#
W LAN_PLTRST#
[7,17,19,21,22]
[5]
3G_EN

3G_3.3V
T38

T63
RF Test
TEST Pad Keep Bot Side
B 75 74 40 mil B
GND13 3.3V3 W LAN_3.3V
73 72 W LAN_3.3V
[6] CNVI_W T_CLK_DP WT_CLKP 3.3V2 T45
71 70 C240 C212 C238
[6] CNVI_W T_CLK_DN WT_CLKN PEWAKE1_N
69 68 W LAN_EN
GND12 CLKREQ1_N T54
67 66 0.1u_16V_Y5V_04 22u_6.3V_X5R_06 22u_6.3V_X5R_06
[6] CNVI_W T_D0P WT_D0P PERST1_N
65 64 BT_EN
[6] CNVI_W T_D0N WT_D0N REFCLK0 CLKIN_XTAL_LCP [6] D02 ㍉岤天㯪㚜㎃0603 T41
63 62
䔞㚱wake up 61 GND11 IRQ_N(I) 60 R312 10K_04
[6] CNVI_W T_D1P WT_D1P I2C CLK(O) W LAN_3.3V PCIE_W AKE2# T58
wlan㗪R495ᶨ⭂天ᶲ 59 58 D02 DEL R307 FOR ℙ䓐 11/6 R298 10K_04
[6] CNVI_W T_D1N WT_D1N I2C DATA(IO)
57 56
GND10 W_DISABLE1_N(O) W LAN_EN [19]
R308 *0_04 55 54
[11] PCIE_W AKE2# PEWAKE0_N W_DISABLE2_N(O) BT_EN [19]
53 52 PERST0#
[11] W LAN_CLKREQ# CLKREQ0_N PERST0_N(O)
3.3VS R302 10K_04 51 50
GND9 SUSCLK(32Khz)(O) SUSCLK [7]
49 48 R293 *0_04
[4] CLK_PCIE2_MINI# REFCLKN0 COEX1_TXD(I/O)1.8V CNVI_MFUART2_RXD [5]
47 46 R289 *0_04
[4] CLK_PCIE2_MINI REFCLKP0 COEX2_RXD(I/O)1.8V CNVI_MFUART2_TXD [5]
45 44 R290 *0_04
GND8 COEX3(I/O)1.8V CNVI_GNSS_PA_BLANKING [5]
43 42
[4] PCIE_RXN2_W LAN PERN0 CLINK_CLK
41 40 VDD3 W LAN_3.3V
[4] PCIE_RXP2_W LAN PERP0 CLINK_DATA
39 38 U14
37 GND7 CLINK_RESET 36
[4] PCIE_TXN2_W LAN PETN0 UART_RTS/BRI_DT CNVI_BRI_DT [6] >80 mil 5 1 >80 mil 6-34-N350S-020
35 34 VIN VOUT
[4] PCIE_TXP2_W LAN PETP0 UART_CTS/RGI_RSP CNVI_RGI_RSP [6]
33 32 H45
GND6 UART_TX/RGI_DT CNVI_RGI_DT [6] 4
VIN/SS H6_0D3_7
C217 C219
VDD3 R220 75K_04 CNVI_RF_RST# 3 2
E KEY 1u_6.3V_X5R_04 EN GND 0.1u_16V_Y5V_04
D02 CNVI㕘⡆
UP7553PMA5-25
23 22
[6] CNVI_W GR_CLK_DP WGR_CLKP UART_RX/BRI_RSP CNVI_BRI_RSP [6]
21 20
[6] CNVI_W GR_CLK_DN WGR_CLKN UART_WAKE_N M: UP7553 -- 6-02-07553-9C0
R458 19 18
17 GND5 GND4 16 S: G5243A ---- 6-02-05243-9C0
10K_04 [6] CNVI_W GR_D0P WGR_D0P LED2_N(OD) AP2821KTR-G1 6-02-02821-9C0
15 14
[6] CNVI_W GR_D0N WGR_D0N PCM_OUT/CLKREQ0 XTAL_CLKREQ [6]
A
[19] CNVI_DET#
13 12 ㍍⇘EC暨冯EC䡢娵 A
11 GND3 PCM_IN 10
[6] CNVI_W GR_D1P WGR_D1P PCM_SYNC/LCP_RSTN CNVI_RF_RST# [6]
L: CNVi 9 8 [19] W LAN_PW R_EN
H: W/O CNVi [6] CNVI_W GR_D1N
7 WGR_D1N PCM_CLK 6
5 GND2 LED1_N(OD) 4 1.8VA D02 CLOSE 1/20 CECK LIST ⇒昌
40 mil
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[4] USB_PN7 USB_DN 3.3V1
3 2
[4] USB_PP7 USB_DP 3.3V0 W LAN_3.3V
1 R221 *20K_04 CNVI_BRI_RSP
GND1
[7,11,19,21,22,23,24,25,26,28,29] VDD3 Title

NFSE0-S6701-TP40
R450
*20K_04 CNVI_RGI_RSP
[11,12,14,15,16,17,20,21,22,23,24,28] 3.3VS [18] B,E KEY (WLAN,3G/MSATA)
[2,11,15,17,19,23,26] 3.3V
6-21-84KZ0-075 [3,4,5,6,7,8,9,11,17,19,22,23,24] 1.8VA Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 18 of 35

5 4 3 2 1

WLAN, 3G, MSATA B - 19

 Schematic Diagrams

KBC-ITE IT8987t
5 4 3 2 1

MODEL_ID RA RB
IT8987 IT8987 GPH7 ⎗ἧ䓐GPIO
KBC_AVDD
V1.0 10K X
PROJECT NAME

D02 DEL R192 FOR ℙ䓐 11/6 L11 V1.0 X 10K

[22] AIRPLAN_LED# W515(7)GU
HCB1005KF-121T20
VDD3 . VDD3
C364 C150 C157 C158 C167 VDD3

10u_6.3V_X5R_06 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 MODEL_ID R215 RA *10K_04

R216 RB 10K_04
PJ20
C153 Connect VAULE FOR REFERENCE BY PROJECT
*OPEN-2mm FOR USB CHARGE DET, MULTI FUNCTION PIN
D KBC_AGND D
3.3VA
2 1
0.1u_16V_Y5V_04 攳㨇㗪⇌㕟㚱㰺㚱USB CHARGE FUNCTION EC㍍㓞⇘ALL_SYS_PWRGD delay >
OPTION 5ms
PJ21 1 24 R210 10K_04 (⎗ẍ嬲≽ὅEC㍸ὃ䘬EXECL堐) ⼴ㇵ䘤DELAY_ALL_SYS_PWRGD
VDD3
*OPEN-2mm USB_W /O CHG 㛒⛐EXECL堐ᷕ䘬≇傥⎗ẍ冒埴␥⎵
6-20-94AF0-124 J_KB1
2 1 R211 10K_04 䚖⇵䓐䵈刚⫿橼ẋ堐⎗OPTION

114
121
127
1.8VA J_KB1 Add,8/5 Max U4B

11

26
50
92

74
USB_CHG

3
U4A IT8987E 85208-24051
76 100 AUTO_LOAD_PW R R204 10K_04
default

VCC (1.8V/3.3V)

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6(PLL)

AVCC
VDD3

GPH7
[18] W LAN_EN GPH0/ID0/CLKRUN# OPTION SSCE0#/GPG2
10 58 KB-SI0 4 80
[8,17] LPC_AD0 GPM0/LAD0 KSI0/STB# [20] KBC_MUTE# FAN_DET GPJ4/DAC4/DCD0# OPTION
9 59 KB-SI1 5 81
[8,17] LPC_AD1 GPM1/LAD1 KSI1/AFD# GPJ5/DAC5/RIG0# OPTION
8 60 KB-SI2 6
[8,17] LPC_AD2
7 GPM2/LAD2 KSI2/INIT# 61 8 78 OPTION 56
⚢ ⭂ ἧ䓐FOR WLAN
KB-SI3
[8,17] LPC_AD3 GPM3/LAD3 KSI3/SLIN# [3] ME_W E GPJ2/DAC2/TACH0B OPTION KSO16/SMOSI/GPC3 PMIC_THERMTRIP [11,23] pin56:BT_DET#/KB-SO16
13 62 KB-SI4 11 57
[8] PCLK_KBC GPM4/LPCCLK KSI4 KSO17/SMISO/GPC5 SUS_PW R_ACK [7] PIN57:WEB2#/WLAN_EN/KB-SO17
6 63 KB-SI5 12 EC㍍㓞⇘ALL_SYS_PWRGD delay > 68
[8,17] LPC_FRAME# GPM5/LFRAME# KSI5 5ms [18] 3G_RST# GPI2/ADC2 OPTION
5 64 KB-SI6 14
[8,17] SERIRQ
22 GPM6/SERIRQ
LPC KSI6 65 KB-SI7 15 ⼴ㇵ䘤DELAY_ALL_SYS_PWRGD OPTION IT8987
[7,17,18,21,22] BUF_PLT_RST# GPD2/LPCRST# KSI7
K/B MATRIX 71
[7] DELAY_ALL_SYS_PW RGD GPI5/ADC5/DCD1# OPTION
R187 100K_04 KBC_W RESET# 14 36 KB-SO0 1 R209 72
B.Schematic Diagrams

VDD3 WRST# KSO0/PD0 [7] SUS_STAT_N GPI6/ADC6/DSR1# OPTION

C151 0.1u_16V_Y5V_04 37 KB-SO1 2 *0_04
GA20 126 KSO1/PD1 38 KB-SO2 3
4 GPB5/GA20 KSO2/PD2 39 KB-SO3 7
[29] AC_IN# GPB6/KBRST# KSO3/PD3 㓗㎜1.8V/3/3V by EC code setting
16 40 KB-SO4 9 96
[22] LED_ACIN AC_PRESENT20 GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4 HSCE#/ID3/GPH3 1.24VA_PG [26]
41 KB-SO5 10 115 97 1.05VS_PG [24]
GPE7/L80LLAT OPTION KSO5/PD5 [14,19] SMC_EDP_CLK GPC1/SMCLK1 OPTION HSCK/ID4/GPH4
42 KB-SO6 13 116 98
KSO6/PD6 [14,19] SMD_EDP_DAT GPC2/SMDAT1 OPTION HMISO/ID5/GPH5 VR_PW RGD [28]
43 KB-SO7 16 118 99 R203 0_04
3.3V KSO7/PD7 [7] PMU_SLP_S0# GPF7/SMDAT2/PECIRQT# FDIO3/DSR0#/GPG6 SUSB#_PCH [7,23]
23 44 KB-SO8 17
[11] SMI# GPD3/ECSCI# KSO8/ACK# OPTION
15 45 KB-SO9 18 82 R212 0_04
[11] SCI# CNVI_DET# [18]

Sheet 19 of 31
GPD4/ECSMI# KSO9/BUSY 46 KB-SO10 19 24 OPTION EGAD/GPE1 83
KSO10/PE [11,22] EC_EMMC_LED# GPA0/PWM0 OPTION OPTION EGCS#/GPE2 EC_EN [23]
77 DAC 51 KB-SO11 20 84
GPG2/SSCE0# KSO11/ERR# OPTION EGCLK/GPE3 VA_ON [23,25]
52 KB-SO12 21 28
KSO12/SLCT [21] PW M_FAN GPA2/PWM2OPTION
53 KB-SO13 22 29 48
IT8987 KSO13 GPA3/PWM3 OPTION OPTION TACH1/TMA1/GPD7 PMU_BATLOW # [7]

KBC-ITE IT8987 C
[21]
C168
CPU_FAN
0.1u_16V_Y5V_04
79

66
GPJ3/DAC3/TACH1B
ADC
KSO14
KSO15
54
55
KB-SO14
KB-SO15
23
24
Bay tril ἧ䓐8987 auto load share ROM ἧ䓐1.8V
30
GPA4/PWM4 OPTION DSR0#/GPG6
OPTION
GPJ7
119

2
128
1.8VA_EN [24]

3G_EN [18]
C

[19,29] BAT_DET GPI0/ADC0 Braswell ἧ䓐ITE 8987 non share ROMἧ䓐VDD3 OPTION GPJ6 3G_POW ER_EN [18]
67 VSTBY_FSPI䁢姕⭂FSPI LEVEL(3.3V/1.8V),ἧ䓐STBY 125
[19,29] BAT_VOLT GPI1/ADC1 [21] CCD_EN GPG0/SSCE1# OPTION
69 POWER R200 0_04
[2] THERM_VOLT GPI3/ADC3 VSTBY_FSPI R201 VDD3 㓗㎜1.8V/3/3V by EC code setting
70 *0_04 IT8987E
[29] TOTAL_CUR GPI4/ADC4 3.3V
106 R202 *0_04 IT8987: 3.3VS/1.8VS怠㑯 by EC
MODEL_ID VHSPI (1.8V/3.3V) 1.8VA code setting can't pull up/dn
73
GPI7/ADC7/CTS1# VDD3
107
PWRSW/GPE4 DD_ON [17,23]
R219,221⎗婧㔜33--100 ohm by Project SMBUS
R198 47_04 110 SMC_BAT R199 1.5K_04
[19,29] SMC_BAT GPB3/SMCLK0 D02 DEL R192 FOR ℙ䓐 11/6 SMD_BAT R228㬌䁢↮⡻暣嶗 VDD3
R197 47_04 111 95 R219 1.5K_04 婳ᶨ⭂天ἧ䓐1%䘬暣旣
[19,29] SMD_BAT GPB4/SMDAT0 HDIO3/GPJ1 BKL_EN [15] BAT_DET R208 10K_1%_04
H_PECI R193 10K_04
117 SMI# R184 10K_04 C
GPF6/SMCLK2/PECI 35 SCI# R186 2.2K_04 AC
㓗㎜1.8V/3/3V by EC code setting RTS1#/GPE5 EC_RSMRST# [23] 婳EC㍍㓞⇘RSMRS#_PG>10ms⼴, [19,29] SMC_BAT
17 䘤EC_RSMRST# SW I# R185 10K_04 D14 A
LPCPD#/GPE6 SB_KBCRST# [11]
BAV99 RECTIFIER
PWM 47 C
TACH0A/GPD6 CPU_FANSEN [21] VDD3
25 AC
[20] BEEP GPA1/PWM1 [19,29] SMD_BAT
31 120 D02 DEL R233 D16 A
[22] LED_BAT_CHG GPA5/PWM5 TMRI0/GPC4 BAT_VOLT
32 124 C169 1u_6.3V_X5R_04 BAV99 RECTIFIER
[22] LED_BAT_FULL GPA6/PWM6/SSCK TMRI1/GPC6 PM_PW ROK [7,28]
34 R233 C
[22] LED_PW R GPA7/PWM7/RIG1# AC
[19,29] BAT_DET
PS/2 123 R196 *0_04 PW M_FAN D13 A
CTX0/TMA0/GPB2 LAN_W AKEUP# [21] [14,19] SMC_EDP_CLK CSCL [16]
80CLK 85 *10K_04 BAV99 RECTIFIER
GPF0/PS2CLK0/TMB0/CEC R195 *0_04
3IN1 87 [14,19] SMD_EDP_DAT CSDA [16] C
GPF2/PS2CLK1/DTR0# 19 AC
D02 DEL R192 FOR ℙ䓐 11/6 L80HLAT/BAO/GPE0 SW I# [11] [19,29] BAT_VOLT
86 FAN_DET D15 A
[17,23,25] USB_CHARGE_EN GPF1/PS2DAT0/TMB1 OPTION
R214 0_04 88 BAV99 RECTIFIER
B [18] BT_EN GPF3/PS2DAT1/RTS0# OPTION B
112
89 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 R225
[21] TP_CLK GPF4/PS2CLK2
90
[21] TP_DATA GPF5/PS2DAT2
IT8887/IT8987: 93 FAN
HMOSI/ID6/GPH6 ECCLKRUN# [8]
㓗 ㎜ 1.8V/3/3V by EC setting WAKE UP TACH2/HDIO2/GPJ0
94
SUSC#_PCH [7,23]
10K_04
18
[23] PW R_SW # GPD0/RI1# OPTION D02 DEL R192 FOR ℙ䓐 11/6
21
[15,21] LID_SW # GPD1/RI2#
101 ALSPI_CE#
FSCE# 102 ALSPI_MSI
GP INTERRUPT FMOSI BAY TRAIL
DTR1#/SBUSY/GPG1/ID7

33 103 ALSPI_MSO
[7] PW R_BTN# GPD5/GINT/CTS0# FMISO ALSPI_SCLK EEPROM FOR IT8987㬌䶂嶗ᶵ暨ᶲἧ䓐AUTO LOAD Form Share ROM(PCH) OPTION (⎗ẍ怠㑯㗗⏎枸䔁)
105
FSCK VDD3
UART BRASWELL DEBUG PORT
108 104
[18] W LAN_PW R_EN GPB0/RXD/SIN0 VSS6 EEPROM FOR IT8887㬌䶂嶗暨ᶲ8M SPI ROM(Share BIOS+ME+EC ROM )
109
[7] H_PROCHOT_EC GPB1/TXD/SOUT0 EEPROM FOR IT8987㬌䶂嶗暨ᶲ2M SPI ROM(non share EC ROM)
J_80DEBUG1
GPC0/CRX0

VDD3 1
3IN1
VCORE

2
AVSS
VSS1
VSS3
VSS4
VSS5

C368 80CLK
U32 3
5 R457 33_04 ALSPI_MSI 4
0.1u_16V_Y5V_04 SI
8
VDD ALSPI_MSO 85204-04001
R217 2 R451 33_04
12

1
27
49
91
113
122

75

*20mil_04 SO
R455 ALSPI_CE#
FDIO2 3 1 R448 0_04
WP# CE# Connect VAULE FOR REFERENCE BY PROJECT
C152 3.3K_1%_04 ALSPI_SCLK
6 R453 33_04
KBC_AGND SCK
0.1u_16V_Y5V_04 R452
FDIO3 7 4
HOLD# VSS
1.05VS_EN [24,26] 3.3K_1%_04
GD25D10BTIGR
A A

ALL_SYS_PW RGD [15]

IT8887/IT8987: 3.3VS/1.8VS怠㑯 by EC

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
code setting

[2,11,15,17,18,23,26] 3.3V
Title
[7,11,18,21,22,23,24,25,26,28,29] VDD3
[6,7,8,9,22,23,24,26] 3.3VA [19] KBC-ITE IT8897
VR_PW RGD R205 *0_04 ALL_SYS_PW RGD [3,4,5,6,7,8,9,11,17,18,22,23,24] 1.8VA
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 19 of 35

5 4 3 2 1

B - 20 KBC-ITE IT8987t
 Schematic Diagrams

Audio Codec
5 4 3 2 1

For 1.5V HDA Link.

AUDIO CODEC ALC269 VC2 DVDD_IO PVDD1_2 L15
HCB1005KF-121T20
5VS

1.8VS R269 0_04 1 2

C209 C206 C221

C218
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
PIN9 PIN9 PIN39 PIN39

3.3VS L14 3.3VS_AUD C214

D HCB1005KF-121T20 C213 D
1 2 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 5VS_AUD 5VS
L21
C203 C207 C210 PIN46 PIN46 HCB1005KF-121T20
1 2

C
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
C229 C232 C224 C233 C236 D22
3.3VS_AUD PIN1 PIN1

1u_6.3V_X5R_04

*ZD5231BS2
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 10u_6.3V_X5R_06

A
PIN25 PIN25 PIN38 PIN38
R264 AUDG AUDG AUDG AUDG
D23

39
46

25
38
1

9
BAT54AS3 10K_04 U13
AZ_RST#_R R309 *0_04 2 Close to Codec

DVDD1

DVDD-IO

PVDD1
PVDD2

AVDD1
AVDD2
A
3 CODEC_PD# 4 13 SENSE_A R271 20K_1%_04 MIC_SENSE

B.Schematic Diagrams
1
C PD# Sense A
[19] KBC_MUTE#

3
A
D 14 LINE2_L R273 39.2K_1%_04 HP_SENSE
SPKOUTL+ 40 LINE2-L 15 LINE2_R
R286 100K_04 5 G SPKOUTL- 41 SPK-L+ LINE2-R
3.3VS_AUD SPK-L-
S Q29B 16 MIC2_L
D02 FOR ℙ䓐㎃100K

4
MTDK3S6R SPKOUTR- 44 MIC2-L 17 MIC2_R
6

D SPK-R- MIC2-R
SPKOUTR+ 45
SPK-R+ 18 SENSE_B
AZ_RST#_R R301 0_04 2 G Sense-B
S Q29A
47
48 SPDIFC2/EAPD 19 JDREF R278 20K_1%_04
MIC1_VREFO_R R296
MIC1_VREFO_L R297
2.2K_04
2.2K_04
Sheet 20 of 31
1

MTDK3S6R SPDIFO JDREF MONO_OUT AUDG

20
2 MONO-OUT
[21] MIC_DATA GPIO0-DMIC-DAT

Audio Codec
3 21 MIC1_L_C C216 4.7u_6.3V_X5R_06 MIC1_L R284 1K_04 MIC1_L_M
[21] MIC_CLK GPIO1-DMIC-CLK MIC1-L MIC1_R_C MIC1_R MIC1_R_M
22 C220 4.7u_6.3V_X5R_06 R285 1K_04
MIC1-R
C Closed to CODEC DIGITAL ANALOG 23 LINE1_L C
HDA_SDOUT 5 LINE1-L 24 LINE1_R
[8] HDA_SDOUT SDATA-OUT LINE1-R C227 0.1u_16V_Y5V_04
C205 22p_50V_NPO_04
HDA_BITCLK 6 27 CODEC_VREF C226 1u_6.3V_X5R_04
[8] HDA_BITCLK BIT-CLK VREF
R263 33_1%_04 AZ_SDIN0_R 8 28 LDO_CAP C237 10u_6.3V_X5R_06
[8] HDA_SDIN0 SDATA-IN LDO_CAP MIC1_VREFO_R
30
HDA_SYNC MIC1-VREFO-R MIC2_VREFO C228 *100p_50V_NPO_04
10 29
[8] HDA_SYNC SYNC MIC2-VREFO
AZ_RST#_R 11 32 HEADPHONE_L
[8] AZ_RST#_R RESET# HP-OUT-L 33 HEADPHONE_R
PIN27
BEEP_R HP-OUT-R

MIC1-VREFO-L
12 AUDG
PCBEEP 35 CODEC_CBN C225 2.2u_6.3V_X5R_04
PC BEEP C202 CBN
D18 36 CODEC_CBP

DVSS2
PVSS1
PVSS2

AVSS1
AVSS2
BAT54CS3 0.1u_10V_X5R_04 CBP 34

GND
KBC_BEEP 1 A OPVEE
C 3 R255 1K_04 BEEP_C C208 C234
2 A ALC269Q-VC2-GR SPKOUTL-_L
[5] PCH_SPKR SPKOUTL-

42
43

49

26
37

31
*100p_50V_NPO_04 6-03-02692-031 2.2u_6.3V_X5R_04
L18 FCM1608K-121T06
R258 C201
C230
4.7K_04 100p_50V_NPO_04 AUDG
KBC_BEEP *180p_50V_NPO_04
R245 3.9K_04
[19] BEEP MIC1_VREFO_L
AUDG
R242 4.7K_04 J_SPKL1

SPKOUTL+ SPKOUTL+_L 1
L19 FCM1608K-121T06 2
J_MIC1 C231 50271-0020N-001
B EMI Require MIC_SENSE
5
4 *180p_50V_NPO_04
PCB Footprint = 85204-02R
B
MIC1_R_M L13 FCM1005KF-121T03 3
L24 1 2 *HCB1005KF-121T20 10 EMI LAYOUT 暨月役CODEC
MIC1_L_M L16 FCM1005KF-121T03 2
SIZE 0603 1 SPKOUTR+
SPKOUTR+ [21]
AUDG SPKOUTR-
SPKOUTR- [21]
R267 0_06 C215 C204 TSH-3966S3R2-7-H3-005-1AG-1
R313 0_06 6-20-B28S0-006 TO AUDOI BOARD
100p_50V_NPO_04 100p_50V_NPO_04 MIC IN
C199 0.1u_16V_Y5V_04
C239 0.1u_16V_Y5V_04 BLACK
EMI LAYOUT 暨月役CODEC
AUDG
AUDG
J_HP1
5
HP_SENSE 4
HEADPHONE_R R283 75_04 L17 FCM1005KF-121T03 3
10
HEADPHONE_L R294 75_04 L20 FCM1005KF-121T03 2
1

C235 C223 TSH-3966S3R2-7-H3-005-1AG-1

6-20-B28S0-006
D02 DEL R292 & R304 FOR ℙ䓐 11/9
100p_50V_NPO_04 100p_50V_NPO_04 HEADPHONE
BLACK
EMI LAYOUT 暨月役CODEC
A AUDG A
[13,15,16,21,23] 5VS
[11,12,14,15,16,17,18,21,22,23,24,28] 3.3VS
[3,5,17,23] 1.8VS

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[20] ALC269Q-VC2 (AUDIO CODEC)
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 20 of 35

5 4 3 2 1

Audio Codec B - 21
 Schematic Diagrams

Conn, CCD, Fan, Click

5 4 3 2 1

CONN TO I/O BOARD CCD + Internal DIGITAL MIC

RTC_VBAT VDD3 3.3VS 5V 19V
9/25 CCD_PW R
J13 U15
2 1 J_BTB1 1A 4 1
1A
3.3VS VIN VOUT
1 2 USB_PP1 [4]
5
*OPEN_4mil 1 2 VIN
3 4 USB_PN1 [4] C244 C241
JP_5V 5 3 4 6
5 6 USB_PP2 [4]
7 8 USB_PN2 [4] 1u_6.3V_X5R_04 3 2 2.2u_6.3V_X5R_04
9 7 8 10 EN GND
D 9 10 PCIE_W AKE0# [11] From EC default HI D
11 12 UP7553PMA5-25
13 11 12 14 PCIE_RXP0_GLAN [4]
13 14 PCIE_RXN0_GLAN [4] [19] CCD_EN
15 16
15 16 PCIE_TXN0_GLAN [4]
17 18
17 18 PCIE_TXP0_GLAN [4] D28
19 20
21 19 20 22 CLK_PCIE0_GLAN [4]
CLK_PCIE0_GLAN# [4] 6 5 USB_PN6_R
23 21 22 24 [4] USB_PN6
[11] LAN_CLKREQ# 7 4 USB_PP6_R
BUF_PLT_RST#_J 25 23 24 26 SPKOUTRR+ [4] USB_PP6
25 26 8 3
27 28 9 2
[19] LAN_W AKEUP# 27 28
29 30
B.Schematic Diagrams

[17,23] DD_ON# SPKOUTRR- 10 1

29 30 J_CCD1
BUF_PLT_RST#_J TPF1-33030-0121
R464 0_04 1
[7,17,18,19,22] BUF_PLT_RST# 6-21-C3720-215 DT1140-04LP-7 2
R465 *0_04 D02 ADD枸䔁 11/6
[5] LAN_PLTRST# 3
4
L9 FCM1608K-121T06 SPKOUTRR+ 3.3VS 5
[20] SPKOUTR+ L23 1 2 HCB1005KF-121T20 MIC_DATA_R
[20] SPKOUTR- L10 FCM1608K-121T06 SPKOUTRR- [20] MIC_DATA MIC_CLK_R 6
L22 1 2 HCB1005KF-121T20
[20] MIC_CLK 7

Sheet 21 of 31 C54

*180p_50V_NPO_04
C57

*180p_50V_NPO_04
'0,&/VWXII&VWXIISB9B132B
C243

47p_50V_NPO_04
C242

47p_50V_NPO_04
8

85204-08001
6-20-53100-008

Conn, CCD, Fan, Close to J_AUDIO

Click
C C

HDD CONN J_HDD1

S1
CLICK CONN
S2 SATATXP0_L C377 0.01u_16V_X7R_04 PS2: 5VS TP_VCC
S3 SATATXN0_L C376 0.01u_16V_X7R_04 SATATXP0 [4] SMbus: 3.3VS
S4 SATATXN0 [4]
SATARXN0_L R444 *0_04 D02 FOR ㍉岤 㚜㎃X5R
S5 C375 0.01u_16V_X7R_04 5VS
SATARXP0_L SATARXN0 [4]
S6 C374 0.01u_16V_X7R_04
SATARXP0 [4] R445 0_04 C358 C360 C361
S7 3.3VS
3.3VS R440 R441
*10u_6.3V_X5R_06 1u_6.3V_X5R_04 0.1u_10V_X5R_04
J_TP1
10K_04 10K_04
P1
P2 1 TP_CLK_J
P3 2 TP_DATA_J
P4 3
P5 4 C356 C357
P6 5VS *FP226H-004S10M
P7
6-20-94A40-004 47p_50V_NPO_04 47p_50V_NPO_04
P8
P9
P10
P11 P11
P12
P13 P13
C348 C349 C350 C381 C382 SMBUS TP
0.1u_16V_Y5V_04

1u_6.3V_X5R_04

10u_6.3V_X5R_06

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06
P14 P14
J_TP2
P15 P15
SMB_CLK_T_J
1 SMB_DATA_T_J D12
GND2
GND1

2
B 193705-1 3 B
TP_CLK_J TP_CLK_J 6 5 TP_CLK
4 TP_DATA_J TP_DATA TP_CLK [19]
TP_DATA_J 7 4
PIN 5 TP_DATA [19]
8 3
GND1~2=GND 6 TP_VCC SMB_CLK_T_J SMB_CLK_T
9 2 SMB_CLK_T [11]
ONLY 3.3V SMB_DATA_T_J 10 1 SMB_DATA_T
6-20-437E0-022 ⡆≈2柮22u_06 FP225H-006S10M SMB_DATA_T [11]
Javen 11/23 6-20-94K00-006
DT1140-04LP-7

5V PWM FAN CONTROL CPU FAN CONN

POWER SW BOARD CONN D02 ᶵἧ䓐㓡ᶵᶲẞ
CPU_FAN R439
AX995B(SOT23-6) & APE8872 Co-Layout
*0_04 FON# 1
U30
FON GND
8
5VS 2 7
5VS_CPU_FAN 3 VIN GND 6
FAN_5VS VOUT GND
R1 *1K_04 J_FAN2 4 5
[19] CPU_FAN VSET GND
5VS R449 *20mil short-p C351
VDD3 D1 1 1u_6.3V_X5R_04 NCT3940S-A
3.3VS 1 2 C365 PW M_FAN C355 PW M_FAN 2
3 PW M_FAN
*10u_6.3V_X5R_06 *10u_6.3V_X5R_06
J_SW 1 AVL18S02015 4
20mil 6-24-30003-008 *85204-04001
FAN_5VS
1 J_FAN1
PCB Footprint = 85204-04L
2
[19] CPU_FANSEN 1
3 PW M_FAN [29] 19V
M_BTN# [23] C353 2
4 C363 *100p_50V_NPO_04 [23,26] 5V
3
A 5 [7,11,18,19,22,23,24,25,26,28,29] VDD3
A
6 LID_SW # [15,19] [19] PW M_FAN 10u_6.3V_X5R_06 85204-03001
PW M_FAN 6-20-23120-003 [11,12,14,15,16,17,18,20,22,23,24,28] 3.3VS
50578-0060N-001 C362 *100p_50V_NPO_04 [7] RTC_VBAT
6-20-91A10-106 CPU_FANSEN [13,15,16,20,23] 5VS
J_FAN1
3
3.3VS
R447 4.7K_04
1
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[21] CONN, CCD, FAN, CLICK, I/O
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 21 of 35

5 4 3 2 1

B - 22 Conn, CCD, Fan, Click

 Schematic Diagrams

eMMC / LED / Hole / Nut

5 4 3 2 1

eMMC
3.3VA +V3P3A_EMMC +V1P8A 1.8VA
eMMC
eMMC eMMC eMMC
R189 0_04 R182 0_04 3.3VA R246 *0_04 R251 *0_04 1.8VA
eMMC C194
C145 C149 C155 C146 C156 C154 C148 C147 C193 U8 *EM5209
eMMC
eMMC eMMC eMMC eMMC eMMC eMMC eMMC eMMC eMMC
*0.1u_16V_Y5V_04
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 1u_6.3V_X5R_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 *0.1u_16V_Y5V_04 1 6
D +V3P3A_EMMC 2 IN1 IN2 7 D
IN1 IN2 +V1P8A

J10

M4
C6

N4
E6

K9

P3
P5
F5
U29 eMMC 13 8
1A
E2 14 OUT1 OUT2 9

VCC
VCC
VCC
VCC

VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
NC E3 C192 OUT1 OUT2 C191
NC E12 eMMC 12 10 eMMC
R191 10_04 eMMC M6 NC E13 *0.1u_16V_Y5V_04 CT1 CT2 *0.1u_16V_Y5V_04
[8] EMMC_CLK CLK NC 3.3VS

VBIAS
E14 C187 C188

GND

GND
EN1

EN2
R183 10_04 eMMC M5 NC F1 eMMC eMMC
[8] EMMC_CMD CMD NC F2 *470p_50V_X7R_04 *470p_50V_X7R_04

5
R170 10_04 eMMC A3 NC F3
[8] EMMC_DAT0

15

11

5
R176 10_04 eMMC A4 DAT0 NC F12 1 R268 *0_04
[8] EMMC_DAT1 DAT1 NC EC_EMMC_LED# [11,19] eMMC
R173 10_04 eMMC A5 F13 LED_HDD# 4 R260 *10K_04 EMMC_PW R_EN_N
[8] EMMC_DAT2 DAT2 NC
[8] EMMC_DAT3 R157 10_04 eMMC B2 F14 2
DAT3 NC SATA_LED#_N [5,11]
[8] EMMC_DAT4 R167 10_04 eMMC B3 G1 C197
R174 10_04 eMMC B4 DAT4 NC G2 R272 *10K_04 C196
[8] EMMC_DAT5 U12 *TC7SZ08FU 3.3VS eMMC eMMC

3
R180 10_04 eMMC B5 DAT5 NC G12 R256 *10K_04

B.Schematic Diagrams
[8] EMMC_DAT6 DAT6 NC [8] EMMC_PW R_EN_N VDD3 *0.1u_10V_X7R_04
[8] EMMC_DAT7 R169 10_04 eMMC B6 G13
DAT7 NC C195
G14 *1u_6.3V_X5R_04
EMMC_RST#_R NC eMMC
K5 H1
RST_N NC *0.1u_10V_X7R_04 eMMC
H2
NC H3
eMMC VDDI_EMMC NC
C144 4.7u_6.3V_X5R_04 C2 H12
VDDI NC H13
6-07-47511-2A0 NC H14
NC
[8] EMMC_STROBE
R179
H5
Data Strobe NC
NC
NC
J1
J2
J3 Sheet 22 of 31
C
eMMC
100K_04
A7
E5
E8
NC_RFU
NC_RFU
NC
NC
NC
J12
J13
J14
K1
LED D21 D03 0503
C eMMC / LED / Hole /
E9 NC_RFU NC K2 10 1
NC_RFU NC [19] LED_PW R

Nut
E10 K3 9 2
NC_RFU NC [19] LED_ACIN
+V1P8A F10 K12 8 3 3.3VS
G3 NC_RFU NC K13 7 4
NC_RFU NC [19] LED_BAT_CHG
G10 K14 [19] LED_BAT_FULL 6 5
eMMC EMMC_CMD NC_RFU NC
R181 10K_04 L1
K6 NC L2 *DT1140-04LP-7
eMMC K7 NC_RFU NC L3
R190 20K_1%_04 EMMC_RST#_R NC_RFU NC
K10 L12
P7 NC_RFU NC L13 R315 R314
eMMC NC_RFU NC
R194 *0_04 P10 L14 100_04 100_04

R306

R305

R311

R310
[8] EMMC_RST# NC_RFU NC M1
NC M2
[7,17,18,19,21] BUF_PLT_RST#
C A eMMC NC M3 BAT CHARGE/ AC IN/

100_04

100_04

100_04

100_04
D11 RB751S-40C2 NC M7
POWER ON LED

A
NC
D02 㓡ᶲD11 ,ᶵᶲR194
NC
M8
M9
FULL LED D27 D26
NC M10
NC M11 RY-SP190YG34-5M RY-SP190YG34-5M
NC
PLTRST_N_1P8 OPTION TO EMMC A1
NC NC
M12 6-52-55001-022 6-52-55001-022

3
A2 M13

C
NC NC
IS FOR VALIDATION NEED WHEN A8
NC NC
M14 D25 D24

SG
A9 N1 2 LED_HDD#

SG
Y

Y
NC NC [11] LED_HDD# AIRPLAN_LED# [19]
eMMC boot is not enable A10
A11 NC NC
N3
N6
RY-SP155HYYG4-1
6-52-55002-04E
RY-SP155HYYG4-1
6-52-55002-04E

4
NC NC
A12
A13 NC NC
N7
N8
HDD LED AIRPLANE LED
A14 NC NC N9
B1 NC NC N10
B7 NC NC N11
B NC NC B
B8 N12
NC NC H1 H16 H15 H2 H22 H23
B9 N13
NC NC *C111D111N *C111D111N *C111D111N *C111D111N *HOLEC47D47N *HOLEC47D47N
B10
B11
B12
B13
NC
NC
NC
NC
NC
NC
N14
P1
P2
P8
HOLE/NUT
B14 NC NC P9
C1 NC NC P11
C3 NC NC P12 H10 H4 H13 H8 H6
C5
C7
NC
NC
NC
NC
P13
P14
CPU:H16/H17/H18
6-34-M56AS-011-1
*H7_5D2_8-NVA *H4_0D1_6 *H4_0D1_6 *H7_0D2_7 *O4_6X5_1D1_6X2_1 ⃱⬠溆,⚢⭂⫼
C8 NC NC
NC M1 M2 M4 M3
C9 H17 H18 H19
NC *M-MARK *M-MARK *M-MARK *M-MARK
C10 H6_0D3_7 H6_0D3_7 H6_0D3_7
C11 NC
C12 NC
C13 NC
C14 NC
D1 NC H3 H5 H7 H9
D2 NC 2 4 2 4 2 4 2 4
NC M6 M7 M5 M8
D3
NC *M-MARK *M-MARK *M-MARK *M-MARK
D4 3 1 5 3 1 5 3 1 5 3 1 5
D12 NC
D13 NC
D14 NC *H7_0D2_3 *H7_0D2_3 *H7_0D2_3 *H7_0D2_3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E1 NC
NC J_MINI1:H19/H20 H11 H12 H14
2 4 2 4 2 4
KLMBG2JETD-B041003 6-34-P650S-010
J5
A6
C4
E7
G5
H10
K8
N2
N5
P4
P6

bga153-11_5x13mm
3 1 5 3 1 5 3 1 5
H20 H21
A A
H6_0D3_7 H6_0D3_7
*H7_0D2_3 *H7_0D2_3 *H7_0D2_3

6-04-20410-EE1 32G
6-04-40410-EE0 64G ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[7,11,18,19,21,23,24,25,26,28,29] VDD3 Title
[2,11,15,17,18,19,23,26] 3.3V [22] eMMC/LED/HOLE/NUT
[3,4,5,6,7,8,9,11,17,18,19,23,24] 1.8VA
[6,7,8,9,19,23,24,26] 3.3VA Size Document Number Rev

[11,12,14,15,16,17,18,20,21,23,24,28] 3.3VS
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 22 of 35

5 4 3 2 1

eMMC / LED / Hole / Nut B - 23

 Schematic Diagrams

System Power
5 4 3 2 1

VDD3 VDD3
P2808 VIN VA VIN1
[11,19] PMIC_THERMTRIP VDD3
R45

0.1u_50V_Y5V_06

0.1u_50V_Y5V_06

0.1u_50V_Y5V_06
R35 R36

C247

C249

C248
DEBUG USE 47K_04 47K_04
0_04 U2

5
3 1 VIN VA VIN1 U74AHC1G08G-AL5-R
4 2 1
DTC114EUA CHANGE 2N3904 4

D
RSMRST# [7]
2
U18 2SK3018S3 [19] EC_RSMRST#

5
6
R6 10K_04 1 8 Zener Diode-->5V or 6V
SW 1 VA VIN1 G Q2

3
TJE-532-Q-T/R DD_ON_P DD_ON 9V~19V

C
R320 1_1%_06 2 7 R23 100K_04

S
D
VIN DD_ON_LATCH D2 D

M_BTN#_P PW R_SW #_R C A R33 90.9K_1%_04 B Q5

R324 10K_04 3 6 R329 10K_04 VDD3 VIN
[21] M_BTN# M_BTN# PWR_SW#
INSTANT_ON_P ZD5231BS2 BTN3904
R327 1K_04 4 5 R330 1K_04

E
[17,19,25] USB_CHARGE_EN INSTANT-ON GND PW R_SW # [19] 6-06-00051-052 C16 R34
*0.1u_16V_Y5V_04 20K_1%_04
P2808B0
R328

*100K_04
⼭㇨䓐暣㰈婧㔜℞ῤ

5V 3A 2A
B.Schematic Diagrams

VDD5 VDD3
VDD5 PJ18
*OPEN-3mm
5V C295
0.1u_16V_Y5V_04
U22 EM5209 C294
0.1u_16V_Y5V_04
3.3VA
1 2 1 6
2 IN1 IN2 7
IN1 IN2 3.3VA
3.3V PJ35 3.3VA 3A 13 8 2A
5V OUT1 OUT2
*OPEN-1mm 14 9
1 2 C299 OUT1 OUT2

Sheet 23 of 31 0.1u_16V_Y5V_04
12
CT1 CT2
10
C301
0.1u_16V_Y5V_04 VDD3

VBIAS
GND

GND
C303

EN1

EN2
C304

System Power C
470p_50V_X7R_04
470p_50V_X7R_04

R344
D02 1MM 攻嶅 R67
C

15

11

5
D02 1MM 攻嶅 J3
10K_04
J4 2 1 VDD3 10K_04 ON
VDD3
1 2 10K_04 R345
*OPEN_4mil
*OPEN_4mil J6 DD_ON# [17,21]
2 1

D
J5 C291 VDD5 C293 VA_ON [19,25]
1 2 *0.1u_10V_X7R_04 Q31
[17,19,23] DD_ON C45
C290 *0.1u_10V_X7R_04 *OPEN_4mil 2SK3018S3
G
*OPEN_4mil 1u_6.3V_X5R_04 [17,19,23] DD_ON
*0.1u_16V_Y5V_04

S
R72

100K_04

VDD3
3A U23 EM5209 VDD3 ON
3.3VS C321
0.1u_16V_Y5V_04 1
IN1 IN2
6
C314
0.1u_16V_Y5V_04
3.3V
2
IN1 IN2
7
憅⮵SUSC#⎓愺≽ἄHW⮵䫾, ⃰枸䔁
3.3VS
3A 13
OUT1 OUT2
8 3A 3.3V 䡢娵㗗⏎SW⮵䫾⎗ẍ⃳㚵
14 9
C305 OUT1 OUT2 C309
12 10 SEQUENCE
1. NORMAL, 㬋ⷠ┇≽
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04

VBIAS
GND

GND

C307
EN1

EN2
B
470p_50V_X7R_04
C308
470p_50V_X7R_04
SUSC#_PCH LOW, DD_ON & EC_EN⎴㬍HI B
3

15

11

5
D02 1MM 攻嶅

R107
R93
10K_04
2
J8
1
2. SUSC#_PCH⃰HI ⎓愺EC㗪,
VDD3
SUSB#_EN
10K_04
*OPEN_4mil
DD_ON HI, EC_EN DELAY 30ms⛐HI
VDD3
J7
C69 2 1
DD_ON [17,19,23] VDD3
C80 1u_6.3V_X5R_04 C63
*3300p_50V_X7R_04 *0.1u_10V_X7R_04 *OPEN_4mil U6

5
U74AHC1G08G-AL5-R
D02 㓡VS 㗪⸷C80ᶵᶲẞ 1
[19] EC_EN
4
SUSC# [26]
[7,19] SUSC#_PCH 2

1.8VS

3
5VS VDD5
6A 1A 1.8VA SUSB#_PCH
D02 DEL R192 FOR ℙ䓐 11/6

C97 U3 EM5209 C79

PCH SUSC#_PCH VDD3
U5
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04

5
U74AHC1G08G-AL5-R
6 1
IN2 IN1 1.8VS 1
7 2
IN2 IN1 4
SUSB# [11,15,17,23,24]
5VS
6A 8
OUT2 OUT1
13 1A [7,19] SUSB#_PCH 2
9 14
C98 OUT2 OUT1

3
C86 SUSC#_PCH
10 12
0.1u_16V_Y5V_04 CT2 CT1 0.1u_16V_Y5V_04 SUSB#_PCH
VBIAS

EC
GND

GND
EN2

EN1

A EC_EN A
C93 C92
470p_50V_X7R_04 470p_50V_X7R_04 DD_ON
D02 1MM 攻嶅
5

11

15

J12
2 1 VDD3
10K_04

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SUSB#_EN R118
[15,24,25,26,27,28,29] VIN [3,5,17,20] 1.8VS
R111 *OPEN_4mil
[25] VIN1 [3,4,5,6,7,8,9,11,17,18,19,22,24] 1.8VA
VDD5 10K_04 J11
[29] VA [6,7,8,9,19,22,24,26] 3.3VA
C91 2 1 Title
1u_6.3V_X5R_04 C85
SUSB# [11,15,17,23,24] [7,11,18,19,21,22,24,25,26,28,29] VDD3 [2,11,15,17,18,19,26]
[11,12,14,15,16,17,18,20,21,22,24,28]
3.3V
3.3VS
[23] SYSTEM POWER
1u_6.3V_X5R_04 *OPEN_4mil
D02 㓡VS 㗪⸷C91ᶲẞ C82 [17,24,25,26,27,28] VDD5
Size Document Number Rev
*0.1u_10V_X7R_04 SUSB#_EN
SUSB#_EN [26]
[21,26]
[13,15,16,20,21]
5V
5VS Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 23 of 35

5 4 3 2 1

B - 24 System Power
 Schematic Diagrams

1.05VS / 1.8VAI
5 4 3 2 1

1.05VS/1.8VA
the *CV-40mil short is CV test ues.
PJ14
*CV-test
VDD3
1 2

PJ15 VDD5
VDD5 *OPEN-2mm
D 1A D
3.3VA 1 2
Default short

PC16 PC15
R352 PC117

47K_04
10u_6.3V_X5R_06 0.1u_10V_X7R_04
PU7
G9661-25ADJF11U
1u_6.3V_X5R_04
Note: Close to PIN4 1.8VA
3 4 V1.8 PJ34 1.8VA
VIN VCNTL *OPEN-2mm
1.8VA_PG
1A
1 6 1 2
[26] 1.8VA_PG POK VOUT
PJ16 Default short
*OPEN-1mm 5 PC120 PC119 PC118
1 2 1.8VA_EN_R 2 NC
[19] 1.8VA_EN EN

82p_50V_NPO_04

22u_6.3V_X5R_06

0.1u_10V_X7R_04
Default short PR120
PR22 PJ17 C55 8 7 Ra

B.Schematic Diagrams
100K_04 *CV-test 9 GND VFB 12.7K_1%_04
GND

*0.1u_10V_X7R_04
PR49 VDD3 1 2
180K_1%_04
VIN

1A PR121
Rb D02 ㍉岤天㯪㚜㎃0603
PC33 PC39 PC64 10K_1%_04
PU3
Sheet 24 of 31

1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08
25
23 VIN_PAD 3 Modify,7/20 Max
TON VIN 17
C VIN Vout=0.8V*(1+Ra/Rb) C

D02 CLOSE FOR SEQ

Default short
PJ41
VIN
VIN
VIN
18
19
20
21 PR50
枸䔁EVT 䡢娵
1.816V=0.8V*(1+12.7/10)
1.05VS / 1.8VA
*OPEN-1mm VIN
1.5_04
PJ33
*OPEN-3mm
[11,15,17,23] SUSB#
1 2
1.05_V5V BST
22

PC27
VNN_SVID 1 2 1.05VS
PJ40 V1.05
2 PL6 PJ31 1.05VS
*OPEN-1mm V5V 0.1u_10V_X7R_04 BCIHP0730-1R0M 4.5A *OPEN-3mm
[28] VR_EN 1 2
PC52 8 1 2
PR58 LX 9 Default short
PJ6 0_04 4.7u_6.3V_X5R_06 LX 10 PR110 PC98 PC107 PC102 PC106 PC96 PC113
*OPEN-1mm 1 LX 16 1K_04 0.1u_25V_X7R_06
AGND LX

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

0.1u_25V_X7R_06

*330uF_2.5V_12m_6.6*6.6*4.2
[19,26] 1.05VS_EN 1 2 26 +
LX_PAD
PR6 PJ5 G5383A_AGND
100K_04 *CV-test 6 D02 ㍉岤天㯪㚜㎃0603
1 2 5 PGND 11
VDD3 EN PGND 12
C5 PGND 13
PGND 14 PC99 PC100
*0.1u_16V_X7R_04 PGND 15
PGND 100p_50V_NPO_04 1000p_50V_X7R_04
PR13
3.3VS
47K_04
B PR9 B
4
[19] 1.05VS_PG PGOOD
0_04 PR38
Ra 5.62K_1%_04
24 1.05VS_FB
FB
7
Modify,8/7 Max NC PR51
Rb
33.2K_1%_04
G5383A
Vout=0.9V*(1+Ra/Rb)
1.052V=0.9V*(1+5.62/33.2)
G5383A_AGND

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
V1.05 [26]
[11,12,14,15,16,17,18,20,21,22,23,28] 3.3VS
[6,7,8,9,19,22,23,26] 3.3VA
[7,11,18,19,21,22,23,25,26,28,29] VDD3 Title
[17,23,25,26,27,28] VDD5 [24] 1.05VS/ 1.8VA
[7,9,26,28] 1.05VS
[15,23,25,26,27,28,29] VIN Size Document Number Rev
[9,27,28] VNN_SVID
[3,4,5,6,7,8,9,11,17,18,19,22,23] 1.8VA
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 24 of 35

5 4 3 2 1

1.05VS / 1.8VAI B - 25
 Schematic Diagrams

VDD3, VDD5
5 4 3 2 1

VDD3/VDD5 VREF_VDD

PR137 0_04
PC145

Modify,8/3 Max 1u_6.3V_X5R_04

D D
PR139 PR135 Modify,8/3 Max
PC143 EN_3V EN_5V
VIN
2.5A VIN
1000p_50V_X7R_04 100K_1%_04 100K_1%_04 PC141 Modify,8/2 Max
PC134 PC135 PC132 1000p_50V_X7R_04
PU8 4.5A

1
VREG3 PC130 PC128 PC129 PC155 PC154

4.7u_25V_X7R_08

4.7u_25V_X7R_08

0.1u_25V_X7R_06

EN2

TONSEL
VFB2

VFB1

EN1
VREF
+ +

*EEEFZ1E101P

*EEEFZ1E101P
0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08
7 24
Modify,7/21 Max VO2 VO1
PC142
8 23 PR132 *10K_04 SYS3V
VDD3 1u_6.3V_X5R_04 LDO3 POK
VDD5
B.Schematic Diagrams

Modify,8/3 Max PC139 PC137

9 22 PQ13
BOOT2 BOOT1

5
5
5
5

5
5
5
5
TPS51125ARGER QM3004M3
PQ16 0.1u_10V_X7R_04 0.1u_10V_X7R_04
VDD3 DEFAULT SYS3V 6-19-41001-73C QM3004M3 4 10 21 4 SYS5V DEFAULT VDD5
PL9 UGATE2 UGATE1 PL8
SHORT D02 CLOSE 㓡䁢TPS51125 FOR NOISE SHORT

3
2
1

1
2
3
PJ36 BCIHP0730-4R7M BCIHP0730-4R7M PJ37
2 1 6A 2 1 11
PHASE2 PHASE1
20 2 1 8A 2 1
D02, 㓡13.7K婧㔜暣⡻3.34V
Sheet 25 of 31
PC144

PC121
*OPEN-5mm FOR RT烒㺷暣 PC126 PQ14 PC124 *OPEN-5mm

5
5
5
5

5
5
5
5
12 19

PD11
QM3006M3 PR134

GND PAD
SKIPSEL

C
LGATE2 LGATE1

*1000p_50V_X7R_04

*1000p_50V_X7R_04
PD12
R1 PC123 R1

C
4

VCLK
LDO5
+ PR138 PC125 4 30.1K_1%_06

GND
VDD3, VDD5

EN0

VIN
0.1u_16V_X7R_04
1000p_50V_X7R_04 PC127

3
2
1
PQ15

1
2
3
C 13.7K_1%_06 + C

100p_50V_NPO_04
QM3006M3

SCAR250-1
6R3AVEA221M0645

CSOD140BSH
13

14

25
15

16

17

18

SCAR250-1
6R3AVEA221M0645
PC122

CSOD140BSH
A
PR131 PR133
R2 EN_ALL 0.1u_16V_X7R_04
PR123 R2 18.7K_1%_06
PR124 *680K_1%_04 PR122
20K_1%_04
D02 CLOSE 㓡ᶲPR126 FOR NOISE VDD5
FOR APL DEFAULT
*5.1_1%_06 PR128 *0_04 VDD5_LDO5 *5.1_1%_06
Vout VREF_VDD Vout
=2*(1+R1/R2) PR129 =2*(1+R1/R2)
PR126 0_04 VREG5 PR125 *0_06
=2*(1+13K/20K) VREG5
2.2_06
=2*(1+30.1K/18.7K)
=3.3V PR130 *0_04 =5.219V
PR127 *0_06

VIN1
PC136
PC133 1u_6.3V_X5R_04
VDD3 C A
VIN
4.7u_25V_X7R_08
PD13 Modify,7/21 Max

PC115 PC116 RB751V-40(lision)

22u_6.3V_X5R_06

22u_6.3V_X5R_06

D02 ㍉岤天㯪㚜㎃0603
B B

Qpxfs!po!WEE40WEE6!QXN
R37 *0_04 EN_3V
VREG5

EN_3V5V
R41 0_04 EN_5V

R46

6
10K_04 D
Q4A
DD_ON_EN_VDD MTDK3S6R
2G
S Modify,7/21 Max

1
3
D
Q4B For CV test
MTDK3S6R

1
5G R43
[17,19,23] USB_CHARGE_EN S PJ13
4

*CV-40mil 100K_04

D
JUMP-1MM

2
9/21
Q3
G UK3018
[19,23] VA_ON S

A A

[7,11,18,19,21,22,23,24,26,28,29] VDD3
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[17,23,24,26,27,28] VDD5 Title
[15,23,24,26,27,28,29] VIN [25] VDD3,VDD5
[23] VIN1
Size Document Number Rev
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 25 of 35

5 4 3 2 1

B - 26 VDD3, VDD5
 Schematic Diagrams

VTT_MEM / 1.35V
1 2 3 4 5 6 7 8

PD9

VDD5 A C

SS1040W G PQ17
2A
VTT_MEM(0.6VS) QM3004M3
VIN

5
5
5
5
PC140 PC138 PC131
PU1 G5616BRZ1U

0.1u_25V_X7R_06

4.7u_25V_X5R_08

4.7u_25V_X5R_08
4
PC19 V1.24

1.24VA

1
2
3
10u_6.3V_X5R_06 PC20 0.1u_10V_X7R_04 Modify,8/3 Max
19 18
VTT_MEM PJ19 VTT VLDOIN VBST
A *OPEN-2mm
2 1
2A
20 17
PR29
V1.24
10A A

VTT DRVH DEFAULT SHORT

Default short PL10
2.2_1%_06
PC17 PC18 BCIHP0730-1R0M PJ38
1 16 1 2 1 2
VTTGND LL 1.24VA
22u_6.3V_X5R_06

*22u_6.3V_X5R_06

PR27 PCB Footprint = BCIHP0735A

*20mil_short_04 *8mm
D02 ㍉岤天㯪㚜㎃0603 2 15 PC146 D02 DEL PR141
VTTSNS DRVL PQ18
+

C
5
5
5
5

PD14 CSOD140BSH
QM3006M3 PC147
3 14 2200p_50V_X7R_04 2R5AVEA331M0645
PR31 GND PGND Modify,8/3 Max 4
560K_1%_04 PR140

1
2
3
VTT_TON 9 13 PR32 10K_1%_06 VDD5 330uF_2.5V_6.3*4.3
VIN

A
PC21 TON CS 2R5AVEA331M0645
0.1u_10V_X7R_04 12
VTT_REF 4 PVCC5 11 2.2_1%_06
VTTREF VCC5

B.Schematic Diagrams
Modify,7/20 Max PC24 PC23 PR33 2.2_04

1u_6.3V_X5R_04

1u_6.3V_X5R_04
10
PGOOD 3.3VA

5 8
PR30 VDDQSNS S5 PR136
10K_1%_06 R172 *15mil_short
6
VDDQSET S3
7

Modify,7/21 Max
10K_04
Sheet 26 of 31
GND

R175 *10mil_short

VTT_MEM / 1.35V
B 1.24VA_PG [19] DEL JUMP,7/20 Max
B
21

VDDQ_SNS

D02, BUG1 ,婧㔜䁢12.6V

VDDQSET
PR28 6.8K_1%_04
[24] 1.8VA_PG
PC22 *100p_50V_NPO_04
R155 10K_04
[23] SUSB#_EN 5V LEVEL C141
*0.22u_10V_X5R_04
C140
D02 ᶵἧ䓐㓡ᶵᶲẞ
*0.1u_10V_X7R_04
2nd source G5016
1.24VA 6A EM5209
PCBfootprint:
TDFN14-2X3MM-A V1.05
C256

Modify,7/27 Max
0.1u_16V_Y5V_04
6
U21 EM5209

1
C274

*0.1u_16V_Y5V_04
1.05VS
VDDQ(1.2V) 7 IN2
IN2
IN1
IN1
2 +1.05V_G5016 PJ29
*OPEN-3mm
1.2V 6A 8
9 OUT2 OUT1
13
14
4.5A 1 2 1.05VS
C C
OUT2 OUT1 C273
10 12
2.5V_LDO CT2 CT1 *0.1u_16V_Y5V_04

VBIAS

GND

GND
EN2

EN1
PJ25 C255 C258
VDD3 PR100 100K_04 1 2 220p_50V_NPO_04 *220p_50V_NPO_04

11

15

3
3.3V *OPEN_4mil
2A PJ26
5V VDDQ_EN R332
1 2 10K_04 VDD3 R334 *10K_04 1.05VS_EN [19,24]
[23,26] SUSC#
PC151 PC152 PR34 PC153 *OPEN_4mil PC105 C263 C266
10u_6.3V_X5R_06 0.1u_10V_X7R_04 PU9 1u_6.3V_X5R_04 *0.1u_10V_X5R_04 1u_6.3V_X5R_04
47K_04 G9661-25ADJF11U 天䦣月役PIN6儛 DEFAULT PJ27 *0.1u_10V_X7R_04
3 4 V2.5_LDO 2.5V 2.5V_PG 1 2
VIN VCNTL SHORT
2.5V_PG 1 6
2A 2A 1 2 *OPEN_4mil
POK VOUT PC149
5
PJ39 *2mm Default Short
NC
22u_6.3V_X5R_06

1 2 2 PR143 PC148
[23,26] SUSC# EN
Ra PC150
PJ22 *1mm
8 7 21.5K_1%_04
82p_50V_NPO_04

9 GND VFB *10u_6.3V_X5R_06

DEFAULT SHORT GND
R469 *10K_04

D02 ADD FOR APL BUG 枸䔁 PC25 PR142

D [24] V1.05 D
PR35 PJ23 Rb D02 ㍉岤天㯪㚜㎃0603 [7,9,24,28] 1.05VS
VDD3 1 2 *0.1u_10V_X7R_04 10K_1%_04
[9,12] 1.2V
*CV-40mil
[6,7,8,9,19,22,23,24] 3.3VA
100K_04 For CV test
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[7,11,18,19,21,22,23,24,25,28,29] VDD3
Modify,7/20 Max [9,24,27,28] VNN_SVID
Vout = 0.8V ( 1 + Ra / Rb ) [17,23,24,25,27,28] VDD5
[9] 1.24VA Title
[2,11,15,17,18,19,23] 3.3V [26] VTT_MEM/1.35V
[12] VTT_MEM
[12] 2.5V Size Document Number Rev
[21,23] 5V
[15,23,24,25,27,28,29] VIN
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 26 of 35

1 2 3 4 5 6 7 8

VTT_MEM / 1.35V B - 27
 Schematic Diagrams

VCGI & VNN

5 4 3 2 1

VIN
2.5A D02 ᶲẞ11/9
PC66 PC41 PC40 PC65 PC114 PC57 PC112

нs'/ͺ^s/

0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08

1000p_50V_X7R_04

EEEFZ1E101P

*EEEFZ1E101P

EEEFZ1E101P
+ + +
hi side RDSON=6.8mR
lowi side RDSON=2.8mR
PW M1_2ph_BST_R
Modify,7/10 Max
PC90 PQ3
MDU1516
25A
PR114 PU6 0.22u_16V_X7R_06 ULTRASO-8

D
D 2.2_06 NCP81151MNTBG Modify,8/2 Max D

PW M1_2ph_BST 1 8 PW M1_2ph_HG PR96 1_06 PW M1_2ph_HG_R G

BST HG

S
2
[28] PW M1_2ph PWM SW 7
DRVON 3 GND 6 VCGI_R VCGI_SVID
EN PL7 PJ32
PR115 2.2_06 PW M1_2ph_VCC 4 5 PW M1_2ph_LG BCIH0735-R22N *OPEN-10mm
VDD5 VCC LG PW M1_2ph_Phase 1 2
PAD
PC87 DCR=1.35m
Modify,7/20 Max

PR83
*2.2_1%_06
D02 ㍉岤天㯪㚜㎃0603
B.Schematic Diagrams

2.2u_6.3V_X5R_04 PQ4 PC88

MDU1531 PC103 PC108 PC95 PC109 PC110 PC111

PR99 *20mil short-p

PR98 *20mil short-p
D

2R5AVEA331M0645
ULTRASO-8 +

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06
PR94 0_06 PW M1_2ph_LG-R G

S
BOTTOM PAD PC73
CONNECT TO
GND Through *2200p_50V_X7R_04

Sheet 27 of 31 4 VIAs

VCGI & VNN

C C

[28] CSP_CORE1

[28] CSN_CORE1

VIN
1A
PC55 PC77 PC76 PC56
нsEEͺ^s/

0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08

1000p_50V_X7R_04
PW M_1b_BST_R 4A
PC59
Modify,8/2 Max
PR61 PU2 0.22u_16V_X7R_06 PQ8

5
5
5
5
2.2_06 NCP81253MNTBG QM3004M3
PL5 VNN_R VNN_SVID
PW M_1b_BST 1 8 PW M_1b_HG PR12 1_06 PW M_1b_HG_R 4 PJ30
BST HG BCIHP0730-R47M *OPEN-5mm

1
2
3
B PW M_1b_Phase 1 2 2 1 B
2
[28] PW M_1b PWM SW 7

5
5
5
5
3 GND 6
PQ6 DCR=4.2m D02 ㍉岤天㯪㚜㎃0603
[28] DRVON EN

PR65
QM3006M3

*2.2_1%_06
PR57 2.2_06 PW M_1b_VCC 4 5 PW M_1b_LG PR72 0_06 PW M_1b_LG_R 4 PC93
VDD5

C
VCC LG
PD7 PC101 PC92 PC94 PC104

1
2
3

*2R5AVEA331M0645
PAD
+

PR80 *20mil short-p

PR95 *20mil short-p

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06

22u_6.3V_X5R_06
PC36

CSOD140BSH
Modify,7/20 Max
2.2u_6.3V_X5R_04

A
PC53

*2200p_50V_X7R_04

BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
[28] CSP_SA

[28] CSN_SA

A A

[9,24,28] VNN_SVID
[17,23,24,25,26,28] VDD5 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[9,28] VCGI_SVID [27] VCGI & VNN
[15,23,24,25,26,28,29] VIN Size Document Number Rev
[2,11,15,17,18,19,23,26]
[21,23,26]
3.3V
5V
A3 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 27 of 35

5 4 3 2 1

B - 28 VCGI & VNN

 Schematic Diagrams

VCore
5 4 3 2 1

1.05VS VCCGI ICCMAX=25A / LL=6m / OCP=37A

VNN ICCMAX=4A / OCP=12A

PR111

PR112
Modify,7/27 Max PC91

0.1u_16V_X7R_04

240_1%_04

160_1%_04
PU5 VR_EN [24]
NCP81218

2 1 PR113 10K_04
PR39 1K_1%_04 81218_VRMP 12 34 81218_CSLK PR106 95.3_1%_04 VDD3
VIN VRMP SCLK H_CPU_SVIDCLK [7] PJ24 *CV-40mil
D PC45 0.01u_50V_X7R_04 33 81218_ALERT PR105 0_04 1 2 D
ALERT# H_CPU_SVIDALRT# [7] PM_PWROK [7,19]
46 32 81218_SDIO PR104 20_1%_04 PJ28 *OPEN_4mil
[29] AU1_PSYS Adapter 40W (1uA/1W) PSYS SDIO H_CPU_SVIDDAT [7]
PR5 49.9K_1%_04 37 81218_EN PR108 0_04
close to PQ9 2 1 100k_1%_04_NTC 81218_TSENSE_2PH_R 81218_TSENSE_2PH
EN
Modify,7/20 Max
RT1 PR40 0_04 11 PC86 *0.1u_16V_X7R_04
TSENSE_2ph
PR36 13K_1%_04 13 81218_VCC PR64 2.2_06
VCC VDD5
PC48 0.1u_16V_X7R_04 PC62 1u_16V_X7R_06 Need 5V_ALW for S5 exist
Modify,7/20 Max
PR46 30.1K_1%_04 81218_IOUT_2PH 1 38 81218_VR_RDY PR97 0_04 PR107 47K_1%_04
IOUT_2ph VR_RDY 3.3VS
PC50 470p_50V_X7R_04 PR103 *1K_1%_04 1.05VS VR_PWRGD [19]
Del,8/2 Max 31 81218_VR_HOT PR102 *100_1%_04
close to CPU side VR_HOT# H_PROCHOT# [7]
PR24 100_04 PJ3 1 2 *1mm 35 DRVON [27]
VCGI_SVID VCGI_R DRVON
PJ4 1 2 *1mm VCGI_SENSE_P_J 47 22
[9] VCGI_SENSE_P VSP_2ph PWM_1a
36 PWM_1b [27]
PWM_1b
Del net name,7/20 Max 16
PC32

B.Schematic Diagrams
PWM1_2ph PWM1_2ph [27]
1000p_50V_X7R_04 PR42 1K_1%_04
17
[9] VCGI_SENSE_N PJ2 1 2 *1mm VCGI_SENSE_N_J PC31 2200p_50V_X7R_04 81218_VSN_2PH 48
VSN_2ph
PWM2_2ph close to PL6
PR23 100_04 PJ1 1 2 *1mm VCORE PORTION 5 81218_ILIM_2ph PR7 22.6K_1%_04 RT2 2 1 100k_1%_04_NTC
ILIM_2ph
6 81218_CSCOMP_2ph PR2 49.9K_1%_04 PR1 200K_1%_04 PR8 53.6K_1%_06
close to CPU side Del,8/2 Max CSCOMP_2ph CSP_CORE1 [27,28]

PR53 1K_1%_04 81218_DIFFOUT_2PH 2

DIFFOUT_2ph PC2 PC1

Sheet 28 of 31
PC30 560p_50V_X7R_04 81218_DIFFOUT_2PH_R PR45 49.9_1%_04 680p_50V_X7R_04 100p_50V_NPO_04
81218_FB_2PH 3 7 81218_CSSUM_2ph
FB_2ph CSSUM_2ph
C PR41 4.75K_1%_04 81218_COMP_2ph_C PC43 2200p_50V_X7R_04 C
9

VCore
PR3 1K_1%_04 VDD5
PC44 15p_50V_NPO_04 81218_COMP_2PH 4 CSP2_2ph
Modify,7/20 Max
COMP_2ph

PR91 39.2K_1%_04 81218_ICCMAX_2PH 18

ICCMAX_2ph
8 81218_CSREF_2ph
CSREF_2ph

PC34 0.01u_50V_X7R_04 PC46 0.022u_25V_X7R_04 PR44 10_1%_04

23
Close to IC CSN_CORE1 [27]
TSENSE_1ph
10 81218_CSP1_2ph PR43 7.5K_1%_04
CSP1_2ph CSP_CORE1 [27,28]

30
IOUT_1a

24 27
VSP_1a ILIM_1a

VCCGT PORTION

29 PR101 1K_1%_04
CSP_1a VDD5
25 Modify,7/20 Max
VSN_1a

26
COMP_1a

B B
28
19 CSN_1a
ICCMAX_1a

D02 㓡ᶲ130K 11/9

PR16 130K_1%_04 81218_IOUT_1b 39

IOUT_1b
Remove if LL PC11 220p_50V_NPO_04
close to CPU side disabled Del,8/2 Max
PR26 100_04 PJ7 1 2 *1mm
VNN_SVID VNN_R
1 2 *1mm VNNCC_SENSE_J PR62 0_04 81218_VSP_1b 45
[9] VNNCC_SENSE VSP_1b
PR63 0_04 PC47 1000p_50V_X7R_04
PJ8 VCCSA PORTION
PC67
PJ9 1000p_50V_X7R_04 PC68 1000p_50V_X7R_04 42 81218_ILIM_1b PR15 28K_1%_04
ILIM_1b
1 2 *1mm VNNSS_SENSE_J PR70 499_1%_04 81218_VSN_1b 44 PC8 1000p_50V_X7R_04
[9] VNNSS_SENSE VSN_1b
PR25 100_04 PJ10 1 2 *1mm

close to CPU side Del,8/2 Max D02 EOL 㓡ㆸ16Vˢ䓐㕁

CSP_1b
40 81218_CSP_1b PR73 7.5K_1%_06 CSP_SA [27]
PC7 15p_50V_NPO_04 81218_COMP_1b 43
COMP_1b
PR10 1.5K_1%_04 PC6 0.015u_16V_X7R_04 PR82 14K_1%_04 RT3 2 1 100k_1%_04_NTC

PR92 12.7K_1%_04 81218_ICCMAX_1b 20

ICCMAX_1b
close to PL5
PC79 PC80
1000p_50V_X7R_04
PR75 33.2K_1%_04 81218_ROSC_COREGT 14 0.015u_10V_X7R_04
VCGI Switching Frequency=450Khz ROSC_COREGT 81218_CSN_1b
41 PR81 10_1%_04 CSN_SA [27]
CSN_1b
VNN Switching Frequency=600Khz 81218_ROSC_SAUS
PR78 24K_1%_04 15
ROSC_SAUS PC72 2200p_50V_X7R_04

PR14 35.7K_1%_04 PJ11 1 2 *1mm 81218_ADDR_VBOOT 21

ADDR_VBOOT
A A

PR17 51K_1%_04 PJ12 1 2 *1mm 49

TAB

Modify,8/2 Max
35.7K
Boot Core 0V VNN 1.05V
51.1K PR11 0_06

Boot Core 1.05V VNN 1.05V

[9,24,27] VNN_SVID
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[7,9,24,26] 1.05VS Title
[11,12,14,15,16,17,18,20,21,22,23,24] 3.3VS [28] VCORE NCP81218
[15,23,24,25,26,27,29] VIN
[9,27] VCGI_SVID Size Document Number Rev
[17,23,24,25,26,27]
[7,11,18,19,21,22,23,24,25,26,29]
VDD5
VDD3
A2 SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 28 of 35

5 4 3 2 1

VCore B - 29
 Schematic Diagrams

AC-In, Charger
5 4 3 2 1

SMART CHARGER
VIN
EMI RSVD,8/2 Max

D EC3 EC10 EC13 EC7 EC11 EC8 EC4 EC6 EC12 EC1 EC5 D

*0.01u_25V_X7R_04

*0.01u_25V_X7R_04

*0.01u_25V_X7R_04

*0.01u_25V_X7R_04

*0.01u_25V_X7R_04

*0.01u_25V_X7R_04
*0.1u_25V_X7R_06

*0.1u_25V_X7R_06

*0.1u_25V_X7R_06

*0.1u_25V_X7R_06

*0.1u_25V_X7R_06
A

A
PD6 PD5
MDL914S2 MDL914S2
VDD3

C
VIN
VA1

PR93
287K_1%_04
PR86
PQ9 PQ11
C389 ->PC398,7/13 Max QM3004M3 QM3004M3 ILIM
VA 5 5
PL4 5 3 3 5 PRS2 75K_1%_04
19V HCB2012KF-800T80 5 2 2 5 0.01_1%_32
2.5A 5 1 1 5

C
PC63 PC74 PC60 PD10 PC13 PC85 PC89 PC12 PC37 PC5 PC84 PC81 PC82 PC83

1000p_50V_X7R_04
PR52 PC49

0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08

4.7u_25V_X7R_08

4.7u_25V_X7R_08
PR116 PR117
B.Schematic Diagrams

1000p_50V_X7R_04

1500p_50V_04
PR18 10_1%_06 1u_25V_X7R_06

0.047u_25V_X7R_06
*20mil_04 *20mil_04

0.1u_25V_X7R_06

0.1u_25V_X7R_06

10u_25V_X5R_08

0.1u_25V_X7R_06
PR54

*MESMAJ20A-G

5
5
5
5
A
2.2_06 4.7_04 PR89
PC28 PC29 4.02K_1%_04 PQ7
PC42 4
BATDRV QM3006M3
PC14 0.1u_25V_X7R_06

0.1u_25V_X7R_06
0.1u_25V_X7R_06

1
2
3
PC71

2.2u_25V_X5R_08
2.2u_16V_X5R_06 PC69
REGN PQ5
C QM3004M3 0.01u_25V_X7R_04 C

5
5
5
5
PR55 PR56 BTST PR76 0_06 EMI Modify,7/31 Max
JBATTA1
4.02K_1%_04 4.02K_1%_04 PL3

29

28
27
26
25
24
23
22
Sheet 29 of 31 HIDRV 4 C144DF- 105A8-L
PU4 PR71 0_06 BCIHP0730-4R7M
2 1 4.5A V_BAT

GND_2

PHASE
HIDRV

LODRV
GND_1
VCC

BTST
REGN

5 1
5 2
5 3
PC54 PQ2 5

5
SMC_BAT

EC2
0.047u_25V_X7R_06 QM3006M3 PRS1 PL2 HCB1005KF-121T20
[19] SMC_BAT SMD_BAT 4

PC3
PR4
1 21

PC70

PC75

PC61
PR48 ACN Phase 0.01_1%_32 PL1 HCB1005KF-121T20
ACN ILIM [19] SMD_BAT 3

AC-In, Charger
ACP 2 20 LODRV 4 BAT_DET
ACP SRP [19] BAT_DET 2

PR66

PR67

*0.1u_25V_X7R_06
470K_04 CMSRC 3 BQ24780SRUYR 19
Modify,8/3 Max

1
2
3
ACDRV 4 CMSRC SRN 18 1
5 ACDRV BATDRV 17 SRP 10_04 PR85

10u_25V_X5R_08

10u_25V_X5R_08

*10u_25V_X5R_08

*10u_25V_X5R_08
ACDET 6 ACOK BATSRC 16 SRN 6-21-D34M0-105

*20K_04
PROCHOT#

*20mil_04

*20mil_04
IOUT 7 ACDET TB_STAT# 15 10_04 PR84 9/6 EMI

CMPOUT

C
IADP BATPRES#

C2

C1

C3
IDCHG

CMPIN
PMON
PC35 10_04 PR88 PC78 PD4 PD3 PD2 PD1

SDA
SCL
PR47 0.1u_25V_X7R_06

SS1040WG

SS1040WG
0.1u_25V_X7R_06

*MMSZ5232BS

*MMSZ5232BS
TB_STAT

30p_50V_NPO_04

30p_50V_NPO_04

30p_50V_NPO_04
75K_1%_04 IDCHG PC10 PC9

8
9
10
11
12
13
14

A
PC4

0.1u_25V_X7R_06

0.1u_25V_X7R_06
100p_50V_NPO_04 PR90 PR87
10K_1%_04 *10K_1%_04 PR37
2.2_06

100p_50V_NPO_04
PC26
PC58 PR69 VDD3
[28] AU1_PSYS PR68 *0_04 10K_1%_04 4700p_50V_X7R_04
PR74
10K_1%_04

B B
VDD3

SMD_BAT PR77 0_04

SMC_BAT PR79 0_04

PR59 0_04
TOTAL_CUR [19]

VDD3 PC51
PR60 PC38

100p_50V_NPO_04
*24K_1%_04 *1u_25V_X5R_06

PR19

47K_04 Option close to EC

AC_IN# [19] PQ10 PR118

C

PD8 MTE1K0P15KN3 300K_1%_04

C A V_BAT S D
PR21 10K_04 B BAT_VOLT [19]
VA
PQ1
ZD5245BS2 2N3904
E

A A

G
PR20 PR109
10K_04 100K_04 PR119 PC97
60.4K_1%_04 0.1u_16V_X7R_04

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

D
PQ12
G
VDD3 [21] 19V Title
2SK3018S3
[29] ACIN,CHARGER(Smart Charge)

S
[23] VA
[15,23,24,25,26,27,28] VIN
[7,11,18,19,21,22,23,24,25,26,28] VDD3 Size Document Number Rev
Custom SCHEMATIC1 6-71-W51G0-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 29 of 35

5 4 3 2 1

B - 30 AC-In, Charger
 Schematic Diagrams

I/O Board
5 4 3 2 1

CONN TO M/B USB2.0 Port0

A_RTC_VBAT A_VDD3 A3.3VS A5V A_19V

AJ1 A_J_BTB1 AUSB_VCC0

2 1 AUSB_PP0 AU2
D 1 2 100 mil D
3 1 2 4 AUSB_PN0 5 1
*OPEN_4mil AJP_5V 3 4 A5V VIN VOUT
5 6 AUSB_PP1
7 5 6 8 AUSB_PN1 2 + AC17
7 8 AC9 GND AC6 AC4 AC5
9 10
9 10 A_PCIE_WAKE0# [31] A_DD_ON# 0.1u_16V_Y5V_04 22u_6.3V_X5R_06 22u_6.3V_X5R_06
11 12 10u_6.3V_X5R_06 4 3 *220u_6.3V_6.3*6.3*4.2
13 11 12 14 A_PCIE_RXP0_GLAN [31] EN# OC#
13 14 A_PCIE_RXN0_GLAN [31]
15 16
15 16 A_PCIE_TXN0_GLAN [31] SY6288D20AAC A_GND
17 18 A_GND D02 ㍉岤天㯪㚜㎃0603
17 18 A_PCIE_TXP0_GLAN [31] A_GND
A_GND 19 20 SY6288D20AAC: 6-02-62882-9C0 A_GND
21 19 20 22 A_CLK_PCIE_GLAN [31] uP7549UMA5-20: 6-02-75495-9C0
A_GND 21 22 A_CLK_PCIE_GLAN# [31] AUSB_VCC0
23 24 A_GND
[31] A_LAN_CLKREQ# 25 23 24 26 ASPKOUTR+
[31] A_BUF_PLT_RST# 25 26 60 mil
27 28 A_GND
[31] A_LAN_WAKEUP# A_DD_ON# 27 28
29 30 ASPKOUTR-

B.Schematic Diagrams
29 30 AC7

TPF0-31030-00R1A
6-21-C4740-215
0.1u_16V_Y5V_04 Port 0
A_GND AJ_USB1
1
AD1 V+
AL1

SPEAK R
AUSB_PN0

AUSB_PP0
1

4
2

3
AUSB_PN0_R

AUSB_PP0_R
6
7
8
5
4
3
AUSB_PN0_RJ
AUSB_PP0_RJ
2

3
DATA_L Sheet 30 of 31
9 2 DATA_H
*WCM2012F2S-161T03-short
I/O Board

GND1

GND2
C
10 1 4 C
GND
A_GND A_GND
A_GND C107AU-10405-L
DT1140-04LP-7

GND1

GND2
AR1 6-21-B4A10-104
ASPKOUTR-
*15mil_short_06
AJ_SPKR1
AC3
*1000p_50V_X7R_04 ASPKOUTR-_R A_GND
AR2 ASPKOUTR+_R 1
ASPKOUTR+
*15mil_short_06
AC1 AC2
2
50271-0020N-001
6-20-43130-102
USB2.0 Port1
*180p_50V_NPO_04 *180p_50V_NPO_04
AUSB_VCC1
J_SPK1 AU1
100 mil
2 1 A5V 5 1
VIN VOUT
Close to AJ_AUDIO1 A_GND AC8
GND
2
AC10 AC14 AC13
+ AC12
10u_6.3V_X5R_06 A_DD_ON# 0.1u_16V_Y5V_04 22u_6.3V_X5R_06 22u_6.3V_X5R_06
4 3 *220u_6.3V_6.3*6.3*4.2
EN# OC#

SY6288D20AAC
A_GND D02 ㍉岤天㯪㚜㎃0603
A_GND A_GND A_GND

B B
AUSB_VCC1

RTC Battery AC IN CONN 60 mil

AC11
A_19V

AJ_BTB1
0.1u_16V_Y5V_04
Port 1
AJ_USB2
5 6 A_GND 1
AD2 V+
3 4 AL3
A_RTC_VBAT AC40 AC41 1 2 AUSB_PP1 1 2 AUSB_PP1_R 6 5 AUSB_PN1_RJ 2
7 4 AUSB_PP1_RJ DATA_L
PH215C-006G10P AUSB_PN1 AUSB_PN1_R
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 4 3 8 3 3
1

6-21-C2710-203 9 2 DATA_H
A_J_RTC1 *WCM2012F2S-161T03-short

GND1

GND2
+

10 1 4
53011-00201-001 GND
A_GND A_GND
6-86-2B002-005
A_GND C107AU-10405-L
6-86-2B002-006 DT1140-04LP-7

GND1

GND2
6-21-B4A10-104
-

A_GND
2

A A_GND PCBA CHECK A_GND

A

1AAR *0_04 4AAR *0_04

DMFWP!DP/!!ᙔϺႝတ
[31] A_VDD3 Title
2AAR *0_04 5AAR *0_04
[31] A3.3VS [30] IO BOARD-USB2.0/SPEAK
Size Document Number Rev
3AAR *0_04 6AAR *0_04 Custom 6-71-W51G1-D02 3.0
Date: Tuesday, January 30, 2018 Sheet 30 of 35
5 4 3 2 1

I/O Board B - 31
 Schematic Diagrams

RTL8411
5 4 3 SD_CMD/MS_D2 AR24 2
0_04 SD_CMD/MS_D2_R 1
暞ẞ㔠:49pcs
SD_D0/MS_D1 AR26 0_04 SD_D0/MS_D1_R

LAN (RTL8411B) ἧ䓐INTEL PLATFORMᶼSUPPORT RTC WAKE ON

LAN(S5)⎗䚩䔍Dedeo D33炻Ữ暨㲐シ㗗⏎㚱㺷暣⓷柴ˤ
SD_D1

SD_D2/MS_CLK
AR27 0_04 SD_D1_R

SD_D2/MS_CLK_R
AR30 0_04

Switching Regulator close to PIN48 SD_CLK/MS_D0 AR25 0_04 SD_CLK/MS_D0_R

Crystal 㓡䓐HSX321S(3.2X2.5X0.65) RSET AR12 2.49K_1%_04 A_GND
meet realtek Freq tolerance 50ppm AR11 *1K_04
SD_D3/MS_D3 AR29 0_04 SD_D3/MS_D3_R
A_GND VDD10 D02 FOR ℙ䓐㕘⡆枸䔁
XTAL2
AR14 10K_04 AVDD33
⼭EMI䡢娵⬴,㓡SHORT 崘ℏⰌ.
AR10 1M_04 XTAL1 (>20mil) Ra (>20mil) AC39 AC42

AVDD33
VDD10
6-06-75140-065 FOR S5 WAKE UP ON LAN REGOUT AR13 *28mil short-p *5p_50V_NPO_04 *5p_50V_NPO_04
D TO SB PCH WAKE#. D

AT1
C A
1 2 A_GND
AD3 RB751S-40C2
A_PCIE_WAKE0# [30]
LDO Mode㗪: La,Ca,Cb ᶵᶲẞ,Raᶲẞ
A_GND 4 3 TO EC PIN123 LAN_WAKEUP# 慷䓊䡢娵⼴暣旣,㓡SHORT暞ẞ

MS_INS#

LED_CR
SD_CD#
A_LAN_WAKEUP# [30]

XTAL2
XTAL1
AX1 FSX3L 25MHZ A_GND A_GND

EECS
AC24 PCBfootprint: AC22 LED1/GPO AT3
HSX321G LED2 AT2
12p_50V_NPO_04 12p_50V_NPO_04

㺷暣

48
47
46
45
44
43
42
41
40
39
38
37
A_GND A_GND AU3 BIOS pulls high or low to GPO pin,
Pkease refer to LAN/PHY Disable AVDD33 VDD10

RSET
HV_GIGA

LANWAKEB
LV_CEN

LED_CR
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0

LED1/GPO
LED2
49 Application Note.
E_PAD
AR17 1K_04 A3.3VS D02 㓡ᶲẞ
A3.3VS
A_GND AR7 AR9
AR16 *100K_04 *22_04

LAN_MDIP0
15K_04 AR21 LAN_CLKREQ# ⛐PCH䪗,
1 36 REGOUT REGOUT 劍⶚Pull hi,AR16
B.Schematic Diagrams

LAN_MDIN0 2 MDIP0 REG_OUT 35 Remind that R109 using the

3 MDIN0 VDDREG 34 ENSWREG
D3V3 main power (S0 power). 10K_04 ⌛⎗ᶵᶲẞ.
VDD10 AVDD10 ENSWREG

6
LAN_MDIP1 4 33 D
LAN_MDIN1 5 MDIP1 VDD1 32
VDD10
A_GND
婳ἧ䓐VS暣 AQ1A
MDIN1 VD33 AVDD33
LAN_MDIP2 6 31 ISOLATEB 2G *MTDK3S6R
LAN_MDIN2 7 MDIP2 ISOLATEBPIN 30 PERSTB AR19 *0402_short S
RTL8411B A_BUF_PLT_RST# [30]

1
8 MDIN2 PERSTBPIN 29 CLKREQB AR20 0_04
VDD10 AVDD10 CLKREQBPIN A_LAN_CLKREQ# [30]

3
LAN_MDIP3 9 28 MS_BS/SD_WP# D
LAN_MDIN3 10 MDIP3 QFN48 MS_BS/SD_WP# 27 VDD33/18
LAN_CLKREQ#⤪ᶵἧ䓐⎗㕟攳,㕤PCH䪗䚜㍍PULL DOWN AQ1B
11 MDIN3 DV33_18 26 RTL8411B_HSON AC35 0.1u_10V_X7R_04 5G *MTDK3S6R
AVDD33 HV_GIGA HSON A_PCIE_RXN0_GLAN [30] A3.3VS

Sheet 31 of 31 12 25 RTL8411B_HSOP AC34 0.1u_10V_X7R_04 S

A3.3VS A_PCIE_RXP0_GLAN [30]

4
VDD3 HSOP
C AC34 & AC35 capacitors must be close to pin side. C

SD_CMD/MS_D2

SD_D2/MS_CLK
SD_CLK/MS_D0
AC36

SD_D0/MS_D1

SD_D3/MS_D3
RTL8411

REFCLK_N
CARD_3V3

REFCLK_P
0.1u_16V_Y5V_04
A_GND A_GND

VDDTX
SD_D1

HSIN
HSIP
VCC_CARD
A_GND
D02 CLOSE 㓡10U FOR CARD READ SPEC PULL HIGH: SWR Mode
RTL8411B ENSWREG AR15 0_04
6-03-08411-032

13
14
SD_D0/MS_D1 15
SD_CLK/MS_D0 16
SD_CMD/MS_D2 17
SD_D3/MS_D3 18
SD_D2/MS_CLK 19
20
21
22
23
24
AC18 AC21
PULL LOW: LDO Mode SD/MMC/MS/MS PRO---Card Reader
CARD_3V3 A_CLK_PCIE_GLAN#
A_CLK_PCIE_GLAN
[30]
[30]
0.1u_16V_Y5V_04 10u_6.3V_X5R_06 慷䓊䡢娵LDO MODE OK⼴, (MDR019-C0-1042) REVERSE
㓡SHORT暞ẞ

EVDD10
SD_D1
A_GND AJ_CARD1
A_PCIE_TXN0_GLAN [30] SD_CD# P1
A_PCIE_TXP0_GLAN [30] SD_D2/MS_CLK_R CD_SD
A_GND P2
SD_D3/MS_D3_R P3 DAT2_SD
Near Cardreader CONN SD_CMD/MS_D2_R CD/DAT3_SD
P4
P5 CMD_SD
VDD10 VDD10 VDD10 VDD10 CARD_3V3 P6 VSS_SD
VCC_CARD SD_CLK/MS_D0_R VDD_SD
P7
V3.6 ⼭DVT EMI䡢娵⼴ P8 CLK_SD
AC19 SD_D0/MS_D1_R VSS_SD
AC26 AC29 AC27 AC23 AC32 P9
㰢⭂㗗⏎䚜㍍䞕嶗 0.1u_16V_Y5V_04 SD_D1_R P10 DAT0_SD
DAT1_SD
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 MS_BS/SD_WP# P11
CARD_3V3 AR8 0.2R_5%_06 P12 WP_SD
VCC_CARD A_GND VSS_MS
P13
VCC_CARD VCC_MS
A_GND A_GND A_GND A_GND A_GND 䔞斄攱host暣㸸/ CARD ㉼㍺㗪,VCC_CARD SD_D2/MS_CLK_R
SD_D3/MS_D3_R
P14
SCLK_MS
P15
VDD33/18 VDD33/18 暣⡻ㅱỶ㕤0.5ặ䈡,㚨⮹暨天1ms㛇攻 AC20 MS_INS# P16 DAT3_MS
0.1u_16V_Y5V_04 SD_CMD/MS_D2_R INS_MS
P17
B AC31 AC33
SD_CLK/MS_D0_R
SD_D0/MS_D1_R
P18
P19
DAT2_MS
SDIO/DAT0_MS B
MS_BS/SD_WP# P20 DAT1_MS P22
A_GND BS_MS GND
*4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04 P21 P23
VSS_MS GND
⼭EMI CHECK⼴㰢⭂㗗⏎㓡䁢SHORT
A_GND A_GND
EVDD10
GIGA LAN 1 AL7 2
A_GND
31ER-N01(01R)
6-21-G4050-123 A_GND

AR28 0_06 AL2 4 3 AJ_RJ_1 AH1 AH3 AH5

VDD10 LAN_MDIP0 11 14 LMX1+ LMX1+ *WCM2012F2S-161T03-short DLMX1+ 1 GND1 2 2 9 2 9
AC37 AC38 LAN_MDIN0 12 TD4+ MX4+ 13 LMX1- LMX1- 1 AL6 2 DLMX1- 2 DA+ shield GND2 3 3 8 3 8
LAN_MDIP1 8 TD4- MX4- 17 LMX2+ LMX2+ DLMX2+ 3 DA- shield 4 1 4 1 7 4 1 7
AH5
TD3+ MX3+ DB+
VDD3 meet rising time 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 LAN_MDIN1 9
TD3- MX3-
16 LMX2- LMX2- 4 3
*WCM2012F2S-161T03-short
DLMX2- 6
DB-
5 5 6 5 6
㚱暨天⎗ẍ8ĭ㓡7ĭ.
>1ms 1 AL5 2 A_GND
MTH6_0D2_2 MTH8_0D2_8 MTH8_0D2_8
A_GND A_GND AVDD33 LAN_MDIP2 5 20 LMX3+ LMX3+ DLMX3+ 4
LAN_MDIN2 6 TD2+ MX2+ 19 LMX3- LMX3- 4 3 DLMX3- 5 DC+
AR23 *28mil short-p AR22 *28mil short-p LAN_MDIP3 2 TD2- MX2- 23 LMX4+ LMX4+ *WCM2012F2S-161T03-short DLMX4+ 7 DC-
A_VDD3 TD1+ MX1+ DD+ A_GND A_GND A_GND A_GND A_GND
LAN_MDIN3 3 22 LMX4- LMX4- 1 AL4 2 DLMX4- 8
AC25 AC30 AC28 TD1- MX1- DD-
TCT 10 15 4 3 RJ08E36BAA012
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 7 TCT4 MCT4 18 *WCM2012F2S-161T03-short AH2 AH4 AH6
TCT3 MCT3 6-21-B4080-008
4 21 6-19-41001-286 H3_5D1_6 H5_5D2_2 O3_5x4_0D1_8x2_3
1 TCT2 MCT2 24 Connect VAULE FOR
TCT1 MCT1 REFERENCE BY
A_GND A_GND A_GND
NS892402 PROJECT
D3V3
60 mil LDO Mode GST5009 LF NMCT_1 AR3 75_1%_04
AR18 *28mil short-p +- PIN㚜㎃ NMCT_2 AR4 75_1%_04
AC16 NMCT_3 AR6 75_1%_04
Transformer NMCT_4 AR5 75_1%_04 A_GND A_GND A_GND
0.01u_16V_X7R_04
A VAULE FOR A
REFERENCE BY AC15
A_GND
PROJECT 100PF 2KV 1206
6-07-1012C-HB0
BY LAYOUT, TRANSFORMER䪗䳬⇍⎗⮵婧 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Ữ天惵⮵( IN/OUT⎴㗪⮵婧) Title
P->+ , N->- ṵ㚱天㯪
A_GND
[30] A_VDD3 [31] RTL8411 (LAN/ CARD READER)
[30] A3.3VS
[2,11,15,17,18,19,23,26] 3.3V Size Document Number Rev
Custom 6-71-W51G1-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 31 of 35

5 4 3 2 1

B - 32 RTL8411
 Schematic Diagrams

AC-In Conn
5 4 3 2 1

AC IN Connector
D D

BJ_DC_JACK1
BJ_BTB1
B_ACIN
1 5 6
2 3 4
GND1 1 2
GND2 PH115C-006G12P
3

B.Schematic Diagrams
6-21-C1700-203
ZI90-06221-11RY
6-20-B3Z50-004
BGND BGND
C C
Sheet 32 of 31
BH1 BH4 BH2 BH3 AC-In Conn
2 2 *H3_5D1_6 *O3_5x4_0D1_5x2_0
3 3
4 1 4 1
5 5

*MTH6_0D2_2 *MTH6_0D2_2

BGND BGND BGND BGND

B
BH5
PCBA CHECK B

H6_0D3_7
1BBR *0_04 4BBR *0_04

2BBR *0_04 5BBR *0_04

BGND 3BBR *0_04 6BBR *0_04

6-34-M56AS-011-1
A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A
Title
[32] AC IN CONN
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51PC-D01 3.0

Date: Tuesday, January 30, 2018 Sheet 32 of 35

5 4 3 2 1

AC-In Conn B - 33
 Schematic Diagrams

Power SW Board
5 4 3 2 1

POWER SW & LED

D D

S_3.3VS
SVDD3
POWER
SWITCH
SVDD3 LED
SR2 100K_04
S_3.3VS SR1
SJ_SW1 470_04 SU1
20mil AH9249NTR-G1
1 6-02-09249-LC0
2 20mil
B.Schematic Diagrams

1 2 SLID_SW#
3 SM_BTN# VCC OUT

GND
4 SC5
5 SMGND
SLID_SW#

A
6 *0.1u_10V_X5R_04 SC3 SC4 SC6

3
50578-0060N-001 W517 SD3 SD1 *1u_10V_Y5V_06 0.1u_16V_Y5V_04 *100p_50V_NPO_04
Sheet 33 of 31

*RY-SP190DBW71-5A
6-20-91A10-106 㬌䁢ⶍ⺈枸䔁

RY-SP190DBW71-5A
C C
SMGND
( 06 SIZE )
Power SW Board

C
SMGND SMGND 3 SMGND SMGND

1 2

SMGND SMGND

S_3.3VS

SD2

C
B *BAV99 RECTIFIER SMH1 SMH2 SMH4 B

SPWR_SW1 H5_0D2_3 H2_5D1_5 H2_5D1_5

3
4
TJE-532-Q-T/R
1
2
SM_BTN# AC PCBA CHECK
1SSR *0_04 4SSR *0_04
5
6

SC1 SC2

A
6-53-3050B-B41
0.1u_50V_Y5V_06 *0.1u_50V_Y5V_06 SMGND SMGND SMGND 2SSR *0_04 5SSR *0_04

3SSR *0_04 6SSR *0_04

SMGND
SMGND SMGND

A ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A

Title
[33] POWER SW BOARD
Size Document Number Rev
Custom SCHEMATIC1 6-71-W51PS-D02 3.0

Date: Tuesday, January 30, 2018 Sheet 33 of 35

5 4 3 2 1

B - 34 Power SW Board
 Schematic Diagrams

Click Board
5 4 3 2 1

枸䔁SMBUS TP CONN
CLICK CONN
CTP_VCC
CJ_TP4
D D

1 CTP_CLK
CTP_VCC 2
CTP_VCC CTP_DATA
CC4 3 CTPBUTTON_L
CJ_TP2 4
CGND CTPBUTTON_R
CJ_TP1 0.1u_16V_Y5V_04 5
1 CTP_CLK CGND
6 CSMB_CLK
2 CTP_DATA 7 CSMB_DATA
1 CTP_CLK 3 CTPBUTTON_L 8
2 CTP_DATA 4 CTPBUTTON_R
3 5 FP225H-008S11M
4 6 6-20-94K30-108

B.Schematic Diagrams
*FP226H-004S10M *50578-0060N-001
6-20-94A40-004 6-20-91A10-106
CGND CGND
CJ_TP3
CSMB_CLK
1
C
2
3
CSMB_DATA
CGND C
Sheet 34 of 31
CTP_CLK
W510 & W515 䓐 CSW1,2 4 CTP_DATA Click Board
2 4 5
RIGHT KEY 6 CTP_VCC
LIFT KEY D02 㚜㎃㕘㕁嘇vaule 1 3
CSW1 6-53-31500-B41 FP225H-006S10M
CSW4 6-53-31500-B41 T4BJB10BQR 6-20-94K00-006
T4BJB10BQR
1 2
1 2 CTPBUTTON_R
CTPBUTTON_L 3 4
3 4

CSW3 CSW2
*T4BJB10BQR *T4BJB10BQR
1 2 1 2
3 4 3 4

W517 CSW6 CSW5

B B
*T4BJB10BQR *T4BJB10BQR
1 2 1 2
3 4 3 4

CC2 CC1
PCBA CHECK
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
1CCR *0_04 4CCR *0_04
D02 ADD 2CCR ↮BOM 11/4
CGND CGND CGND CGND
2CCR 0_04 5CCR *0_04

3CCR *0_04 6CCR *0_04

CH4 CH1 CH3 CH2
H6_0D2_3 H6_0D2_3 H2_5D1_5 O2_3X5_6D1_5X2_0

A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A

Title
[34] CLICK BOARD
CGND CGND CGND CGND Size Document Number Rev
Custom SCHEMATIC1 6-71-W51P2-D03 3.0

Date: Tuesday, January 30, 2018 Sheet 34 of 35

5 4 3 2 1

Click Board B - 35
 Schematic Diagrams
B.Schematic Diagrams

B - 36
 BIOS Update

Appendix C:Updating the FLASH ROM BIOS 

BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.

C:BIOS Update
V1.0X.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.0X.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.0X.04).

Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.

C - 1
 BIOS Update

Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “EFI Shell”. You will then be prompted to give “Y” or “N” responses to the programs being
loaded by EFI Shell. Choose “N” for any memory management programs.
2. You should now see DISK fsX:\> (X is the designated drive number for the CD/DVD drive/USB flash drive).
3. Type the following command:
fsX:\> Flash.nsh
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
C:BIOS Update

Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F9) and select “Yes” to confirm the selection.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.

C-2