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31 views2 pages

Assignment

Uploaded by

begnabekana2
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Assignment

1.1 On the IAS, describe in English the process that the CPU must undertake to read a value from
memory and to write a value to memory in terms of what is put into the MAR, MBR, address bus, data
bus, and control bus.

1.2 For each of the following examples, determine whether this is an embedded system, explaining why
or why not.

a. Are programs that understand physics and/or hardware embedded? For example, one that uses
finite-element methods to predict fluid flow over airplane wings?

b. Is the internal microprocessor controlling a disk drive an example of an embedded system?

c. I/O drivers control hardware, so does the presence of an I/O driver imply that the computer executing
the driver is embedded?

d. Is a PDA (Personal Digital Assistant) an embedded system?

e. Is the microprocessor controlling a cell phone an embedded system?

f. Are the computers in a big phased-array radar considered embedded? These radars are 10-story
buildings with one to three 100-foot diameter radiating patches on the sloped sides of the building.

g. Is a traditional flight management system (FMS) built into an airplane cockpit considered embedded?

h. Are the computers in a hardware-in-the-loop (HIL) simulator embedded?

i. Is the computer controlling a pacemaker in a person’s chest an embedded computer?

j. Is the computer controlling fuel injection in an automobile engine embedded?

2.1 A benchmark program is run on a 40 MHz processor. The executed program consists of 100,000
instruction executions, with the following instruction mix and clock cycle count:

Determine the effective CPI, MIPS rate, and execution time for this program

2.2 CISC vs RISC briefly describe

3.1 Consider a hypothetical 32-bit microprocessor having 32-bit instructions composed of two fields: the
first byte contains the opcode and the remainder the immediate operand or an operand address.
a. What is the maximum directly addressable memory capacity (in bytes)?

b. Discuss the impact on the system speed if the microprocessor bus has: 1. 32-bit local address bus and
a 16-bit local data bus, or 2. 16-bit local address bus and a 16-bit local data bus.

c. How many bits are needed for the program counter and the instruction register?

3.2 Consider two microprocessors having 8- and 16-bit-wide external data buses, respectively. The two
processors are identical otherwise and their bus cycles take just as long.

a. Suppose all instructions and operands are two bytes long. By what factor do the maximum data
transfer rates differ?

b. Repeat assuming that half of the operands and instructions are one byte long.

4.8 Consider a machine with a byte addressable main memory of 216 bytes and block size of 8 bytes.
Assume that a direct mapped cache consisting of 32 lines is used with this machine.

a. How is a 16-bit memory address divided into tag, line number, and byte number?

b. Into what line would bytes with each of the following addresses be stored?

c. Suppose the byte with address 0001 1010 0001 1010 is stored in the cache. What are the addresses of
the other bytes stored along with it?

d. How many total bytes of memory can be stored in the cache?

e. Why is the tag also stored in the cache?

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