Difference between Microprocessor and Microcontroller

Memory
CPU {RAM/ROM} CPU Memory Timer
{RAM/ROM}

a
ALU Serial
ALU Counter

d
Communication
Buses Serial

n
Registers
Registers Communication IO
Microprocessor Timer IO

F u Microcontroller

Microprocessor

i n g Microcontroller

r
 It contains only CPU  CPU, Memory, IO, Timer are on single chip.
 Designer decides size of ROM, RAM & IO handling.

e e  Fixed size of ROM, RAM & IO handling.

in
 Architecture : Von numen [Mostly].  Architecture : Harvard [Mostly].
 It is better in Multi-Tasking.

n g  Relatively weak in Multi-Tasking.

E
 General Purpose. {Like our Main Computer}  Application Specific Purpose. {Embedded System}
 High speed and High Cost.  Relatively Low speed and low cost.
 It requires more hardware to be interfaced.  It requires less hardware to be interfaced.
 High Power Consumption  Low Power Consumption
 Does not support bit addressability [Mostly].  Support bit addressability [Mostly].
 Examples : 8085, 8086, Core i3, Core i5, Corei7, AMD Processor.  Examples : 8051, AVR, PIC, ARM
Engineering Funda Android App 8051 YT Playlist
 Von Neumann Vs Harvard
Address
Address Data
Data & Data
Von Neumann Memory

a
Code Harvard CPU Address

d
CPU Code
Memory

n
Data/Code Code
Memory

F u
g
Parameters Von Neumann Harvard
Memory

r i n
 Data and Program {Code} are stored in  Data and Program {Code} are stored in

e
same memory different memory
Memory Type
e
 It has only RAM for Data & Code

in
 It has RAM for Data and ROM for Code

g
Buses  Common bus for Address & Data/Code  Separate Bus Address & Data/Code

n
Program Execution  Code is executed serially and takes more  Code is executed in parallel with data so it

Data/Code Transfer
Control Signals
cycles
E
 Data or Code in one cycle
 Less
takes less cycles.
 Data and Code in One cycle
 More
Space  It needs less Space  It needs more space
Cost  Less  Costly
Engineering Funda Android App 8051 YT Playlist
 RISC Vs CISC
Parameters RISC CISC
Full Form  Reduced Instruction Set Computer  Complex Instruction Set Computer
Instruction Size  Fixed Size

d a
 Variable Size
Instruction Fetch Time  Same for all instruction

u n
 Vary with respect to instructions

F
Instruction Set  Small & Simple  Large and Complex

g
Addressing Modes  Less Modes as most instructions are based  More Modes as Complex instructions are
on registers

r i n available with different verities.

e
Numbers of Registers  Many  Few
Complier Design  Simple

in e  Complex

g
Program Size  Long {Weak code density}  Small {Better Code density}
Numbers of Operand
Control Unit
E n
 Fixed {Mainly in Registers}
 Hardwire controlled
 Variable {Can be in Registers & Memory}
 Micro Program Controlled
Execution Speed  Faster  Slower
Pipelining  More Effective  Less Effective {It has more bubbles due more
memory based instructions}
Processor  More Suitable for dedicated operations.  More suitable for verities of operations.