Digital Logic Design

LAB MANUAL

Institute of Southern Punjab Multan

Department of Computer Science
Lab Manual Department of Computer Science

Mission of the Department of Computer Science

CS department's mission is to provide high-quality education to students in the areas
of Computer Sciences & IT, equipping them with state-of-the-art practical skills.
Graduates will be prepared to play a constructive role in challenging environments
while adhering to ethical values. and to conduct innovative basic and applied research
that contributes to the sustainability of the national-level industry. By engaging in
research and development, the department aims to generate new knowledge and
technologies that benefit society.

Mission of the Program

To prepare student with the state-of-the-art knowledge and skills in computer science
for solving the computer science related problems for sustainability of regional
industry and society through high quality instructions and research by following
ethical values

Program Education Objectives (PEOs)

The PEOs of the department are defined to meet the institute mission and vision. After
numerous brainstorming sessions in presence of the Director QEC, Dean of social sciences,
and Faculty of Computer Sciences, PEOs were defined and reviewed. These PEOs were then
finalized after discussions with stakeholders (representatives from industry) incorporating
their input and requirements. These finalized program education objectives of the department
of electrical engineering are given below:
PEO-01: Apply computing knowledge and skills to solve computing problems
PEO-02: Manage projects/research to refinement inter-personal and communication
skills by individual/team work.
PEO-03: Establish ethical values, life-long learning, attitude, and social
responsibilities
Lab Manual Department of Computer Science

Program Learning Outcomes (PLOs)

1. Academic Education: To prepare graduates as computing professionals.

2. Knowledge for Solving Computing Problems: Apply knowledge of computing

fundamentals, knowledge of a computing specialization, and mathematics, science,
and domain knowledge appropriate for the computing specialization to the abstraction

and conceptualization of computing models from defined problems and requirements.

3. Problem Analysis: Identify, formulate, research literature, and solve complex

computing problems reaching substantiated conclusions using fundamental principles

of mathematics, computing sciences, and relevant domain disciplines.

4. Design/Development of Solutions: Design and evaluate solutions for complex

computing problems, and design and evaluate systems, components, or processes that
meet specified needs with appropriate consideration for public health and safety,

cultural, societal, and environmental considerations.

5. Modern Tool Usage: Create, select, adapt and apply appropriate techniques,
resources, and modern computing tools to complex computing activities, with an

understanding of the limitations. 6. Individual and Team Work: Function

effectively as an individual and as a member or leader in diverse teams and in multi-
disciplinary settings.
7. Communication: Communicate effectively with the computing community and
with society at large about complex computing activities by being able to comprehend
and write effective reports, design documentation, make effective presentations, and

give and understand clear instructions.

8. Computing Professionalism and Society Understand and assess societal, health,

safety, legal, and cultural issues within local and global contexts, and the

consequential responsibilities relevant to professional computing practice.

9. Ethics: Understand and commit to professional ethics, responsibilities, and norms

of professional computing practice.
Lab Manual Department of Computer Science

10. Life-long Learning: Recognize the need, and have the ability, to engage in
independent learning for continual development as a computing professional
Lab Manual Department of Computer Science

LABORATORY OUTCOMES

The practical/exercises in this section are psychomotor domain Learning Outcomes

to be developed and assessed to lead to the attainment of the competency.

* BT= Bloom’s Taxonomy, C=Cognitive domain, P=Psychomotor domain, A= Affective

domain

Course Outcomes and their Relations to Program Outcomes

CLO- CLO’s BT Level

Level

Acquire knowledge related to the concepts, tools and techniques for the design of
CLO 1: digital electronic circuits (Level C-2)

Demonstrate the skills to design and analyze both combinational and sequential
CLO 2: circuits using a variety of techniques (Level C-4)

CLO 3: Apply the acquired knowledge to simulate and implement small-scale digital (Level C-3)
circuits
Understand the relationship between abstract logic characterizations and
CLO 4: practical electrical implementations. (Level C-2)
Lab Manual Department of Computer Science

COURSE OBJECTIVES AND OUTCOMES

Course Objectives
The aim of the module is to introduce to the students the topics that include combinational
and sequential circuit analysis and design, digital circuit design optimization methods using
random logic gates, multiplexers, decoders, registers, counters and programmable logic
arrays.

Course Outcomes

 Acquire knowledge related to the concepts, tools and techniques for the design of
digital electronic circuits
PREFFERED TOOL(S)

 Cedar Logic

TEXT/REFERENCE BOOK(S)

1. Fundamentals of Digital Logic with Verilog Design By Stephen Brown &

Zvonko G vranesic .
2. Digital Fundamentals / 11E By Thomas L. Floyd Published by Pearson
Lab Manual Department of Computer Science

INSTRUCTIONS FOR STUDENTS

1. Students are instructed to come on time. Late comers are not entertained in the
lab.
2. Students should be punctual to the lab. If not, the conducted experiments will
not be repeated.
3. Students are expected to come prepared at home with the experiments which are
going to be performed.
4. Students are instructed to display their identity cards before entering into the lab.
5. Students are instructed not to bring mobile phones to the lab.
6. Any damage/loss of system parts like keyboard, mouse during the lab session, it
is student’s responsibility and penalty or fine will be collected from the student.
7. Students should update the records and lab observation books session wise.
Before leaving the lab the student should get his lab observation book signed by
the faculty.
8. Students should submit the lab records by the next lab to the concerned faculty
members in the staffroom for their correction and return.
9. Students should not move around the lab during the lab session.
10. If any emergency arises, the student should take the permission from faculty
member concerned in written format.
11. The faculty members may suspend any student from the lab session on
disciplinary grounds.
12. Never copy the output from other students. Write down your own outputs.
Lab Manual Department of Computer Science

TABLE OF CONTENTS
1. Verification of boolean theorems using digital logic gates.
2. Simplifiation technique (k-map)
3. Design of adder and subtractor
4. Design and implementation of code convertor (binary to gray code
converter & gray to binary code converter)
5. design and implementation of code convertor (bcd to excess-3 code
converter & excess-3 to bcd code converter)
6. Design of 4-bit adder and subtractor
7. Design and implementation of magnitude comparator
8. 16 bit odd/even parity checker /generator
9. Design and implementation of multiplexer
10. Design and implementation of demultiplexer
11. Design and implementation of encoder
12. Design and implementation of decoder
13. Construction and verification of 4 bit ripple counter and mod 10/mod
12 ripple counter
14. Design and implementation of 3 bit synchronous up/down counter
15. Design and implementation of shift register
Lab Manual Department of Computer Science

LAB EXERCISE: 1

STUDY OF LOGIC GATES

AIM:
To study about logic gates and verify their truth tables.

THEORY:

Circuit that takes the logical decision and the process are called logic gates. Each gate
has one or more input and only one output. OR, AND and NOT are basic gates.
NAND, NOR and X-OR are known as universal gates. Basic gates form these gates.
AND GATE:

The AND gate performs a logical multiplication commonly known as AND function.
The output is high when both the inputs are high. The output is low level when any
one of the inputs is low

OR GATE:

The OR gate performs a logical addition commonly known as OR function. The

output is high when any one of the inputs is high. The output is low level when both
the inputs are low.

NOT GATE:

The NOT gate is called an inverter. The output is high when the input is low. The
output is low when the input is high.

NAND GATE:

The NAND gate is a contraction of AND-NOT. The output is high when both inputs
are low and any one of the input is low .The output is low level when both inputs are
high.

NOR GATE:

The NOR gate is a contraction of OR-NOT. The output is high when both inputs are
Lab Manual Department of Computer Science

low. The output is low when one or both inputs are high.

X-OR GATE:

The output is high when any one of the inputs is high. The output is low when both
the inputs are low and both the inputs are high.
PROCEDURE:

 Connections are given as per circuit diagram.

 Logical inputs are given as per circuit diagram.
 Observe the output and verify the truth table.
AND GATE:

SYMBOL: PIN DIAGRAM:

OR GATE:
Lab Manual Department of Computer Science

NOT GATE:

SYMBOL: PIN DIAGRAM:

X-OR GATE :

SYMBOL : PIN DIAGRAM :

Lab Manual Department of Computer Science

2-INPUT NAND GATE:

SYMBOL: PIN DIAGRAM:

Lab Manual Department of Computer Science

NOR GATE:

3-INPUT NAND GATE :

Lab Manual Department of Computer Science

RESULT:
Design Logic gates on the software and attach output of all logic
gates.
Lab Manual Department of Computer Science

POST EXPERIMENT QUESTION

 Write brief description about Exclusive NOR and Exclusive NAND gate
behavior?

LAB EXERCISE: 2
Implement Simplification Technique Using K-Map
Lab Manual Department of Computer Science

AIM:
Implement of the given Boolean function using logic gates in both SOP and POS
forms

THEORY:
(a) SOP: - It is the Sum of product form in which the terms are taken as 1. It is
denoted in the K-map expression by sigma (∑)

AB’C+A’BC+A’B’C+A’B’C’+AB’C’
The K-Map of the above expression is given below

Truth Table
A B C X
0 0 0 1
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 0

PROCEDURE:
 First design the logic gates circuit for the SOP expression on a software and also
draw a truth table.
 Drive the simplified expression for the above expression using K-Map.
 After simplifying the expression using K-Map, then draw the truth table and
design logic gates circuit for the simplified expression.
Lab Manual Department of Computer Science

 Verify the both truth tables before and after simplification of Boolean expression
on a software.
RESULTS
The simplified Boolean expression using K-Map.
B’+A’C
Draw Truth Table for B’+A’C

Draw Logic Gate Circuit Diagram of B’+A’C

(b) POS: - It is the product of the sums form in which the terms are taken as 0. It is
denoted in the K-Map expression by the Sign pie (π)
Lab Manual Department of Computer Science

(A+B+C)(A+B+C’)(A+B’+C)(A+B’+C’)(A’+B’+C)
K-Map of the above POS expression

Truth Table
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

Procedure:
 First design the logic gates circuit for the SOP expression on a software and also
draw a truth table.
 Drive the simplified expression for the above expression using K-Map.
 After simplifying the expression using K-Map, then draw the truth table and
design logic gates circuit for the simplified expression.
 Verify the both truth tables before and after simplification of Boolean expression
on a software.

RESULTS
Lab Manual Department of Computer Science

The simplified Boolean expression using K-Map.

A(B’+C)
Draw Truth Table for A(B’+C)

Draw Logic Gate Circuit Diagram of A(B’+C)

Lab Manual Department of Computer Science

POST EXPERIMENT QUESTION

 Use a Karnaugh map to minimize the following SOP expression:

 Use a Karnaugh map to minimize the following POS expression:

 Define canonical form representation of Boolean function?