1 /**

2 * @file xmc_eru.c
3 * @date 2016-03-10
4 *
5 * @cond
6 *****************************************************************************
7 * XMClib v2.2.0 - XMC Peripheral Driver Library
8 *
9 * Copyright (c) 2015-2020, Infineon Technologies AG
10 * All rights reserved.
11 *
12 * Boost Software License - Version 1.0 - August 17th, 2003
13 *
14 * Permission is hereby granted, free of charge, to any person or organization
15 * obtaining a copy of the software and accompanying documentation covered by
16 * this license (the "Software") to use, reproduce, display, distribute,
17 * execute, and transmit the Software, and to prepare derivative works of the
18 * Software, and to permit third-parties to whom the Software is furnished to
19 * do so, all subject to the following:
20 *
21 * The copyright notices in the Software and this entire statement, including
22 * the above license grant, this restriction and the following disclaimer,
23 * must be included in all copies of the Software, in whole or in part, and
24 * all derivative works of the Software, unless such copies or derivative
25 * works are solely in the form of machine-executable object code generated by
26 * a source language processor.
27 *
28 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
29 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
30 * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
31 * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
32 * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
33 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
34 * DEALINGS IN THE SOFTWARE.
35 *
36 * To improve the quality of the software, users are encouraged to share
37 * modifications, enhancements or bug fixes with Infineon Technologies AG
38 * at XMCSupport@infineon.com.
39 *****************************************************************************
40 *
41 * Change History
42 * --------------
43 *
44 * 2015-02-20:
45 * - Initial <br>
46 *
47 * 2015-06-20:
48 * - Removed definition of GetDriverVersion API <br>
49 *
50 * 2016-03-10:
51 * - XMC_ERU_ETL_GetEdgeDetection() API is added to get the configured edge for
event generation. <br>
52 *
53 * @endcond
54 */
55
56 /*************************************************************************************
********************************
57 * HEADER FILES
58
*************************************************************************************
*******************************/
59
60 #include "xmc_eru.h"
61
62 /*************************************************************************************
********************************
63 * MACROS
64
*************************************************************************************
*******************************/
65
66 #define ERU_EXISEL_BITSIZE (4UL) /* Used to set the input for path A and path B based
 on the channel */
67 #define ERU_EXISEL_INPUT_BITSIZE (2UL)
68
69 #define XMC_ERU_ETL_CHECK_INPUT_A(input) \
70 ((input == XMC_ERU_ETL_INPUT_A0) || \
71 (input == XMC_ERU_ETL_INPUT_A1) || \
72 (input == XMC_ERU_ETL_INPUT_A2) || \
73 (input == XMC_ERU_ETL_INPUT_A3))
74
75 #define XMC_ERU_ETL_CHECK_INPUT_B(input) \
76 ((input == XMC_ERU_ETL_INPUT_B0) || \
77 (input == XMC_ERU_ETL_INPUT_B1) || \
78 (input == XMC_ERU_ETL_INPUT_B2) || \
79 (input == XMC_ERU_ETL_INPUT_B3))
80
81 #define XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode) \
82 ((mode == XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL) || \
83 (mode == XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL))
84
85 #define XMC_ERU_ETL_CHECK_EVENT_SOURCE(source) \
86 ((source == XMC_ERU_ETL_SOURCE_A) || \
87 (source == XMC_ERU_ETL_SOURCE_B) || \
88 (source == XMC_ERU_ETL_SOURCE_A_OR_B) || \
89 (source == XMC_ERU_ETL_SOURCE_A_AND_B) || \
90 (source == XMC_ERU_ETL_SOURCE_NOT_A) || \
91 (source == XMC_ERU_ETL_SOURCE_NOT_A_OR_B) || \
92 (source == XMC_ERU_ETL_SOURCE_NOT_A_AND_B) || \
93 (source == XMC_ERU_ETL_SOURCE_NOT_B) || \
94 (source == XMC_ERU_ETL_SOURCE_A_OR_NOT_B) || \
95 (source == XMC_ERU_ETL_SOURCE_A_AND_NOT_B) || \
96 (source == XMC_ERU_ETL_SOURCE_NOT_A_OR_NOT_B) || \
97 (source == XMC_ERU_ETL_SOURCE_NOT_A_AND_NOT_B))
98
99 #define XMC_ERU_ETL_CHECK_TRIGGER_EDGE(edge) \
100 ((edge == XMC_ERU_ETL_EDGE_DETECTION_DISABLED) || \
101 (edge == XMC_ERU_ETL_EDGE_DETECTION_RISING) || \
102 (edge == XMC_ERU_ETL_EDGE_DETECTION_FALLING) || \
103 (edge == XMC_ERU_ETL_EDGE_DETECTION_BOTH))
104
105 #define XMC_ERU_ETL_CHECK_TRIGGER_CHANNEL(channel) \
106 ((channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL0) || \
107 (channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1) || \
108 (channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL2) || \
109 (channel == XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL3))
110
111 #define XMC_ERU_OGU_CHECK_PATTERN_INPUT(input) \
112 ((input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT0) || \
113 (input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT1) || \
114 (input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT2) || \
115 (input == XMC_ERU_OGU_PATTERN_DETECTION_INPUT3))
116
117 #define XMC_ERU_OGU_CHECK_PERIPHERAL_TRIGGER(trigger) \
118 ((trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER1) || \
119 (trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER2) || \
120 (trigger == XMC_ERU_OGU_PERIPHERAL_TRIGGER3))
121
122 #define XMC_ERU_OGU_CHECK_SERIVCE_REQUEST(service) \
123 ((service == XMC_ERU_OGU_SERVICE_REQUEST_DISABLED) || \
124 (service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER) || \
125 (service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MATCH) || \
126 (service == XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER_AND_PATTERN_MISMATCH))
127
128 /*************************************************************************************
********************************
129 * API IMPLEMENTATION
130
*************************************************************************************
*******************************/
131 /* Initializes the selected ERU_ETLx channel with the config structure. */
132 void XMC_ERU_ETL_Init(XMC_ERU_t *const eru,
133 const uint8_t channel,
134 const XMC_ERU_ETL_CONFIG_t *const config)
135 {
136 XMC_ASSERT("XMC_ERU_ETL_Init:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru
));
137 XMC_ASSERT("XMC_ERU_ETL_Init:Invalid Channel Number", (channel < 4U));
138
139 XMC_ERU_Enable(eru);
140
141 eru->EXISEL = (eru->EXISEL &
142 ~((uint32_t)(ERU_EXISEL_EXS0A_Msk | ERU_EXISEL_EXS0B_Msk) << (channel
* ERU_EXISEL_BITSIZE))) |
143 (config->input << (channel * (uint32_t)ERU_EXISEL_BITSIZE));
144
145 eru->EXICON[channel] = config->raw;
146 }
147
148 /* Initializes the selected ERU_OGUy channel with the config structure. */
149 void XMC_ERU_OGU_Init(XMC_ERU_t *const eru,
150 const uint8_t channel,
151 const XMC_ERU_OGU_CONFIG_t *const config)
152 {
153 XMC_ASSERT("XMC_ERU_OGU_Init:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(eru
));
154 XMC_ASSERT("XMC_ERU_OGU_Init:Invalid Channel Number", (channel < 4U));
155
156 XMC_ERU_Enable(eru);
157
158 eru->EXOCON[channel] = config->raw;
159 }
160
161 /* Configures the event source for path A and path B, with selected input_a and
input_b respectively.*/
162 void XMC_ERU_ETL_SetInput(XMC_ERU_t *const eru,
163 const uint8_t channel,
164 const XMC_ERU_ETL_INPUT_A_t input_a,
165 const XMC_ERU_ETL_INPUT_B_t input_b)
166 {
167 XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(
eru));
168 XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid Channel Number", (channel < 4U));
169 XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid A", XMC_ERU_ETL_CHECK_INPUT_A(input_a));
170 XMC_ASSERT("XMC_ERU_ETL_SetInput:Invalid B", XMC_ERU_ETL_CHECK_INPUT_B(input_b));
171
172 eru->EXISEL = (eru->EXISEL & ~((uint32_t)(ERU_EXISEL_EXS0A_Msk |
ERU_EXISEL_EXS0B_Msk) << (channel * ERU_EXISEL_BITSIZE))) |
173 (((uint32_t)input_a | (uint32_t)(input_b << ERU_EXISEL_INPUT_BITSIZE))
<< (channel * ERU_EXISEL_BITSIZE));
174 }
175
176 /* Select input path combination along with polarity for event generation by setting
(SS, NA, NB) bits of
177 EXICONx(x = [0 to 3]) register */
178 void XMC_ERU_ETL_SetSource(XMC_ERU_t *const eru,
179 const uint8_t channel,
180 const XMC_ERU_ETL_SOURCE_t source)
181 {
182 XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Module Pointer", XMC_ERU_CHECK_MODULE_PTR(
eru));
183 XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Channel Number", (channel < 4U));
184 XMC_ASSERT("XMC_ERU_ETL_SetSource:Invalid Source", XMC_ERU_ETL_CHECK_EVENT_SOURCE(
source));
185
186 eru->EXICON_b[channel].SS = (uint8_t)source;
187 }
188
189 /* Configure event trigger edge/s by setting (RE, FE) bits of EXICONx(x = [0 to 3])
register.*/
190 void XMC_ERU_ETL_SetEdgeDetection(XMC_ERU_t *const eru,
191 const uint8_t channel,
192 const XMC_ERU_ETL_EDGE_DETECTION_t edge_detection)
193 {
194 XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
195 XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Channel Number", (channel < 4U));
196 XMC_ASSERT("XMC_ERU_ETL_SetEdgeDetection:Invalid Trigger Edge",
 XMC_ERU_ETL_CHECK_TRIGGER_EDGE(edge_detection));
197
198 eru->EXICON_b[channel].ED = (uint8_t)edge_detection;
199 }
200
201 /* Returns the configured event trigger edge/s by reading (RE, FE) bits of EXICONx(x
= [0 to 3]) register. */
202 XMC_ERU_ETL_EDGE_DETECTION_t XMC_ERU_ETL_GetEdgeDetection(XMC_ERU_t *const eru, const
uint8_t channel)
203 {
204 XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
205 XMC_ASSERT("XMC_ERU_ETL_GetEdgeDetection:Invalid Channel Number", (channel < 4U));
206 return ((XMC_ERU_ETL_EDGE_DETECTION_t)(eru->EXICON_b[channel].ED));
207 }
208
209 /* Set the status flag bit(FL) in EXICONx(x = [0 to 3]). */
210 void XMC_ERU_ETL_SetStatusFlagMode(XMC_ERU_t *const eru,
211 const uint8_t channel,
212 const XMC_ERU_ETL_STATUS_FLAG_MODE_t mode)
213 {
214 XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
215 XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Channel Number", (channel < 4U));
216 XMC_ASSERT("XMC_ERU_ETL_SetStatusFlagMode:Invalid Status Flag Mode",
XMC_ERU_ETL_CHECK_STATUS_FLAG_MODE(mode));
217
218 eru->EXICON_b[channel].LD = (uint8_t)mode;
219 }
220
221 /* Configure which Channel of OGUy(Output gating unit y = [0 to 3]) to be mapped by
the trigger pulse generated by
222 * ETLx(Event Trigger Logic, x = [0 to 3]) by setting (OCS and PE) bit fields. */
223 void XMC_ERU_ETL_EnableOutputTrigger(XMC_ERU_t *const eru,
224 const uint8_t channel,
225 const XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL_t
trigger)
226 {
227 XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
228 XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Channel Number", (channel < 4U
));
229 XMC_ASSERT("XMC_ERU_ETL_EnableOutputTrigger:Invalid Output Channel",
XMC_ERU_ETL_CHECK_TRIGGER_CHANNEL(trigger));
230
231 eru->EXICON_b[channel].OCS = (uint8_t)trigger;
232 eru->EXICON_b[channel].PE = (uint8_t)true;
233 }
234
235 /* Disables the trigger pulse generation by clearing the (PE) of the EXICONx(x = [0
to 3]). */
236 void XMC_ERU_ETL_DisableOutputTrigger(XMC_ERU_t *const eru, const uint8_t channel)
237 {
238 XMC_ASSERT("XMC_ERU_ETL_DisableOutputTrigger:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
239 XMC_ASSERT("XMC_ERU_ETL_DisableOutputTrigger:Invalid Channel Number", (channel < 4U
));
240
241 eru->EXICON_b[channel].PE = false;
242 }
243
244 /* Configures ERU_ETLx(x = [0 to 3]) for pattern match detection by setting IPENx(x =
[0 to 3) and GEEN bits. */
245 void XMC_ERU_OGU_EnablePatternDetection(XMC_ERU_t *const eru,
246 const uint8_t channel,
247 const XMC_ERU_OGU_PATTERN_DETECTION_INPUT_t
input)
248 {
249 XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
250 XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Channel Number", (channel <
4U));
251 XMC_ASSERT("XMC_ERU_OGU_EnablePatternDetection:Invalid Pattern input",
 XMC_ERU_OGU_CHECK_PATTERN_INPUT(input));
252
253 eru->EXOCON_b[channel].IPEN = (uint8_t)input;
254 eru->EXOCON_b[channel].GEEN = true;
255 }
256
257 /* Disable the pattern detection by clearing (GEEN) bit. */
258 void XMC_ERU_OGU_DisablePatternDetection(XMC_ERU_t *const eru, const uint8_t channel)
259 {
260 XMC_ASSERT("XMC_ERU_OGU_DisablePatternDetection:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
261 XMC_ASSERT("XMC_ERU_OGU_DisablePatternDetection:Invalid Channel Number", (channel <
4U));
262
263 eru->EXOCON_b[channel].GEEN = false;
264 }
265
266 /* Configures peripheral trigger input, by setting (ISS) bit. */
267 void XMC_ERU_OGU_EnablePeripheralTrigger(XMC_ERU_t *const eru,
268 const uint8_t channel,
269 const XMC_ERU_OGU_PERIPHERAL_TRIGGER_t peripheral_trigger)
270 {
271 XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
272 XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Channel Number", (channel <
4U));
273 XMC_ASSERT("XMC_ERU_OGU_EnablePeripheralTrigger:Invalid Peripheral Trigger Input",
274 XMC_ERU_OGU_CHECK_PERIPHERAL_TRIGGER(peripheral_trigger));
275
276 eru->EXOCON_b[channel].ISS = (uint8_t)peripheral_trigger;
277 }
278
279 /* Disables event generation based on peripheral trigger by clearing (ISS) bit. */
280 void XMC_ERU_OGU_DisablePeripheralTrigger(XMC_ERU_t *const eru,
281 const uint8_t channel)
282 {
283 XMC_ASSERT("XMC_ERU_OGU_DisablePeripheralTrigger:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
284 XMC_ASSERT("XMC_ERU_OGU_DisablePeripheralTrigger:Invalid Channel Number", (channel <
4U));
285
286 eru->EXOCON_b[channel].ISS = (uint8_t)0;
287 }
288
289 /* Configures the gating scheme for service request generation by setting (GP) bit. */
290 void XMC_ERU_OGU_SetServiceRequestMode(XMC_ERU_t *const eru,
291 const uint8_t channel,
292 const XMC_ERU_OGU_SERVICE_REQUEST_t mode)
293 {
294 XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Module Pointer",
XMC_ERU_CHECK_MODULE_PTR(eru));
295 XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Channel Number", (channel < 4U
));
296 XMC_ASSERT("XMC_ERU_OGU_SetServiceRequestMode:Invalid Service Request Mode",
XMC_ERU_OGU_CHECK_SERIVCE_REQUEST(mode));
297
298 eru->EXOCON_b[channel].GP = (uint8_t)mode;
299
300 }
301