NIF5002N

Preferred Device

Self−Protected FET
with Temperature and
Current Limit
42 V, 2.0 A, Single N−Channel, SOT−223
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HDPlust devices are an advanced series of power MOSFETs
which utilize ON Semiconductors latest MOSFET technology process V(BR)DSS
(Clamped) RDS(ON) TYP ID MAX
to achieve the lowest possible on−resistance per silicon area while
incorporating smart features. Integrated thermal and current limits 42 V 165 mW @ 10 V 2.0 A*
work together to provide short circuit protection. The devices feature *Max current limit value is dependent on input
an integrated Drain−to−Gate Clamp that enables them to withstand condition.
high energy in the avalanche mode. The Clamp also provides
Drain
additional safety margin against unexpected voltage transients.
Electrostatic Discharge (ESD) protection is provided by an integrated
Gate−to−Source Clamp. Overvoltage MPWR
Gate Protection
Input RG
Features
• Current Limitation ESD Protection
• Thermal Shutdown with Automatic Restart
• Short Circuit Protection Temperature Current Current
• IDSS Specified at Elevated Temperature Limit Limit Sense

• Avalanche Energy Specified

• Slew Rate Control for Low Noise Switching
Source
• Overvoltage Clamped Protection
• Pb−Free Packages are Available 4 SOT−223
Applications CASE 318E
1
STYLE 3
• Lighting 2
3
• Solenoids
• Small Motors MARKING DIAGRAM

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

1
Rating Symbol Value Unit GATE 4
5002N G

Drain−to−Source Voltage Internally Clamped VDSS 42 V 2

AYW

DRAIN DRAIN
G

Drain−to−Gate Voltage Internally Clamped VDGR 42 V

(RG = 1.0 MW) 3
SOURCE
Gate−to−Source Voltage VGS "14 V
Continuous Drain Current ID Internally Limited
Power Dissipation @ TA = 25°C (Note 1) PD 1.1 W A = Assembly Location
@ TA = 25°C (Note 2) 1.7 Y = Year
@ TT = 25°C (Note 3) 8.9 W = Work Week
5002N = Specific Device Code
Operating Junction and Storage Temperature TJ, Tstg −55 to °C
G = Pb−Free Package
150
(Note: Microdot may be in either location)
Single Pulse Drain−to−Source Avalanche Energy EAS 150 mJ
(VDD = 32 V, VG = 5.0 V, IPK = 1.0 A,
L = 300 mH, RG(ext) = 25 W)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
Stresses exceeding Maximum Ratings may damage the device. Maximum dimensions section on page 4 of this data sheet.
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the Preferred devices are recommended choices for future use
Recommended Operating Conditions may affect device reliability. and best overall value.

© Semiconductor Components Industries, LLC, 2006 1 Publication Order Number:

April, 2006 − Rev. 7 NIF5002N/D
 NIF5002N

THERMAL CHARACTERISTICS
Characteristic Symbol Value Unit
Junction−to−Ambient − Steady State (Note 1) RqJA 114 °C/W
Junction−to−Ambient − Steady State (Note 2) RqJA 72
Junction−to−Tab − Steady State (Note 3) RqJT 14
1. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick).
2. Surface−mounted onto 2″ sq. FR4 board (1″ sq., 1 oz. Cu, 0.06″ thick).
3. Surface−mounted onto min pad FR4 PCB, (2 oz. Cu, 0.06″ thick).

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS TJ = 25°C 42 46 55 V
(Note 4) VGS = 0 V, ID = 10 mA
TJ = 150°C 40 45 55
Zero Gate Voltage Drain Current IDSS TJ = 25°C 0.25 4.0 mA
VGS = 0 V, VDS = 32 V
TJ = 150°C 1.1 20
Gate Input Current IGSSF VDS = 0 V, VGS = 5.0 V 50 100 mA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage VGS(th) VGS = VDS, ID = 150 mA 1.3 1.8 2.2 V
Gate Threshold Temperature Coefficient VGS(th)/TJ 4.0 6.0 −mV/°C
Static Drain−to−Source On−Resistance RDS(on) TJ = 25°C 165 200 mW
VGS = 10 V, ID = 1.7 A
TJ = 150°C 305 400
TJ = 25°C 195 230
VGS = 5.0 V, ID = 1.7 A
TJ = 150°C 360 460
TJ = 25°C 190 230
VGS = 5.0 V, ID = 0.5 A
TJ = 150°C 350 460
Source−Drain Forward On Voltage VSD VGS = 0 V, IS = 7.0 A 1.0 V
SWITCHING CHARACTERISTICS
Turn−on Time td(on) VGS = 10 V, VDD = 12 V, 20 30 ms
ID = 2.5 A, RL = 4.7 W,
Turn−off Time td(off) (10% Vin to 90% ID) 65 100

Slew Rate On dVDS/dton RL = 4.7 W, Vin = 0 to 10 V, 1.2 V/ms

VDD = 12 V, 70% to 50%
Slew−Rate Off dVDS/dtoff RL = 4.7 W, Vin = 0 to 10 V, 0.5
VDD = 12 V, 50% to 70%

SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 5)

Current Limit ILIM TJ = 25°C 3.1 4.7 6.3 A
VDS = 10 V, VGS = 5.0 V
TJ = 150°C 2.0 3.2 4.3
TJ = 25°C 3.8 5.7 7.6
VDS = 10 V, VGS = 10 V
TJ = 150°C 2.8 4.3 5.7
Temperature Limit (Turn−off) TLIM(off) VGS = 5.0 V 150 175 200 °C
Temperature Limit (Circuit Reset) TLIM(on) VGS = 5.0 V 135 160 185
Temperature Limit (Turn−off) TLIM(off) VGS = 10 V 150 165 185
Temperature Limit (Circuit Reset) TLIM(on) VGS = 10 V 135 150 170

ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)

Electro−Static Discharge Capability ESD Human Body Model (HBM) 4000 V
Machine Model (MM) 400
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
5. Fault conditions are viewed as beyond the normal operating range of the part.

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 NIF5002N

TYPICAL PERFORMANCE CURVES

4
7 10 V TJ = 25°C VDS ≥ 10 V

ID, DRAIN CURRENT (AMPS)

ID, DRAIN CURRENT (AMPS)

9V
6
8V 3
7V 6V
5
5V
4V
4 3.8 V 2
3 3.6 V
3.4 V
100°C
2 3.2 V 1
3.0 V 25°C
1 2.8 V
2.6 V TJ = −55°C
0 0
0 1 2 3 4 1 1.5 2 2.5 3 3.5 4
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)

1.0 0.3
TJ = 25°C
0.9 ID = 1.7 A
TJ = 25°C 0.25
0.8
VGS = 5 V
0.7 0.2
0.6
0.5 0.15
VGS = 10 V
0.4
0.1
0.3
0.2
0.05
0.1
0 0
2 3 4 5 6 7 8 9 10 2 3 4 5
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)

Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage

2.5 10000
ID = 1.7 A VGS = 0 V
VGS = 5 V
RESISTANCE (NORMALIZED)
RDS(on), DRAIN−TO−SOURCE

2
1000 TJ = 150°C
IDSS, LEAKAGE (nA)

1.5
100
1 TJ = 100°C

10
0.5

0 1
−50 −25 0 25 50 75 100 125 150 10 20 30 40
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current

Temperature vs. Voltage

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 NIF5002N

TYPICAL PERFORMANCE CURVES

10 10
VGS = 0 V VGS = 20 V
IS, SOURCE CURRENT (AMPS)

TJ = 25°C SINGLE PULSE

ID, DRAIN CURRENT (AMPS)

TC = 25°C 1 ms

1 1.0 10 ms

0.1 0.1

dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.01 0.01
0.4 0.5 0.6 0.7 0.8 0.9 1 0.1 1.0 10 100
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Diode Forward Voltage vs. Current Figure 8. Maximum Rated Forward Biased
Safe Operating Area

1.0
D = 0.5
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE

0.2

0.1
0.1
0.05

0.02
0.01

SINGLE PULSE
0.01
1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
t, TIME (s)

Figure 9. Thermal Response

ORDERING INFORMATION
Device Package Shipping†
NIF5002NT1 SOT−223 1000 / Tape & Reel
NIF5002NT1G SOT−223 1000 / Tape & Reel
(Pb−Free)

NIF5002NT3 SOT−223 4000 / Tape & Reel

NIF5002NT3G SOT−223 4000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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 NIF5002N

PACKAGE DIMENSIONS

SOT−223 (TO−261)
CASE 318E−04
ISSUE L

NOTES:
D 1. DIMENSIONING AND TOLERANCING PER ANSI
b1 Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.

MILLIMETERS INCHES
4 DIM MIN NOM MAX MIN NOM MAX
A 1.50 1.63 1.75 0.060 0.064 0.068
HE E A1 0.02 0.06 0.10 0.001 0.002 0.004
1 2 3 b 0.60 0.75 0.89 0.024 0.030 0.035
b1 2.90 3.06 3.20 0.115 0.121 0.126
c 0.24 0.29 0.35 0.009 0.012 0.014
D 6.30 6.50 6.70 0.249 0.256 0.263
E 3.30 3.50 3.70 0.130 0.138 0.145
b e 2.20 2.30 2.40 0.087 0.091 0.094
e1 e1 0.85 0.94 1.05 0.033 0.037 0.041
e L1 1.50 1.75 2.00 0.060 0.069 0.078
HE 6.70 7.00 7.30 0.264 0.276 0.287
C q 0° − 10° 0° − 10°
q STYLE 3:
A PIN 1. GATE
2. DRAIN
0.08 (0003) 3. SOURCE
A1
L1 4. DRAIN

SOLDERING FOOTPRINT*
3.8
0.15

2.0
0.079

6.3
2.3 2.3
0.248
0.091 0.091

2.0
0.079

1.5 SCALE 6:1 ǒinches

mm Ǔ
0.059
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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