KPVS ThermalModeling
KPVS ThermalModeling
PRINCIPLES OF
POWER ELECTRONICS
Second Edition
John G. Kassakian
David J. Perreault
George C. Verghese
Martin F. Schlecht
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Radiation may be important in equipment where this difference is large. However, the
strong nonlinearity of this relationship and the relatively low incidence of its importance
do not justify the complexity of considering radiation in detail here. Therefore in this
chapter we focus on conduction and convection.
If only these two mechanisms are considered, the design will be conservative, as
any heat transferred through radiation will reduce the temperature of the apparatus
below the design temperature. The exception is in enclosures, where radiation from
hot components may be absorbed by those at lower temperatures, causing these latter
components to operate at higher temperatures than anticipated. In such cases, radiation
shields — shiny metal partitions — can be employed to isolate the offending or affected
components.
The material in this chapter will not give you novel ideas for designing heat transfer
systems. The problem is too application-specific to permit such a discussion to be of
value. Instead, we describe first the parameters governing the performance of any such
system. Then we consider the modeling of both steady-state and transient thermal
behavior, as applicable to power electronic systems. Some straightforward examples of
specific designs will be presented to illustrate the discussions.
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Note that the analog of thermal power is i, not vi. If heat leaves body 1 only through
the interface characterized by Rθ , then i is not only analogous to Q12 , but, because we
are considering only steady-state conditions, it also represents the rate at which energy
is being converted to heat in body 1. In the context of our interests, body 1 would
be a packaged electrical network, and Q12 would represent the rate at which electrical
energy is being converted to heat (dissipated) in the package, that is,
pdiss ⇐⇒ i
The thermal management problem is to design a heat transfer system (that is, Rθ ) that
constrains ∆T to the value dictated by component ratings and ambient conditions.
Figure 25.1 illustrates the electrical analog for the simple two-body system just dis-
cussed. The bodies are at temperatures T1 and T2 and are connected thermally through
the crosshatched interface, which can be characterized by a thermal resistance of value
Rθ . If the units of T are ◦ C and the units of Q are watts (W), then thermal resistance
has the units ◦ C/W. As with electric circuits, where parallel resistances can be com-
bined into a single equivalent resistance, parallel thermal paths can be characterized
by thermal resistances and combined into an equivalent single thermal resistance.
Figure 25.1 Electrical analog of simple two-body thermal system. The crosshatched region is the
thermal interface characterized by the longitudinal thermal resistance Rθ .
Convection is the mechanical transport of heat by a moving fluid. The fluid (air,
for instance) can move because of gravitational forces caused by density gradients, in
which case the process is called natural convection. Or the fluid can be driven (perhaps
by a fan), resulting in what is called forced convection. Convection is a somewhat more
complex process than conduction and can be described by the relation
where ν is the fluid velocity. The parameter h(∆T, ν) is termed the film coefficient
of heat transfer; it depends on fluid velocity and the difference between the inlet and
outlet temperatures. The cross-sectional area of the interface is A. Over the range
of temperature differentials of interest in our application, h is fairly constant. With
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respect to fluid velocity, significant changes in h occur when the flow regime changes
from laminar to turbulent. Within each regime, however, h improves only slowly with
increased velocity. For forced convection, h is independent of ∆T . Within these limits,
the product hA may be modeled as constant, giving to (25.3) the same form as (25.1),
with Rθ = 1/hA. Thus the electrical analog shown in Fig. 25.1 is appropriate for
representing convective as well as conductive heat transfer.
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The thermal resistivities of various materials used in heat transfer paths in electronic
equipment are shown in Table 25.1. Mylar, and less commonly mica, is used to provide
electrical isolation between electrically hot components (for example, the semiconduc-
tor device package and the heat sink). Mica has a much higher dielectric strength, is
more impervious to mechanical puncture, and can be cleaved to produce thinner sheets
than Mylar—but is more expensive. Beryllia (BeO) and alumina (Al2 O3 ), and recently
aluminum nitride (AlN), are also used to provide electrical isolation, most frequently
within device packages. Silicone grease impregnated with metallic oxides, such as
ZnO2 , is used to fill imperfections such as scratches on mating surfaces in a heat trans-
fer path — between the bottom of a device package and the top of a heat sink, for
instance. The need to fill these voids with something other than air is apparent from
the table. Filled silicone grease is also referred to as thermal grease or thermal compound
(or “goop”, for reasons that become clear when you use it). Anodizing is frequently used
to create an attractive or black surface on aluminum components. Since the resulting
oxide is very thin, it contributes little to the thermal resistance of a path. Although
the oxide is a good insulator, it is unwise to rely on it in lieu of a dielectric material
for providing electrical isolation between surfaces.
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(a)
(b)
Figure 25.2 (a) A thermal system consisting of a resistor embedded in the center of an aluminum
block. (b) The electric circuit analog for the thermal system of (a).
As the length of the block (10 cm) is much longer than the radius of the resistor (3 mm), we
can assume that the detailed pattern of heat flow in the vicinity of the resistor is unimportant.
The resulting analog circuit model is shown in Fig. 25.2(b), where RθL and RθR are the thermal
resistances of the aluminum bar to the left and right of center. The value of these resistances are
(0.42)(5)
RθL = RθR = = 2.1◦ C/W (25.6)
1
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ρθ δ
Rθi = (25.7)
A
Consider for example a device in a TO-220 package mounted on a heatsink. Between
the device and heatsink is a 1.6 mm alumina pad because electrical isolation between
the device and heatsink is required. The mating surface area of a TO-220 package is
approximately 0.95 cm2 , giving a thermal resistance between the case and the sink of:
(6)(0.16)
RθCS = = 1.01◦ C/W (25.8)
0.95
Thus the difference between the case and sink temperatures increases by 1.01◦ C for each
watt of thermal power being transported across the interface. A dissipation of 15 W
is not unusual for a device in a TO-220 package, giving a temperature rise of 15.2◦ C
across just the alumina interface. This amount, which does not include the thermal
resistance of the interfaces between the alumina pad and the TO-220 case or heatsink,
is significant, and illustrates the price paid for requiring electrical isolation.
Figure 25.3 Typical mechanical structure used for mounting semiconductor die.
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(a) (b)
Figure 25.4 (a) A static thermal model for Fig. 25.3. (b) A simplified model of the circuit in (a).
Some of the thermal resistances shown in Fig. 25.4(a) are so small relative to others that
they can be neglected. Because the header is made of copper or aluminum, its vertical thermal
resistance is negligible, as is that of the thermal grease (assuming that it is applied properly,
which it often is not!). Others of the identified resistances are frequently lumped together, such
as those for the silicon and bonding material, which are generally inaccessible to the circuit
designer. Implicit in the element RθSA are the thermal resistance of the sink extrusion between
the region on which the package is mounted and the surfaces from which heat is being removed by
convection, and the thermal resistance representing the convection process. Figure 25.4(b) shows
the simplified model.
The variable of interest in the models of Fig. 25.4 is Tj , the “junction” temperature of the
device. The term “junction” is used rather loosely to represent in lumped form the source of heat
in the device. In reality, this source seldom exists as a simple plane. In the MOSFET it is not
a junction at all. Nevertheless the term persists, and manufacturers determine RθjC empirically,
which takes into account the actual geometry of the heat-producing region. To determine Tj ,
we need to know Pdiss as well as the thermal resistances between the junction and the ambient
environment.
The dissipation in the device is a function of its electrical environment (for example, its current,
voltage, and switching loci). For the purposes of this example, we assume that these calculations
have been made for our device, and that the result is Pdiss = 25 W. The physical configuration
is a TO-247 package mounted on an extruded, finned, free convection-cooled sink without any
insulating interface but with thermal grease. Typical values of the thermal resistances are RθjC =
1.1, RθCS = 0.12, and RθSA = 1.8, all units being ◦ C/ W. The last parameter needed is the
ambient temperature, which is not “room temperature,” but that of the air in the vicinity of the
sink. We take it to be 40◦ C. We determine the temperature drop between nodes in the model by
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thermal resistance between the two surfaces is a function of mounting pressure. The rela-
tionship among 1/hc , thickness, and pressure is usually provided by the manufacturer† .
The printed circuit board (PCB) presents unique thermal design problems. One
can mount on the board heat sinks to which are attached the semiconductor devices,
however this occupies valuable board real-estate. If the thermal requirements are not
too severe, a common approach is to mount the device directly on the board over
vias† that thermally connect the upper and lower layers of copper foil. The device is
thermally connected to the upper foil layer, which spreads and dissipates the heat as
well as transferring heat through the vias, where it is spread on the lower foil layer.
This heat-sinking method for PC boards is illustrated in Fig. 25.5.
(a)
(b)
Figure 25.5 An illustration of the use of vias as heatsinks for components mounted directly to a
PC board: (a) top view of device showing location of 4 vias; (b) cross-section A–A
illustrating the copper plating in the vias.
†
Manufacturers of sheet material often use the term thermal impedance instead of resistance to denote
1/hc .
†
A via is a hole through the board, the interior wall of which has been plated with copper. It may or may
not connect different layers of copper foil. Vias may optionally be filled with copper or another material to
reduce thermal resistance.
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removed from a conventional finned sink by air flowing over the fins. A more sophisti-
cated system incorporating a heat exchanger probably uses a liquid to move the heat
from one place to another. These are convective processes. As mentioned earlier, the
physics governing these processes is beyond our scope here, However, a short discussion
of the application of finned sinks is helpful.
The critical issue in the application of finned sinks is to ensure that air flow through
the fins is turbulent rather than laminar. Laminar flow, as the name implies, is the flow
of a fluid in such a way that strata can be defined; that is, all flow is in one direction,
with no mixing of strata. Turbulent flow, on the other hand, causes considerable mixing.
Without such mixing, the particular stratum of fluid in contact with the fin would
remain in contact with it for its entire length, resulting in a very low value for the
film coefficient of heat transfer h, discussed in Section 25.1.1 Stated another way, the
boundary layer next to the fin surface remains intact in laminar flow, preventing efficient
heat transfer from the fin to the moving stream of air (or other fluid).
The transition between laminar and turbulent fluid flow is a function of many vari-
ables, however fin geometry and flow rate are the critical ones for our application. The
relationship among fin spacing, flow rate, and the onset of turbulence is given by the
Reynolds Number. A high Reynolds Number is characteristic of turbulent flow; a low
number is characteristic of laminar flow. The Reynolds Number Re for a fluid flowing
at velocity ν through a channel of width w is
ρνw
Re =
η
where ρ is the fluid density, and η is its coefficient of viscosity. This expression shows
that fluid flowing in a wider channel will enter the turbulent flow regime at a lower
velocity than that through a narrower channel. The point here is that, like thermal
compound, more is not necessarily better. Because of reduced turbulence and flow
rate, many closely spaced fins and a large surface area could result in poorer thermal
performance than fewer, but more widely spaced fins and a smaller surface area.
Although we have been using the context of semiconductor heat sinks for this discus-
sion, it is equally appropriate to the cooling geometry associated with other components.
Closely spaced parts impede proper convective flow for the same reasons that too closely
spaced fins do.
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than predicted by static thermal models. Essentially, the heat capacity of components
or their constituent parts creates a low-pass filter, which in the limit of small bandwidth
only responds to the dc in pdiss (t).
Heat capacity is a measure of the energy required to raise the temperature of a mass
by a specific amount. In SI units, it is specifically the energy in joules required to raise
one kilogram of the material one centigrade degree, and has the units /◦ C-kg. Water has
one of the largest thermal capacities of any fluid at room temperature: 4.2 × 103 J/◦ C-
kg. Masses in a thermal system, then, constitute thermal energy storage devices, and
thermal systems containing mass will exhibit dynamic behavior.
It is important to note that in order to properly represent the physics of the situation,
thermal capacitances in a system model should always be connected to “ground”, that
is, a reference temperature.
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Figure 25.6 (a) A simple thermal system consisting of a mass at temperature T1 being supplied
heat Q and in contact with a sink at temperature TS . (b) A single -ump dynamic
model for the system shown in (a). (c) A step in thermal power exciting the thermal
system of (a). (d) The temperature response of node T1 to the excitation of (c).
(a) (b)
Figure 25.7 (a) The thermal system of Fig. 25.6(a) divided into five “lumps.” (b) The lumped
electrical analog model for the thermal system of (a).
been constructed so that the node voltages represent the section temperature aggregated
at the interface. The number of lumps that should be chosen to represent a system
depends not only on the spatial resolution of interest but on the bandwidth of the
behavior being modeled. For instance, if Q is constant, no dynamics are excited, the
bandwidth of the behavior is small, and a one-lump static model is adequate. However,
if Q varies with time at a rate much greater than (Rθ C)−1 for the segments of Fig. 25.7,
more lumps would be needed to accurately model the behavior of the system.
The device and package structure of Fig. 25.3 contains several thermal masses that
contribute dynamics to its thermal behavior. These dynamics are important when the
device is forced to dissipate high levels of power for short periods of time. “Short” is rel-
ative to the Rθ C time constant of the structure’s electrical model. For very short pulses,
the mass of the silicon is most important in determining the excursion of the junction
temperature Tj . As the pulse gets longer, the mass of the header and then the heat sink
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1
Junction To Case Impedance, ZthJC (oC/W)
0.5
0.3
0.1
100E-3
0.05
0.02
D = 0.01
10E-3 Single Pulse
1E-3
1E-6 10E-6 100E-6 1E-3 10E-3 100E-3 1 10
Time, tp (s)
Figure 25.8 Transient thermal impedance, Zθ (t), parametric in duty ratio and functions of pulse
width tp , for a 1200 V, 32 A Wolfspeed C3M0075120D SiC MOSFET in a TO-247
package. (Used with permission of Wolfspeed, Inc.)
The Wolfspeed C3M0075120D SiC MOSFET rated at VD = 1200 V and Tj = 175◦ C, whose
transient thermal impedance characteristics are shown in Fig. 25.8, is used in an 800 V clamped
inductive switching application. We consider an example in which it is subjected to repetitive 35 A
current pulses with a duty ratio of 0.1 at a frequency of 10 kHz. The gate is driven between -4 V
and +15 V. It has already been determined that the device will remain within its safe operating
area (SOA). We want to determine the maximum allowable heat sink thermal resistance, RθSA ,
to maintain the junction at a conservative temperature of 125◦ C for an ambient temperature of
40◦ C.
The device dissipation has two parts: on-state and switching losses. Since they occur at different
times during the pulse and are each short compared to a thermal time constant, they can be
treated independently and their results added.
2
Energy is lost during the on-state at a power of RDS(on) IDS . But RDS(on) is a function of both
junction temperature and drain current, so we must consult Fig. 25.9(a) which is taken from
the device data sheet. The figure shows RDS(on) at IDS = 35 A at Tj = 175◦ C and 25◦ C. We
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interpolate RDS(on) to a value of 121 mΩ at Tj = 125◦ C. The on-state power during a pulse is
then
The switching loss is determined from the loss vs IDS curves using the data sheet graphs
shown in Fig. 25.9(b). Switching loss is not a strong function of temperature, so the measurement
condition of Tj = 25◦ C instead of 125◦ C is relatively immaterial. The Etotal curve at IDS = 35 A
gives Etotal ≈ 2 mJ/cycle. Since the switching times are on the order of 10’s of ns for this device,
the instantaneous switching power is very high, though the average power loss associated with
switching is not.
180 3.0
Conditions: Conditions:
VGS = 15 V TJ = 25 °C
160 ETotal
tp < 200 µs VDD = 800 V
2.5
RG(ext) = 0 Ω
140 TJ = 175 °C VGS = -4V/+15 V
On Resistance, RDS On (mOhms)
FWD = C3M0075120D
120 2.0 L = 157 μH
EOn
40 EOff
0.5
20
0 0.0
0 10 20 30 40 50 60 0 5 10 15 20 25 30 35 40 45
Drain-Source Current, IDS (A) Drain to Source Current, IDS (A)
(a) (b)
Figure 25.9 Specifications for the C3M0075120D SiC MOSFET: (a) RDS(on) vs. temperature and
IDS ; (b) switching loss vs. IDS . (Used with permission of Wolfspeed, Inc.)
The transient thermal impedance Zθ presented to the 10 µs, 0.1 duty ratio current pulses is
given by Fig. 25.8 as approximately 0.12◦ C/W. But Zθ for the very short (10’s of ns) pulses of
power during switching is not available from Fig. 25.8. The time scale of these switching power
pulses is extremely short compared to both the available time constants of the system and of
the on-state power pulses. We can estimate temperature rise by including the switching energy
with the longer time scale of the on-state power pulses (as the on-state pulses are still very short
compared to the known system time constants). Distributed over the ton = 10 µs duration of the
conduction period, the switching energy provides an additional equivalent on-state power of
Therefore we use Zθjc and Pon + Psw,equiv to determine the maximum TC allowed to maintain
Tj < 125◦ C:
The thermal power transferred through the case to ambient includes both the conduction and
switching loss. Since the case is thermally massive, it is considered an isotherm; and therefore
we use the average total power to be dissipated to determine RθCA . The average on-state loss is
⟨Pon + Psw,equiv ⟩ = 0.1 × 348 = 34.8 W. Using ∆TCA = 83.2 − 40 = 43.2◦ C, we can now calculate
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140 100.00 a
Conditions: d
TJ ≤ 175 °C
120 Limited by RDS On
Maximum Dissipated Power, Ptot (W)
1 µs
10.00
Drain-Source Current, IDS (A)
100 c 10 µs
80 100 µs
1.00
60 1 ms
40 100 ms
0.10
20
Conditions: b
TC = 25 °C
D=0
0 0.01
-50 -25 0 25 50 75 100 125 150 175 0.1 1 10 18.6 100 1000
Case Temperature, TC (°C) Drain-Source Voltage, VDS (V)
(a) (b)
Figure 25.10 SiC MOSFET C3M0075120D specifications: (a) maximum power dissipation derating
curve; (b) the safe operating area, where the dashed line defines the boundary for a 100
µs pulse at TC = 100o C. (Used with permission of Wolfspeed, Inc.)
The maximum voltage and current constraints of the SOA are unchanged, as is the line con-
strained by RDS(on) . We need to determine new coordinates for the constant power constraints
for the various pulse widths, at our application TC = TCa , using the transient thermal impedance
curves. The coordinates are scaled by δp , the ratio of P (Tca ), the maximum permissible average
dissipation at TCa , to P (25◦ ), the allowable dissipation at TC = 25◦ C, numbers obtained from
Fig. 25.10(a).
We calculate the maximum allowable dissipation for our pulse if Tj = 175◦ C and TC = 25◦ C,
and scale it by the ratio δp to obtain Pp (TCa ), the maximum pulsed power. This allowable
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dissipation at TCa then allows us to calculate new VDS − Id coordinates on the SOA graph for
our application case temperature and pulse width.
We illustrate the process by derating the iso-power line in Fig 25.10(b) for a 100 µs pulse at
Tca = 100◦ C. Figure 25.10(a) gives us P (25◦ ) = 136 W, P (100◦ ) = 68 W, and δp = 0.5. From
Fig. 25.8 for a single 100 µs pulse, we estimate Zθ = 0.06◦ C/W which we use to calculate Pp (25◦ ),
the 100 µs pulse power if TC = 25◦ C and Tj = 175◦ C, which we scale by δp to give us Pp (100◦ ).
175 − 25
Pp (25◦ ) = = 2917 W (25.13)
0.06
◦ ◦
Pp (100 ) = Pp (25 ) × δp = 1488 W (25.14)
We can now calculate a pair of coordinates on the iso-power limit line for a 100 µs pulse with
TC = 100◦ C. Choosing ID = 80 A (the maximum specified pulse current),
Pp (100◦ ) 1488
VDS = = = 18.6 V (25.15)
ID 80
We now have one point on the line, but the line is iso-power with a slope of -1 so we can draw
the new constraint on the SOA graph, as indicated by the dashed line in Fig. 25.10(b).
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6. Texas Instruments, ANM-2020 Thermal Design By Insight, Not Hindsight, Application Report
SNVA419C-April 2010- Revised April 2013.
PROBLEMS
25.1 A double-insulated window is made of panes of glass 4 mm thick spaced 1 cm apart. Window
glass has approximately the same thermal resistivity as SiO2 , 100◦ C-cm/ W. If the interior
temperature of the building is 25◦ C and the outside temperature is 0◦ C, what is the rate of
heat lost by conduction in kW/m2 ?
25.2 The CRC Handbook of Chemistry and Physics (35th ed.) defines thermal conductivity of mate-
rials as “the quantity of heat in calories which is transmitted per second through a plate 1 cm
thick across an area of 1 cm2 when the temperature difference is 1◦ C.” The value for dry compact
snow is 0.00051. What is the thermal resistivity of dry compact snow in units of ◦ C-cm / W?
25.3 An isolating interface of alumina having a thickness of 1 mm is placed between the device
package and the heat sink in Fig. 25.3 (Example 25.2). What is the junction temperature Tj ,
if other parameters of the example remain unchanged?
25.4 Figure 25.11 shows two identical devices, Q1 and Q2 , mounted on a common heat sink.
The devices are in TO-220 packages and have a thermal resistance from junction to case of
RθjC = 1.2◦ C/ W. The interface between the case and sink has a thermal resistance of RθCS =
0.20◦ C/ W, and the thermal resistance between the sink and ambient is RθSA = 0.8◦ C/ W.
(a) Draw the static thermal model for the thermal system of Fig. 25.11.
(b) If the devices are dissipating the same power, and TA = 40◦ C, what is the maximum total
power that can be dissipated if Tj(max) = 150◦ C?
(c) What is the maximum possible power dissipated if only one of the devices is operating?
Figure 25.11 Two devices mounted on a common heat sink analyzed in Problem 25.4
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Problems 851
terminals that are assumed to be at temperature TA . Heat is generated at the junction of the
diode, which is planar and centered between the two surfaces.
(a) Draw the analog circuit model for the thermal system of Fig. 25.12.
(b) If the maximum permissible junction temperature of the diode is Tj = 225◦ C, what is the
maximum permissible dissipation for TA = 75◦ C?
Figure 25.12 The axial lead packaged diode analyzed in Problem 25.6.
25.7 A superjunction MOSFET in a TO-247 package is mounted to a heatsink with a 0.5 mm thick
silicone pad as the interface. The thermal contact area of a TO-247 package is 2.5 cm2 .
(a) At the mounting pressure of 10 psi the pad has a thermal impedance, Zth , of 0.6◦ C-cm2 /W.
What is RθCS , the case to sink thermal resistance?
(b) The junction to case thermal resistance of the MOSFET is RθjC = 0.3◦ C/W and at a
junction temperature Tj of 150◦ C its on-state resistance, RDS(on) = 40 mΩ. If the heatsink
temperature can be maintained at 50◦ C, what is the maximum continuous current that
the device can conduct?
25.8 What is Tf in Fig. 25.6(d)?
25.9 The SiC MOSFET characterized by the transient thermal impedance curves of Fig. 25.8 is
subjected to an overload condition that is cleared by a protection circuit in 3 µs. The MOSFET
had been operating at a junction temperature of Tj = 150◦ C. How much energy can the device
be allowed to dissipate during the fault to maintain Tj ≤ 200◦ C?
25.10 Consider the “single pulse” thermal response of a system ( e.g., as illustrated in Fig. 25.8). This
response Z θ (t) is in fact the thermal step response of the system. That is, Z θ (t) represents the
temperature rise response over time to a unit step in input power at t = 0.
(a) Show that if one can treat the dynamic thermal system as a linear, time-invariant (LTI)
system (e.g., the circuit elements in the model of Fig. 25.6(b) are LTI), then we can write
the temperature response to a short pulse in power of amplitude P starting at t = 0 and
having duration t1 as:
∆TjC = P [Zθ (t) − Zθ (t − t1 )]
(b) For the same LTI system assumption, what would be the temperature rise response to a
sequence of two pulses of amplitude P, each of duration t1, one starting at t = 0 and the
second starting at t = t2 (> t1 )?
25.11 Using the CREE SiC SOA of Fig. 25.10(b), determine the derated limiting boundary for a 1 ms
pulse if the case temperature is 125◦ C. What is the maximum allowable ID ?
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