Lab 6 – State machine basics

In this lab, you will

• build a sequential circuit on a breadboard using D-flip flops.
• be introduced to debouncing circuit and their use in a single pulse generator push-
button switch
• experimentally derive the state diagram and state table of the sequential circuit.
• minimize the implementation and verify its equivalent operation.

Prelab (must be completed before coming to the lab)

1. Why do we need to debounce?

2. How are Schmitt triggers different from buffers?

3. What is the formula for calculating the charge time of an RC circuit?

Sequential Circuit Description
The following sequential circuit has one input, X, one output Y, and consists of two D flip-
flops for four possible states defined by A and B.

D A

D B

X B

CLK

Figure 6.1: Sequential circuit with an input, an output and two DFFs

To understand the operation of this sequential circuit, we need to obtain the flip-flop
and output equations, from which the state transition table and diagram of the circuit
can be derived.
The Flip-flop input equations:
𝑫𝑨 = 𝑩
𝑫𝑩 = 𝑨 ⊕ 𝑩 ⊕ 𝑿
Output equation
𝒀 = 𝑫𝑩
For D flip-flop, the next state is the same as the D flip-flop input, and hence we have
𝑨(𝒕 + 𝟏) = 𝑫𝑨
𝑩(𝒕 + 𝟏) = 𝑫𝑩
State transition table:
Present state Next state Output
X =0 X =1 X=0 X=1
AB AB AB
00 01 00 0 1
01 10 11 1 0
11 11 10 0 1
10 00 01 1 0
Table 6.1: State transition table for the sequential circuit in Figure 6.1

State diagram:

Figure 6.2: State diagram for the sequential circuit in Figure 6.1.

Can you predict what the sequential circuit does from the state diagram?

Implementing the above sequential circuit using ICs

The sequential circuit will be constructed using one 7474 Dual D-flip-flop ICs, a 7486
Quad XOR Gate IC, and a 7400 Quad NAND gate. The D-flip-flop comes with active-low
preset and clear pins, which will be used to initialise the state of the register.
Referring to the datasheets for the 7474, 7486, and 7400 (supplied on Moodle), build the
sequential circuit shown in Figure 6.1 on your breadboard. In order to observe the states
of the D-flip flops and the output of the circuit, you need to connect LEDs at A, B and Y
nodes (in Figure 6.1) of the circuit. The input at X, and the PRESET pins of the D-flip flops
are set using slide switches.

In the implementation, we will use a push-button switch ( a pulser) as a pulse generator

to act as a clock to drive the sequential circuit. You have been provided with a push-
button switch inside your laboratory kit. The schematic representation of the push-
button switch is shown below

Side View Top View

Figure 6.3: Schematic illustration of a push-button switch

Take notice that the push-button switch is not round all the way around its base. There is
a flattened side; this flattened side must run parallel to the buses on your breadboard,
otherwise the switch will not work! Use a resistor in combination with the push-button
switch in a similar manner as the slide switches are used in the previous lab (refer to
Figure 5.4).
When push button switches are used as a pulser, it is important to make sure that a single
pulse is generated whenever the button is pressed and released. The common problem
with push-button switch is that the contacts inside the switch bounce off one another,
causing multiple pulses to be generated every time the button is pushed. The following
diagram illustrates the situation:
 Voltage
5v
High (Logic 1)

Undefined

Low (Logic 0)
0v

Button Button Time

Pressed Released

Logic Input
HIGH

LOW
Time

Figure 6.4: Waveform illustrating the problem with a push-button switch

A debounce circuit is used to eliminate the extra pulses due to the bouncing of the contacts
in the push-button switch. The circuit below shows such a debounce circuit. This circuit
comprises of a resistor-capacitor based (RC) filter and a Schmitt trigger buffer. The buffer
is required to isolate the filter circuit from the inputs to the gates. If the buffer is not
present, the filter capacitance adds with the input capacitance of all the gates. This
capacitance is too large to charge/discharge and as a result the clock does not work.
 Vcc

R1
Input to IC

R2 C

Ground

Figure 6.5: A push button switch with a debouncing circuit

RC Filter

The RC filter works by introducing a delay. The delay is achieved through the
charge/discharge time of the capacitor. While charging/discharging, the input voltage
level does not swing past the logic voltage threshold on the short pulses produced by the
bouncing of contacts.

Schmitt Trigger

The Schmitt Trigger is a type of circuit that asserts its output high when its input exceeds
a particular threshold value. The output will be asserted low only when a second, lower
threshold level is reached. Schmitt triggers employ hysteresis in order to accommodate
several transition conditions. The operation of the Schmitt trigger is best described with
the diagram below which shows the input vs. output for a non-inverting Schmitt trigger.
The arrows indicate the transition direction.
 5
Output (v)
(V) 2.5

2.5 5 Input (v)

Figure 6.6: Hysteresis characteristics of Schmitt triggers

Schmitt triggers are commonly used in debouncing circuits because the hysteresis
prevents transitional changes unless the lower or upper thresholds are reached. Thus,
the effects of switching noise are greatly reduced. The symbol for the Schmitt trigger is
given below. Schmitt triggers come in both non-inverting (left) and inverting (right) types.

Figure 6.7: Schmitt trigger types (a) non-inverting (left), (b) inverting (right)

Exercise: Debounce Circuit

Construct the debounce circuit in Figure 6.5 for your push-button switch. Use R1 = 680Ω,
R2 = 10kΩ and C = 1µF (notice that R2 is, in fact, already connected as your switch’s pull-
down resistor). Also use 7414 IC (Data sheet given in Appendix C), which has six inverting
Schmitt triggers. What is the charge time of this circuit? Can you suggest a method to
determine the minimum charge time required to absorb the bouncing effect of the switch?
What might happen if we made the charge time very long? What about if we made it very
short?

Verifying the sequential circuit as implemented on the breadboard

Collect all the PRESET lines from each of your flip-flop and wire them to the output of
one of the slide-switches. Also, connect the input X to another slide-switch. Likewise,
collect all the CLOCK lines from each of your flip-flops and connect them to the push-
button. Last, collect all the CLEAR lines and connect them to Vcc.
Make sure the CLOCK push-button is not pressed (i.e. the CLOCK signal is LOW). Initialise
the circuit by applying the active-low PRESET signal: set the PRESET switch to LOW and
then back to HIGH. Leave the switch in the HIGH position. What is the present state of the
sequential circuit?
First switch the input to LOW position. Now toggle the CLOCK by pressing and releasing
the push-button. A toggle on this button applies a clock signal to the flip-flop. What state
does the sequential circuit transit to and what is the output of the circuit? Record the next
state and output into Table 6.2 provided below.
Keep toggling the clock by pressing and releasing the push-button switch until you return
to the initial state.
Present state Next state Output (Y)
X =0 X =1 X=0 X=1
AB AB AB
00
01
11
10
Table 6.2: Experimental state transition table
Now switch the input to HIGH position and toggle the clock. Record the next state and
output into Table 6.2. If the state does not change, switch the input to LOW position and
toggle the clock and record the next state and output into Table 6.2
Repeat the above procedure until you fill the table.
Once the table is filled, compare it with the state transition table presented in Table 6.1.
Is the comparison as you expect?
Starting from state 11, obtain the output sequence for the input sequence given Table 6.3.
Measure the output signal before the clock edge, ie. in the current state.
Input sequence Output sequence
0101000010
Table 6.3: Output sequence
Demonstrate it to a lab demonstrator after you have verified your design.
Is the implementation optimal? Can it be minimised? If so, draw the minimised circuit
and verify its equivalence to the sequential circuit shown in Figure 6.1.
Checkpoint 6 Assessor Marks (5) Date

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