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Unit 3

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Akshada Ghorpade
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19 views29 pages

Unit 3

Hand written notes

Uploaded by

Akshada Ghorpade
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Latching circuits

• Latching relay is convenient for keeping the status of an execution condition


even if the condition is subsequently removed. The program elements that
are assigned as Latching Relays will remain ON once they are energized.
Only Relays and Outputs may be assigned as Latching Relays.
• On selecting [Latch] function, you can use the left/right cursor keys or click
on the left/right arrow keys to move between the Relay and Output tables.
The selected relay or output will now be assigned as a Latching Relay. You
will be able to see the label name of the program element above the [Latch]
symbol in the ladder diagram.
• Although latch-relay can be used in place of self-latching (Seal) circuits, a
latch-relay in an interlock section will not be cleared when the interlock
occurs. Only a self-latching circuit as shown in the following will be cleared
in an interlock section:
• Timers are very important in ladder logic
programming. Timers gives the precision
in time. Timer on delay starts timing when
instruction is true. Timers are used to track
time when instruction are on or off. They
could also keep track on a retentive base.

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