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Edc Unit-3

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95 views43 pages

Edc Unit-3

Uploaded by

Rakesh Sharma.M
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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UNIT IV

MULTISTAGE AMPLIFIERS AND DIFFERENTIAL AMPLIFIER


CASCODE amplifier, Differential amplifier – Common mode and Difference mode analysis –
MOSFET input stages – tuned amplifiers – Gain and frequency response – Neutralization
methods.

2 Marks Q&A

1. What is a differential amplifier?


An amplifier, which is designed to give the difference between
two input signals, is called the differential amplifier.

2. What is the function of a differential amplifier?


The function of a differential amplifier is to amplify the difference of two signal inputs,
i.e.,𝑉0 = 𝐴𝐷 (𝑉1 − 𝑉2 ), where AD is the differential gain.

3. When two signals V1 and V2 are connected to the two inputs of a difference amplifier,
define a difference signal Vd and common-mode signal Vc
The difference signal Vd is defined as the difference of the two signal inputs,
i.e., Vd=V1–V2

The common-mode signal Vcis defined as the average of the two signals,
I.e., Vc=(V1+V2)

4. What is the differential-mode voltage gain of a differential amplifier?


It is given by
1
𝐴𝑑 = (𝐴1 − 𝐴2 )
2

5. Define CMRR what its ideal value How to improve it. (Nov/Dec2015,2020),
(May/June2016) (May 2017)
The common-mode rejection ratio (CMRR) of a differential amplifier is defined as the ratio
of the differential-mode gain to common-mode gain.
|Ad|
CMRR =
|Ac|

Ideal value of CMRR is Infinite.


To improve CMRR the following circuits are used

1
i) Current mirror circuit ii) Temperature compensation. iii) Differential amplifier with
constant current bias.

6. What are the ideal values of Ad and Ac with reference to the differential amplifier?
Ideally Ac should be zero and Ad should be large, ideally infinite.

7. Express CMRR in dB.

CMRR (dB)=20logAd–20logAc.

8. What are advantages of differential amplifier?


It has high gain and high CMRR.

9. List some applications of differential amplifiers?


Used in IC applications, AGC circuits and phase inverters.

10. Define tuned amplifier. (Apr/ May 2010)


What is the basic principle behind tuned amplifier? [May 2019]
The tuned circuit is capable of amplifying a signal over a narrow band of frequencies centered of frequency. The
amplifiers with such a tuned circuit as a load are known as tuned amplifier.

11. What are the advantages and disadvantages of tuned amplifier? (May
2012)Advantages:
 It amplifies defined frequency
 Signal to noise ratio at output is good.
 Suited for radio transmitter and receiver.
Disadvantages:
 Circuit is bulky and costly.
 Design is complex.
 Not suited for amplifying audio frequencies

12. Give the expression for resonance frequency and impedance of the tuned
1
circuit.Resonance freq (fr) =
2 LC
Impedance (Zr) = L / CR
13. What are the various types of tuned amplifiers? (NOV 2013)
Types of tuned amplifier are
(1)Small signal tuned amplifiers
a. Single tuned amplifiers
(i) Capacitive coupled
(ii) Inductively coupled (or) Transformer coupled
b. Double tuned amplifiers
c. Stagger tuned amplifiers
(2) Large signal tuned amplifiers

2
14. What are the various components of coil losses? (May 2015)
The various components of coil losses are copper loss, eddy current loss and hysteresis loss.

15. Brief the relation between bandwidth and Q factor. (May/June 2007)
Bandwidth = resonant frequency/ Quality factor (BW = fr / Q)Where,
BW- Bandwidth, fr – Resonant frequency, Q – Quality factorWhen Q
value increases, bandwidth will be decreased.

16. A tuned circuit has resonant frequency of 1600 KHz and bandwidth of 10 KHz. What is the value
of its Q-factor? (May/June 2012, April 2017)
Given: Frequency (fr) =1600KHz, Bandwidth(BW)=10KHz
Solution: To find Q-factor
Q-factor (Q) = fr / BW = 1600 KHZ/ 10 KHZ = 160

17. A tuned amplifier is designed to receive AM broadcast of speech signal at 650 KHz. What is
needed Q factor for amplifier? (Nov 2009)
Given: Frequency (fr) =650KHz
Solution: To find Q-factor
For AM broadcast speech signal =3KHz; Bandwidth(BW)=2 fm= 2*3KHz = 6KHz
Q-factor (Q) = fr / BW = 650 KHZ/ 6 KHZ = 108.33

18. A tuned amplifier has its maximum gain at a frequency of 2 MHz and has a bandwidth of 50 kHz.
Calculate the Q-factor.(Nov/Dec 2006)
Given:
Frequency (fr) =1600KHz, Bandwidth(BW)=10KHz
Solution: To find Q-factor
Q-factor(Q) = fr / BW = 2 MHz / 50 KHZ = 40

19. Why quality factor is kept as high as possible in tuned circuit?


What is the effect of Q on the resonance circuit? (May 2016)
When quality factor (Q) is high, inductor losses are less.
When Q is high, bandwidth is low and better selectivity.

20. Why tuned amplifier cannot be used at low frequency?


For low frequency, the size of inductor (L) and capacitor(C) is large. So the circuit will be bulky and
expensive, hence the tuned amplifier cannot be used at low frequency.

21. State the difference between unloaded and loaded Q-factor. (May 2019)
Define unloaded and loaded Q-factor. (Nov/ Dec 2010) (May 2010, May 2015) (NOV 2019)
Unloaded Q: When the tank circuit is not connected to any external circuit or load, Q accounts for the
internal losses.
Loaded Q: When the tank circuit is connected to any external circuit or load. Energy dissipation takes
place in the tank circuit as well as in the external load.

22. What are the characteristics of an ideal tuned amplifier?


The characteristics of an ideal tuned amplifier are
 Select and amplify the single radio frequency by rejecting all other frequencies.
 Zero bandwidth.
 Zero harmonic distortion.

2
23. Draw the Actual & Ideal response of tuned amplifier.(May/June 2009, May 2016)
Response of single tuned amplifier:

24. Derive the resonance frequency for the tank circuit. (Nov/Dec 2006)

At Resonance
XL = XC
L = 1/C
2fL = 1/2fC
f2 = 1/42LC
Resonance
frequency(fr)
fr = 1/2LC

25. A parallel resonant circuit has an inductance if 150 µH and a capacitance of 100 pF, find the
resonant frequency. (Nov/Dec 2011) (May/June 2007)
Given: Inductance (L) = 150 µH and Capacitance(C) = 100 pF
Solution: Resonant frequency (fr)
fr = 1 = 1
2LC 2 150 x 10-6 x 100 x 10-12
= 1.3MHz.

26. Mention two applications of tuned amplifiers.(NOV 2008)(NOV 2019)


Applications of tuned amplifier:
 Used in Radio and TV transmitter and receiver.
 Used in base stations of Cellular and mobile Communications.
 Used Low-Noise Amplifiers in Cable and Satellite transmitter and receivers.
 Used in Military Communications.
 Used in Mixer circuit.

27. What is a single tuned amplifier?


A single tuned amplifier circuit that uses a single parallel tuned circuit as a load is called single tuned
amplifier.

28. Draw the circuit of a single tuned amplifier.


Circuit of a single tuned amplifier:

3
29. Draw the equivalent circuit of single tuned amplifier. (April/May 2015)
Equivalent circuit of a single tuned amplifier:

30. What are the drawbacks of a single tuned amplifier?


Drawbacks of a single tuned amplifier:
 Poor selectivity.
 The sides (and the top) of a gain versus frequency curve are not steeper.
 If a tuned amplifier is connected to a low resistance load, The Q decreases.

31. Write an expression for impedance of single tuned amplifier.


Expression for impedance (Z) of single tuned amplifier:
Rt
Z= ---------------------
1+jQe2δ
Where δ = Fractional frequency variation,
Qe= Effective Quality factor, Rt=Effective Resistance (Ro || Rp || Ri)

32. Write an expression for bandwidth of single tuned amplifier.


Expression for bandwidth of single tuned amplifier:
1
Bandwidth (BW) = , where C=Capacitance and Rt = Effective Resistance (Ro || Rp || Ri)
2 Rt C
3 dB bandwidth = fr/Qe

33. What is meant by double tuned amplifier?


The amplifier having two parallel resonant circuits in its load is called double tuned amplifier.

34. What is the use of transformer in tuned amplifier? (Nov 2017)


Transformer coupling is used in between the tuned amplifier stages. Transformer coupling provides
large bandwidth and good impedance matching.

35. Define gain bandwidth product of a tuned amplifier. (May/ June 2009)
The gain bandwidth (GBW) product is defined as product of mid band gain and upper 3-db frequency fh
as GBW = | Aim fh |= gm / 2πc

4
36. What are the advantages of double tuned amplifier? (Nov 2016)
 Posses flatter response having steeper sides
 Narrow bandwidth
 Provides larger 3dB bandwidth
 Provides large gain-bandwidth product.
 A greater selectivity
 Impedance matching with previous stage.

37. Draw the circuit diagram of a double tuned amplifier.(Nov/Dec 2003) (Apr 2014)
Circuit diagram of a double tuned amplifier:

Equivalent circuit of a double tuned amplifier is given below

38. Mention the bandwidth of a double tuned amplifier. (April 2018)


Bandwidth of a double tuned amplifier:
0
Bandwidth (2 - 1) = (b 2  1  2b)
Q
Where, o is the resonance frequency in cycle per sec.
Q is the Quality factor of the coil alone b is a constant.
39. Draw the frequency response of double tuned amplifier. (APR 2014)
Frequency response of double tuned amplifier:

5
40. What is a synchronously tuned amplifier?
When tuned amplifiers are cascaded, if all the amplifier stages are identical and tuned to same frequency
then it is called as synchronously tuned amplifier.
It results in overall bandwidth lower than that of a single-tuned circuit. But gain increases.

Block diagram of cascaded synchronously tuned amplifier with N-stages


41. What are the differences between single tuned and synchronously tuned amplifiers?
(Nov/Dec 2007)
Differences between single tuned and synchronously tuned amplifiers:

Sl. Single tuned Synchronously tuned amplifier


No amplifier
1. It contains Several identical stages of tuned amplifiers
only one tuned are connected in cascade method and tuned to
circuit. the same frequency.
2. Bandwidth Bandwidth = BW 21/n – 1
(BW) is high Bandwidth is lower than single stage.
Where n = Number of identical stages.

42. What is the effect of cascading n stages of identical single tuned amplifiers (synchronously tuned)
on the overall 3 dB bandwidth? (Apr/ May 2011)

Bandwidth (B) is given below

It results in overall bandwidth lower than that of a single-tuned circuit. But gain increases.

43. Determine the bandwidth of a 3 stage cascaded single tuned amplifier if the resonant
frequency is 455 KHz and the loaded Q of each stage is 10.(Apr /May 2004)Given:
resonant frequency (fr) = 455KHz, Q-factor = 10, No. of stages = 3
Solution: To find bandwidth (B), ω0 =2πfr

2  3.14  455 103 1/3


B 2  1 =142KHz
10

44. What is a stagger tuned amplifier? (Nov/Dec 2011)


Stagger tuned amplifier is a circuit in which two single tuned amplifiers are cascaded. Their
resonant frequencies are adjusted that are separated by an amount equal to the bandwidth
of each stage.
Since resonant frequencies are displaced or staggered, it is called stagger tuned amplifier.

45. Mention two important features of Stagger tuned Amplifier.(May/June 2013)


Features of Stagger tuned Amplifier:
i. Overall response shows maximal flatness around the centre frequency.
ii. The overall frequency response is obtained by adding the individual response together.
6
46. Mention the need for stagger- tuned amplifier.
The double tuned amplifier gives greater 3db bandwidth having steeper sides and flat top.
But alignment of double tuned amplifier is difficult. To overcome this problem stagger- tuned amplifier
is needed.

47. What the advantages and disadvantage are of stagger tuned amplifier?
Advantages of stagger tuned amplifier
 Better selectivity.
 It provides better pass-band filter.
 Bandwidth is improved.
Disadvantages:
 Critical tuning.
 All IF Amplifiers in super-heterodyne Receivers are double tuned amplifiers and are stagger
tuned.

48. What is the effect of cascading n stages of identical single tuned amplifiers on the overall 3 dB
bandwidth? (April 2011)
Bandwidth reduces for n stages of identical single tuned amplifiers

For Double tuned amplifier narrow band is obtained.

49. Mention the applications of class C tuned amplifier.


Applications of class C tuned amplifier:
Class C tuned amplifier is used in radio receivers.
It is used in mixer circuits or frequency converter.

50. What is neutralization? (Apr/May 2008, Nov.2015, May 2014) [May 2021]
What is narrow band Neutralization? (May 2011, Nov/Dec 2012)
The technique used for the elimination of potential oscillations.
The effect of collector to base capacitance of the transistor is neutralized by introducing a signal that
cancels the signal coupled through collector base capacitance. The process is called neutralization.
51. Why instability occurs?

The circuit shows inner electrode capacitance of BJT. A short circuit


on collector to base junction forms a feedback effect from the output
(collector) to the input (base).
If the feedback is negative, the gain of the amplifier may get reduce.
If the feedback is positive, then the amplifier starts to oscillate, which
make it highly unstable.

52. List the reasons for instability of Tuned Amplifiers.


 Due to undesirable oscillations
 'Miller effect’ due to capacitance Cμ in Transistor Amplifier circuits causes alignment and tuning
problems.

7
53. Draw the circuit for narrow band Neutralization.
Indicate how coil neutralization technique is achieved in tuned amplifiers.
(Nov/Dec 2010)(Nov/Dec 2009)(Nov/Dec 2008) (Apr/May 2004)
Neutralization is used in tuned amplifier to neutralize the effect of inner base capacitance of the
transistor without losing the circuit performance like gain, stability, detuning, Q factor.

54. What is the need for neutralization circuits?(Nov 2009, May 2013, May 2014)
In tuned RF amplifiers, the interjunction capacitance Cb’c of the transistor becomes dominant and its
reactance is low. So, it provides the positive feedback from output to input.
Then the amplifier starts to oscillate, thus stability of amplifier gets affected. Hence neutralization is
employed for elimination of potential oscillations.

55. What are the different types of neutralization?


Hezeltine neutralization
Neutrodyne neutralization----- Rice, coil neutralization
Uni laterilisation
Mismatch techniques

56. What is principle of Hazeltine neutralization?


Hazeltine neutralization is introducing a signal which cancels the signal coupled through the collector to
base capacitance.
57. An inductor of 250 µH has Q = 300 at 1 MHz. Determine Rs and Rp of inductor.(Nov 2012, April
2017)
Given: Inductor (L) =250 µH, Qfactor =300 & Resonant frequency (fr) =1MHz
Solution:
Parallel resistance of inductor (Rp) = 0 . LQ
= 2 x 1 MHz x 250 x 10-6 x 300; Rp = 471.24 k
Series resistance of inductor (Rs) = (0 . L)/Q = 5.235

58. If the resonant frequency and the effective loaded Q of a single tuned amplifier are 600 kHz and
10 respectively, calculate the bandwidth of a 3 stage cascaded.
Given: Resonant frequency fo= 600KHz & Q-factor=10
Solution: Bandwidth (BW)
BW = f0 = 600 x 103 = 60 kHz
Q 10
3 dB bandwidth (BW3 ) = BW x  2 1/3 – 1 = 60 x103 x 0.509 = 30.589 kHz

8
3.1 CASCODE AMPLIFIER
Explain the working of cascode amplifier with circuit diagram(AU - Nov/Dec 2014)

Cascode Amplifier consists of common Emitter stage in series with a


common Emitter stage in sources with a common base Amplifier stage. Cascode
Amplifier resolves low impedance problem of common base circuit. Q1 acts as
CE Amplifier while Q2 acts as CB output stage.

Features (AU - April/May 2005)

1. It provides high Input impedance

2. It provides high voltage gain

3. It provides high output resistance

4. It provides high slew rate and high stability

Advantages of Cascode Amplifier

1. Eliminates miller effect and

2. Provides much Bandwidth

Disadvantages of Cascode Amplifier

1. Requires two transistors and high supply voltage.


Analysis of Cascode Amplifer
Let Vbe1 =Vs

At Node E2, by KCL equation

C2
CB R1
V0
Q2 Q2 V0
RL

R2 Q1
RC RL
Q1 R2||R 3
VS
C1
VS R3
RE CE

Figure 2.37 CE CB Cascode Amplifier (b) AC Equivalent circuit

gm2vbe2
B1 C1 E2 C2 V0

+ vbe1 vbe2 vbe2


VS R2 || R3 rbe1 gm1 Vbe1 rbe2 RC RL

E1 B2

Figure 2.38 Small signal Equivalent circuit CE-CB Cascade

Vbe 2
gm2 Vbe 2  = gm1Vbe1
rbe 2

Vbe 2
gm2 Vbe 2  = gm1Vs (Vbe = Vs)
rbe 2

gm2 Vbe 2 rbe 2  Vbe 2


gm1Vs =
rbe 2

Vbe 2  gm 2 rbe 2  1
=
rbe 2
We know that B = gm, Vbe, then

Vbe 2 1   2 
gm1 vs =
rbe 2

rbe 2
 Vbe 2   gm1 vs  ... (1)
1  2

The output voltage v0 is expressed as follows

V0 =   gm2 Vbe 2   RC RL  ... (2)

Substitute Equ (2.104) in Equ (2.105)

 r 
V0 =  gm2  be 2   gm1 vs    RC RL 
 1  2 

 gm2 rbe 2 
=  gm1    RC RL 
 1  2 

From Equ gm2 rbe2 =  2 so

 2 
v0   gm1    RC RL  ... (3)
 1  2 
2. Explain the common mode and differential mode operation of the differential
amplifier . (Nov/Dec 2020) (Or) With neat circuit diagram and relevent
equations, explain the working of a differential amplifier. Also derive the
expression for single ended AC voltage gain of the circuit. (Nov/Dec 21)
(or)

Draw the circuit of emitter coupled BJT differential amplifier and derive the
expression for differentiall gain,common mode gain and CMRR(Nov/Dec-2019)
(May/June2016)

 DIFFERENTIAL AMPLIFIER BASIC BLOCK DIAGRAM:


 The differential amplifier amplifies the difference between two applied input
signals Vin1 and Vin2 (voltage signals). Hence, it is called as Difference
amplifier.

Fig: block diagram of differential amplifier


 In an ideal amplifier, the output voltage Vo is proportional to the difference between
the two input signals. Therefore we can write,
Vo α ( Vin1 - Vin2 ) …………………..(1)
 DIFFERENTIAL GAIN Ad:
 From the above equation, we can write the differential gain Ad is [ Generally gain is
nothing but the output parameter (may be voltage, current, etc.) to input parameter].
 Therefore, Vo = Ad ( Vin1 – Vin2 ) …………………(2)
Where Ad = Differential gain constant
 This Ad is thegain with which differential amplifier amplifies the difference between
two input signal is called Differential gain.

 Thus bandwidth,
16
 The difference between the two inputs (Vin1῀ Vin2) is generally called difference
voltage and denoted as Vd.
 fTehTe ofuoupouo voltage is Vo = Ad . Vd ……………(3)
 Therefore the differential gain can be expressed as,
𝑉𝑜
Ad = …………………(4)
𝑉𝑑

 COMMON MODE GAIN Ac:If we apply two input voltages which are equal in all the
respect to the differential amplifier i.e., V1 = V2 then, ideally the output voltage Vo is (V1῀
V2) .Ad , must be zero.
 In this mode the applied input signals, phase and frequency must be in same.
 But the output voltage of the practical differential amplifier not only depends on
the difference voltage but also depends on the average common level of the two
inputs.
 Such an average level of the two input signal is called common mode signal
which is denoted as Vc.
𝑉1+ 𝑉2
Vc = .........................(5)
2

 In practical, the differential amplifier produces the output voltage proportional to


each common mode signal. The gain which it amplifies the common mode signal
to produce the output is called common mode gain of the differential amplifier

denoted as Ac.
𝑉𝑜
Ac = 𝑉𝑐
…………………….(6)

 So that total output of any differential amplifier can be expressed as,


Vo = Ad .Vd + Ac .Vc ………………………(7)
 COMMON MODE REJECTION RATIO:
 In differential amplifier, if both transistors input the same, then that differential
amplifier is called as common mode differential amplifier.
 In common mode operation, the output is zero.
 But due to many disturbance in signals, noise signals appear as a common input
signal to both the input terminals of the differential amplifier.
 Such a common signal should be rejected by the differential amplifier(CMRR).
 Thus, the ability of a differential amplifier to reject a common mode signal is
expressed by a ratio called common mode rejection ratio.

17
 CMRR is defined as the ratio of the differential mode gain (Ad) to common
mode voltage gain (Ac).
|𝐴 |
CMRR = |𝐴𝑑| = ρ ………………..(8)
𝑐

 In ideal case the CMRR is infinite, because the common mode gain is nearly or
exactly zero. But in practical, it is not infinite.
 But ρ is very large one, since Ad is very large and Ac is very small. The CMRR
can be expressed in dB also.
|𝐴 |
CMRR in dB = 20 log |𝐴𝑑| dB …………..(9)
𝑐

 The total output voltage is,


Vo = Ad .Vd + Ac .Vc ……………………(10)
Where, Vo = Total output voltage of differential amplifier,
Ad = Differential mode gain of differential amplifier,
Ac = Common mode gain of differential amplifier,
Vd = Differential mode voltage.
 From equation (10), Vo can be written as,

Vo = Ad .Vd [ 1+ Ac .𝑉𝑐
Ad . 𝑉𝑑
] ………………..(11)
Vo = Ad .Vd [ 1+ 1 . 𝑉𝑉 ]…………………(12)
𝐴𝑑
𝑐
𝑑
𝐴𝑐

Vo = Ad .Vd [ 1+ 1
𝐶𝑀𝑅𝑅
𝑉
. 𝑉𝑐
𝑑
] ……………..(13)

 Therefore, from the above equation, the CMRR is practically very large, though
both Vc and Vc components are present.
 The output is proportional to the difference in signal only. Then the common
mode component is greatly rejected.
 EMITTER COUPLED DIFFERENTIAL AMPLIFIER(Apr/May-2019)
 The transistorized differential amplifier is an emitter and emitter follower
circuit. So this is called as Emitter coupled differential amplifier.

18
Figure(1): Emitter biased circuit
 Figure(1) shows the emitter coupled biased circuit. The transistor TQ1 and
TQ2used in the figure are identical in characteristics and also having exactly
matched characteristics.
 Then the two collector resistances RC1 and RC2 are equal while the two emitter
resistances RE1 and RE2 are also equal.
Therefore RC1 = RC2 and RE1= RE2
 In this the magnitude of VCC and -VEE are also same. Therefore the differential
amplifier can be obtained by using such two emitter biased circuits.
 This emitter biased circuit can be obtained by connecting the E1 of TQ1 with E2 of
TQ2.
 Because of this connection the RE1 is parallel with RE2.
 The applied input Vs1 is connected with base of TQ1 and Vs2 input is connected
with the base of TQ2.
 Both input voltages in Base is with respect to ground. Then its balanced output is
taken in between the respective collector terminals of both transistors (TQ1 and
TQ2).
 This amplifier is called Emitter coupled Differential Amplifier. In this circuit, the
two collector resistanceRC used are also same.
 Then the dual input differential balanced output differential amplifier is shown
below. Because, none of the output terminal is grounded, the output is taken
between two output terminals.
 So it is called as Balanced Differential Amplifier and it is shown in figure (2).

19
Figure (2): Balanced differential amplifier
 For studying the operation of differential amplifier, the following modes are used.
(i) Differential mode, and (ii) Common mode.
i) Differential mode operation:
 In this mode, both inputs are different in either magnitude or phase like 180ᵒ
phase. This opposite phase can be obtained from the Center tap Transformer.
 That is assume that the sine wave on the base of TQ1 is positive going while on
the base of TQ2 is negative going.
 With a positive going signal on the base of TQ1, if amplified, a negative going
signal develops and appears on the collector of TQ1.
 Due to positive going signal, current through RE also decrease and hence a
positive going current wave is developed across RE.
 Due to negative going signal on the base of TQ2, an amplified positive going
signal develops on the collector of TQ2 and anegative going signal develops
across RE, because of emitter follower action of TQ2.
 So. The signal voltage across RE due to effect of TQ1 and TQ2 are equal in
magnitude and 180ᵒ out of phase due to method pair of transistors.
 Hence these two signals cancel each other and there is no signal across the emitter
resistance.
 Hence there is no AC signal current flowing through the emitter resistance. Hence
RE in this case does not introduce negative feedback.

20
Figure (3): Differential mode
 While Vo is the output taken across collector of TQ1 and collector ofTQ2, the two
outputs on collector C1 and C2 are equal in magnitude but opposite in polarity.
 And Vo is the difference between these two signals. Hence, the different output Vo
is twice as large as the signal voltage from collector to ground.
ii) COMMON MODE OPERATION:
With a neat circuit ,outline the operation of a basic BJT differential pair
configuration,under common mode input signal. (Apr/May-2019,8 marks)

 In common mode the signals applied to the base of the both transistor TQ1 and
TQ2 are in same phase, frequency and also in magnitude.
 In phase signal voltages at the bases of q1 and q2 causes in phase signal vltages to
appear across re which add together.
 Hence re carries a signal current amplifier and provides a negative feedback.This
Feedback Reduces The Common Mode Gain amplifier.
 The two signal causes in phase signal voltages of equal magnititude to appear
across the two collector of Q1 and Q2.
 Now the output voltages is difference between the two collector voltages ,which
are equal and also same in phase(i.e zero).Thus the difference output Vo is
almost zero.

21
Figure (4): common mode

 Hence RE causes a signal current and provides negative feedback.


 This feedback reduces the common mode gain of differential amplifier.
3. Explain the analysis of Differential amplifier.With neat sketch explain the BJT differential
amplifier with active load and derive for Ad, Ac, and CMRR How CMRR improved .
(or) (Nov/Dec 2015)(Nov/Dec 2016)
Deduce expression for Emitter currents in a differential amplifier under large signal
operation (Apr/May-2019, 5 marks)
 Normally, analysis in amplifier depends on both AC and DC analysis.
 In the above two, the d.c signals determines the operating values for the transistors
and used as biasing.
 Similarly, a.c signals are used as input signals, which determine the output of the
differential amplifier.
 The dual input, balanced output differential amplifier is also called Symmetrical
Differential Amplifier.
 DC ANALYSIS:
 DC analysis means using D.c voltage as biasing voltage and keeping it constant (to
obtain suitable operating point).

22
Figure (1): DC Equivalent circuit

 For obtaining DC analysis, we must obtain operating point values i.e., ICQ and VCQ
for the transistors used.
 In DC analysis, the supply voltage d.c is taken as biasing voltage and the applied
input a.c signals of both Vs1 and Vs2 are to be zero.
 To obtain DC analysis following assumptions are to be taken:
1) Assuming RS1 = RS2 (source resistances of both sides) and is simply denoted by
RS.
2) The transistor used TQ1 and TQ2 both are matched in their ideal identical
characteristics.
3) Emitter resistances connected in both RE1 and RE2 must be the same.
i.e., RE1 = RE2 = RE
RE1 .RE2
Hence RE = RE1|| RE2 = [RE1 +RE2 ]

4) The collector resistances of both transistors also must be in same value.


i.e., RC1 = RC2 = RC
5) The magnitude of | VCC| = | VEE | are measured with respect to ground.
 Because of the above identical characteristics of both transistors, there is no necessity for
finding out the operating point of each transistors.
 So, simply finding out the operating point to one is enough ( ICQ and VCEQ ).
 For finding out the ICQ and VCE, the DC analysis diagram is needed.

23
Figure(2): DC analysis diagram

−IB R S − VBE − 2IE R E = −VEE ………… (1)


−IB R S − VBE − 2IE R E + VEE = 0 ……... (2)
But, IC = βIB and IC ≈ IE .……. (3)
IC IE
 According to equation (3), IB = = …………(4)
β β

 Putting the value of equation (4) in (2),we get,


I
− βE R S − VBE − 2IE R E + VEE = 0 ………… (5)
R
−IE [ βS + 2R E ] + VEE − VBE = 0 …………. (6)
RS
IE [ + 2R E ] = VEE − VBE …..……. (7)
β
VEE −VBE
IE = R …………(8)
[ S + 2RE ]
β

RS
In practice, << 2R E ..……….(9)
β
VEE −VBE
IE = …………. (10)
2RE

 From the above equation (1), we can observe the following points.
i. R E (Emitter resistance) determines the emitter circuit of TQ1 and TQ2 for the
known value of VEE .
ii. Then, the collector resistance (RL) is independent of current that flows
through Emitter terminals of TQ1 and TQ2.
The collector voltage, VC = VCC – IC RC ……….(11)
 Neglecting the drop across RS, we can obtain the emitter voltage of TQ1 as approximately
equal to –VBE.
 Then, VCE = VC – VE = (VCC – IC RC) - VBE …………(12)
VCE = VCC +VBE −IC RC

24
 Hence, IE = IC = ICQ while VCE = VCEQ for given values of VCC and VEE.
 Therefore operating point (Q) can be obtained from equation (10) and (12).
 AC ANALYSIS: (Nov/Dec 2016)
 For performing AC analysis, we must apply AC input signals as an input. So,
we can calculate the following:
A. Differential mode gain (Ad).
B. Common mode gain (Ac).
C. Input resistance (Ri).
D. Output resistance (Ro).
The above can be obtained by using h-parameters.
A. Differential gain (Ad)
 To obtain the Differential mode gain, the two input signals must be different
from each other.
 Here, we take the two a.c input signals as equal in magnitude but having 180ᵒ
phase shift between them.
VS
 Then, the magnitude of each a.c input voltage VS1 and VS2is .
2

 For the a.c purposes, emitter terminal can be grounded which is shown in
figure below with small signal analysis.

Figure (1): AC Equivalent for differential operation (half circuit concept)


 The circuit which can be analyzed by considering only one transistor is called
Half circuit concept of analysis.

25
Figure(2): Approximate hybrid model
 For obtaining the differential mode gain (Ad) from the above hybrid model, we
have to apply the Kirchhoff’s voltage law in input side,
VS
= ib R S + ib hie ……..(1)
2

VS
= ib (R S + hie ) ……..(2)
2
VS
ib =2(R ……...(3)
S +hie )

 Similarly, applying the Kirchhoff’s voltage law to output loop, we get


Vo = - Ibhfe . RC ……….(4)
 Put the value of Ib in equation (4) from (3), we get,
−hfe VS R C
Vo = … … . . (5)
2(R S + hie )
V −h .R
 Then,Vo = 2(R fe+h C ) ………….(6)
S S ie

 Negative sign indicates that 1800 phase difference between input and output. If
the input signals are equal and are out of phase by 1800, we get
V V
 Differential mode signal Vd = V1 –V2 = ( 2S ) – (– 2S ) = VS …..(7)

Where, VS is differential input voltage.


Vo
 Differential voltage gain Ad = VS

hfe R C
Ad = … … … . (8)
2(R S + hie )
 When the output of differential amplifier is measured with reference to ground, it
is called unbalanced output.
 The output across the collectors of Q1 and Q2 to be perfectly matched then Ad
for balanced output is twice than that of Ad for unbalanced output. Therefore

26
hfe R C
Ad = … … … … … … . (9)
(R S + hie )
B. Common mode gain (AC)
 In common mode, the both transistor’s input magnitude and phases are also
inphase with each other.
 Let us assume that input signals are having the same magnitude VS and are in
same phase.
V1 +V2 VS +VS
 Common mode voltage VC = = = VS ………(10)
2 2

 If suppose, the output is expressed as, Vo = AC. VS ……(11)


Vo
 Common mode gain AC = …….(12)
VS

 In this mode, both the emitter current Ie1 = Ie2 = Ie of TQ1, TQ2 flows through
RE in the same direction, with same magnitude.
 Hence, the total current flowing through RE is nearly 2Ie …..(13)

Figure(1): A.C. Equivalent Circuit for Common Mode Configuration


 Then the approximate hybrid model for the above circuit can be obtained and is
used to obtain the Ad.

Figure(2): Approximate Hybrid model


 As the current through RE is 2Ie , for simplicity of derivation, we have to
assume the Ie and effective emitter resistance as 2RE.
 Current through RC = Load current IL

27
 Effective emitter = 2 RE
 Current through emitter resistance = IL + Ib
 Current through hoe = (IL – hfe . Ib)
 Now, applying Kirchhoff’s voltage law to input side,

Figure (3): Input side


-Ib RS + Ibhie+2R E (IL + Ib ) = - VS ……(14)
Ib RS-Ibhie−2R E (IL + Ib )= VS ………..(15)
While, Vo = - IL . RC …………(15a)
 Negative sign is due to the assumed direction of current. Similarly apply KVL
to output side.

Figure (4): Output side


−(IL −hfe Ib )
− 2R E (IL + Ib ) − IL R C = 0…. (16)
hoe
−IL hfe Ib
+ − 2IL R E − 2Ib R E − IL R C = 0…(17)
hoe hoe
hfe 1
Ib [ − 2R E ] = IL [ + 2R E + R C ] ……… (18)
hoe hoe

 Multiplying both sides by hoe , then


Ib [hfe − 2R E hoe ] = IL [ 1 + hoe (2R E + R C )] ………… (19)
IL [hfe − 2R E hoe ]
= … … … . . (20)
Ib [ 1 + hoe (2R E + R C )]

28
IL [ 1+hoe (2RE +RC )]
Ib = [hfe −2RE hoe ]
…………..(21)

 Putting this Ib in equation (15),


IL [1 + hoe (2R E + R C )][R S + hie + 2R E ] + 2R E
VS =
[hfe − 2R E hoe ]
VS [1 + hoe (2R E + R C )][R S + hie + 2R E ] + 2R E
= … (22)
IL [hfe − 2R E hoe ]
 Then, find LCM and adjusting the terms,
VS 2R E (1 + hfe ) + R S (1 + 2R E hoe ) + hie (1 + 2R E hoe ) + hoe R C (2R E + R S + hoe )
=
IL [hfe − 2R E hoe ]
VS 2R E (1 + hfe ) + (R S + hie )(1 + 2R E hoe ) + hoe R C (2R E + R S + hoe )
= … . (23)
IL [hfe − 2R E hoe ]
 Actually hoe R C ≪ 1. Neglecting the terms,
VS 2R E (1 + hfe ) + (R S + hie )(1 + 2R E hoe )
= … . . (24)
IL [hfe − 2R E hoe ]
VS . [hfe − 2R E hoe ]
IL = … . . (25)
2R E (1 + hfe ) + (R S + hie )(1 + 2R E hoe )
 Putting this IL in equation (15a),
Vo = - IL . RC
−VS .[hfe −2RE hoe ]RC
Vo = … … . (26)
2RE (1+hfe )+(RS + hie )(1+2RE hoe )

 Hence the common mode gain can be written as,


Vo [2R E hoe − hfe ]R C
AC = = … … . (27)
VS 2R E (1 + hfe ) + (R S + hie )(1 + 2R E hoe )
 In practice, hoe is neglected, because the expression for AC can be further
modified as,
−hfe R C
AC = … . . (28)
R S + hie + 2R E (1 + hfe )
 The above expression is same whether the output is balanced or unbalanced.
COMMON MODE REJECTION RATIO (CMRR):
A
 CMRR = |Ad|
C

 From equation (8) and (28),


hfe RC
2(RS +hie )
CMRR = | hfe RC |……(29)
(RS +hie +2RE (1+hfe )

29
(R S + hie + 2R E (1 + hfe )
CMRR = | | … (30)
2(R S + hie )

 This is CMRR for dual input balanced output differential amplifier circuit.
 For balanced case, (R S + hie + 2R E (1 + hfe )
CMRR = | |
(R S + hie )
 For unbalanced case,
(R S + hie + 2R E (1 + hfe )
CMRR = | |
2(R S + hie )
C. Input Impedance (Ri):
 Ri is defined as the equivalent resistance existing between any one of the
input and the ground when other input terminal is grounded.
𝑉𝑆
𝑅𝑖 =
𝐼𝑏

 Put the 𝑉𝑆 and 𝐼𝑏 from the above discussion, Ri = 2(RS + hie).

 For one transistor and input pair, the resistance is RS + hie.

 Hence for dual input circuit, the total input resistance is 2(RS + hie), as the 2
circuits are perfectly matched.
 This input resistance is not dependent on whether output is balanced or
unbalanced.

D) OUTPUT IMPEDANCE RO:


 It is defined as the equivalent resistance between one of the output terminals
with respect to ground.
 The resistance between output terminal with respect to ground is RC.
RO = RC

30
4. Draw the circuit diagram of a single tuned amplifier and obtained expression for its gain
,resonant and cut off frequency (May/June 2016), (Nov/Dec2015, 2020)

SINGLE TUNED CAPACITIVE COUPLED TUNED AMPLIFIER


 Tuned amplifiers are amplifiers that are designed to reject a certain range of frequencies
below a lower cut off frequency ωL and above a upper cut off frequency ωH and allows
only a narrow band of frequencies.

 The output across the tuned circuit is coupled to the next stage through the coupling
capacitor. The tuned circuit is formed by L and C resonates at the frequency of operation.

6
Here Ci and Ceq represent input and output circuits capacitance respectively. They can be given as
Ci = Cbe + Cbc (1-A) where A is the voltage gain of the amplifier
Ceq = Cbe( ( A-1) / A)+C where C is the tuned circuit capacitance
The gce is represented as the output resistance of current of generator gm Vbe
gce = (1 / rce) = hce – gm*hce = hce = (1/R0)
The admittance of the inductor along with resistor R is given by
1
𝑌=
𝑅 + 𝑗𝜔𝐿
Multiplying numerator and denominator by 𝑅 + 𝑗𝜔𝐿 we get

𝑅 − 𝑗𝜔𝐿 𝑅 𝑗𝜔𝐿 𝑅 𝑗𝜔2 𝐿 1 1


𝑌= 2 2 2
= 2 2 2
− 2 2 2
= 2 2 2
− 2 2 2
= +
𝑅 +𝜔 𝐿 𝑅 +𝜔 𝐿 𝑅 +𝜔 𝐿 𝑅 +𝜔 𝐿 𝜔(𝑅 + 𝜔 𝐿 ) 𝑅𝑃 𝑗𝜔𝐿𝑃
𝑅 2 +𝜔2 𝐿2 𝑅 2 +𝜔2 𝐿2
Where 𝑅𝑃 = , 𝑎𝑛𝑑 𝐿𝑃 =
𝑅 𝜔2 𝐿
The LP and RP are in shunt quality factor of the coil at resonance is given by
Qo = WoL/ R
𝑅 2 + 𝜔2 𝐿2
𝐿𝑃 =
𝜔2𝐿
Dividing numerator and denominator terms by𝜔2 𝐿,
𝑅 2⁄ +𝐿
𝐿𝑃 = 𝜔2𝐿
1
𝐿𝑃≈𝐿
Hence, The output circuit of the amplifier can be modified as

Taking R1 as the parallel combination of R0, RP and Ri i.e.


1 1 1 1
= + +
𝑅𝑡 𝑅0 𝑅𝑃 𝑅𝑖
The output circuit can be modified as shown in fig.
Susceptance of inductance L C′ capacitance C
𝑸𝒆 =
Conductance shunt resistance R t

7
Where Z is the impedance of C, L and Rt in parallel. The admittance Y = (1/Z) is given by
1 1 1 1 𝑅𝑡
𝑌= = + + 𝑗𝜔𝐶 = [1 + + 𝑗𝜔𝐶𝑅𝑡 ]
𝑍 𝑅𝑡 𝑗𝜔𝐿 𝑅𝑡 𝑗𝜔𝐿

Multiplying numerator and denominator by 𝜔0


1 𝑅𝑡 𝜔0 𝑗𝜔𝜔0 𝐶𝑅𝑡
𝑌= [1 + + ]
𝑅𝑡 𝑗𝜔𝐿𝜔0 𝜔0

𝑅𝑡
= 𝜔0 𝐶𝑅𝑡 = 𝑄𝑒
𝐿𝜔0
𝜔 𝜔
1 + 𝑗𝑄𝑒 [𝜔 − 𝜔0 ]
0
𝑌=
𝑅𝑡

1 𝑅𝑡
𝑍= =
𝑌 1 + 𝑗𝑄 [ 𝜔 − 𝜔0 ]
𝑒 𝜔 𝜔
0

Let 𝛿 the fractional frequency variation.


𝜔 − 𝜔0 𝜔 𝜔
𝛿= = −1= =1+𝛿
𝜔0 𝜔0 𝜔0

𝑅𝑡 𝑅𝑡
𝑍= =
1 1 + 𝛿 2 + 2𝛿 − 1
1 + 𝑗𝑄𝑒 [(1 + 𝛿) − ( )] 1 + 𝑗𝑄𝑒 [ ]
1+𝛿 1+𝛿

𝑅𝑡
𝑍=
𝛿
+1
1 + 𝑗2𝑄𝑒 𝛿 [2 ]
1+𝛿

Frequency close to resonance 𝜔0 , 𝛿 << 1

𝑅𝑡
𝑍=
1 + 𝑗2𝑄𝑒 𝛿

At resonance 𝜔 = 𝜔0 , 𝛿 = 0

𝑍 = 𝑅𝑡 = 𝑅0 𝑝𝑎𝑟𝑎𝑙𝑙𝑒𝑙 𝑅𝑃 𝑃𝑎𝑟𝑎𝑙𝑙𝑒𝑙 𝑅

8
𝜔0𝐿2 𝜔0 𝐿
𝑅𝑃 = =
𝑅 𝜔0 𝐶𝑅
𝑟𝑏′𝑒
𝑉𝑏′𝑒 = 𝑉𝑖
𝑟𝑏𝑏′ + 𝑟𝑏′𝑒
𝑟𝑏 ′ 𝑒
𝑉0 = −𝑔𝑚 𝑉𝑏′ 𝑒 𝑍 = −𝑔𝑚 (𝑉𝑖 )𝑍
𝑟𝑏𝑏′ + 𝑟𝑏′ 𝑒

Voltage gain with out considering the source resistance is given by

𝑉0 𝑟𝑏 ′ 𝑒
𝐴𝑣 = = −𝑔𝑚 ( )𝑍
𝑉𝑖 𝑟𝑏𝑏′ + 𝑟𝑏′ 𝑒

𝑟𝑏 ′ 𝑒 𝑅𝑡
𝐴𝑣 = −𝑔𝑚 ( )∗
𝑟𝑏𝑏′ + 𝑟𝑏′ 𝑒 1 + 𝑗2𝑄𝑒 𝛿
𝑟𝑏 ′ 𝑒
𝐴𝑣 (𝑎𝑡 𝑟𝑒𝑠𝑜𝑛𝑎𝑛𝑐𝑒) = −𝑔𝑚 ( ) ∗ 𝑅𝑡
𝑟𝑏𝑏′ + 𝑟𝑏′ 𝑒

𝐴𝑣 1
| |=
𝐴𝑣 (𝑎𝑡 𝑟𝑒𝑠𝑜𝑛𝑎𝑛𝑐𝑒) √1 + (2𝛿𝑄𝑒 )2

1
2𝛿 =
𝑄𝑒

1
∆𝜔 = 𝑟𝑎𝑑/𝑠𝑒𝑐
𝑅𝑡 𝐶

𝐴𝑣
Gain plotted against 𝛿
𝐴𝑣 (𝑎𝑡 𝑟𝑒𝑠𝑜𝑛𝑎𝑛𝑐𝑒)

9
 The voltage gain of an amplifier depends upon current gain (β), input resistance (Ri) and
effective or a.c load resistance.
 The voltage gain is given by the relation,
𝑟𝐿
Av = β x
𝑅𝑖
 The a.c load resistance of a parallel resonant circuit ( i.e., tuned circuit) is given by the
relation,
L
RL = Zp =
CR

Where, L = value of inductance,

C = value of capacitance, and

R = value of effective resistance of the inductor.

 Voltage gain of a voltage amplifier is given by the relation,


L
CR
Av = β x
𝑅𝑖
L
 We know that the value of the quantity (changes above or below the resonant called
CR
impedance of the tuned circuit) is very high at the resonant frequency and it decreases as
the frequency changes above or below the resonant frequency.
 Therefore voltage gain of a tuned amplifier is very high at the resonant frequency and it
decreases as the frequency changes above or below the resonant frequency.
 The above facts are shown in the form of a voltage gain versus frequency plot shown in
figure below.

Figure: Frequency response curve


 Such a plot is called Frequency response curve of a tuned voltage amplifier.
 The bandwidth (BW) of an amplifier is equal to the frequency difference between the point
A and B on either side of the resonant frequency, where the value of voltage gain drops to
1/√2 of its maximum value of resonance.

15
𝑓𝑜
BW = Δf
𝑄𝑜
= f2 – f1 =
Where 𝑄𝑜 is the quality factor (or Q-factor) of the tuned circuit
.
Double Tuned Amplifier
5. Explain about the double tuned voltage amplifier (may 2021, ,may 2017)
An amplifier that uses a pair of mutually inductively coupled coils where both primary
and secondary are tuned, such a tuned circuit is known as double tuned amplifier.
These amplifiers are mainly used as amplifier in radio and television receivers.

Fig: Double Tuned Amplifier

Fig: equivalent circuit of output side


From figure 2 the impedance R is parallel with inductance

If then

Equation (1) defines the resistance R and parallel can approximated by a series
circuit in figure 3.
The current source in parallel with C is converted in to an equivalent voltage source in
series with the capacitance shown in figure 4. In this case, mutual inductance is take in to
account

Fig: Approximate equivalent circuit


Apply KVL to the input and output circuit of figure 4

Where,

Where the quality factor for series tuning is given by,

The selectivity is given by 74


Substitute the value of in

Similarly for output side

Simplify we get,

From equation (2)

Substitute (3) in (1)

Substitute in above equation,

The output voltage,

Where then

75
Voltage gain is given by,

At resonance when

Let

76
3.8.1 Frequency Response of double tuned amplifier

Staggered Tuned Amplifier


6. Explain staggered tuned amplifier with a neat circuit diagram.
If two tuned circuits are cascade and tuned to the same frequency, thus the overall bandwidth

bandwidth with steeper sides and flat top, but alignment of double tuned amplifier is difficult.
To overcome this problem stagger tuned amplifier has been developed. In this case two more
tuned circuits are connected in cascade as shown in figure.

77

If these cascade tuned circuit are tuned to different frequencies, it is possible to obtain increased

Stagger tuned amplifier. The Stagger tuning is achieved by resonating the tuned circuits L1C1
and L2C2 to slightly different frequencies.
The fig shows the frequency response of stagger tuned amplifier. The resultant
staggered tuned pair will have a bandwidth of times that of each of the individual single
tuned circuit. The gain of the single tuned amplifier is given by,

where

By multiplying the relative gains of the two amplifiers, the overall gain function becomes,

Large Signal Tuned Amplifier


7. Explain class C tuned amplifier with a relavant diagram. nov 2017
Class C Tuned Amplifier
78
Class C operation means, collector current flow for less than of the ac input
cycle. It implies that the collector current of a class C amplifier is highly non-sinusoidal
because of current flows in pulse, thus the tank circuit is used as a load in an amplifier results in
a sinusoidal output voltage, thus this amplifier is known as class C tuned amplifier.
Circuit Operation
When no bais is applied then ie) input junction is unbiased results in which no
collector current will flow. When an ac input signal is applied there is collector current until
voltage across the base emitter junction reaches 0.7V. this means that the conduction of
transistor is occurs only for a short period during the positive peaks of the input signal, thus
result is pulsed output. The conduction angle

When this pulse output is fed to tuned circuit and it is tuned to resonant frequency,
result in which the capacitor is changed to a maximum voltage and it will discharge through a
coil and load resistor and setting up oscillation consequently sinusoidal output is obtained.
Let be the ratio of the peak value of the fundamental component to peak value of
the class C wave form.

Let be the ratio of the dc value of the class C waveform to its peak value.

Output power

Where Peak output power.


The input power is given by,

Efficiency is give by

79
Application of class C tuned amplifier
1. It is used as tuned circuit in radio/TV communication systems.
2. It is used as modulator in AM/FM transmitter circuit because of its efficiency.
8. Describe any one method of neutralization used in tuned amplifier?Briefly explain
Hazel line neutralization used in tuned amplifiers for stabilization (May/June 2016)
(Nov/Dec 2016)

STABILITY OF TUNED AMPLIFIER

Stability of tuned amplifier is achieved by neutralization

i)Hazelltine neutralization
ii) neutrodyne neutralization

 In a tuned RF amplifier the transistor are used at the frequency near to their unity gain
bandwidth. To amplify the narrow band of high frequencies .
 At this frequency interjunction capacitor b/w base and collector of transistor (Cbc) of
transistor becomes dominant
 As a reactance of Cbc at Rf is low and its provide feedback path from a collector to base.
 If some feedback signal reaches the input from output in a positive manner with proper
phase shift then the circuit is unstable , generating its own oscillation.
Amplifier, it was necessary to reduce stage gain to a level that ensures the circuit stability.

This can be achieved in several ways

i) favoring the stability factor of the tuned circuits


ii) loose coupling b/w stages
iii) Increase looser element into the element.

 To achieve stability the professor Hazettile introduced a circuit in which the troublesome
effects of the cbc was neutralized by introducing a signal coupled through the Cbc

HAZELTINE NEUTRALIZATION:-

 This is the neutralization technique employed in tuned RF amplifier to maintain stability


 The undesired effect of collector to base capacitance of the transistor is neutralized by
introducing a signal which cancels the signal coupled through the collector to base
capacitance
 This is achieved by a small variable capacitance (CN)is connected from the bottom of coil
to the base of the transistor .It introduce a signal to the base of the transistor such that it
cancels out the signal fed to the base by Cbc
 By properly adjusted Cn exactly neutralized achived.
 Modified version of Hazeltine neutralization
31 called neutrodyne neutralization .
NEUTRODYNE NEUTRALIZATION:-

 In a neutrodyne neutralization technique, Cn is connected to the centre trapped to the


secondary coil.
 Hence it is connected with Vcc which ensures that it is insensitivity to any variation is
supply voltage Vcc .Hence provided higher neutralization for the tuned amplifier.
 In principle, the circuit functions are the same manner as thehazeltine neutralizing
capacitor does not have the supply voltage across it.

33
Neutralization using Coil

In this circuit L part of the tuned circuit at the base of next stage is oriented for
minimum coupling to the other windings. It is wound on a separate form and is mounted at right
angle to the coupled windings. If the windings are properly polarized the voltage across L due
to the circulating current in the base circuit will have the proper phase to cancel the signal
coupled through the base to collector capacitance.

Rice Neutralization
It uses a centre tapped coil in the base circuit. With this arrangement the signal
voltages at the tuned base coil are equal and out off phase.

82
9. Explain the MOSFET input stages.

 FET parameters:
 The following are the parameters of FET as an amplifier.
1. The transcondutance ‘𝑔𝑚 ’
2. The dynamic resistance ‘𝑟𝑑 ’ and
3. The amplification factor µ.
 Transcondutance:
 It is defined as the ratio of change in drain current to the change in gate source
voltage at a constant drain source voltage.
𝛥𝐼𝐷
𝑔𝑚 = / 𝛥𝑉𝐷𝑆 = Constant
𝛥𝑉𝐺𝑆

 It is expressed in mill amperes per volt or micro mhos. It is sometimes referred


to as the common source forward transadmittance.
 Dynamic Drain Resistance or output Resistance:
 The drain resistance is defined as the ratio of change in drain source voltage 𝑉𝐷𝑆
to the change in drain current 𝐼𝐷 at a constant gate source voltage.
𝛥𝑉𝐷𝑆
𝑟𝑑 = / 𝛥𝑉𝐺𝑆
𝛥𝐼𝐷

 The reciprocal of drain resistance is the drain conductance, it is called


sometimes as common source output conductance.
 Amplification factor:
 Amplification factor is defined as the ratio of change in drain source voltage to
the change in gate source voltage at a constant drain current.
𝛥𝑉𝐷𝑆
µ= / 𝛥𝐼𝐷
𝛥𝑉𝐺𝑆

 Relation between FET parameters:


𝛥𝑉𝐷𝑆
 We know that µ =
𝛥𝑉𝐺𝑆
 Multiplying the numerator and the denominator on the R.H.S by 𝛥𝐼𝐷 , We have
𝛥𝑉𝐷𝑆 𝛥𝐼𝐷 𝑉𝐷𝑆 𝐼𝐷
µ= x = x = 𝑔𝑚 x 𝑟𝑑
𝛥𝑉𝐺𝑆 𝛥𝐼𝐷 𝐼𝐷 𝑉𝐺𝑆

 Therefore µ = 𝑔𝑚 x 𝑟𝑑 is the relation between the parameters of a FET.


 FET configurations:
 There are three types of configurations in the FET amplifier, they are:
1. Common source configuration
2. Common drain configuration
3. Common gate configuration
 A FET can be connected in any one of the three configurations. The common
drain circuit also called source
14 follower circuit.

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