INTEGRATED CIRCUITS

DATA SHEET

74LVC245A; 74LVCH245A
Octal bus transceiver with direction
pin with 5 V tolerant input/outputs
(3-state)
Product specification 2003 May 07
Supersedes data of 2002 Jun 20
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

FEATURES DESCRIPTION
• 5 V tolerant inputs/outputs for interfacing with 5 V logic The 74LVC245A/74LVCH245A is a high-performance,
• Wide supply voltage range from 1.2 to 3.6 V low-power, low-voltage, Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
• CMOS low power consumption
Inputs can be driven from either 3.3 or 5 V devices.
• Direct interface with TTL levels
In 3-state operation outputs can handle 5 V. These
• Inputs accept voltages up to 5.5 V features allow the use of these devices as translators in a
• High-impedance when VCC = 0 V mixed 3.3 and 5 V environment.
• bus-hold on all data inputs (74LVCH245A only) The 74LVC245A/74LVCH245A is an octal transceiver with
• Complies with JEDEC standard no. 8-1A non-inverting 3-state bus compatible outputs in both send
and receive directions.
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V The 74LVC245A/74LVCH245A has an output enable (OE)
MM EIA/JESD22-A115-A exceeds 200 V input for easy cascading and a send/receive (DIR) input for
• Specified from −40 to +85 °C and −40 to +125 °C. direction control. OE controls the outputs so that the buses
are effectively isolated.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.

SYMBOL PARAMETER CONDITIONS TYPICAL UNIT

tPHL/tPLH propagation delay An to Bn, Bn to An CL = 50 pF; VCC = 3.3 V 2.9 ns
CI input capacitance 4.0 pF
CI/O input/output capacitance 10.0 pF
CPD power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2 15 pF

Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.

2003 May 07 2
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

ORDERING INFORMATION

PACKAGE
TYPE NUMBER TEMPERATURE RANGE
PINS PACKAGE MATERIAL CODE
74LVC245AD −40 to +125 °C 20 SO20 plastic SOT163-1
74LVCH245AD −40 to +125 °C 20 SO20 plastic SOT163-1
74LVC245ADB −40 to +125 °C 20 SSOP20 plastic SOT339-1
74LVCH245ADB −40 to +125 °C 20 SSOP20 plastic SOT339-1
74LVC245APW −40 to +125 °C 20 TSSOP20 plastic SOT360-1
74LVCH245APW −40 to +125 °C 20 TSSOP20 plastic SOT360-1
74LVC245ABQ −40 to +125 °C 20 DHVQFN20 plastic SOT764-1
74LVCH245ABQ −40 to +125 °C 20 DHVQFN20 plastic SOT764-1

FUNCTION TABLE
See note 1.
INPUT INPUT/OUTPUT
OE DIR An Bn
L L A=B input
L H input B=A
H X Z Z

Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.

PINNING
PIN SYMBOL DESCRIPTION
PIN SYMBOL DESCRIPTION 11 B7 data input/output
1 DIR direction control input 12 B6 data input/output
2 A0 data input/output 13 B5 data input/output
3 A1 data input/output 14 B4 data input/output
4 A2 data input/output 15 B3 data input/output
5 A3 data input/output 16 B2 data input/output
6 A4 data input/output 17 B1 data input/output
7 A5 data input/output 18 B0 data input/output
8 A6 data input/output 19 OE output enable input (active
9 A7 data input/output LOW)
10 GND ground (0 V) 20 VCC supply voltage

2003 May 07 3
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

handbook, halfpage DIR VCC

1 20
handbook, halfpage
DIR 1 20 VCC A0 2 19 OE

A0 2 19 OE
A1 3 18 B0
A1 3 18 B0
A2 4 17 B1
A2 4 17 B1

A3 5 16 B2 A3 5 16 B2
245 GND*
A4 6 15 B3
A4 6 15 B3
A5 7 14 B4
A5 7 14 B4
A6 8 13 B5

A7 9 12 B6 A6 8 13 B5

GND 10 11 B7
A7 9 12 B6
MNA173 10 11

GND B7 MCE182

* The die substrate is attached to this pad using conductive die attach
material. It can not be used as a supply pin or input.

Fig.1 Pin configuration SO20 and (T)SSOP20. Fig.2 Pin configuration DHVQFN20.

2003 May 07 4
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

handbook, halfpage DIR

1

OE
19
A0
2
handbook, halfpage 19 B0
G3 18
1 A1
3EN1
3
3EN2
B1
17
1 A2
4
2 18 B2
2
16
A3
3 17
5
B3
4 16
15
A4
5 15
6
B4
6 14 14
A5
7 13 7
B5
8 12 13
A6
9 11
8
MNA175 B6
12
A7
9
B7
11

MNA174

Fig.3 Logic symbol (IEEE/IEC). Fig.4 Logic symbol.

2003 May 07 5
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

VCC supply voltage for maximum speed performance 2.7 3.6 V
for low-voltage applications 1.2 3.6 V
VI input voltage 0 5.5 V
VO output voltage output HIGH or LOW state 0 VCC V
output 3-state 0 5.5 V
Tamb operating ambient temperature −40 +125 °C
tr, tf input rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V
VCC = 2.7 to 3.6 V 0 10 ns/V

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5 V
IIK input diode current VI < 0 − −50 mA
VI input voltage note 1 −0.5 +6.5 V
IOK output diode current VO > VCC or VO < 0 − ±50 mA
VO output voltage output HIGH or LOW state; note 1 −0.5 VCC + 0.5 V
output 3-state; note 1 −0.5 +6.5 V
IO output source or sink current VO = 0 to VCC − ±50 mA
ICC, IGND VCC or GND current − ±100 mA
Tstg storage temperature −65 +150 °C
Ptot power dissipation Tamb = −40 to +125 °C; note 2 − 500 mW

Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO20 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 °C derate linearly with 4.5 mW/K.

2003 May 07 6
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP.(1) MAX. UNIT
OTHER VCC (V)
Tamb = −40 to +85 °C
VIH HIGH-level input 1.2 VCC − − V
voltage 2.7 to 3.6 2.0 − − V
VIL LOW-level input voltage 1.2 − − 0 V
2.7 to 3.6 − − 0.8 V
VOH HIGH-level output VI = VIH or VIL
voltage IO = −100 µA 2.7 to 3.6 VCC − 0.2 VCC − V
IO = −12 mA 2.7 VCC − 0.5 − − V
IO = −18 mA 3.0 VCC − 0.6 − − V
IO = −24 mA 3.0 VCC − 0.8 − − V
VOL LOW-level output VI = VIH or VIL
voltage IO = 100 µA 2.7 to 3.6 − 0 0.2 V
IO = 12 mA 2.7 − − 0.4 V
IO = 24 mA 3.0 − − 0.55 V
ILI input leakage current VI = 5.5 V or GND; note 2 3.6 − ±0.1 ±5 µA
IOZ 3-state output VI = VIH or VIL; 3.6 − ±0.1 ±5 µA
OFF-state current VO = 5.5 V or GND;
notes 2 and 3
Ioff power off leakage VI or VO = 5.5 V 0.0 − ±0.1 ±10 µA
supply
ICC quiescent supply VI = VCC or GND; IO = 0 3.6 − 0.1 10 µA
current
∆ICC additional quiescent VI = VCC − 0.6 V; IO = 0 2.7 to 3.6 − 5 500 µA
supply current per pin
IBH(L) bus-hold LOW VI = 0.8 V; notes 4, 5 and 6 3.0 75 − − µA
sustaining current
IBH(H) bus-hold HIGH VI = 2.0 V; notes 4, 5 and 6 3.0 −75 − − µA
sustaining current
IBH(LO) bus-hold LOW overdrive notes 4, 5 and 7 3.6 500 − − µA
current
IBH(HO) bus-hold HIGH notes 4, 5 and 7 3.6 −500 − − µA
overdrive current

2003 May 07 7
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP.(1) MAX. UNIT
OTHER VCC (V)
Tamb = −40 to +125 °C
VIH HIGH-level input 1.2 VCC − − V
voltage 2.7 to 3.6 2.0 − − V
VIL LOW-level input voltage 1.2 − − 0 V
2.7 to 3.6 − − 0.8 V
VOH HIGH-level output VI = VIH or VIL
voltage IO = −100 µA 2.7 to 3.6 VCC − 0.3 − − V
IO = −12 mA 2.7 VCC − 0.65 − − V
IO = −18 mA 3.0 VCC − 0.75 − − V
IO = −24 mA 3.0 VCC − 1 − − V
VOL LOW-level output VI = VIH or VIL
voltage IO = 100 µA 2.7 to 3.6 − − 0.3 V
IO = 12 mA 2.7 − − 0.6 V
IO = 24 mA 3.0 − − 0.8 V
ILI input leakage current VI = 5.5 V or GND; note 2 3.6 − − ±20 µA
IOZ 3-state output VI = VIH or VIL; 3.6 − − ±20 µA
OFF-state current VO = 5.5 V or GND;
notes 2 and 3
Ioff power off leakage VI or VO = 5.5 V 0.0 − − ±20 µA
supply
ICC quiescent supply VI = VCC or GND; IO = 0 3.6 − − 40 µA
current
∆ICC additional quiescent VI = VCC − 0.6 V; IO = 0 2.7 to 3.6 − − 5000 µA
supply current per in.
pin
IBH(L) bus-hold LOW VI = 0.8 V; notes 4, 5 and 6 3.0 60 − − µA
sustaining current
IBH(H) bus-hold HIGH VI = 2.0 V; notes 4, 5 and 6 3.0 −60 − − µA
sustaining current
IBH(LO) bus-hold LOW overdrive notes 4, 5 and 7 3.6 500 − − µA
current
IBH(HO) bus-hold HIGH notes 4, 5 and 7 3.6 −500 − − µA
overdrive current
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2. For bus-hold parts, the bus-hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal.
3. For I/O ports the parameter IOZ includes the input leakage current.
4. Valid for data inputs of bus-hold parts (74LVCH245A) only.
5. For data inputs only, control inputs do not have a bus-hold circuit.
6. The specified sustaining current at the data input holds the input below the specified VI level.
7. The specified overdrive current at the data input forces the data input to the opposite logic input state.

2003 May 07 8
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5 ns.

TEST CONDITIONS
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
WAVEFORMS VCC (V)
Tamb = −40 to +85 °C
tPHL/tPLH propagation delay An to Bn, Bn to An see Figs 5 and 7 1.2 − 17 − ns
2.7 1.5 3.4 7.3 ns
3.0 to 3.6 1.5 2.9(1) 6.3 ns
tPZH/tPZL 3-state output enable time see Figs 6 and 7 1.2 − 22 − ns
OE to An, OE to Bn 2.7 1.5 5.0 9.5 ns
3.0 to 3.6 1.5 4.0(1) 8.5 ns
tPHZ/tPLZ 3-state output disable time see Figs 6 and 7 1.2 − 12 − ns
OE to An, OE to Bn 2.7 1.5 3.6 8.0 ns
3.0 to 3.6 1.7 3.4(1) 7.0 ns
tsk(0) skew note 2 − − 1.0 ns
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay An to Bn, Bn to An see Figs 5 and 7 1.2 − − − ns
2.7 1.5 − 9.5 ns
3.0 to 3.6 1.5 − 8.0 ns
tPZH/tPZL 3-state output enable time see Figs 6 and 7 1.2 − − − ns
OE to An, OE to Bn 2.7 1.5 − 12.0 ns
3.0 to 3.6 1.5 − 11.0 ns
tPHZ/tPLZ 3-state output disable time see Figs 6 and 7 1.2 − − − ns
OE to An, OE to Bn 2.7 1.5 − 10.0 ns
3.0 to 3.6 1.7 − 9.0 ns
tsk(0) skew note 2 − − 1.5 ns

Notes
1. Typical values are measured at VCC = 3.3 V.
2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
by design.

2003 May 07 9
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

AC WAVEFORMS

handbook, halfpage VI

An, Bn input VM VM

GND
tPLH tPHL
VOH

Bn, An output VM VM

VOL
MNA176

VM = 1.5 V at VCC ≥ 2.7 V.

VM = 0.5VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.

Fig.5 The inputs An, Bn to outputs Bn, An propagation delays.

handbook, full pagewidth VI

nOE input VM

GND
tPLZ tPZL
VCC
output
LOW-to-OFF VM
OFF-to-LOW
VX
VOL
tPHZ tPZH
VOH
VY
output
HIGH-to-OFF VM
OFF-to-HIGH
GND
outputs outputs outputs
enabled disabled enabled
MNA362

VM = 1.5 V at VCC ≥ 2.7 V;

VM = 0.5VCC at VCC < 2.7 V;
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 V at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.1 V at VCC < 2.7 V. VOL and VOH are typical output voltage drop that occur with the output load.

Fig.6 3-state enable and disable times.

2003 May 07 10
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

handbook, full pagewidth S1 2 × VCC

open
VCC
RL GND
VI VO 500 Ω
PULSE
D.U.T.
GENERATOR
CL RL
RT 50 pF 500 Ω
MNA368

SWITCH POSITION VCC VI

TEST SWITCH < 2.7 V VCC
tPLH/tPHL open 2.7 - 3.6 V 2.7 V
tPLZ/tPZL 2 x VCC
tPHZ/tPZH GND

Definitions for test circuit:

RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

Fig.7 Load circuitry for switching times.

2003 May 07 11
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

PACKAGE OUTLINES
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

D E A
X

c
y HE v M A

20 11

Q
A2 A
A1 (A 3)

pin 1 index
θ
Lp
L

1 10 detail X
e w M
bp

0 5 10 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z
(1)
θ

0.3 2.45 0.49 0.32 13.0 7.6 10.65 1.1 1.1 0.9
mm 2.65 0.25 1.27 1.4 0.25 0.25 0.1
0.1 2.25 0.36 0.23 12.6 7.4 10.00 0.4 1.0 0.4 8o
0.012 0.096 0.019 0.013 0.51 0.30 0.419 0.043 0.043 0.035 0o
inches 0.1 0.01 0.05 0.055 0.01 0.01 0.004
0.004 0.089 0.014 0.009 0.49 0.29 0.394 0.016 0.039 0.016

Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT163-1 075E04 MS-013
03-02-19

2003 May 07 12
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1

D E A
X

c
y HE v M A

20 11

Q
A2 A
A1 (A 3)
pin 1 index

θ
Lp
L

1 10 detail X

w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
o
0.21 1.80 0.38 0.20 7.4 5.4 7.9 1.03 0.9 0.9 8
mm 2 0.25 0.65 1.25 0.2 0.13 0.1
0.05 1.65 0.25 0.09 7.0 5.2 7.6 0.63 0.7 0.5 0o

Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT339-1 MO-150
03-02-19

2003 May 07 13
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1

D E A
X

y HE v M A

20 11

Q
A2 (A 3) A
A1
pin 1 index

θ
Lp
L
1 10
detail X
w M
e bp

0 2.5 5 mm
scale

DIMENSIONS (mm are the original dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ
max.
o
0.15 0.95 0.30 0.2 6.6 4.5 6.6 0.75 0.4 0.5 8
mm 1.1 0.25 0.65 1 0.2 0.13 0.1
0.05 0.80 0.19 0.1 6.4 4.3 6.2 0.50 0.3 0.2 0o

Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

99-12-27
SOT360-1 MO-153
03-02-19

2003 May 07 14
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1

D B A

A
A1
E c

terminal 1 detail X
index area

terminal 1 C
e1
index area
e b v M C A B y1 C y
w M C
2 9

1 10

Eh e

20 11

19 12
Dh
X

0 2.5 5 mm

scale
DIMENSIONS (mm are the original dimensions)
A(1)
UNIT
max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1

mm 0.05 0.30 4.6 3.15 2.6 1.15 0.5

1 0.2 0.5 3.5 0.1 0.05 0.05 0.1
0.00 0.18 4.4 2.85 2.4 0.85 0.3

Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION

02-10-17
SOT764-1 --- MO-241 ---
03-01-27

2003 May 07 15
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

SOLDERING If wave soldering is used the following conditions must be

observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
This text gives a very brief insight to a complex technology. turbulent wave with high upward pressure followed by a
A more in-depth account of soldering ICs can be found in smooth laminar wave.
our “Data Handbook IC26; Integrated Circuit Packages”
• For packages with leads on two sides and a pitch (e):
(document order number 9398 652 90011).
– larger than or equal to 1.27 mm, the footprint
There is no soldering method that is ideal for all surface longitudinal axis is preferred to be parallel to the
mount IC packages. Wave soldering can still be used for transport direction of the printed-circuit board;
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is – smaller than 1.27 mm, the footprint longitudinal axis
recommended. must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied • For packages with leads on four sides, the footprint must
to the printed-circuit board by screen printing, stencilling or be placed at a 45° angle to the transport direction of the
pressure-syringe dispensing before package placement. printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor During placement and before soldering, the package must
type oven. Throughput times (preheating, soldering and be fixed with a droplet of adhesive. The adhesive can be
cooling) vary between 100 and 200 seconds depending applied by screen printing, pin transfer or syringe
on heating method. dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the Typical dwell time is 4 seconds at 250 °C.
packages should preferably be kept: A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 220 °C for all the BGA packages and packages
with a thickness ≥ 2.5mm and packages with a
Manual soldering
thickness <2.5 mm and a volume ≥350 mm3 so called
thick/large packages Fix the component by first soldering two
• below 235 °C for packages with a thickness <2.5 mm diagonally-opposite end leads. Use a low voltage (24 V or
and a volume <350 mm3 so called small/thin packages. less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
Wave soldering 300 °C.

Conventional single wave soldering is not recommended When using a dedicated tool, all other leads can be
for surface mount devices (SMDs) or printed-circuit boards soldered in one operation within 2 to 5 seconds between
with a high component density, as solder bridging and 270 and 320 °C.
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.

2003 May 07 16
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

Suitability of surface mount IC packages for wave and reflow soldering methods

SOLDERING METHOD
PACKAGE(1)
WAVE REFLOW(2)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, not suitable(3) suitable
HTSSOP, HVQFN, HVSON, SMS
PLCC(4), SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended(4)(5) suitable
SSOP, TSSOP, VSO, VSSOP not recommended(6) suitable
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2003 May 07 17
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

DATA SHEET STATUS

DATA SHEET PRODUCT

LEVEL DEFINITION
STATUS(1) STATUS(2)(3)
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

DEFINITIONS DISCLAIMERS
Short-form specification  The data in a short-form Life support applications  These products are not
specification is extracted from a full data sheet with the designed for use in life support appliances, devices, or
same type number and title. For detailed information see systems where malfunction of these products can
the relevant data sheet or data handbook. reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
Limiting values definition  Limiting values given are in
for use in such applications do so at their own risk and
accordance with the Absolute Maximum Rating System
agree to fully indemnify Philips Semiconductors for any
(IEC 60134). Stress above one or more of the limiting
damages resulting from such application.
values may cause permanent damage to the device.
These are stress ratings only and operation of the device Right to make changes  Philips Semiconductors
at these or at any other conditions above those given in the reserves the right to make changes in the products -
Characteristics sections of the specification is not implied. including circuits, standard cells, and/or software -
Exposure to limiting values for extended periods may described or contained herein in order to improve design
affect device reliability. and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information  Applications that are
communicated via a Customer Product/Process Change
described herein for any of these products are for
Notification (CPCN). Philips Semiconductors assumes no
illustrative purposes only. Philips Semiconductors make
responsibility or liability for the use of any of these
no representation or warranty that such applications will be
products, conveys no licence or title under any patent,
suitable for the specified use without further testing or
copyright, or mask work right to these products, and
modification.
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.

2003 May 07 18
Philips Semiconductors Product specification

Octal bus transceiver with direction pin with 5 V tolerant 74LVC245A;

input/outputs (3-state) 74LVCH245A

NOTES

2003 May 07 19
Philips Semiconductors – a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825

For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

© Koninklijke Philips Electronics N.V. 2003 SCA75

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 613508/03/pp20 Date of release: 2003 May 07 Document order number: 9397 750 10562