Semiconductor

Manufacturing Technology

Chapter 1

Introduction to the
Semiconductor Industry

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 Objectives
After studying the material in this chapter, you will be able to:

1. Describe the current economic state and the technical roots of

the semiconductor industry.
2. Explain what is an integrated circuit (IC) and list the five circuit
integration eras.
3. Describe a wafer, including how it is layered and describe the
essential aspects of the five stages of wafer fabrication.
4. State and discuss the three major trends associated with
improvement in wafer fabrication.
5. Explain what is a critical dimension (CD) and how Moore’s law
predicts future wafer fabrication improvement.
6. Describe the different eras of electronics since the invention of
the transistor up to modern wafer fabrication.
7. Discuss different career paths in the semiconductor industry.
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 Microprocessor Chips

R7

Photo courtesy of
Advanced Micro Devices

US$ 499
Wafer: round thin crystalline disk
Wafer fab: fabrication factories Photo courtesy of
Intel Corporation
Chip account for 30%-40% of cost PC

Photo 1.1 3/45

Development of an Industry
• Industry Roots
– Vacuum Tubes (1906)
– Radio Communications (silicon, 1900s)
– Mechanical Tabulators ( movie, The
Imitation Game, 2015)
– Inventors (computer, 50 tons, 3000 ft2,
19000 vacuum tubes)
– Disadvantages (large, unreliable, more
power)
• The Solid State
– Solid State Physics (Ge)
– The First Transistor (1947, Bell Lab.)
– Benefits (small size, no vacuum, reliable,
less power)
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The Imitation Game
Turing's machine

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Vacuum Tubes

Photo 1.2 6/45

 《歲月憶往》交大第一部電腦
• 1957, 台糖 [右圖]
• 1962, IBM650 [交大]
• 台灣找不到氣墊車, 只好
…找牛車
• 真空管及鍺二極體 組成
• Memory為2000字節的磁
鼓(Drum)
• 220V, 100Amp
• 嚴家淦副總統前來主持
剪綵
• 冷氣尚未裝好, 開機40分
鐘, 換 400個二極鍺晶體
，又再換了300多個真空
http://blog.cnyes.com/My/jmtaiwan3952/Article2573591 管…沒法恢復正常運作 7/45
 The Semiconductor Industry

INFRASTRUCTURE PRODUCT
APPLICATIONS
Industry Standards
(SIA, SEMI, NIST, etc.)
Consumers:
Production Tools • Computers
• Automotive
Utilities • Aerospace
Materials & Chemicals Chip • Medical
Manufacturer • other industries
Metrology Tools Customer Service
Analytical Laboratories Original Equipment Manufacturers
Technical Workforce Printed Circuit Board Industry
Colleges & Universities

Figure 1.1 8/45

 The First Transistor from Bell Labs (1947)

• Made from poly-Ge.

• Output power > input power
• 1956: Nobel Prize
• Ge-based transistor quickly
replaced vacuum tubes
because of their smaller size,
lower power, quicker
response time

Photo courtesy of Lucent Technologies Bell Labs Innovations

Photo 1.3 9/45

 Circuit Integration:
on the silicon surface: transistor, diodes,
resistors, inductor and capacitors
• Integrated Circuits (IC)
– Microchips, chips
– Inventors : Noyce (Fairchild) and Kilby
(TI) 1959
– Benefits of IC: cost effective, reliable, and
more complex circuits can be made
• Integration Eras
– From SSI to ULSI
– 1960 - 2000

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 Jack Kilby’s First Integrated Circuit
The devices were connected with individual wires.

• A discrete device is
an electronic device,
such as a resistor,
capacitor, diode, or
transistor, that
contains only one
device per piece
• Kilby: it would be
possible make
discrete devices on
the same piece of
semiconductor (Ge).
• In this photo, it
contains Transistor: 1,
Resistor: 3, C:1
Photo courtesy of Texas Instruments, Inc.
Photo 1.4 11/45
 The First Planar Transistor
(1957, Fairchild)
Planar Technology

Al Thermal SiO2

Transistor: transconductance and varistor

Figure 1.2 12/45

 Doped Region in a Silicon Wafer

Dopant gas

The most
important
discovery
Diffused
Oxide region Oxide

p+ Silicon substrate

The most important invention

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First Silicon IC Chip Made by Robert Noyce of
Fairchild Camera in 1961

• At the same time, the same

idea: make more for less
• Using aluminum thin film
on silicon
• Using grown oxide to
isolate: planar technology
• In this photo: 4-transistor,
sold for $150 (Customer: NASA)
• It has the basic process
techniques of modern IC
chips.
• Noyce, Grove, and Moore Photo courtesy: Fairchild Semiconductor International

cofounded the Intel in

1968. 0.4 inch 14/45
SRAM

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Top View of Wafer with Chips

A single integrated
circuit, also known as a
die, chip, and microchip

Figure 1.3 16/45

 Circuit Integration of Semiconductors

Number of
Semiconductor
Circuit Integration Components per
Industry Time Period
Chip
No integration (discrete components) Prior to 1960 1
Small scale integration (SSI) Early 1960s 2 to 50
Medium scale integration (MSI) 1960s to Early 1970s 50 to 5,000
Early 1970s to Late
Large scale integration (LSI) 5,000 to 100,000
1970s
Late 1970s to Late
Very large scale integration (VLSI) 100,000 to 1,000,000
1980s
Ultra large scale integration (ULSI) 1990s to present > 1,000,000

The key to market success is the ability to deliver the right product at the right time.

Table 1.1 17/45

ULSI Chip

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Advanced CPU

2020

5.1 GHz

16 MB

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$450.
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 IC Fabrication
• Silicon
– Wafer
– Wafer Sizes (increase to reduce cost)
– Devices and Layers
• Wafer Fab (clean room to reduce
contaminations)
• Stages of IC Fabrication
– Wafer preparation
– Wafer fabrication
– Wafer test/sort
– Assembly and packaging
– Final test

20/45
 Evolution of Wafer Size

2000

1992

1987
1981
1975

1965

50 mm 100 mm 125 mm 150 mm 200 mm 300 mm

Figure 1.4 21/45

Devices and Layers from a Silicon Chip

Top protective layer Conductive layer

Metal layer

Insulation layers drain

Recessed conductive
layer
Silicon substrate

- Only first few microns

of the silicon is used
- The bulk of the silicon is
for rigidity during
processing

Silicon substrate

Figure 1.5 22/45

 5 Stages of IC Fabrication

Single crystal silicon

1. Wafer Preparation 4. Assembly and Packaging:
includes crystal The wafer is cut Scribe line
growing, rounding, along scribe lines
slicing and polishing. to separate each die. A single die
Wafers sliced from ingot

2. Wafer Fabrication Assembly Packaging

Metal connections
includes cleaning, are made and the
layering, patterning, chip is encapsulated.
etching and doping.

3. Test/Sort includes Defective die 5. Final Test ensures IC

probing, testing and passes electrical and
sorting of each die on environmental
the wafer. testing.

These five stages are interdependent

Figure 1.6 23/45

 Preparation of Silicon Wafers
Polysilicon Seed crystal
6. Edge Rounding
Crucible
1. Crystal Growth

Heater
7. Lapping

2. Single Crystal Ingot

8. Wafer Etching

3. Crystal Trimming and

Diameter Grind

Polishing
Slurry head

9. Polishong
4. Flat Grinding

Polishing table

5. Wafer Slicing 10. Wafer Inspection

(Note: Terms in Figure 1.7 are explained in Chapter 4.)

Figure 1.7 24/45
 IC Chip Manufacturing Involves:

• Materials: ultra-high pure gases, liquids, which

are poisonous, flammable, explosive, or
corrosive…
• Processing equipment: specialized tools, such as
CVD, etch, PVD, implanter, furnace…, which are
sophisticated and expensive. Hence, reduce
downtime and high throughput are important
• Batch or single-wafer, multi-chamber cluster tools
are popular
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 Wafer Fab
Fabless company: design house
Foundry: produce chips only for other company

Photo courtesy of Advanced Micro Devices-Dresden, © S. Doering

Photo 1.6 26/45

Sample of Microchip Packaging

Wafer Test/Sort first before package

Figure 1.8 27/45

Semiconductor Three Trends

• Increase in Chip Performance

– Critical Dimension (CD)
– Components per Chip
– Moore’s Law
– Power Consumption
• Increase in Chip Reliability
• Reduction in Chip Price

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 Critical Dimension

Common IC Features

Line Width Space

Contact Hole

The physical dimension: feature size

Minimum feature size called critical dimension, CD
Figure 1.9 29/45
 Past and Future Technology Nodes for
Device Critical Dimension (CD)

1988 1992 1995 1997 1999 2001 2002 2005

CD
1.0 0.5 0.35 0.25 0.18 0.15 0.13 0.10
(m)

1. Shrinking of device dimension on the chip : scaling.

2. Reducing CD permits more components on the wafer.
3. 1950: 125 m.

Table 1.2 30/45

 Introduction

Manufacturable solutions exist, and are being optimized ITRS Reports .2013 edition
Manufacturable solutions are known Manufacturable solutions are NOT known

Challenge for Short channel effect (SCE), Leakage

planar CMOS scaling currents, Gate Controllability……. 31/45
Increase in Total Transistors/Chip
1600

Microprocessor Total Transistors in Millions

1400

1200

1000

800

600

400

200

1997 1999 2001 2003 2006 2009 2012

Year

Redrawn from Semiconductor Industry Association, The National

Technology Roadmap for Semiconductors, 1997.
Figure 1.10 32/45
 Moore’s Law for Microprocessors
The number of transistors on a chip double every 18 months.
100M

10M 500
Pentium Pro
Pentium

1M 80486 25

80386
100K 80286 1.0

8086
10K .1
8080

4004 .01
1975 1980 1985 1990 1995 2000
Year
Used with permission from Proceedings of the IEEE, January, 1998, © 1998 IEEE

Figure 1.11 33/45

 Size Comparison of Early and Modern
Semiconductors

1990s Microchip
(5~25 million transistors)

1960s Transistor

U.S. coin, 10 cents

Figure 1.12 34/45

Reduction in Chip Power Consumption per IC
10
Average Power in micro Watts (10-6 W)

0
1997 1999 2001 2003 2006 2009 2012
Year
Redrawn from Semiconductor Industry Association,
National Technology Roadmap, 1997
Figure 1.13 35/45
 Reliability Improvement of Chips
700

600
Long-Term Failure Rate Goals
in parts per million (PPM)

500

400

300

200

100

0
1972 1976 1980 1984 1988 1992 1996 2000

Year

Figure 1.14 36/45

 Price Decrease of Semiconductor Chips
104 Electron tubes Semiconductor devices • In 1958, $10 to
Standard tube buy a single
Device size =
102 Miniature tube Price =
transistor
Bipolar transistor • Today, $10 might
1
Integrated circuits buy a memory
MSI
Relative value

chip over 20
10-2
LSI million
VLSI
• CD: from 0.35->
10-4
0.25 m, dies
ULSI
increase from
10-6
150-> 275.

10-8

10-10
1930 1940 1950 1960 1970 1980 1990 2000
Year
Redrawn from C. Chang & S. Sze, McGraw-Hill, ULSI Technology, (New York: McGraw-Hill, 1996), xxiii.
Figure 1.15 37/45
 The Electronic Era

• 1950s: Transistor Technology

• 1960s: Process Technology
• 1970s: Competition
• 1980s: Automation
• 1990s: Volume Production
• 2007 : Smart Phone

38/45
 Start-Up Cost of Wafer Fabs

$100,000,000,000
Actual Costs
Projected Costs

$10,000,000,000
Cost

$1,000,000,000

$100,000,000

$10,000,000
1970 1980 1990 2000 2010 2020
Year

Used with permission from Proceedings of IEEE, January, 1998 © 1998 IEEE

Figure 1.16 39/45

 Career Paths in the Semiconductor Industry

Fab Manager

Maintenance Manager Production Manager Engineering Manager MS

Maintenance Supervisor Production Supervisor Process Engineer BS

Equipment Engineer Associate Engineer BSET*

Equipment Technician Yield & Failure Analysis Technician AS+

Maintenance Technician Manufacturing Technician Process Technician Lab Technician AS

HS +
Wafer Fab Technician
* Bachelor of Science in
Electronics Technology
Production Operator HS

Education
Figure 1.17 40/45
 Productivity Measurements in a Wafer Fab
Misprocessing

Photo Ion Implant Diffusion

Production Bay Production Bay Production Bay
12
Rework Scrap
9 3 Production
Equipment
Production Equipment Inspection
6 Production Inspection Inspection
Cycle Time Equipment
per Operation
Time In Time Out

Wafer Starts
Wafer Moves
Wafer Outs
1 2 3 4
5 6 7 8 9 10 11 1
12 13 14 15 16 17 18 2 3 4 5 6 7 8
19 20 21 22 23 24 25 9 10 11 12 13 14 15
26 27 28 29 30 31 16 17 18 19 20 21 22
23 24 25 26 27 28 29
Production Inspection Inspection
Production Inspection Production 30 31
Equipment Equipment
Equipment

Etch Thin Films Metallization

Production Bay Production Bay Production Bay

Production Cycle Time = (Date and Time of Wafer Start) - (Date and Time of Wafer Out)
Wafer Outs = Wafer Starts - Wafers Scrapped
Operator Efficiency = Theoretical Cycle Time / Actual Cycle Time

Figure 1.18 41/45

Equipment Technician in a Wafer Fab

Photograph courtesy of Advanced Micro Devices

Photo 1.7 42/45
Technician in Wafer Fab

Photo courtesy of Advanced Micro Devices

Photo 1.8 43/45
 施敏-數位時代的故事

「台灣沒有豐富的地下資源,只有靠著腦
力資源才有未來。」
• 1976年身為經濟部長的孫運璿必須決定台灣是否積極發展積體
電路? 該引進哪一家公司的技術? 該選擇哪一種技術? 忍受多
大的投資風險?
• 七人小組: 建議台灣應該發展IC產業
• 施敏教授建議: 選擇RCA之CMOS
• 當時名單有: Hughes Electronics, GE, RCA, Fairchild.
• 投資: 400萬美元
• RCA: NMOS, Bipolar, CMOS
• CMOS: 省電

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 Apollo 11 vs. iPhone 11

•Face ID
RAM : 1: 106 •氣壓感測器
•三軸陀螺儀
ROM: 1: 7x106 •加速度計
•接近感測器
CPU : 1: 105 •環境光度感測器

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