Answers to Chapter Review Problems
1. a. General purpose registers and main memory cells are small data storage cells in a computer.
b. General purpose registers are inside the CPU; main memory cells are outside the CPU.
(The purpose of this question is to emphasize the distinction between registers and memory cells—a
distinction that seems to elude some students, causing confusion when following machine language
programs.)
2. a. 0010000100000101
b. 1010
c. 001100100100
3. Nine cells with addresses B9, BA, BB, BC, BD, BE, BF, C0, and C1.
4. BA
5. Program Instruction Memory cell
counter register at 00
02 2104 21
04 3100 21
06 C000 04
6. To compute x + y - z, each of the values must be retrieved from memory and placed in a register,
the sum of x and y must be computed and saved in another register, z must be subtracted from that
sum, and the final answer must be stored in memory.
A similar process is required to compute (2x) + y. The point of this example is that the
multiplication by 2 is accomplished by adding x to x.
7. a. Move the contents of register 7 to register E.
b. AND the contents of register 0 with the contents of register 8 and place the result in register 0.
c. Rotate the contents of register 4 three bits to the right.
d. Load register 8 with the value (hexadecimal) 35.
e. Compare the contents of registers 3 and 0. If the patterns are equal, jump to the instruction at
address AD. Otherwise, continue with the next sequential instruction.
8. 16 with 4 bits, 256 with 8 bits
9. a. 2766 b. 1766 c. 80F2 d. A403 e. BB31
10. The only change that is needed is that the third instruction should be 6056 rather than 5056.
11. a. Retrieves from memory cell 3B.
b. Is independent of memory cell 3B.
c. Changes the contents of memory cell 3B.
d. Changes the contents of memory cell 3B.
e. Is independent of memory cell 3B.
12. a. Place the value 05 in register 4. b. 05
13. a. 241B b. 1B34
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14. a. Load register 0 with the contents of memory cell 04.
Store the contents of register 3 in memory cell 45.
Halt.
b. C0
c. 06
15. a. 29 b. 0A
16. a. 00, 01, 02, 03, 04, 05
b. 06, 07
17. a. 03 b. 03 c. 0E
18. 05. The program is a loop that is terminated when the value in register 0 (initiated at 00) is
finally incremented to the value in register 3 (initiated at 05).
19. 20 microseconds.
20. The point to this problem is that a bit pattern stored in memory is subject to interpretation—it
may represent part of the operand of one instruction and the op-code field of another.
a. Registers 0, 1, and 2 will contain 32, 20, and 12, respectively.
b. 12
c. 32
21. The machine will alternate between executing the jump instruction at address AF and the jump
instruction at address B0.
22. It would never halt. The first 2 instructions alter the third instruction to read B000 before it is
ever executed. Thus, by the time the machine reaches this instruction, it has been changed to read
"Jump to address 00." Consequently, the machine will be trapped in a loop forever (or until it is
turned off).
23. a. b. c.
148D 148D 2000
34B3 15B3 1145
C000 358D B10A
34BD 22DD
C000 B00C
22CC
3288
C000
24. a. The single instruction B000 stored in locations 00 and 01.
b. Address Contents
00,01 2100 Initialize
02,03 2270 counters.
04,05 3109 Set origin
06,07 320B and destination.
08,09 1000 Now move
0A,0B 3000 one cell.
0C,0D 2001 Increment
0E,0F 5101 addresses.
10,11 5202
12,13 2333 Do it again
14,15 4010 if all cells
16,17 B31A have not
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18,19 B004 been moved.
1A,1B 2070 Adjust values
1C,1D 3071 that are
1E,1F 2079 location
20,21 3075 dependent.
22,23 207B
24,25 3077
26,27 208A
28,29 3087
2A,2B 2074
2C,2D 3089
2E,2F 20C0
30,31 30A4
32,33 2000
34,35 20A5
36,37 B070 Make the big jump!
c. Address Contents
00,01 2000 Initialize counter.
02,03 2100 Initialize origin.
04,05 2270 Initialize destination.
06,07 2430 Initialize references
08,09 1530 to table.
0A,0B 310D Get origin
0C,0D 1600 value.
0E,0F B522 Jump if value must be adjusted.
10,11 3213 Place value
12,13 3600 in new location.
14,15 2301 Increment
16,17 5003 R0,
18,19 5113 R1, and
1A,1B 5223 R2.
1C,1D 233C Are we done?
1E,1F B370 If so, jump to relocated program.
20,21 B00A Else, go back.
22,23 2370 Add 70 to
24,25 5663 value being
26,27 2301 transferred and
28,29 5443 update R4 and
2A,2B 342D R5 for next
2C,2D 1500 location.
2E,2F B010 Return (from subroutine).
30,31 0305 Table of
32,33 0709 locations that
34,35 0B0F must be
36,37 111F updated for
38,39 212B new location.
3A,3B 2FFF
25.
20A1 21A4
21A2 6001
6001 30A5
21A3 C000
6001
26. The machine would place a halt instruction (C000) at memory location 04 and 05 and then halt
when this instruction is executed. At this point its program counter will contain the value 06.
27. The machine would continue to repeat the instruction at address 06 indefinitely.
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28. It copies the data from the memory cells at addresses 00, 01, and 02 into the memory cells at
addresses 10, 11, and 12.
29. Let R represent the first hexadecimal digit in the operand field;
Let XY represent the second and third digits in the operand field;
If the pattern in register R is the same as that in register 0,
then change the value of the program counter to XY.
30. Let the hexadecimal digits in the operand field be represented by R, S, and T;
Activate the two's complement addition circuitry with registers S and T
as inputs;
Store the result in register R.
31. Same as Problem 24 except that the floating-point circuitry is activated.
32. a. 04 b. A8 c. FC d. 08 e. F4
33. a. b. c. d.
1066 1034 10A5 10A5
30BB 21F0 210F 210F
8001 8001 8001
3034 12A6 4001
21F0 A104
8212 7001
7002 30A5
30A6
34. a. 101000 b. 000000 c. 000100 d. 110001 e. 111001 f. 101110
g. 010101 h. 111111 i. 010001 j. 101110 k. 010001 l. 001110
35. a. AND the byte with 11000011.
b. XOR the byte with 11111111.
c. XOR the byte with 10000000.
d. OR the byte with 10000000.
e. OR the byte with 01111111.
36. XOR the input string with 10000001.
37. First AND the input byte with 10000001, then XOR the result with 10000001.
38. a. 11010 b. 00001111 c. 010 d. 001010 e. 10000
39. a. 9F b. 86 c. FF d. BB
40. a. AB03 b. AB05
41. Address Contents
00,01 2008 Initialize registers.
02,03 2101
04,05 2200
06,07 2300
08,09 148C Get the bit pattern;
0A,0B 8541 Extract the least significant bit;
0C,0D 7335 Insert it into the result.
0E,0F 6212
10,11 B218 Are we done?
12,13 A401 If not, rotate registers
14,15 A307
16,17 B00A and go back;
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18,19 338C If yes, store the result
1A,1B C000 and halt.
42. The idea is to complement the value at address A1 and then add. Here is one solution:
21FF
12A1
7221
13A0
5423
34A2
43. Each character would consist of 8 bits so the rate of 300 bps would translate into approximately
37 characters per second. Thus, the printer could just keep up. (In reality, an ASCII character
requires about 10 bits when transmitted serially because, in addition to a parity bit, start and stop
bits are also added to each pattern. As a rule of thumb, 300 bps is considered to be 30 characters per
second.) If the rate were increased to 1200 bps, the printer wouldn't stand a chance.
44. The typist would be typing 30 x 5 = 150 characters per minute, or 1 character every 0.4 seconds
(= 400,000 microseconds). During this period the machine could execute 20,000,000 instructions.
45. The typist would be producing characters at the rate of 2.5 characters per second, which
translates to 20 bps (assuming each character consists of 8 bits).
46. Address Contents
00,01 2000
02,03 2101
04,05 12FE Get printer status
06,07 8212 and check the ready flag.
08,09 B004 Wait if not ready.
0A,0B 35FF Send the data.
47. Address Contents
00,01 20C1 Initialize registers.
02,03 2100
04,05 2201
06,07 130B
08,09 B312 If done, go to halt.
0A,0B 31A0 Store 00 at destination.
0C,0D 5332 Change destination
0E,0F 330B address,
10,11 B008 and go back.
12,13 C000
48. 14,400 bps is equivalent to 1,800 bytes/sec. So it would take 2960 hours (over 123 days) to fill the
20MB drive.
49. 144
50. Group the 64 values into 32 pairs. Compute the sum of each pair in parallel. Group these sums
into 16 pairs and compute the sums of these pairs in parallel. etc.
51. CISC involves numerous elaborate machine instructions that can be time consuming. RISC
involves fewer and simpler instructions, each of which is efficiently implemented.
52. How about pipelining and parallel processing? Increasing clock speed is another answer.
53. In a multiprocessor machine several partial sums can be computed simultaneously.
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