Electronics I
Lab Report 07
Name Hassnat M.Riaz
Hassna Farooqi
Ali Haider
FA23-BEE-104
Registration Number FA23-BEE-101
FA23-BEE-059
Class BEE-3B
Instructor’s Name Sir Usman
Lab # 6 Current and Voltage Characteristics of Npn/Pnp Transistors
Objectives:
The purpose of this experiment is
• To demonstrate how to test npn and pnp transistors using an ohmmeter.
• To verify the voltages and currents in a base-biased circuit as well as to construct its dc
load line.
• To recognize a shorted and open transistor using Vce measurements.
Background:
Since a transistor can be represented internally by two diode junctions, an ohmmeter can be used
to check each diode junctions. If the three terminals are known then it is possible to determine
if a given transistor is npn or pnp that is the section 1 of this lab.
In a base biased transistor circuit; the quiescent collector current is determined by the base
current and the current gain (ß) of the transistor. Also the base current may be varied by changing
the amount of the base-emitter bias voltage. In spite of its simplicity, a base-biased circuit does
not effectively stabilize a transistor’s quiescent point. Consequently, the Q point is affected by
the transistor’s current gain (ß).
In section 2 of this lab you will explore how the current in a transistor varied by changing the
amount of forward bias of the base-emitter junction with its corresponding change in base
current.
In section 3, you will explore two of the most common transistor failures: the CE open and the CE
short.
EQUIPMENT AND MATERIALS
Two 2N3904 npn transistor Breadboard
Two 2N3906 pnp transistor Digital
Multimeter
1N914 (or 1N 4148) diode Resistors (1/4
W)
0-15V dc power supply 1 kΩ, 560 kΩ
1 MΩ potentiometer
Two 2N3904 npn transistor Breadboard
Useful Formulas:
Quiescent dc base voltage
VB= VCC – IBRB = VBE
Quiescent dc collector (emitter) current
Quiescent dc base current
Quiescent dc collector-to-emitter voltage
Dc load line
In general, make
In-Lab
Experiment with NPN Transistor Section 1 Procedure
C
C
B
B
Figure-1. 2N3904 Transistor
• Using 2N3904 npn transistor, whose schematic diagram and diode junction
representations are shown in Figure-1, connect the ohmmeter’s negative lead to the
transistor’s base lead with the ohmmeter’s positive lead connected to the transistors
emitter lead. In this manner, you forward biased the transistor’s base-emitter diode
junction. Note whether the reading is at the high end or low end of the meter’s scale.
Record your result in Table-1 as either “high” or “low”.
• Reverse the meter’s leads so that the negative lead is connected to the emitter and the
positive is connected to the base. Note the meter reading, and record either a high or
low result in Table-1.
• Now connect the meter’s negative lead to the base and the positive lead to the
transistor’s collector lead. Note that whether the reading is at high end or low end of
the meter’s scale. Record your result in Table-1 as either “high” or “low”.
• Reverse the meter’s leads so that negative lead is connected to the collector and the
positive lad is connected to the base. Note meter reading and record either a high or a
low result in Table-1. The base emitter diode junction was forward biased in step-2
and reverse biased in step-3. If this junction is good, then you should have obtained a
low reading in step-2 and high reading in step-3. The base-collector junction is
forward biased in step-4 and reverse biased in step-5. If this junction is good then you
should have obtained a low reading in step-4 and a high reading in step-5. By
examining the diode junction representation for the npn transistor shown in Figure-1,
you should be able to understand the operation of steps 2 through 5.
• Now connect the meter’s negative lead to the collector and the positive lead to the
transistor’s emitter lead. Note the ohmmeter reading and record this value in table-1.
Now reverse the meter ’s leads so that the negative lead of the meter is
connected to the emitter and the positive to the collector. Note the meter reading and
record this value in Table-1. If transistor is good then both values should be virtually
same, namely infinite resistance. As neither of the two diodes between collector and
emitter is forward or reverse biased simultaneously, the result is basically an open
circuit. Such a test of the collector-emitter junction is used to detect what is
sometimes referred to as “punctured short”, which would result in low resistance path
between collector and emitter leads.
• Result:
Compare the result of tables-1. Note that if that if transistor is good.
Table-1: Data for NPN Transistor
Ohmmeter
Step Number + - Result
1 Base Emitter High
2 Emitter Base Low
3 Base Collector High
4 Collector Base Low
5 Collector Emitter Low
6 Emitter Collector Low
Section 2
Procedure:
1. Wire the circuit shown in the schematic diagram of figure 1, and apply power to
breadboard.
Figure-1. 2N3904 Transistor
• With your DMM, measure the voltage across the base and collector resistors, and, using Ohm’s
law, determine the corresponding currents, recording your values in Table 2. From these two
sets of values, determine the dc current gain or beta( this transistor so that
Record this value of beta in Table 2.
• Use your DMM to measure individually VB and VCE. Record your results in Table 2.
• Compare the values of step 3 with the expected values, using the value of dc determined in step
2 and a typical base-emitter voltage of 0.7V. Record these values in Table 2.
• Disconnect the power from the breadboard and replace the 560-kΩ resistor (RB) with a 1MΩ
potentiometer. Again apply power to the breadboard and connect a voltmeter between the
transistor’s collector terminal and ground.
• Now vary the resistance of the potentiometer until VCE as read by the voltmeter reaches a
minimum value, VCE(sat). Then measure the corresponding collector current, Ic(sat). Record both
values in table 3.
• Continue to vary the resistance of the 1-MΩ potentiometer until VCE reaches a maximum
value, VCE(off). Then measure the corresponding collector current Ic(off). If the collector current
is not essentially zero, then temporarily disconnect one lead of the potentiometer from the
circuit so that the base current is zero. The collector current should also be zero. Measure the
corresponding collector emitter voltage, VCE (off). Record both Ic(off) and VCE(off) in table 3. At
saturation, VCE (sat) is ideally zero, while at cutoff, Ic(off) is zero. Plot the values for Ic and
VCE at cutoff and saturation on the graph constructed in step6. You should find that both
points lie essentially on the dc load line very close to the ideal endpoints of cutoff and
saturation.
• If you disconnected the potentiometer in Step 7, reconnect the potentiometer. Vary the
potentiometer so that you are able to measure about five combinations of Ic and VCE over the
active region of dc load line, recording all values in table 3. Then plot these values on the
graph. As in step 7, each point should lie essentially on the dc load line, as the load line is a
plot of all possible combinations of Ic and VCE.
Circuit: 2N2222
Circuit: 2N3904
Table -2
Transistor-1 Transistor-2(2N2222)
(2N3904)
SIMULATED SIMULATED
Value Value
Parameter
IB 25.5uA 25.55uA
IC 0.007988A 0.0054A
βdc 313.25 211.76
VB 0.709V 0.698V
VCE 7.011V 9.53V
Table#3
Calculated Values
IC VCE
Condition
Saturation 14.64mA 0V
Cut Off 0A 14.88V
Active Region 7.50mA 7.50V
Data Graph-1
Experiment with PNP Transistor
Section 1
Procedure
Using a PNP transistor (2N3906), whose schematic diagram and diode junction representation is
shown in above diagram; connect the ohmmeter’s negative lead to the transistor’s base lead and
ohmmeter’s positive lead to the transistor’s emitter lead. Note that whether the reading is at high
end or low end of the meter’s scale. Record your result in table-4 as either high or low.
• Reverse the meter’s leads so that the negative lead is connected to the emitter and the positive
lead is connected to the base. Note the meter reading and record either a high or a
low result in Table-4.
• Now connect the meter’s negative lead to the base and the positive lead to the transistor’s
collector lead. Note that whether the reading is at high end or low end of the meter’s scale.
Record your result in Table-1 as either “high” or “low”.
• Reverse the meter’s leads so that negative lead is connected to the collector and the positive
one is connected to the base. Note meter reading and record either a high or a low result in
Table-1.
Figure-2. 2N3906 Transistor
• As in step-6 of previous part of this experiment, connect the meter’s negative lead to the
collector and the positive lead to the transistor’s emitter lead. Note the ohmmeter reading and
record this value in table-2. Now reverse the meter’s leads so that the negative of the meter is
connected to the emitter and the positive to the collector. Note the meter reading and record
this value in Table-4. If transistor is good then both values should be virtually same, namely
infinite resistance. As neither of the two diodes between collector and emitter is forward or
reverse biased simultaneously, the result is basically an open circuit. Such a test of the
collector-emitter junction is used to detect what is sometimes referred to as “punctured short”,
which would result in low resistance path between collector and emitter leads.
• The base emitter diode junction was forward biased in step-2 and reverse biased in step-1. If
this junction is good, then you should have obtained a low reading in step-2 and high reading
in step-1. The base-collector junction is forward biased in step-4 and reverse biased in step-3.
If this junction is good then you should have obtained a low reading in step-4 and a high reading
in step-3. By examining the diode junction representation for the npn transistor shown in
Figure-1, you should be able to understand the operation of steps 1 through
Result:
Compare the result of tables-2. Note that if that if transistor is good.
Table-4: Data for PNP Transistor
Ohmm eter
Step Number + - Result
1 Base Emitter High
2 Emitter Base High
3 Base Collector High
4 Collector Base Low
5 Collector Emitter High
6 Emitter Collector Low
Section 2
Procedure
Fortunately, the analysis of pnp transistors follows the same pattern established for npn
transistors. The difference is in the resulting equations for a network in which an npn transistor
has been replaced by a pnp transistor is the sign associated with particular quantities.
• Same circuit is used for analysis by replacing the npn transistor with pnp transistor.
• Repeat the whole procedure given in section 2 and 3 of npn transistor.
Figure-2. 2N3906 Transistor
Circuit: 2N2907
Circuit: 2N3906
Table-5
Transistor-1 Transistor-2
(2N3906) (2N2907)
Parameter
MeasuredValue MeasuredValue
IB -25.53uA -25.5uA
IC -0.0054A -0.00664A
βdc 211.515 260.3
VB -0.698V -0.704V
VCE -9.511V -8.3502V
Table-6
Calculated Values
Condition
IC VCE
Saturation -14.86mA 0V
Cutoff 0A -14.64V
Active Region -7.43mA -7.4V
Performance Viva (5 Total/15
Marks )
(10 Marks)
Performance /6
Results /3
Critical Analysis /1
Critical analysis:
In this lab we learned and used LTSPICE to test the NPN and PNP transistor using potentiometer.
Further we have verified the voltages and currents in a base-biased circuit and constructed its dc
load-line. We also measured Vcc by using open and short transistor.
