Data Sheet No.
PD60026 revS
IR2112(-1-2)(S)PbF
HIGH AND LOW SIDE DRIVER
Features
Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V logic compatible
Separate logic supply range from 3.3V to 20V Logic and power ground 5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs dV/dt immune
Product Summary
VOFFSET IO+/VOUT ton/off (typ.) Delay Matching 600V max. 200 mA / 420 mA 10 - 20V 125 & 105 ns 30 ns
Packages
Description
The IR2112(S) is a high voltage, high speed power MOSFET and IGBT driver with independent high and 16-Lead SOIC (wide body) low side referenced output channels. Proprietary HVIC 14-Lead PDIP and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Typical Connection
HO VDD HIN SD LIN VSS VCC VDD HIN SD LIN VSS VCC COM LO VB VS
up to 600V
TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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IR2112(-1-2)(S)PbF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Symbol
VB VS VHO VCC VLO VDD VSS VIN dVs/dt PD RTHJA TJ TS TL
Definition
High Side Floating Supply Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Supply Offset Voltage Logic Input Voltage (HIN, LIN & SD) Allowable Offset Supply Voltage Transient (Figure 2) Package Power Dissipation @ TA +25C Thermal Resistance, Junction to Ambient Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) (14 Lead DIP) (16 Lead SOIC) (14 Lead DIP) (16 Lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 VCC - 25 VSS - 0.3 -55
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VSS + 25 VCC + 0.3 VDD + 0.3 50 1.6 1.25 75 100 150 150 300
Units
V/ns W C/W
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figures 36 and 37.
Symbol
VB VS VHO VCC VLO VDD VSS VIN TA
Definition
High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Fixed Supply Voltage Low Side Output Voltage Logic Supply Voltage Logic Supply Offset Voltage Logic Input Voltage (HIN, LIN & SD) Ambient Temperature
Min.
VS + 10 Note 1 VS 10 0 VSS + 3 -5 (Note 2) VSS -40
Max.
VS + 20 600 VB 20 VCC VSS + 20 5 VDD 125
Units
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD.
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IR2112(-1-2)(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25C and VSS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
ton toff tsd tr tf MT
Definition
Turn-On Propagation Delay Turn-Off Propagation Delay Shutdown Propagation Delay Turn-On Rise Time Turn-Off Fall Time Delay Matching, HS & LS Turn-On/Off
Figure Min. Typ. Max. Units Test Conditions
7 8 9 10 11 125 105 105 80 40 180 160 160 130 65 30 VS = 0V VS = 600V VS = 600V
ns
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH VIL VOH VOL ILK IQBS IQCC IQDD IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ IO-
Definition
Logic 1 Input Voltage Logic 0 Input Voltage High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Quiescent VCC Supply Current Quiescent VDD Supply Current Logic 1 Input Bias Current Logic 0 Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current
Figure Min. Typ. Max. Units Test Conditions
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 9.5 7.4 7.0 7.6 7.2 200 420 25 80 2.0 20 8.5 8.1 8.6 8.2 250 500 6.0 100 100 50 60 180 5.0 40 1.0 9.6 9.2 V 9.6 9.2 mA VO = 0V, VIN = VDD PW 10 s VO = 15V, VIN = 0V PW 10 s A V mV IO = 0A IO = 0A VB = VS = 600V VIN = 0V or VDD VIN = 0V or VDD VIN = 0V or VDD VIN = VDD VIN = 0V
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IR2112(-1-2)(S)PbF
Functional Block Diagram
VB VDD R Q S HIN
HV LEVEL SHIFT
UV DETECT PULSE FILTER
R R S
Q HO
VDD /VCC LEVEL SHIFT
PULSE GEN
VS
SD UV DETECT
VCC VDD /VCC LEVEL SHIFT
LIN R Q VSS S
LO DELAY COM
Lead Definitions
Symbol
VDD HIN SD LIN VSS VB HO VS VCC LO COM
Description
Logic supply Logic input for high side gate driver output (HO), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return
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IR2112(-1-2)(S)PbF
Lead Assignments
14 Lead PDIP
16 Lead SOIC (Wide Body)
IR2112
IR2112S
14 Lead PDIP w/o lead 4
14 Lead PDIP w/o leads 4 & 5
IR2112-1 Part Number
IR2112-2
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IR2112(-1-2)(S)PbF
<50 V/ns
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
HIN LIN
ton
50%
50%
tr 90%
toff 90%
tf
HO LO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
HIN LIN
50%
50%
50%
SD
tsd
LO
HO
10%
HO LO
90%
MT 90% MT
LO
Figure 5. Shutdown Waveform Definitions
HO
Figure 6. Delay Matching Waveform Definitions
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IR2112(-1-2)(S)PbF
250 Turn-On Delay Time (ns)
250 Turn-On Delay Time (ns) 200 150 100 50 0
-50 -25 0 25 50 Temperature 75 100 125
200
Max .
Max.
150 100
Typ.
50 0
Typ.
10
12
14
16
18
20
VCC /VBS Supply Voltage (V)
Figure 7A. Turn-On Time vs. Temperature
Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage
250 Turn-Off Delay Time (ns) 200 150 100 50 0
400 Turn-On Delay Time (ns) 300
Max.
200 100 0 0 2 4 6 8 10 12 14 16 18 20 VDD Supply Voltage (V)
Max.
Typ.
Typ.
-50
-25
25
50
75
100
125
Temperature (C) Figure 8A. Turn-Off Time vs. Temperature
Figure 7C. Turn-On Time vs. VDD Supply Voltage
250 Turn-Off Delay Time (ns) Turn-OFF Delay Time (ns) 200 150 100
400
Max.
300
Max.
200 100
Typ.
50 0 10 12 14 16 18 20
Typ.
0 0 2 4 6 8 10 12 14 16 18 20 VDD Supply Voltage (V)
VCC /VBS Supply Voltage (V)
Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage
Figure 8C. Turn-Off Time vs. VDD Supply Voltage
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IR2112(-1-2)(S)PbF
Shutdown Delay Time (ns) 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 Temperature (C) Figure 9A. Shutdow n Time vs. Temperature
400 S hutdow n D el Ti e (ns) ay m
250 Shutdown Delay Time (ns) 200 150 100 Typ. 50 0 10 12 14 16 18 20 Max.
Max.
Typ.
VCC /VBS Supply Voltage (V)
Figure 9B. Shutdown Delay Time vs. VCC/VBS Supply Voltage
250 Turn-On rise Time (ns) 200 150 100 50 0 -50
Typ. Max.
300
Max.
200
100
Typ.
0 0 2 4 6 8 10 12 14 16 18 20
-25
V D D S uppl V ol y tage (V )
25 50 75 Temperature (C)
100 125
Figure 9C. Shutdown Time vs. VDD Supply Voltage
Figure 10A. Turn-On Rise Time vs. Temperature
125 Turn-On Fall Time (ns) 100 75 50 25 0
Turn-On Rise Time (ns)
250 200
Max.
150 100 50 0 10 12 14 16 18 20
Typ.
Max.
Typ.
-50 -25 0 25 50 75 100 125
VBIAS Supply Voltage (V)
Figure 10B. Turn-On Rise Time vs. Voltage
Tem perature (C)
Figure 11A Turn-On Fall Time vs. Temperature
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IR2112(-1-2)(S)PbF
125
15 Logic "1" Input Threshold (V) 12
T u rn -O f F a l T i e (n s ) f l m
100
Max.
75 50
Min.
9 6 3 0 -50 -25 0 25 50 75 100 125
Typ.
25 0 10 12 14 16 V B I S S u p p l V o l g e (V ) A y ta 18 20
Temperature (C)
Figure 11B. Turn-Off Fall Time vs. Voltage
15 Logic "0" Input Threshold (V) 12 9 6 3 0
Figure 12A. Logic I Input Threshold vs. Temperature
L o g i " 1 " I p u t T re s h o l c n d
12
15
Min.
6
Max.
2 .5
7 .5
10
1 2 .5
15
1 7 .5
20
-5 0
-2 5
25
50
75
100
125
V D D Logi c
S u p p l V o l g e (V ) y ta
Te m p e ra t u re (C )
Figure 12B. Logic I Input Threshold vs. Voltage
15 Logic " 0 " Input Treshold (V) 1 H igh Level O utput V ol tage (V ) 0.8 0.6 0.4
Figure 13A. Logic 0 Input Threshold vs. Temperature
12
Max.
3
M ax. 0.2 0 -50 -25 0 25 50 75 100 125
0 2.5
7.5
10
12.5
15
17.5
20
VDD Logic Supply Voltage (V)
T e m p e ra tu re
Figure 14A. High Level Output vs. Temperature
Figure 13B. Logic 0 Input Threshold vs. Voltage
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IR2112(-1-2)(S)PbF
Low Level Output Voltage (V)
H i L eve l O utp ut V ol gh tage (V ) 1 0.8 0.6 0.4 M a x. 0.2 0 10 12 14 16 18 20 V B A I S uppl V otage (V ) S y
1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 Temperature (C)
Max.
Figure 14B. High Level Output vs. Voltage
1 0.8 0.6 0.4 Max. 0.2 0 10 12 14 16 18 20
Figure 15A. Low Level Output vs. Temperature
Offset Supply Leakage Current (uA)
Low Level Output Voltage (V)
500 400 300 200 100 0 -50 -25 0 25 50 75 100 125 Max.
VBIAS Supply Votage (V)
Temperature (C) Figure 16A. Offset Supply Current vs. Temperature
Figure 15B. Low Level Output vs. Voltage
Offset Supply Leakage Current (uA)
500 400 300 200 100 0 0 100 200 300 400 500 600 V B B oos t V oltage (v) M ax .
VBS Supply Current (uA)
100 80 60
Max.
40 20 0
Typ.
-50 -25 0 25 50 75 100 125
Tem perature (C )
Figure 16B. Offset Supply Current vs. Voltage
Figure 17A. VBS Supply Current vs. Temperature
10
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IR2112(-1-2)(S)PbF
100 VBS Supply Current (uA)
Vcc Supply Current (uA) 300 250 200 150 100 50 0
80 60 40 20 0 10 12
M ax .
Max.
Typ.
Typ.
-5 0 -2 5 0 25 50 75 100 125
14
16
18
20
V B S Floating S upply V oltage (V )
T e m p e ra t u re ( C )
Figure 17B. VBS Supply Current vs. Voltage
300 Vcc Supply Current (uA) 250 200 150 100 50 0 10 12 14 16 18 20
Figure 18A. VCC Supply Current vs. Temperature
12 VDD Supply Current (uA) 10 8 6 4 2 0 -50 -25 0 25 50 75 100 125 Temperature (C)
Max.
Max.
Typ.
Typ.
Vcc Fixed Supply Voltage (V)
Figure 18B. VCC Supply Current vs. Voltage
12 VDD Supply Current (uA) 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 VDD Logic Supply Voltage (V) 18 20
Figure 19A. VDD Supply Current vs. Temperature
Logic "1 " Input Bias Current (uA) 100 80 60
Max.
Max.
40 20
Typ.
Typ.
0 -50 -25 0 25 50 75 100 125
Temperature (C)
Figure 19B. VDD Supply Current vs. VDD Voltage
Figure 20A. Logic I Input Current vs. Temperature
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IR2112(-1-2)(S)PbF
100
5 Logic "0" Input Bias Current (uA) 4 3 2 1 0 -50 -25 0 25 50 75 100 125 Temperature (C)
Logic " 1" Input Bias Current (uA)
80 60
Max.
40 20
Max.
Typ.
0 0 2 4 6 8 10 12 14 16 V D D L o g i S u p p l V o l g e (V ) c y ta 18 20
Figure 20B. Logic 1 Input Current vs. VDD Voltage
5 4 3 2
Figure 21A. Logic 0 Input Current vs. Temperature
VBS Undervoltage Lockout +(V) 11 10 9
Logic "0" Input Bias Current (uA)
Max. Typ.
Max.
1 0 0 2 4 6 8 10 12 14 16 18 20
Min.
7 6 -50 -25 0 25 50 75 100 125 Temperature (C)
VDD Supply Voltage (V)
Figure 21B. Logic 0 Input Current vs. VDD Voltage
11 10
Figure 22. VBS Undervoltage (+) vs. Temperature
11 Vcc Undervoltage Lockout +(V) 10 9 8 7 6 -50 -25 0 25 50 75 100 125
VBS Undervoltage Lockout -(V)
Max.
9 8 7 6 -50 -25 0 25 50 75 100 125 Temperature (C)
Max. Typ. Min.
Typ. Min.
Figure 23. VBS Undervoltage (-) vs. Temperature
Temperature (C) Figure 24. VCC Undervoltage (-) vs. Temperature
12
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IR2112(-1-2)(S)PbF
11 VCC Undervoltage Lockout - (V)
500 Output source Current (mA) 400 300
10
Max.
9
Typ.
8 7 6 -50 -25 0 25 50 75 100 125 Tem perature (C)
Typ.
200
Min.
Min.
100 0 -50 -25 0 25 50 75 100 125 Tem perature (C )
Figure 25. VCC Undervoltage (-) vs. Temperature
500 400
Figure 26A. Output Source Current vs. Temperature
750 Output Sink Current (mA) 600
Output source Current (mA)
Typ.
300 200 100 0 10 12 14 16 18 20
Typ.
450 300 150 0 -50 -25 0 25 50 75 100 125 Temperature (C)
Min.
Min.
VBIAS Supply Voltage (V)
Figure 26B. Output Source Current vs. Voltage
750 Output Sink Current (mA) 600 450 300 150 0 10 12 14 16 18 20 VBIAS Supply Voltage (V)
Figure 27A. Output Sink Current vs. Temperature
Typ.
Min.
Figure 27B. Output Sink Current vs. Voltage
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IR2112(-1-2)(S)PbF
150 150
320V
125 Junction Temperature (C)
320V
125 Junction Temperature (C)
100
100
140V
75
140V
75
10V
50
10V
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 28. IR2112 TJ vs. Frequency (IRFBC20) RGATE = 33, VCC = 15V
150
320V
Figure 29. IR2112 TJ vs. Frequency (IRFBC30) RGATE = 22, VCC = 15V
150
320V 140V 10V
125
140V
125 Junction Temperature (C)
Junction Temperature (C)
100
10V
100
75
75
50
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 30. IR2112 TJ vs. Frequency (IRFBC40) RGATE = 15, VCC = 15V
150
320V
Figure 31. IR2112 TJ vs. Frequency (IRFPE50) RGATE = 10, VCC = 15V
150
320V 140V
125 Junction Temperature (C) Junction Temperature (C)
125
100
140V
100
75
10V
75
10V
50
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 32. IR2112S TJ vs. Frequency (IRFBC20) RGATE = 33, VCC = 15V
Figure 33. IR2112S TJ vs. Frequency (IRFBC30) RGATE = 22, VCC = 15V
14
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IR2112(-1-2)(S)PbF
150
320V 140V
150
320V 140V 10V
125 Junction Temperature (C)
10V
125 Junction Temperature (C)
100
100
75
75
50
50
25
25
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
0 1E+2 1E+3 1E+4 Frequency (Hz) 1E+5 1E+6
Figure 34. IR2112S TJ vs. Frequency (IRFBC40) RGATE = 15, VCC = 15V
Figure 35. IR2112S TJ vs. Frequency (IRFPE50) RGATE = 10, VCC = 15V
0.0
20.0
Typ.
-6.0
VSS Logic Supply Offset Voltage (V)
-3.0 VS Offset Supply Voltage (V)
16.0
12.0
-9.0
8.0
Typ.
-12.0
4.0
-15.0 10 12 14 16 18 20 VBS Floating Supply Voltage (V)
0.0 10 12 14 16 18 20 VCC Fixed Supply Voltage (V)
Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage
Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage
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IR2112(-1-2)(S)PbF
Case outline
14-Lead PDIP
01-6010 01-3002 03 (MS-001AC)
14-Lead PDIP w/o Lead 4
16
01-6010 01-3008 02 (MS-001AC)
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IR2112(-1-2)(S)PbF
16 Lead PDIP w/o Leads 4 & 5
01-6015 01-3010 02
16-Lead SOIC (wide body)
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01 6015 01-3014 03 (MS-013AA)
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IR2112(-1-2)(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx YWW? ?XXXX
Lot Code (Prod mode - 4 digit SPN code) IR logo
Date code
Pin 1 Identifier ? P MARKING CODE Lead Free Released Non-Lead Free Released
Assembly site code
ORDER INFORMATION
Part only available Leadfree 14-Lead 14-Lead 14-Lead 16-Lead PDIP IR2112 order IR2112PbF PDIP IR2112-1 order IR2112-1PbF PDIP IR2112-2 order IR2112-2PbF SOIC IR2112S order IR2112SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 This product has been qualified per industrial level Data and specifications subject to change without notice. 3/23/2005
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