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AE Mid1 Obj

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0% found this document useful (0 votes)
15 views4 pages

AE Mid1 Obj

Uploaded by

rudrobaditya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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.

S.No Question
In full-wave rectifier the diodes conduct for
1. a)one half-cycle b)full cycle
c)alternate half cycle d)none of these
Input characteristics of Common Emitter amplifier resembles
___________

2. a) Output Characteristics
b) PN Junction Diode
c) Zener Diode
d) Schottky Diode
____________ utilized as a part for multi-stage or cascode
configurations

3 a) Common Base Amplifier


b) UJT
c) Inverter
d) Multiplexer
To obtain a P-type semiconductor the impurity added to a pure
4 semiconductor is
a)Penta valent b) trivalent c) tetravalent d) none of the above
Which one is a unipolar device?
a) FET
5 b) BJT
c) Both a and b
d) None of the above
Which junction is reverse-biased in Common Base Amplifier?
Collector-Emitter
6 Base-Emitter
Collector-Base
None
Bridge rectifier requires
7
a) 2 diodes b)3 diodes c)4 diodes 4)8 diodes
Which of the following are the classification of MOSFET amplifier?
a) Common Source
8 b) Common Gate
c) Common drain
d) All the above
At which terminal, input is applied for BJT configuration of Common
9 Base Amplifier?
a) Emitter
b) Collector
c) Base
d) a & b
Which of the following parameter is increased due to multistage
amplifier?

10 a) Bandwidth
b) Gain
c) Frequency
d) Time period

1.
The current in FET flows between __________ terminals
The maximum rectification efficiency of the half-wave rectifier is
2. _____________

3. For clipping of AC input signal ____________________ element is used

4. An N-channel JFET _________ are the charge carriers

5. A BJT operates in __ number of regions

6. ________ rectifier uses the center tap transformer

________ characteristics give the relationship between drain current


7. and gate to source voltage for different values of drain to source
voltage

8. The bridge rectifier is a ______________ converter

9. FET stands for____________________


The ratio of DC output power divided by AC input power is known as
10. _________

In a P type semiconductor the majority carriers are


1. Electrons b) holes c)none of the above d) both

The ripple factor of a half wave rectifier is


2.
a) 1.21 b)0.482 c) 0.406 d) 0.121
Which of the following are the terminals of MOSFET Amplifier?
a) Source
3 b) Drain
c) Gate
d) All the above
What is the common terminal in BJTs Common Emitter
configuration?

4 a) Base
b) Collector
c) Emitter
d) Source
Which of these is mostly preferred as amplifiers?
a) Common Base
5 b) Common Emitter
c) Common Collector
d) All Mentioned Above
rectifier is used to
a)convert ac to dc voltage
6 b)convert dc to ac
c)both a) and b)
d)convert voltage to current
The reverse current effect damage the junction in
__________________ diode?
a) Zener diode
7
b) PN junction diode
c) Both a and b
d) None of the above
What are the terminals of FET?
a) Anode and cathode
8 b) Source, gate, and drain
c) Collector, emitter, and base
d) None of the above
The maximum efficiency of the center-tapped full wave rectifier is
_________
a) 20%
9 b) 81.2%
c) 80%
d) 90%
10 Collector-Base junction of Common Emitter Amplifier is _________?
a) Forward Bias
b) Reverse Bias
c) Zero Bias
d) Not Biased

1.
Cut in voltage for si diode is _________________
2. The two applications of the PN junction diode are _________

3. An P-channel JFET _________ are the charge carriers

The process of adding impurity to a pure semiconductor is


4.
called___________
_______________ characteristics gives the relationship between drain
5. current and drain to source voltage for different values of the gate to
source voltage
6. BJT is ___________ controlled device

7. __________rectifiers has low efficiency


When the current flows from cathode terminal to anode terminal then
8. the current is said to be ________________________ current

9. The maximum efficiency of FWR is__________

10. The transconductance of FET in CS configuration is given by__________

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