Logic gate 1

Logic gate
A logic gate is an idealized or physical device implementing a Boolean function, that is, it performs a logical
operation on one or more logic inputs and produces a single logic output. Depending on the context, the term may
refer to an ideal logic gate, one that has for instance zero rise time and unlimited fan-out, or it may refer to a
[1]
non-ideal physical device. (see Ideal and real op-amps for comparison)
Logic gates are primarily implemented electronically using diodes or transistors, but can also be constructed using
electromagnetic relays (relay logic), fluidic logic, pneumatic logic, optics, molecules, or even mechanical elements.
With amplification, logic gates can be cascaded in the same way that Boolean functions can be composed, allowing
the construction of a physical model of all of Boolean logic, and therefore, all of the algorithms and mathematics that
can be described with Boolean logic.

Background
The simplest form of electronic logic is diode logic. This allows AND and OR gates to be built, but not inverters,
and so is an incomplete form of logic. Further, without some kind of amplification it is not possible to have such
basic logic operations cascaded as required for more complex logic functions. To build a functionally complete logic
system, relays, valves (vacuum tubes), or transistors can be used. The simplest family of logic gates using bipolar
transistors is called resistor-transistor logic (RTL). Unlike diode logic gates, RTL gates can be cascaded indefinitely
to produce more complex logic functions. These gates were used in early integrated circuits. For higher speed, the
resistors used in RTL were replaced by diodes, leading to diode-transistor logic (DTL). Transistor-transistor logic
(TTL) then supplanted DTL with the observation that one transistor could do the job of two diodes even more
quickly, using only half the space. In virtually every type of contemporary chip implementation of digital systems,
the bipolar transistors have been replaced by complementary field-effect transistors (MOSFETs) to reduce size and
power consumption still further, thereby resulting in complementary metal–oxide–semiconductor (CMOS) logic.
For small-scale logic, designers now use prefabricated logic gates from families of devices such as the TTL 7400
series by Texas Instruments and the CMOS 4000 series by RCA, and their more recent descendants. Increasingly,
these fixed-function logic gates are being replaced by programmable logic devices, which allow designers to pack a
large number of mixed logic gates into a single integrated circuit. The field-programmable nature of programmable
logic devices such as FPGAs has removed the 'hard' property of hardware; it is now possible to change the logic
design of a hardware system by reprogramming some of its components, thus allowing the features or function of a
hardware implementation of a logic system to be changed.
Electronic logic gates differ significantly from their relay-and-switch equivalents. They are much faster, consume
much less power, and are much smaller (all by a factor of a million or more in most cases). Also, there is a
fundamental structural difference. The switch circuit creates a continuous metallic path for current to flow (in either
direction) between its input and its output. The semiconductor logic gate, on the other hand, acts as a high-gain
voltage amplifier, which sinks a tiny current at its input and produces a low-impedance voltage at its output. It is not
possible for current to flow between the output and the input of a semiconductor logic gate.
Another important advantage of standardised integrated circuit logic families, such as the 7400 and 4000 families, is
that they can be cascaded. This means that the output of one gate can be wired to the inputs of one or several other
gates, and so on. Systems with varying degrees of complexity can be built without great concern of the designer for
the internal workings of the gates, provided the limitations of each integrated circuit are considered.
The output of one gate can only drive a finite number of inputs to other gates, a number called the 'fanout limit'.
Also, there is always a delay, called the 'propagation delay', from a change in input of a gate to the corresponding
change in its output. When gates are cascaded, the total propagation delay is approximately the sum of the individual
delays, an effect which can become a problem in high-speed circuits. Additional delay can be caused when a large
Logic gate 2

number of inputs are connected to an output, due to the distributed capacitance of all the inputs and wiring and the
finite amount of current that each output can provide.

Logic gates
All other types of Boolean logic gates (i.e., AND, OR, NOT, XOR,
XNOR) can be created from a suitable network of NAND gates.
Similarly all gates can be created from a network of NOR gates.
Historically, NAND gates were easier to construct from MOS
technology and thus NAND gates served as the first pillar of Boolean
logic in electronic computation.

For an input of 2 variables, there are 16 possible boolean algebraic

functions. These 16 functions are enumerated below, together with
their outputs for each combination of inputs variables.

Venn Diagrams for Logic Gates

Logic gate 3

INPUT A 0 0 1 1 Meaning

B 0 1 0 1

OUTPUT FALSE 0 0 0 0 Whatever A and B, the output is false. Contradiction.

A AND B 0 0 0 1 Output is true if and only if (iff) both A and B are true.

A B 0 0 1 0 A doesn't imply B. True iff A but not B.

A 0 0 1 1 True whenever A is true.

A B 0 1 0 0 A is not implied by B. True iff not A but B.

B 0 1 0 1 True whenever B is true.

A XOR B 0 1 1 0 True iff A is not equal to B.

A OR B 0 1 1 1 True iff A is true, or B is true, or both.

A NOR B 1 0 0 0 True iff neither A nor B.

A XNOR B 1 0 0 1 True iff A is equal to B.

NOT B 1 0 1 0 True iff B is false.

A B 1 0 1 1 A is implied by B. False if not A but B, otherwise true.

NOT A 1 1 0 0 True iff A is false.

A B 1 1 0 1 A implies B. False if A but not B, otherwise true.

A NAND B 1 1 1 0 A and B are not both true.

TRUE 1 1 1 1 Whatever A and B, the output is true. Tautology.

The four functions denoted by arrows are the logical implication functions. These functions are not usually
implemented as elementary circuits, but rather as combinations of a gate with an inverter at one input.

Symbols
There are two sets of symbols in common use, both now defined by
ANSI/IEEE Std 91-1984 and its supplement ANSI/IEEE Std 91a-1991.
The "distinctive shape" set, based on traditional schematics, is used for
simple drawings, and derives from MIL-STD-806 of the 1950s and
1960s. It is sometimes unofficially described as "military", reflecting
its origin. The "rectangular shape" set, based on IEC 60617-12, has
rectangular outlines for all types of gate, and allows representation of a
much wider range of devices than is possible with the traditional
symbols. The IEC's system has been adopted by other standards, such
as EN 60617-12:1999 in Europe and BS EN 60617-12:1999 in the
A synchronous 4-bit up/down decade counter
United Kingdom.
symbol (74LS192) in accordance with
ANSI/IEEE Std. 91-1984 and IEC Publication
The goal of IEEE Std 91-1984 was to provide a uniform method of
60617-12.
describing the complex logic functions of digital circuits with
schematic symbols. These functions were more complex than simple
AND and OR gates. They could be medium scale circuits such as a 4-bit counter to a large scale circuits such as a
microprocessor. IEC 617-12 and its successor IEC 60617-2 do not include the "distinctive shape" symbols. [2] These
are, however, included in ANSI/IEEE 91 (and 91a) with this note: "The distinctive-shape symbol is, according to
 IEC Publication 617, Part 12, not preferred, but is not considered to be in contradiction to that standard." This
compromise was reached between the respective IEEE and IEC working groups to permit the IEEE and IEC
standards to be in mutual compliance with one another.
In the 1980s, schematics were the predominant method to design both circuit boards and custom ICs known as gate
arrays. Today custom ICs and the field-programmable gate array are typically designed with Hardware Description
Languages (HDL) such as Verilog or VHDL.

Type Distinctive shape Rectangular shape Boolean algebra Truth table

between A & B

AND

OR

NOT

In electronics a NOT gate is more commonly called an inverter. The circle on the symbol is called a bubble, and is used in logic diagrams to
indicate a logical inversion between the external logic state and the internal logic state (1 to 0 or vice versa). On a circuit diagram it must be
accompanied by a statement asserting that the positive logic convention or negative logic convention is being used (high voltage level = 1 or high
voltage level = 0, respectively). The wedge is used in circuit diagrams to directly indicate an active-low (high voltage level = 0) input or output
without requiring a uniform convention throughout the circuit diagram. This is called Direct Polarity Indication. See IEEE Std 91/91A and IEC
60617-12. Both the bubble and the wedge can be used on distinctive-shape and rectangular-shape symbols on circuit diagrams, depending on the
logic convention used. On pure logic diagrams, only the bubble is meaningful.

NAND
NOR

XOR

XNOR or

Two more gates are the exclusive-OR or XOR function and its inverse, exclusive-NOR or XNOR. The two input
Exclusive-OR is true only when the two input values are different, false if they are equal, regardless of the value. If
there are more than two inputs, the gate generates a true at its output if the number of trues at its input is odd ([3]). In
practice, these gates are built from combinations of simpler logic gates.
Universal logic gates
Charles Sanders Peirce (winter of 1880–81) showed that NOR gates
alone (or alternatively NAND gates alone) can be used to reproduce
the functions of all the other logic gates, but his work on it was
[4]
unpublished until 1933. The first published proof was by Henry M.
Sheffer in 1913, so the NAND logical operation is sometimes called
[5]
Sheffer stroke; the logical NOR is sometimes called Peirce's arrow.
Consequently, these gates are sometimes called universal logic
[6]
gates.

De Morgan equivalent symbols

By use of De Morgan's theorem, an AND gate can be turned into an OR
gate by inverting the sense of the logic at its inputs and outputs. This
leads to a separate set of symbols with inverted inputs and the opposite
core symbol. These symbols can make circuit diagrams for circuits The 7400 chip, containing four
using active low signals much clearer and help to show accidental NANDs. The two additional pins
connection of an active high output to an active low input or
supply power (+5 V) and connect
vice-versa.
the ground.
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