Analog design procedures for channel

lengths down to 20 nm
Willy Sansen
K.U.Leuven, Leuven, Belgium
Email : willy.sansen@esat.kuleuven.be
Abstract : A new design procedure is derived for analog design with MOSTs in all three regions of
operation i.e. strong and weak inversion and velocity saturation. BSIM6/EKV model parameters are
used. Optimum biasing points are derived for single- and two-stage amplifiers. It is shown that for
channel lengths around 20 nm, a unique optimum is achieved for the fT x gm/IDS Figure of merit.
At such low channel lengths noise and distortion establish severe limitations in dynamic range. They
can be mitigated by the use of negative resistors, as used in an increasing number of amplifier and
filter configurations. An overview is given of such circuit configurations.

I. INTRODUCTION For this specific gm, the biasing current has to be

reduced to its minimum value. This is done by
Standard CMOS technologies offer channel biasing the MOST at the lowest possible value of
lengths which become smaller and smaller. VGS-VT or the Inversion coefficient (IC). As a
FinFETs with 22 nm channel lengths have result the transistor size W/L increases, also
been reported already [1]. As a result the fT of increasing the input capacitance and decreasing
the MOST devices increases inversely its fT. In this text it is explored how far the
proportional to these channel lengths. A biasing current can be decreased. This is firstly
specific fT denoted by fTsp has been defined in done for a single-transistor amplifier in section
the EKV model [2], which has been adopted II. Two-stage amplifiers are discussed next in
by the new BSIM6 model, as given by section III. In section IV velocity saturation is
added, for ever decreasing channel lengths. It is
shown in Section V that for channel lengths
around 20 nm, an optimum is reached in the fT x
gm/IDS figure of merit of high-speed low-noise
(1) amplifiers around an IC of unity. This optimum
in which UT = kT/q or about 26 mV at room yields maximum values of MHzpF/mA.
temperature. For a 65 nm channel length, in Finally in section VI a number of circuit
which the electron mobility µ is about 400 examples is given which all reach the highest
2 possible values of MHzpF/mA. They all use
cm /Vs, this is about 78 GHz. It only depends on
negative resistances to minimize the power
the channel length itself, not the biasing voltage
consumption.
VGS-VT nor other voltages.
The transconductances of the MOST devices in
II. SINGLE-STAGE AMPLIFIER
the signal path are derived from the
WITH MINIMUM INVERSION
specifications such as speed or GBW, and noise.
COEFFICIENT
For example for a single-stage amplifier (such as
symmetrical opamps and folded cascodes), the
For a single-transistor amplifier which can
GBW is given by
operate in both strong and weak inversion, the
current IDS is obtained from the gm as given by
[2]
(2)
For a given GBW and load capacitance, the gm is
readily calculated.

978-1-4799-2452-3/13/$31.00 ©2013 IEEE 337

 (3)
Deep in weak inversion (for IC << 1, GIC ≈ 1),
this ratio simply becomes 1/UT.
The transistor size W/L is then obtained from

(4)
In which Ispec is a specific current [2]. It is Figure 1 : Values of fT, W/L and IDS versus IC
determined by two parameters only. They are for constant gm
encircled because they appear always as a unity. -3
The first one combines the size with the For GBW = 50 MHz, ICmin = 6.4 10 . For CL =
parameter K’. Parameter K’ is µCox/2n and n is 1 2 pF, gm = 630 mS and IDS = 23 µA, W/L =
+ CD/Cox in which Cox is the oxide capacitance 1860, CGS = 20.6 pF, fT = 485 MHz and FOM =
and CD is the depletion capacitance (both in 4360 MHzpF/mA. This a large value indeed !
2
F/cm ). Typical value of n are 1.3 to 1.5. The Actually IC could as well have been chosen to be
about 0.1. The current would increase only by a
other parameter combines parameter n with UT.
few percent’s. It can be concluded that IC must
Finally note that
be chosen as a fraction of fTsp as shown in (5) but
rather with a factor of 100 instead of 10.
Note that the Inversion Coefficient IC is used
rather than the overvoltage VGS-VT. The relation
(5) between both is given by [2,3].
which is simply IC.fTsp in deep weak inversion
(since GIC ≈ 1 for IC < 1)) .
The values of the GBW can often be low with
respect to fTsp. This is the case when low-
(7)
frequency amplifiers and filters are realized in
This relation is shown in Figure 2. This is a
high-frequency technologies (with small channel
powerful relationship as W/L doesn’t come in.
lengths). In this case the MOST is expected to
work in weak inversion (IC<<1). Both the fT and
the inversion coefficient IC can thus be made
small. If we select GBW to be 1/10 of the fT, the
IC can be as low as

(6)
They are sketched in Figure 1 for the values
shown. It is clear that for a constant gm, the
transistor size W/L blows up reducing fT
considerably. The current decreases first but
reaches a minimum value. It is thus not
necessary to choose very low values of IC. Figure 2: Relationship between VGS-VT in mV vs
For example for L = 65 nm, fTsp = 78 GHz (µ = the Inversion Coefficient IC. For IC = 1, VGS-VT
400 cm2/Vs). ≈ 37 mV.

338
 III. TWO-STAGE AMPLIFIER

Two gain stages are now present which both

have a high impedance output node. They are
connected by means of a compensation
capacitance Cc to create pole splitting [3]. Its
value is normally about three times the parasitic
capacitance at this node, as given by

(8)
Both capacitances CGS6 and CGS1 depend on the
transistors sizes and thus on the IC used. They
can easily be extracted from the values of gm and
fT, as shown by (5). CGS1 is taken 2.6 x larger to
include all parasitics. A minimum value of IC is
found as given by again (6). The values of the Figure 4 : Optimum IC values for different GBW
corresponding currents are shown in Figure 3 for and different channel lengths L for CL =2 pF.
50 MHz GBW (L = 65 nm and CL = 2 pF). It is
clear that the best choice for IC is much larger IV. VELOCITY SATURATION
i.e. IC = 0.01, which yields 930 MHzpF/mA.
In the EKV/BSIM6 models [2] velocity satura-
tion is modeled by a new parameter λc, given by

(9)
7
in which vsat is the velocity saturation (about 10
cm/s in silicon). Lsat is about 21 nm. For 65 nm
channel length λc is about 0.32. The MOST is in
the velocity saturation region if IC is larger than
2
1/ λc or about 10.

Figure 3 : Optimum IC for a two-stage Miller

opamp with 50 MHz GBW and CL = 2 pF

The larger the GBW, the higher the optimum IC.

For example for a 500 MHz GBW the optimum
IC is 0.3 corresponding to only 720 MHzpF/mA.
Both FOM values are much higher than the
typical 350 MHzpF/mA obtained for IC = 10 (or
VGS-VT = 0.2 V).
It is clear that for different values of GBW and
different values of channel length, different
optimum values of IC are obtained. They are
shown in Figure 4 for CL = 2 pF. Figure 5 : gm, gm /IDS , fT and fT x gm /IDS vs IC.
For a channel length of 250 nm, a 1 GHz opamp
is still possible but with an IC of nearly 10. A 1 The plots of gm, gm /IDS and fT are all given in
MHz opamp in the same technology requires Figure 5. They are plotted versus IC [2].
only an IC of about 0.004.

339
The product of fT x gm /IDS is added as well as it
is often used as a figure of merit.
The three regions of operation are easily
identified, Weak inversion occurs for IC < 1 .
2
Velocity saturation occurs for IC > 1/ λc and
strong inversion is in the middle.

Note that gm at IC = 1 equals

(10)
with Ispec given by (4). Figure 7 : Negative R’s in symmetrical opamps

V. CHANNEL LENGTHS AT LSAT The two transistors in the middle with transistors
sizes A, slightly smaller than 1, provide positive
For channel lengths around Lsat, parameter λc is feedback and thus represent negative resistances.
also 1 and thus coincides with the IC value of 1 For example if A = 0.7 (and B = 3), then for a
between weak and strong inversion. This GBW of 1 MHz with 1 pF load, an IC =1 yields
situation is depicted in Figure 6 for two different 6000 MHzpF/mA. This is about 10 times larger
channel lengths, one of which is Lsat. Only fT and than for a symmetrical amplifier without
the product are given, but notice that fT is the negative feedback and IC = 10, and about 4
inverse of gm, and is thus easily obtained as well. times larger than a single-transistor !
Negative resistances have also been used in
differential pairs, source followers and cascodes
as shown in Figure 10. They yield filter FOMs
much larger than hitherto available.

Figure 8 : Negative resistances in filters

Figure 6 : fT and fT x gm /IDS for two different
channel lengths L> Lsat and Lsat (of 21 nm) itself. VII. CONCLUSIONS
This clearly shows that for channel lengths Both weak inversion and negative resistances
approaching 21 nm, the optimum value of IC is open avenues for values of MHzpF/mA hitherto
around unity, at least for the product fT x gm /IDS. unavailable.
For such small channel lengths, the operation
point IC of the signal carrying MOSTs is thus 1. REFERENCES

VI. CIRCUIT EXAMPLES 1. S. Damaraju etal, ISSCC ’12, 56-57.

The power can be minimized by taking small 2. C. Enz, etal on the EKV model, AICSP
values of IC. This is also true when negative 1995, 83-114 & Springer ‘06 & Wiley ‘11
resistances are used (or positive feedback), to 3. W. Sansen, “Analog Design Essentials”,
enhance gain and GBW. Springer 2006.
A good example is the symmetrical amplifier 4. K. Ohri, etal, JSSC Febr 79, 38-46
shown in Figure 7. 5. J. Roh, etal JSSC Febr 08, 361-370

340