Group B: Sequential Circuit

MES’s Wadia College of Engineering, Pune-1

Department of Computer Engineering

Subject: Digital Electronics Lab (DEL) Class: SE Comp

Name: Roll No.:
Semester: Sem-I Year: 2024-25
Date Of Performance: Date Of Submission:
Examined:

Assignment No-10

Title:- Modulo N Counter

Assignment Name: Realization of Mod -N counter using 7490

Outcome:
 Students will be able to understand the working of Modulus Counter
 Students will be able to implement different Modulus N Counter using IC 7490

Apparatus:

Digital trainer kit, ICs- 7490 ,7408,7432 Probs

Theory:

A modulus-n counter is a sequential logic device that counts through a predetermined sequence of states
when triggered by a clock signal.

The number of states it cycles through before returning to the initial state is called its modulus. For
example, a 2-bit counter with states 00, 01, 10, 11 has a modulus of 4.

Design for Mod-N counter :

The steps for the design are –

Step 1 : Decision for number of flip-flops –

Example : If we are designing mod N counter and n number of flip-flops are required then n can be
found out by this equation, N <= 2n

Here we are designing Mod-10 counter Therefore, N= 10 and number of Flip flops(n) required is
For n =3, 10<=8, which is false.
For n= 4,10<=16, which is true.

Therefore number of FF required is 4 for Mod-10 counter.

Step 2 : Write excitation table of Flip flops –

Here T FF is used- (You can use any type of FF)

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Excitation table of T FF.

Step 3 : Draw state diagram and circuit excitation table –

Counting Sequence of Decade counter

A decade counter is called as mod -10 or divide by 10 counter. It counts from 0 to 9 and again reset to
0. It counts in natural binary sequence. Here 4 T Flip flops are used. It resets after Q 3 Q2 Q1 Q0 =
1001.
Circuit excitation table –
Here Q3 Q2 Q1 Q0 are present states of four flip-flops and Q*3 Q*2 Q*1 Q*0 are next counting state
of 4 Flip flops. If there is a transition in current state i.e if Q3 value changes from 0 to 1 or 1 to 0 then
there’s corresponding T(toggle) bit is written as 1 otherwise 0.

Circuit excitation table

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Step 4 : Create Karnaugh map for each FF input in terms of flip-flop outputs as the input
variable –
Simplify the K map –

Step 5 : Create circuit diagram –

Here negative edge triggered clock is used for toggling purpose.
 The clock is provided to every Flip flop at same instant of time.
 The toggle(T) input is provided to every Flip flop according to the simplified equation of K
Map.

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Timing diagram : Here toggling is used.

Characteristic table of T FF.

The state of a FF will change only when toggle input(T) of a FF is 1.

Timing diagram of synchronous Decade counter

Explaination :
 Initially Q3 Q2 Q1 Q0 are 0 0 0 0.
 The sequence of counter can be verified from the timing diagram. At every falling edge of the
clock output Q0 toggles because T0 is connected to logic 1.
 T1 becomes 1 only when expression T1 = Q’ 3Q0 becomes 1 also if clock falling edge
occurs(because there is negative edge triggering) then the output state of T 1 i.e Q1 will
change.
 T2 becomes 1 only when expression T2 = Q 1Q0 becomes 1 also if clock falling edge occurs
then the output state Q2 will change.
 T3 becomes 1 only when expression T1 = Q3Q0 + Q2Q1Q0 resultant becomes 1 also if clock
falling edge occurs(because there is negative edge triggering) then the state of Q3 will change.
 We get Output as Q3(MSB) Q2 Q1 Q0(LSB).
 After 10th falling edge the output state of all the FFs again becomes 0 0 0 0.

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Ripple counter (IC 7490) : Decade Counter (MOD 10)

IC-7490 is a TTL MSI decade counter. It contains four master slave flip flops and additional gating to
provide a divide-by-two counter and a three stage binary counter which provides a divide by 5
counter.

The Basic internal

structure of IC 7490

WORKING:

1. If both the reset input Ro(1)= R1 & Ro(2)=R2 are at logic 1 then all the flip-flop will be reset and
the output is given by

QD QC QB QA = 0000

2. If both the reset input R9(1)=R3 & R9(2)=R4 are at logic 1 then the counter output is set to
decimal 9.

QD QC QB QA = 1001

3. If any one pin of Ro(1) & Ro(2) and one of R9(1) & R9(2) are at low, then the counter will be in
counting mode.

Decade Counter Operation :

1. The output of MOD-2 is externally connected to the input B which is the clock input of the internal
MOD-5 counter.

2. Hence QA toggles on every falling edge of clock input whereas the output QD,QC,QB of the
MOD-5 counter will increment from 000 to 100 on low going change of QA output.
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3. Due to cascading of MOD-2 and MOD-5 counter, the overall configuration becomes a MOD-10 i.e.
decade counter.

4. The reset inputs Ro(1), Ro(2) and preset inputs R9(1), R9(2) are connected to ground so as to make
them inactive.

Implémentations: Realization of MOD 10 counter using IC 7490

MOD 6 using IC 7490

Implementation:

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Waveform with truth table:

MOD 8 using IC 7490:

MOD 20 using IC 7490:

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MOD-100 using IC 7490:

 MOD-100 counter can be obtained by cascading two decade counter IC’s.

 Each IC gives divide by 10 counts. Hence 2 ICs will give 10*10=100 counts.

 Clock is applied to the input A of IC 7490, the Q1 output is connected to B input etc.

 For cascading, the QD output of the first IC is connected to the input A of second IC. Thus
QD of IC-(1) acts as clock input to IC-(2).

 The Ro (1), Ro(2), R9(1), R9(2) inputs of both ICs are connected to ground so as to make
them inactive.

 The total count provided by the two counters varies from 00 to 99 decimal that means 100
states. Hence it is a MOD-10 counter.

Implementation:

Applications:

1. Symmetrical Bi- quinary divide by ten counter

2. Digital clocks: A combination of a MOD-10 up counter and a seven-segment display is

often used in digital clocks to display numeric values.

3. Frequency counters: Modulus counters are used as frequency counters because they
divide the input control clock frequency by the counter's modulus.

4. Time measurement: Modulus counters are used in time measurement applications

Conclusion:

Questions:

1. Explain the pin diagram of IC 7490.

2. Implement using IC 7490 : MOD 5, MOD 96 , MOD 99, MOD 125 .

Also explain the working.

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