DATA SHEET

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Digital FET, N-Channel D

FDV301N, FDV301N-F169
General Description
This N−Channel logic level enhancement mode field effect
transistor is produced using onsemi’s proprietary, high cell density, G S
DMOS technology. This very high density process is especially
tailored to minimize on−state resistance. This device has been
designed especially for low voltage applications as a replacement for
digital transistors. Since bias resistors are not required, this one
N−channel FET can replace several different digital transistors, with
different bias resistor values. SOT−23
CASE 318−08
Features
• 25 V, 0.22 A Continuous, 0.5 A Peak MARKING DIAGRAM
♦ RDS(on) = 5 W @ VGS = 2.7 V
♦ RDS(on) = 4 W @ VGS = 4.5 V
• Very Low Level Gate Drive Requirements Allowing Direct &E&Y
301&E&G
Operation in 3 V Circuits. VGS(th) < 1.06 V
• Gate−Source Zener for ESD Ruggedness. > 6 kV Human Body
Model
• Replace Multiple NPN Digital Transistors with One DMOS FET &E = Designates Space
&Y = Binary Calendar Year
• This Device is Pb−Free and Halide Free Coding Scheme
301 = Specific Device Code
Vcc &G = Date Code

D
ORDERING INFORMATION
OUT
Device Package Shipping†
FDV301N, SOT−23−3 3000 /
IN G S FDV301N−F169 (Pb−Free, Tape & Reel
Halide−Free)
GND

Figure 1. Inverter Application †For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

© Semiconductor Components Industries, LLC, 2009 1 Publication Order Number:

August, 2021 − Rev. 8 FDV301N/D
 FDV301N, FDV301N−F169

ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise noted.

Symbol Parameter FDV301N Unit
VDSS, VCC Drain−Source Voltage, Power Supply Voltage 25 V
VGSS, VI Gate−Source Voltage, VIN 8 V
ID, IO Drain/Output Current − Continuous 0.22 A
0.5
PD Maximum Power Dissipation 0.35 W
TJ, TSTG Operating and Storage Temperature Range −55 to 150 °C
ESD Electrostatic Discharge Rating MIL−STD−883D Human Body Model 6.0 kV
(100 pF/1500 W)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS TA = 25°C unless otherwise noted.

Symbol Parameter Value Unit
RθJA Thermal Resistance, Junction−to−Ambient 357 °C/W

INVERTER ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise noted.

Symbol Parameter Test Conditions Min Typ Max Unit
IO(off) Zero Input Voltage Output Current VCC = 20 V, VI = 0 V − − 1 mA
VI(off) Input Voltage VCC = 5 V, IO = 10 mA − − 0.5 V
VI(on) VO = 0.3 V, IO = 0.005 A 1 − −
RO(on) Output to Ground Resistance VI = 2.7 V, IO = 0.2 A − 4 5 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise noted.

Symbol Parameter Test Conditions Min Typ Max Unit
OFF CHARACTERISTICS
BVDSS Drain−Source Breakdown Voltage VGS = 0 V, ID = 250 mA 25 − − V
DBVDSS/DTJ Breakdown Voltage Temp. Coefficient ID = 250 mA, Referenced to 25°C − 25 − mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V − − 1 mA
VDS = 20 V, VGS = 0 V, TJ = 55°C − − 10
IGSS Gate − Body Leakage Current VGS = 8 V, VDS = 0 V − − 100 nA
ON CHARACTERISTICS
DVGS(th)/DTJ Gate Threshold Voltage Temp. ID = 250 mA, Referenced to 25°C − −2.1 − mV/°C
Coefficient

VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 mA 0.70 0.85 1.06 V
RDS(on) Static Drain−Source On−Resistance VGS = 2.7 V, ID = 0.2 A − 3.8 5 W
VGS = 2.7 V, ID = 0.2 A, TJ = 125°C − 6.3 9
VGS = 4.5 V, ID = 0.4 A − 3.1 4
ID(on) On−State Drain Current VGS = 2.7 V, VDS = 5 V 0.2 − − A
gFS Forward Transconductance VDS = 5 V, ID = 0.4 A − 0.2 − S

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 FDV301N, FDV301N−F169

ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise noted. (continued)

Symbol Parameter Test Conditions Min Typ Max Unit
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 10 V, VGS = 0 V, f = 1.0 MHz − 9.5 − pF
Coss Output Capacitance − 6 −
Crss Reverse Transfer Capacitance − 1.3 −
SWITCHING CHARACTERISTICS (Note 1)
tD(on) Turn − On Delay Time VDD = 6 V, ID = 0.5 A, VGS = 4.5 V, − 3.2 8 ns
RGEN = 50 W
tr Turn − On Rise Time − 6 15
tD(off) Turn − Off Delay Time − 3.5 8
tf Turn − Off Fall Time − 3.5 8
Qg Total Gate Charge VDS = 5 V, ID = 0.2 A, VGS = 4.5 V − 0.49 0.7 nC
Qgs Gate−Source Charge − 0.22 −
Qgd Gate−Drain Charge − 0.07 −
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuous Drain−Source Diode Forward Current − − 0.29 A
VSD Drain−Source Diode Forward Voltage VGS = 0 V, IS = 0.29 A (Note 1) − 0.8 1.2 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.

TYPICAL CHARACTERISTICS

0.5 1.4
VGS = 4.5 V 3.5 V VGS = 2.0 V
RDS(on), Normalized Drain−Source

4.0 V 3.0 V
ID, Drain−Source Current (A)

0.4
1.2 2.5 V
2.7 V
On−Resistance

2.7 V
0.3 3.0 V
2.5 V
1
3.5 V
0.2
2.0 V
0.8
0.1 4.0 V
1.5 V 4.5 V
0 0.6
0 0.5 1 1.5 2 2.5 3 0 0.1 0.2 0.3 0.4 0.5
VDS, Drain−Source Voltage (V) ID, Drain Current (A)

Figure 2. On−Region Characteristics Figure 3. On−Resistance Variation with Drain

Current and Gate Voltage

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 FDV301N, FDV301N−F169

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

1.8 15
ID = 0.2 A ID = 0.2 A
RDS(on), Normalized Drain−Source

1.6 VGS = 2.7 V

RDS(on), On−Resistance (W)

12

1.4 25°C 125°C

On−Resistance

9
1.2
6
1.0

3
0.8

0.6 0
−50 −25 0 25 50 75 100 125 150 2 2.5 3 3.5 4
TJ, Junction Temperature (5C) VGS, Gate to Source Voltage (V)

Figure 4. On−Resistance Variation with Temperature Figure 5. On Resistance Variation with

Gate−To−Source Voltage
0.20 0.5
VDS = 5.0 V TJ = −55°C VGS = 0 V
0.2
IS, Reverse Drain Current (A)

25°C 0.1
0.15 TJ = 125°C
ID, Drain Current (A)

125°C
25°C
0.01
0.10

−55°C
0.05 0.001

0 0.0001
0.5 1 1.5 2 2.5 0.2 0.4 0.6 0.8 1 1.2
VGS, Gate to Source Voltage (V) VSD, Body Diode Forward Voltage (V)

Figure 6. Transfer Characteristics Figure 7. Body Diode Forward Voltage Variation

with Source Current and Temperature
5 30
ID = 0.2 A VDS = 5 V 20
VGS, Gate−Source Voltage (V)

4
10 V Ciss
Capacitance (pF)

15 V 10
3 Coss

5
2
3
1 2 f = 1 MHz
VGS = 0 V Crss

0 1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.1 0.5 1 2 5 10 25
Qg, Gate Charge (nC) VDS, Drain to Source Voltage (V)

Figure 8. Gate Charge Characteristics Figure 9. Capacitance Characteristics

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 FDV301N, FDV301N−F169

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

1 5
Single Pulse
1 ms
0.5 RqJA = 357°C/W
RDS(on) Limit 4
1s TA = 25°C
100 ms
ID, Drain Current (A)

10 s
0.2

Power (W)
DC 3
0.1
2
0.05
VGS = 2.7 V
Single Pulse 1
0.02 RqJA = 357°C/W
TA = 25°C
0.01 0
0.5 1 2 5 10 15 25 35 0.001 0.01 0.1 1 10 100 300
VDS, Drain−Source Voltage (V) Single Pulse Time (s)

Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Maximum Power Dissipation

1
D = 0.5
0.5
r(t), Normalized Effective Transient

0.2
0.2
0.1 RqJA (t) = r(t) * RqJA
Thermal Resistance

0.1 RqJA = 357°C/W

0.05
0.05
0.02
P(pk)
0.02
0.01 0.01 t1
t2
0.005
TJ − TA = P * RqJA (t)
Single Pulse
0.002 Duty Cycle, D = t1/t2

0.001
0.0001 0.001 0.01 0.1 1 10 100 300
t1, Time (s)

Figure 12. Transient Thermal Response Curve

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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
0.25 MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
3 THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
E HE T PROTRUSIONS, OR GATE BURRS.
1 2
MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
L A 0.89 1.00 1.11 0.035 0.039 0.044
3X b A1 0.01 0.06 0.10 0.000 0.002 0.004
L1 b 0.37 0.44 0.50 0.015 0.017 0.020
e VIEW C c 0.08 0.14 0.20 0.003 0.006 0.008
TOP VIEW D 2.80 2.90 3.04 0.110 0.114 0.120
E 1.20 1.30 1.40 0.047 0.051 0.055
e 1.78 1.90 2.04 0.070 0.075 0.080
L 0.30 0.43 0.55 0.012 0.017 0.022
L1 0.35 0.54 0.69 0.014 0.021 0.027
A HE 2.10 2.40 2.64 0.083 0.094 0.104
T 0° −−− 10 ° 0° −−− 10°
A1 SIDE VIEW SEE VIEW C c
GENERIC
END VIEW
MARKING DIAGRAM*
RECOMMENDED
SOLDERING FOOTPRINT XXXMG
G
1
3X
2.90 0.90 XXX = Specific Device Code
M = Date Code
G = Pb−Free Package

*This information is generic. Please refer to

3X 0.80 0.95 device data sheet for actual part marking.
PITCH Pb−Free indicator, “G” or microdot “ G”,
DIMENSIONS: MILLIMETERS may or may not be present.

STYLE 1 THRU 5: STYLE 6: STYLE 7: STYLE 8:

CANCELLED PIN 1. BASE PIN 1. EMITTER PIN 1. ANODE
2. EMITTER 2. BASE 2. NO CONNECTION
3. COLLECTOR 3. COLLECTOR 3. CATHODE

STYLE 9: STYLE 10: STYLE 11: STYLE 12: STYLE 13: STYLE 14:
PIN 1. ANODE PIN 1. DRAIN PIN 1. ANODE PIN 1. CATHODE PIN 1. SOURCE PIN 1. CATHODE
2. ANODE 2. SOURCE 2. CATHODE 2. CATHODE 2. DRAIN 2. GATE
3. CATHODE 3. GATE 3. CATHODE−ANODE 3. ANODE 3. GATE 3. ANODE

STYLE 15: STYLE 16: STYLE 17: STYLE 18: STYLE 19: STYLE 20:
PIN 1. GATE PIN 1. ANODE PIN 1. NO CONNECTION PIN 1. NO CONNECTION PIN 1. CATHODE PIN 1. CATHODE
2. CATHODE 2. CATHODE 2. ANODE 2. CATHODE 2. ANODE 2. ANODE
3. ANODE 3. CATHODE 3. CATHODE 3. ANODE 3. CATHODE−ANODE 3. GATE

STYLE 21: STYLE 22: STYLE 23: STYLE 24: STYLE 25: STYLE 26:
PIN 1. GATE PIN 1. RETURN PIN 1. ANODE PIN 1. GATE PIN 1. ANODE PIN 1. CATHODE
2. SOURCE 2. OUTPUT 2. ANODE 2. DRAIN 2. CATHODE 2. ANODE
3. DRAIN 3. INPUT 3. CATHODE 3. SOURCE 3. GATE 3. NO CONNECTION

STYLE 27: STYLE 28:

PIN 1. CATHODE PIN 1. ANODE
2. CATHODE 2. ANODE
3. CATHODE 3. ANODE

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98ASB42226B Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: SOT−23 (TO−236) PAGE 1 OF 1

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