r3117x12 Ea-3219033
r3117x12 Ea-3219033
Notice
If the SENSE pin voltage of R3117xxx1A/C and R3117Qxx2A/C make the gradual curve by raising 0.5V/ms
or less, it may cause noise when the output voltage is switched from low to high. Please use R3117xxx3A/C
and R3117Qxx4A/C Series for new designs instead of these products to avoid the above problem.
OUTLINE
The R3117x series are CMOS-based voltage detector ICs with high detector threshold accuracy and ultra-low
supply current, which can be operated at an extremely low voltage and is used for system reset as an example.
Each of these ICs consists of a voltage reference unit, a comparator, resistors for detector threshold setting,
an output driver and a hysteresis circuit. The detector threshold is fixed with high accuracy internally and does
not require any adjustment.
The tolerance of the detector threshold is ±15mV (-VDET < = 1.5V) or ±1.0% (1.5V< -VDET). Since the sense pin
is separated from the VDD pin of the IC, therefore, even if the sense pin voltage becomes to 0V, the output voltage
keeps its "L" level.
Two output types, Nch open drain type and CMOS type are available.
Three types of packages, SOT-23-5, SC-88A, and DFN(PL)1010-4 are available.
FEATURES∗
• Supply Current ...................................................................... Typ. 0.29µA (VDD=6.0V)
Consumption current through SENSE pin is not included.
• Operating Voltage Range...................................................... 1.0V to 6.0V (-40°C < = Topt <= 105°C)
• Detector Threshold Range .................................................... 0.7V to 5.0V (0.1V steps)
(For other voltages, please refer to MARK INFORMATIONS.)
• Accuracy Detector Threshold ................................................ ±1.0% (-VDET > = 1.6V), ±15mV (-VDET<1.6V)
• Temperature-Drift Coefficient of Detector Threshold ............ Typ. ±30ppm/°C
• Output Types ......................................................................... Nch Open Drain and CMOS
• Packages .............................................................................. DFN(PL)1010-4, SC-88A, SOT-23-5
∗ Topt=25°C, unless otherwise noted.
APPLICATIONS
• CPU and Logic Circuit Reset
• Battery Checker
• Window Comparator
• Wave Shaping Circuit
• Battery Back-up Circuit
• Power Failure Detector
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BLOCK DIAGRAMS
SENSE SENSE
DOUT
Vref Vref
GND GND
SELECTION GUIDE
The package type, the detector threshold, the output type and the taping type for the ICs can be selected at
the users’ request.
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PIN CONFIGURATIONS
• DFN(PL)1010-4*1 • SC-88A • SOT-23-5
Top View Bottom View 5 4 5 4
4 3 3 4
2 1 1 2 3
1 2 1 2 3
PIN DESCRIPTIONS
• DFN(PL)1010-4*1
Pin No. Symbol Description
1 DOUT Output Pin ("L" at detection)
2 SENSE Voltage Detector Voltage Sense Pin
3 GND Ground Pin
4 VDD Input Pin
∗1) Tab is GND level. (They are connected to the reverse side of this IC.)
The tab is better to be connected to the GND, but leaving it open is also acceptable.
• SC-88A
Pin No. Symbol Description
1 VDD Input Pin
2 NC No Connection*2
3 GND Ground Pin
4 SENSE Voltage Detector Voltage Sense Pin
5 DOUT Output Pin ("L" at detection)
• SOT-23-5
Pin No. Symbol Description
1 DOUT Output Pin ("L" at detection)
2 VDD Input Pin
3 GND Ground Pin
4 NC No Connection
5 SENSE Voltage Detector Voltage Sense Pin
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Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the
permanent damages and may degrade the life time and safety for both device and system using the device
in the field. The functional operation at or over these absolute maximum ratings is not assured.
ELECTRICAL CHARACTERISTICS
• R3117xxxxA/C values indicate −40°C <
= Topt <
= 105°C, unless otherwise noted. Topt=25°C
Symbol Item Conditions Min. Typ. Max. Unit
1.0V <
= VDD <
= 5.25V -VDET-15 -VDET+15
0.7V <
= -VDET<1.6V mV
5.25V < VDD <
= 6.0V -VDET-11 -VDET+24
Detector Threshold -VDET -VDET
-VDET
(Topt=25°C) 1.0V <
= VDD <
= 5.25V ×0.99 ×1.01
1.6V <
= -VDET <
= 5.0V V
-VDET -VDET
5.25V < VDD <
= 6.0V ×0.9925 ×1.016
1.0V <
= VDD <
= 5.25V -VDET-30 -VDET+30
0.7V <
= -VDET<1.6V mV
5.25V < VDD <
= 6.0V -VDET-26 -VDET+39
Detector Threshold -VDET -VDET
-VDET
(-40°C <
= Topt <
= 105°C) 1.0V <
= VDD <
= 5.25V ×0.98 ×1.02
1.6V <
= -VDET <
= 5.0V -VDET V
-VDET
5.25V < VDD <
= 6.0V ×0.9825 ×1.026
Detector Threshold -VDET -VDET
VHYS Hysteresis VDD=1.0V to 6.0V ×0.04 ×0.07 V
VSENSE=-VDET-0.1V 0.31 1.47
ISS Supply Current*1 µA
VSENSE=-VDET×1.1 0.29 1.25
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All of electronic equipment should be designed that the mounted semiconductor devices operate within the
recommended operating conditions. The semiconductor devices cannot operate normally over the
recommended operating conditions, even if when they are used over such conditions by momentary
electronic noise or surge. And the semiconductor devices may receive serious damage when they continue
to operate over the recommended operating conditions.
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VDD=
0.6V
0.020
VDS= VDD=
6 25 0.5V 5.0V 80
VSENSE=
VDD=
6.0V
1.0V
0.400 ↓
VDS= 0V
0.5V
∗Note)
VDD=
5.0V
VDD= VSENSE=
VDD= 4.5V
1.5V 0.650 0V
1.000 VDS= ↓
VDS= 2.1V -VDET
0.5V +2.0V 40
VDD=
0.6V ∗Note)
7
VDS=
0.05V
5
VDD=
5.0V
40 40
VSENSE=
6.0V
↓
-VDET
-2.0V
VDD= ∗Note)
3.0V
2.400
VDS=
0.5V VDD=
5.0V
VDD=
6.0V VSENSE=
0.900 0V
VDS=
↓
2.1V
6.0V 80
10
∗Note)
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TIMING CHART
Supply Voltage
(VDD)
Minimum Operating VDDL
Voltage
Detector Threshold Detector Threshold
Released Voltage +VDET Hysteresis Hysteresis
Detector Threshold -VDET
SENSE Pin Voltage
(VSENSE) GND
If the SENSE pin voltage is raised 0.5V/ms or less, it may cause noise when the output voltage is switched
from low to high.
GND GND
5.0V 5.0V
Output Voltage
(VOUT) 2.5V VDD/2
Output Voltage (VOUT)
GND GND
tPHL tPLH tPHL tPLH
Nch Open Drain Output CMOS Output
(R3117xxxxA) (R3117xxxxC)
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OPERATION
• Operation of R3117xxxxA
SENSE
VDD
Ra Comparator
DOUT pin should be pulled-up to
DOUT VDD or an external voltage level.
Rb
Vref Nch
Tr.1
Rc
GND
1 2 3
Supply Voltage (VDD)
Minimum Operating VDDL
Voltage
Step 1 2 3
Rb+Rc
I ×VSENSE
Ra+Rb+Rc
Pull-up Voltage
Output
Rb
Detect Delay Time Delay Time II ×VSENSE
Ra+Rb
Output Voltage tPHL tPLH
(VOUT)
GND
Operation Diagram
• Explanation of operation
Step 1. The output voltage is equal to the pull-up voltage.
Step 2. At Point "A", Vref >
= VSENSE×(Rb+Rc)/(Ra+Rb+Rc) is true, as a result, the output of comparator is reversed
from "L" to "H", therefore the output voltage becomes the GND level. The voltage level of Point A means
a detector threshold voltage (-VDET). (When the supply voltage is lower than the minimum operating
voltage, the operation of the output transistor becomes indefinite. The output voltage is equal to the GND
level.)
Step 3. At Point "B", Vref <
= VSENSE×Rb/(Ra+Rb) is true, as a result, the output of comparator is reversed from "H"
to "L", then the output voltage is equal to the pull-up voltage. The voltage level of Point B means a
released voltage (+VDET).
∗) The difference between a released voltage and a detector threshold voltage is a detector threshold hysteresis.
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• Operation of R3117xxxxC
SENSE
VDD
Ra Comparator Pch
DOUT
Rb
Vref Nch
Tr.1
Rc
GND
Block Diagram (R3117xxxxC)
1 2 3
Supply Voltage (VDD)
Minimum Operating VDDL
Voltage Step 1 2 3
Comparator (−)
I II I
Pin Input Voltage
Released Voltage +VDET Detector Threshold B
A Hysteresis Comparator Output L H L
Detector Threshold −VDET
Tr.1 OFF ON OFF
SENSE Pin Voltage
Pch ON OFF ON
(VSENSE) Output Tr.
GND
Nch OFF ON OFF
Rb+Rc
I ×VSENSE
Ra+Rb+Rc
Supply Voltage (VDD)
Output Rb
Detect Delay Time Delay Time II ×VSENSE
Ra+Rb
Output Voltage tPHL tPLH
(VOUT)
GND
Operation Diagram
• Explanation of operation
Step 1. The output voltage is equal to the supply voltage (VDD).
Step 2. At Point "A", Vref >
= VSENSE×(Rb+Rc)/(Ra+Rb+Rc) is true, as a result, the output of comparator is reversed
from "L" to "H", therefore the output voltage becomes the GND level. The voltage level of Point A means
a detector threshold voltage (-VDET). (When the supply voltage is lower than the minimum operating
voltage, the operation of the output transistor becomes indefinite. The output voltage is equal to the GND
level.
Step 3. At Point "B", Vref <
= VSENSE×Rb/(Ra+Rb) is true, as a result, the output of comparator is reversed from "H"
to "L", then the output voltage is equal to the supply voltage (VDD). The voltage level of Point B means a
released voltage (+VDET).
∗) The difference between a released voltage and a detector threshold voltage is a detector threshold hysteresis.
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VDD
+VDET
VSENSE
VOUT
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Vs VDD Vs
Ra VDD Ra Ia R3117x
SENSE Series
-VDET R3117x -VDET
Series
SENSE DOUT ISENSE RSENSE
Rb Rb Ib
GND GND
Fig.2 Fig.3
VB
Vs R1
Ra VDD
SENSE R2
R3117x
-VDET
Series
DOUT
Rb
GND
Fig.4
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Pulse Width
Sense Voltage (VSENSE)
This graph shows the maximum pulse conditions to keep the released voltage. If the pulse with larger amplitude
or wider width than the graph above, is input to SENSE pin, the reset signal may be output.
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TEST CIRCUITS
ISS
5V or VDD
VDD VDD
470kΩ
R3117x R3117x
VIN VOUT
VIN Series Series
SENSE SENSE DOUT
GND GND
Nch Driver Output Current Test Circuit Pch Driver Output Current Test Circuit
∗Apply to CMOS Output type only
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TYPICAL CHARACTERISTICS
1) Supply Current vs. Supply Voltage
R3117x07xA/C R3117x30xA/C
R3117x50xA/C
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R3117x07xA/C R3117x30xA/C
R3117x50xA/C
R3117x07xA/C R3117x30xA/C
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R3117x50xA/C
5) Output Voltage vs. SENSE pin Input Voltage (Nch Open Drain Output type is pulled up to VDD.)
R3117x07xA/C R3117x30xA/C
R3117x50xA/C
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6) Nch Driver Output Current vs. Supply Voltage 7) Nch Driver Output Current vs. VDS
R3117xxxxA/C R3117xxxxA/C
8) Pch Driver Output Current vs. Supply Voltage 9) Pch Driver Output Current vs. VDS
R3117xxxxC R3117xxxxC
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TYPICAL APPLICATION
VDD
470kΩ R
VDD VDD
CPU
Vs R3117xxxxA
Series RESET
SENSE DOUT
GND GND
VDD1 VDD2
470kΩ R
VDD VDD
R3117xxxxA CPU
Vs
Series RESET
SENSE DOUT
GND GND
VDD
VDD VDD
R3117xxxxC CPU
Vs
Series RESET
SENSE DOUT
GND GND
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TECHNICAL NOTES
As shown in Figure A/B, set R1 to become 100 kΩ or less as a guide, and connect C IN of 0.1 μF and more to
between the input pin and GND. Besides, make evaluations including temperature properties under the actual
usage condition, with using the evaluation board like this way. As a result, make sure that the cross conduction
current has no problem.
R1 R1
VDD VDD
*2 *2
CIN Voltage R2 CIN Voltage
OUT pin OUT pin
Detector Detector
GND GND
Figure A Figure B
*1 In the CMOS output type, a charging current for OUT pin is included.
*2 Note the bias dependence of capacitors.
20
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Official website
https://www.nisshinbo-microdevices.co.jp/en/
Purchase information
https://www.nisshinbo-microdevices.co.jp/en/buy/
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