N870EK1 / N871EK1

Preface

Notebook Computer

N870EK1 / N871EK1

Service Manual

Preface
I
 Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.

This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface

Version 1.0
May 2018

Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.

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 Preface

About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.

It is organized to allow you to look up basic information for servicing and/or upgrading components of the N870EK1 /
N871EK1 series notebook PC.

The following information is included:

Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Appendix A, Part Lists

Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS

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 Preface

IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit as follows:
• AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19.5V, 6.15A (120 Watts) minimum AC/DC Adapter.
Preface

FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.

IV
 Preface

Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:

1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.

2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on

Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.

3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.

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 Preface

4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.

Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.

Power Safety
Preface

The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
 unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines and
power cord). It is advis-
able to also remove
your battery in order to
prevent accidentally
turning the machine
on.

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 Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Battery Guidelines
The following can also apply to any backup batteries you may have.

Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.

Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.

Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.

VII
 Preface

Related Documents
You may also need to consult the following manual for additional information:

User’s Manual on CD/DVD

This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.

System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the
 computer (e.g. keyboard and mouse) to their ports.
Preface

Powering the
5. When first setting up the computer use the following proce- 130° Figure 1
Computer On dure (as to safeguard the computer during shipping, the battery Opening the Lid/LCD/
will be locked to not power the system until first connected to the Computer with AC/DC
After every disassem- AC/DC adapter and initially set up as below): Adapter Plugged-In
bly, make sure that the • Attach the AC/DC adapter cord to the DC-In jack on the left of
bottom case’s screws the computer, then plug the AC power cord into an outlet, and
are all inserted and connect the AC power cord to the AC/DC adapter and leave it
tightened before turn-
there for 6 seconds or longer.
ing the computer on.
• Remove the adapter cord from the computer’s DC-In jack, and
then plug it back in again; the battery will now be unlocked. 
6. Use one hand to raise the lid/LCD to a comfortable viewing angle Shut Down
(do not exceed 135 degrees); use the other hand (as illustrated in Note that you should always shut your computer down by
Figure 1) to support the base of the computer (Note: Never lift the choosing the Shut down command in Windows (see be-
computer by the lid/LCD). low). This will help prevent hard disk or system problems.

7. Press the power button to turn the computer “on”. Click the icon in the Start Screen and
choose Shut down from the menu.
Or
Right-click the Start button at the bottom of the Start
Screen or the Desktop and choose Shut down or sign out
> Shut down from the context menu.

VIII
 Preface

Contents
Introduction ..............................................1-1 Bottom ........................................................................................... A-4
Main Board ................................................................................... A-5
Overview .........................................................................................1-1 HDD .............................................................................................. A-6
Specifications ..................................................................................1-2 LCD ............................................................................................... A-7
External Locator - Top View with LCD Panel Open ......................1-4
External Locator - Front & Right Side Views .................................1-5 Schematic Diagrams................................. B-1
External Locator - Left Side & Rear View .....................................1-6 System Block Diagram ...................................................................B-2
External Locator - Bottom View .....................................................1-7 Processor 1/6 ...................................................................................B-3
Mainboard Overview - Top (Key Parts) .........................................1-8 Processor 2/6 ...................................................................................B-4
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Processor 3/6 ...................................................................................B-5
Mainboard Overview - Top (Connectors) .....................................1-10 Processor 4/6 ...................................................................................B-6
Mainboard Overview - Bottom (Connectors) ...............................1-11 Processor 5/6 ...................................................................................B-7
Disassembly ...............................................2-1 Processor 6/6 ...................................................................................B-8

Preface
DDR4 CHA SO-DIMM ..................................................................B-9
Overview .........................................................................................2-1
DDR4 CHB SO-DIMM ................................................................B-10
Maintenance Tools ..........................................................................2-2 VGA PCI-E Interface ....................................................................B-11
Connections .....................................................................................2-2
VGA Frame Buffer Interface ........................................................B-12
Maintenance Precautions .................................................................2-3
VGA Frame Buffer A ...................................................................B-13
Disassembly Steps ...........................................................................2-4 VGA Frame Buffer A ...................................................................B-14
Removing the Battery ......................................................................2-5
VGA Frame Buffer B ...................................................................B-15
Removing the Keyboard ..................................................................2-6
VGA Frame Buffer B ...................................................................B-16
Removing the Hard Disk Drive .......................................................2-7
VGA I/O .......................................................................................B-17
Removing the System Memory (RAM) ..........................................2-9
NVIDIA Power Sequence .............................................................B-18
Removing and Installing the M.2 SSD Module ............................2-10
NVIDIA GPIO Level Shift ...........................................................B-19
Removing the Wireless LAN Module ...........................................2-11
VGA NVVDD Coupling ..............................................................B-20
Wireless LAN, Combo Module Cables .........................................2-12
MDP ..............................................................................................B-21
Removing the CPU Heat Sink .......................................................2-13 MDP ..............................................................................................B-22
Removing the CCD .......................................................................2-14
Panel, Inverter ...............................................................................B-23
Part Lists ..................................................A-1 HDMI ............................................................................................B-24
Part List Illustration Location ........................................................ A-2 PCH 1/9 ........................................................................................B-25
Top ................................................................................................. A-3 PCH 2/9 ........................................................................................B-26

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 Preface

PCH 3/9 ........................................................................................ B-27 LED Board ....................................................................................B-59

PCH 4/9 ........................................................................................ B-28 Finger Print Board ........................................................................B-60
PCH 5/9 ........................................................................................ B-29 Power Sequence ............................................................................B-61
PCH 6/9 ........................................................................................ B-30 Updating the FLASH ROM BIOS......... C-1
PCH 7/9 ........................................................................................ B-31
Download the BIOS ........................................................................C-1
PCH 8/9 ........................................................................................ B-32
Unzip the downloaded files to a bootable CD/DVD or
PCH 9/9 ........................................................................................ B-33
USB Flash drive ..............................................................................C-1
M.2 3G Card ................................................................................. B-34
Set the computer to boot from the external drive ...........................C-1
M.2 WLAN+BT, SSD .................................................................. B-35
Use the flash tools to update the BIOS ...........................................C-2
USB Conn, USB Charger ............................................................. B-36
Restart the computer (booting from the HDD) ...............................C-2
Card Reader / LAN RTL8411B ................................................... B-37
HDD, Click TP, Audio, Hall Con. ............................................... B-38
LED, CCD, TPM, Power SW Con. .............................................. B-39
Audio Codec ALC269 VC2 ......................................................... B-40
Preface

KBC-ITE IT8587 ......................................................................... B-41

RGB KB Only .............................................................................. B-42
5V, 5VS, 3.3V, 3.3VS, 3.3VA ..................................................... B-43
VDD1.0V, VCCIO ....................................................................... B-44
VDD3, VDD5 ............................................................................... B-45
DDR 1.2V / 0.6VS, 2.5V ............................................................. B-46
VCore, VCCGT Output Stage ...................................................... B-47
VCC_Core & VCCGT ................................................................. B-48
1.0DX_VCCSTG/VCCSFR_OC, 3.3VA ..................................... B-49
VCCSA ......................................................................................... B-50
AC_In, Charger ............................................................................ B-51
NVVDD ....................................................................................... B-52
FBVDDQ ..................................................................................... B-53
PEX_VDD/3V3/1.8V ................................................................... B-54
Audio Board ................................................................................. B-55
Power Switch Board ..................................................................... B-56
Hall Sensor Board ........................................................................ B-57
Click Board .................................................................................. B-58

X
 Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the N870EK1 / N871EK1 series notebook computer.
Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information
about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer.

Operating systems (e.g. Windows 10, etc.) have their own manuals as do application softwares (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.

The N870EK1 / N871EK1 series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed

1.Introduction
description of the upgrade procedures for each specific component. Please take note of the warning and safety informa-
tion indicated by the “” symbol.

The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1
 Introduction

Specifications Processor Options Video Adapter

Intel® Core™ i7 Processor Intel® Integrated GPU and NVIDIA® Discrete GPU
i7-8750H (2.20GHz) Supports Microsoft Hybrid Graphics
9MB Smart Cache, 14nm, DDR4-2666MHz, TDP 45W
 Intel® Core™ i5 Processor Intel Integrated GPU
Latest Specification Information i5-8300H (2.30GHz) Intel® UHD Graphics 630
The specifications listed here are correct at the 9MB Smart Cache, 14nm, DDR4-2666MHz, TDP 45W Dynamic Frequency
time of sending them to the press. Certain items Intel Dynamic Video Memory Technology
Core Logic
(particularly processor types/speeds) may be Microsoft DirectX®12 Compatible
changed, delayed or updated due to the manu- Intel® HM370 Express Chipset
facturer's release schedule. Check with your NVIDIA® Discrete GPU
service center for more details. BIOS NVIDIA® GeForce GTX 1050 Ti
4GB GDDR5 Video RAM on board
128Mb SPI Flash ROM
Microsoft DirectX® 12 Compatible
1.Introduction

AMI BIOS
Storage
Memory
 Two 260 Pin SO-DIMM Sockets Supporting DDR4 2400/
One Changeable 2.5" 7.0mm (h) SATA3 HDD/SSD
DDR4 2666MHz Memory (Factory Option) One M.2 SATA/PCIe Gen3 x4 Solid State
CPU
Drive (SSD)
Memory Expandable up to 32GB
The CPU is not a user serviceable part. Ac-
cessing the CPU in any way may violate your (The real memory operating frequency depends on the FSB Security
warranty. of the processor.)
Security (Kensington® Type) Lock Slot
LCD Options (Factory Option) TPM v2.0
(Factory Option) Fingerprint Reader Module
17.3" (43.94cm), 16:9, FHD (1920x1080)
Intel PTT for systems without hardware TPM
Audio Keyboard
High Definition Audio Compliant Interface
Full Size White LED Illuminated Keyboard with Numeric Pad
2 * Built-In Speakers (Factory Option)
Built-In Array Microphone Full Size Colored RGB LED Illuminated Keyboard with
Sound Blaster™ Cinema 5 Numeric Pad (Factory Option)

Pointing Device

Built-in Touchpad

1 - 2 Specifications
 Introduction

Interface Communication

One USB 2.0 Port Built-In Gigabit Ethernet LAN

One USB 3.0 (USB 3.1 Gen 1) Type-A Port 1.0M HD PC Camera Module
One USB 3.1 Gen 2 Type-A Port (Factory Option) 2.0M FHD PC Camera Module
One USB 3.1 Gen 2 Type-C Port*
WLAN/ Bluetooth M.2 Modules:
One HDMI-Out Port (Factory Option) Intel® Dual Band Wireless-AC 9260 Wire-
Two Mini DisplayPorts less LAN (802.11ac) + Bluetooth
One External Monitor Port (Factory Option) Intel® Dual Band Wireless-AC 9560 Wire-
less LAN (802.11ac) + Bluetooth
One Headphone-Out Jack
(Factory Option) Intel® Dual band Wireless-AC 9462 Wire-
One Microphone-In Jack
less LAN (802.11ac) + Bluetooth
One RJ-45 LAN Jack
One DC-in Jack Environmental Spec

1.Introduction
Temperature
Operating: 5°C - 35°C
 Non-Operating: -20°C - 60°C
USB 3.1 Gen 2 Relative Humidity
Note that when a single USB device is Operating: 20% - 80%
plugged in to a USB 3.1 Gen 2 port the data Non-Operating: 10% - 90%
transfer speed will be 10Gbps, however when
two devices are plugged in to both USB 3.1 Power
Gen 2 ports, this bandwidth will be shared be-
Full Range AC/DC Adapter
tween the ports.
AC Input: 100 - 240V, 50 - 60Hz
DC Output: 19.5V, 6.15A (120W)
(Factory Option) Removable 6 Cell Smart Lithium-Ion Bat-
Card Reader tery Pack, 62WH
Embedded Multi-In-1 Card Reader (Factory Option) Removable 6 Cell Smart Lithium-Ion Bat-
tery Pack, 47WH
MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC Dimensions & Weight
M.2 Slots 418.5mm (w) * 288.7mm (d) * 27.4mm (h)
2.9kg (Barebone with 47WH Battery)
Slot 1 for Combo WLAN and Bluetooth Module
Slot 2 for SATA or PCIe Gen3 x4 SSD

Specifications 1 - 3
 Introduction

Figure 1
External Locator - Top View with LCD Panel Open
Top View

1. PC Camera
2. *PC Camera LED
*When the PC 3 2 1 3
camera is in use,
the LED will be
illuminated.
3. Built-In Array
Microphone
4. LCD
1.Introduction

5. Power Button 4
6. Keyboard
7. Touchpad &
Buttons

1 - 4 External Locator - Top View with LCD Panel Open

 Introduction

External Locator - Front & Right Side Views Figure 2

Front View
1. LED Indicator

FRONT VIEW

1.Introduction
Figure 3
Right Side View
1. Headphone-Out
RIGHT SIDE VIEW Jack
2. Microphone-In
Jack
3. USB 2.0 Port
4. USB 3.0 (USB
1 2 3 4 5 3.1 Gen 1) Type
A Port
5. Vent

External Locator - Front & Right Side Views 1 - 5

 Introduction

Figure 4
External Locator - Left Side & Rear View
Left Side View
1. Security Lock Slot
2. DC-In Jack
/
3. RJ-45 LAN Jack
4. Mini Display Port LEFT SIDE VIEW
5. HDMI-Out Port
6. USB 3.1 Gen 2
Type C Port
7. USB 3.1 Gen 2 1 5 6 7 8
2 3 4
Type A Port
8. Multi-in-1 Card
1.Introduction

Reader

REAR VIEW

Figure 5
Rear View
1. Vent 1

1 - 6 External Locator - Left Side & Rear View

 Introduction

External Locator - Bottom View

Figure 6
Bottom View
1. Battery
2. Vent
3. Speakers
1

1.Introduction
2

2 
Overheating

3 To prevent your com-

3
puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.

External Locator - Bottom View 1 - 7

 Introduction

Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts

1. KBC-ITE IT8587
1.Introduction

1 - 8 Mainboard Overview - Top (Key Parts)

 Introduction

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts

1. GPU
2. CPU
3. Memory Slots
DDR4 SO-DIMM
4. Mini-Card
Connector (WLAN
Module)
1 5. PCH
6. CMOS Battery

1.Introduction
2 7. M.2-Card
Connector (SSD
Module)
5 6

3
4

Mainboard Overview - Bottom (Key Parts) 1 - 9

 Introduction

Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors

1. DC-In Jack
2. RJ-45 LAN Jack
3. External Display
1
Port
4. HDMI-Out Port
5. USB Port 3.0/3.1 2
(Type C)
Connector
6. USB Port 3.0/3.1
1.Introduction

(Type A) 3
Connector
7. Multi-in-1 Card
Reader
8. Keyboard Cable 4
Connector

5 8

10
7

1 - 10 Mainboard Overview - Top (Connectors)

 Introduction

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
Connectors

1. CCD Connector
2. Fan Connector
3. HDD Connector
2 4. Speaker Connector
5. LCD Connector
1

1.Introduction
2
5

4
4

Mainboard Overview - Bottom (Connectors) 1 - 11

 Introduction
1.Introduction

1 - 12
 Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the N870EK1 / N871EK1 series notebook’s parts and
subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).

We suggest you completely review any procedure before you take the computer apart.

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.

A box with a  will also provide any possible helpful information. A box with a  contains warnings.

An example of these types of boxes are shown in the sidebar.


Warning

Overview 2 - 1
 Disassembly

NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly

Connections
Connections within the computer are one of four types:

Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

2 - 2 Overview
 Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components Warning
could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. Before you undertake
any upgrade proce-
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields.
dures, make sure that
These can hinder proper performance and damage components and/or data. You should also monitor the position of magnet-
you have turned off the
ized tools (i.e. screwdrivers). power, and discon-
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. nected all peripherals
5. Be careful with power. Avoid accidental shocks, discharges or explosions. and cables (including
• Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. telephone lines and
• When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. power cord). It is advis-
6. Peripherals – Turn off and detach any peripherals. able to also remove

2.Disassembly
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before han- your battery in order to
dling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do prevent accidentally
not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap turning the machine
on.
instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils
which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged
surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws,
loose inside the computer.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
(For Computer Models Supplied with Light Blue Cleaning Cloth) Some computer models in this series come sup-
plied with a light blue cleaning cloth. To clean the computer case with this cloth follow the instructions below.
• Power off the computer and peripherals.
• Disconnect the AC/DC adapter from the computer.
• Use a little water to dampen the cloth slightly.
• Clean the computer case with the cloth.
• Dry the computer with a dry cloth, or allow it time to dry before turning on.
• Reconnect the AC/DC adapter and turn the computer on.

Overview 2 - 3
 Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery: To remove the Heatsink:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 7
To remove the Keyboard: 3. Remove the Heatsink page 2 - 13
1. Remove the keyboard page 2 - 6
To remove the CCD Module:
To remove the HDD: 1. Remove the battery page 2 - 5
2.Disassembly

1. Remove the battery page 2 - 5 2. Remove the HDD page 2 - 7

2. Remove the HDD page 2 - 7 3. Remove the CCD module page 2 - 14
To remove the System Memory:
1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 7
3. Remove the system memory page 2 - 9
To remove the M.2 SSD:
1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 7
3. Remove the SSD page 2 - 10
To remove the Wireless LAN Module:
1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 7
3. Remove the WLAN page 2 - 11

2 - 4 Disassembly Steps
 Disassembly

Removing the Battery Figure 1

1. Turn the computer off, and turn it over. Battery Removal
2. Slide the latch 1 in the direction of the arrow (Figure 1a).
a. Slide the latch 1 in the
3. Slide the latch 2 in the direction of the arrow. direction of the arrow.
4. While holding the latch 2 , lift the battery 3 (Figure 1b) out of the compartment (Figure 1c). and slide the latch 2 in
the direction of the arrow.
b. Lift the battery.
a. b.
c. Remove the battery.

2.Disassembly
2 3
1

c.


3. Battery

Removing the Battery 2 - 5

 Disassembly

Figure 2 Removing the Keyboard

Keyboard Removal 1. Turn off the computer, turn it over.
2. Remove screws 1 - 2 from the bottom of the computer.
a. Remove the screws from 3. Open it up with the LCD on a flat surface before pressing at point 3 to release the keyboard module (use the spe-
the bottom of the compu-
cial eject stick 4 to do this) while releasing the keyboard in the direction of the arrow 5 as shown (Figure 2a).
ter and then eject the
keyboard using a special 4. Carefully lift the keyboard 6 up, being careful not to bend the keyboard ribbon cable 7 . Disconnect the key-
eject stick to push the board ribbon cable 7 from the locking collar socket by using a flat-head screwdriver to pry the locking collar pins
keyboard out while re- 8 away from the base (Figure 2b).
leasing the keyboard as 5. Carefully lift the keyboard 6 off the computer (Figure 2c).
shown.
b. Lift the keyboard up and a.
disconnect the keyboard b.
ribbon cable from the
2.Disassembly

locking collar socket.

c. Remove the keyboard. 6
7
1 7
2 8 8
 8 8
Re-inserting the Key-
board

When re-inserting the

keyboard firstly, align the
keyboard tabs at the bot-
tom of the keyboard with
c.
the slots in the case.

5

4. Eject Stick 3
6. Keyboard 4 6
• 2 Screws

2 - 6 Removing the Keyboard

 Disassembly

Removing the Hard Disk Drive

Figure 3
The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 7mm HDD Assembly
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Removal
Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Remove the SD card
Hard Disk Disassembly Process cover and screws.
b. Remove the bottom
1. Turn off the computer, and remove the battery (page 2 - 5). case.
2. Remove the SD card cover 16 and screws 2 - 17 (Figure 3a). c. Locate the HDD.
3. Carefully push to release the bottom case 18 from point 19 and then lift it up from point 20 to release the bottom
case and ports as indicated by the arrows (Figure 3b).
4. The HDD will be visible at point 21 on the mainboard (Figure 3c).

2.Disassembly
a. b.
4
2
3 14
5 6
19

Powering the
15 Computer On
16
18 20
After every disassem-
7 bly, make sure that the
12 13 17
bottom case’s screws
1 are all inserted and
tightened before turn-
11 ing the computer on.
10 9 8

c. 
18. Bottom Case

18
• 16 Screws
21

Removing the Hard Disk Drive 2 - 7

 Disassembly

5. Remove screws 22 from the HDD assembly (Figure 4b).

Figure 4 6. Slightly lift and pull the hard disk assembly in the direction of arrow 23 (Figure 4c).
HDD Assembly 7. Lift the hard disk assembly 24 out of the bay 25 (Figure 4d).
Removal (cont’d.)
8. Remove screws 26 - 27 and bracket 28 from the hard disk 29 (Figure 4e).
9. Reverse the process to install a new hard disk (do not forget to replace the screws).
d. Remove the screws.
e. Slightly lift and pull the
HDD in the direction of e. f.
d.
the arrow.
f. Lift the HDD assembly
out of the bay. 3 23
g. Remove the screws and 25
bracket from the HDD. 22
24
2.Disassembly

g. 26
24
28


27 29 HDD System Warning

New HDD’s are blank. Before you begin make

sure:

 You have backed up any data you want to keep

from your old HDD.
24. HDD Assembly
28. Bracket You have all the CD-ROMs and FDDs required
29. HDD to install your operating system and programs.

If you have access to the internet, download the

• 2 Screws latest application and hardware driver updates
for the operating system you plan to install. Copy
these to a removable medium.

2 - 8 Removing the Hard Disk Drive

 Disassembly

Removing the System Memory (RAM) Figure 5

RAM Module
The computer has two memory sockets for 260 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting Removal
DDR4 2400 MHz. The main memory can be expanded up to 16GB. The total memory size is automatically detected by
the POST routine once you turn on your computer. a. The RAM modules
Memory Upgrade Process will be visible at point
1 on the main-
1. Turn off the computer, turn it over, remove the battery (page 2 - 5) and the bottom cover (page 2 - 7). board.
2. The RAM-2 modules will be visible at point 1 on the mainboard (Figure 5a). b. Pull the release lat-
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket in the direction indicated by the ches.
c. Remove the module.
arrows (Figure 5b). The RAM module 4 will pop-up (Figure 5c), and you can then remove it.
4. Pull the latches to release the second module if necessary.
5. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.

2.Disassembly
6. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot 
as it will go. DO NOT FORCE IT; it should fit without much pressure. Contact Warning
7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
8. Replace the bottom cover and the screws (see page 2 - 7). Be careful not to touch
the metal pins on the
9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
module’s connecting
edge. Even the clean-
a. b. c. est hands have oils
which can attract parti-
cles, and degrade the
module’s performance.

2 3

1
2 3 
4. RAM Module

Removing the System Memory (RAM) 2 - 9

 Disassembly

Figure 6 Removing and Installing the M.2 SSD Module

M.2 SSD Module
Removal
M.2 SSD Module Removal Procedure
1. Turn off the computer, turn it over, remove the battery (page 2 - 5) and the bottom cover (page 2 - 7).
a. Locate the M.2 SSD. 2. The M.2 SSD module will be visible at point 1 on the mainboard (Figure 6a).
b. Remove the screw. 3. Remove the screw 2 (Figure 6b)
c. The M.2 SSD module 4. The M.2 SSD module 3 (Figure 6c) will pop-up, and you can remove it from the computer.
will pop up.
a. c.

3
2.Disassembly

b.

2
3


3.M2 SSD Module

• 1 Screw

2 - 10 Removing and Installing the M.2 SSD Module

 Disassembly

Removing the Wireless LAN Module Figure 7

Wireless LAN
1. Turn off the computer, turn it over, remove the battery (page 2 - 5) and the bottom cover (page 2 - 7).
Module Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard (Figure 7a).
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 (Figure 7b)
a. Locate the WLAN.
4. The Wireless LAN module 5 (Figure 7c) will pop-up, and you can remove it from the computer. b. Disconnect the cables
and remove the screw.
a. c. c. The WLAN module will
pop up.

Note: Make sure you

5 reconnect the antenna
cable to the “1 + 2”

2.Disassembly
1 socket (Figure 7b).

b. 5

2
4 
3 5.Wireless LAN Module

• 1 Screw

Removing the Wireless LAN Module 2 - 11

 Disassembly

Wireless LAN, Combo Module Cables

Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo modules are not labelled.
The cables/covers (each cable will have either a black or transparent cable cover) are color coded for identification as
outlined in the table below.

Antenna Cable Cover

Module Type Cable Color
Type Type

WLAN/WLAN & Bluetooth WM 1 Black Transparent

Combo WM 2 Black White
2.Disassembly

Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).

2 - 12 Wireless LAN, Combo Module Cables

 Disassembly

Removing the CPU Heat Sink Figure 8

Heat Sink Removal
Heat Sink Removal Procedure
1. Turn off the computer, turn it over, remove the battery (page 2 - 5) and the bottom cover (page 2 - 7). a. Remove the screws.
2. Loosen the CPU heat sink screws in the order 7 , 6 , 5 , 4 , 3 , 2 & 1 (the reverse order as indicated Figure b. Carefully remove the
8a). heat sink unit.
3. Apply pressure to points A - C to lift carefully (it may be hot) the heat sink D off the mainboard (Figure 8b).

a.

2.Disassembly
3 5 6

2 4 1
7

b.

A D

B
C 
D. Heat Sink

• 7 Screws

Removing the CPU Heat Sink 2 - 13

 Disassembly

Figure 9 Removing the CCD

CCD Removal 1. Turn off the computer, turn it over to remove the battery (page 2 - 5).
2. Lay the computer down on a flat surface with the top case up forming a 90 degree angle. Carefully remove the
a. Remove rubber and rubber covers 1 - 2 and screws 3 - 4 .
screws and then careful-
3. Run your fingers around the inner frame of the LCD panel to lift at the upper point 5 as indicated by the arrows,
ly release the inner
frame of the LCD panel and slightly push and lift up the inner frame at the middle points 6 - 7 as indicated by the arrows and then run
at the points indicated by your fingers around the inner frame at the lower point 8 as indicated by the arrows (Figure 9a).
the arrows. 4. Remove the LCD front cover 5 (Figure 9b).
b. Remove the LCD front
cover. a.

8
2.Disassembly

6 7

1 3 4 2
b.


9. LCD Front Cover

• 2 Screws 9

2 - 14 Removing the CCD

 Disassembly

5. Disconnect the cable 10 (Figure 10c). Figure 10

6. Remove the CCD module 11 (Figure 10d). CCD Removal
7. Reverse the process to install a new CCD module. (cont’d)
c. c. Disconnect the cable.
d. Remove the CCD mod-
ule.

10

d.
11

2.Disassembly

11. CCD Module

Removing the CCD 2 - 15

 Disassembly
2.Disassembly

2 - 16
Appendix A:Part Lists
This appendix breaks down the N870EK1 / N871EK1 series notebook’s construction into a series of illustrations. The
component part numbers are indicated in the tables opposite the drawings.

Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.

Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the

A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1
 Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Part
Location
Top page A - 3
Bottom page A - 4
Main Board page A - 5
HDD page A - 6
LCD page A - 7
A.Part Lists

A - 2
Top

Figure A - 1

A.Part Lists
Top

Top A - 3
 Bottom

Figure A - 2
A.Part Lists

Bottom

A - 4 Bottom
Main Board

Figure A - 3
Main Board

A.Part Lists
Main Board A - 5
 HDD

Figure A - 4
A.Part Lists

HDD

A - 6 HDD
LCD

Figure A - 5
LCD

A.Part Lists
LCD A - 7
 A.Part Lists

A - 8
 Schematic Diagrams

Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the N870EK1 / N871EK1 notebook’s PCB’s. The following table indicates where
to find the appropriate schematic diagram.

Diagram - Page Diagram - Page Diagram - Page

System Block Diagram - Page B - 2 PCH 1/9 - Page B - 25 VCC_Core & VCCGT - Page B - 48 Table B - 1
Processor 1/6 - Page B - 3 PCH 2/9 - Page B - 26 1.0DX_VCCSTG/VCCSFR_OC, 3.3VA - Page B - 49
SCHEMATIC
Processor 2/6 - Page B - 4 PCH 3/9 - Page B - 27 VCCSA - Page B - 50
DIAGRAMS

B.Schematic Diagrams
Processor 3/6 - Page B - 5 PCH 4/9 - Page B - 28 AC_In, Charger - Page B - 51
Processor 4/6 - Page B - 6 PCH 5/9 - Page B - 29 NVVDD - Page B - 52
Processor 5/6 - Page B - 7 PCH 6/9 - Page B - 30 FBVDDQ - Page B - 53
Processor 6/6 - Page B - 8 PCH 7/9 - Page B - 31 PEX_VDD/3V3/1.8V - Page B - 54
DDR4 CHA SO-DIMM - Page B - 9 PCH 8/9 - Page B - 32 Audio Board - Page B - 55 
DDR4 CHB SO-DIMM - Page B - 10 PCH 9/9 - Page B - 33 Power Switch Board - Page B - 56
Version Note
VGA PCI-E Interface - Page B - 11 M.2 3G Card - Page B - 34 Hall Sensor Board - Page B - 57
The schematic dia-
VGA Frame Buffer Interface - Page B - 12 M.2 WLAN+BT, SSD - Page B - 35 Click Board - Page B - 58
grams in this chapter
VGA Frame Buffer A - Page B - 13 USB Conn, USB Charger - Page B - 36 LED Board - Page B - 59 are based upon ver-
sion 6-7P-N85J7-002-
VGA Frame Buffer A - Page B - 14 Card Reader / LAN RTL8411B - Page B - 37 Finger Print Board - Page B - 60
1. If your mainboard (or
VGA Frame Buffer B - Page B - 15 HDD, Click TP, Audio, Hall Con. - Page B - 38 Power Sequence - Page B - 61 other boards) are a lat-
VGA Frame Buffer B - Page B - 16 LED, CCD, TPM, Power SW Con. - Page B - 39 er version, please
check with the Service
VGA I/O - Page B - 17 Audio Codec ALC269 VC2 - Page B - 40 Center for updated di-
NVIDIA Power Sequence - Page B - 18 KBC-ITE IT8587 - Page B - 41 agrams (if required).
NVIDIA GPIO Level Shift - Page B - 19 RGB KB Only - Page B - 42
VGA NVVDD Coupling - Page B - 20 5V, 5VS, 3.3V, 3.3VS, 3.3VA - Page B - 43
MDP - Page B - 21 VDD1.0V, VCCIO - Page B - 44
MDP - Page B - 22 VDD3, VDD5 - Page B - 45
Panel, Inverter - Page B - 23 DDR 1.2V / 0.6VS, 2.5V - Page B - 46
HDMI - Page B - 24 VCore, VCCGT Output Stage - Page B - 47

B - 1
 Schematic Diagrams

System Block Diagram

5 4 3 2 1

VDD3,VDD5
SHEET 44
N850EJ System Block Diagram (COFFEE LAKE)
nVIDIA
Nvidia
GPU NVVDD N17P-G0/G1 -RAM SIZE 2GB (512x16x2)DDR5
SHEET 51
PCIE*8 COFFEE LAKE-H
D 5V,3V,5VS,3VS CFL-H 45W D
SHEET 42 PANEL Connector
SHEET 10,11,12, (4+2,6+2) SHEET 22
13,14,15,16,17,18,19 908 Balls
1.05VA, VCCIO Mini DP
BGA1440
SHEET 43
28x42mm DDR4 /1.2 V
SHEET 20 SHEET 2,3,4,5,6,7 DDR4
VCCGT/VCORE Output stage
B.Schematic Diagrams

VCC_CORE & VCCGTSHEET 46,47 HDMI

SHEET 23
SYSTEM SMBUS 2400/2666 MHz
GEN 3 DMI*4 DDR4 / 1.2V
VDDQ(1.2V),VTT_MEM(0.6V) Mini DP
SHEET 45 DDR4 DDR4
SHEET 21 SO-DIMM1 SO-DIMM2
1.05DX_VCCSTG, VCCSFR_OC SHEET 8 SHEET 9
1.05_VCCST, 3.3VA, NV3V3 Platform
Sheet 1 of 60 C
SHEET 48
Controller C

System Block PEX_VDD,1.8VA, SMB BUS Hub (PCH-H)

1V8_AON,1V8_RUN SHEET 53 TOUCH PAD HM370
Diagram CLICK BOARD SPI
AUDIO BOARD
USB3.0 USB2.0
SHEET 37
VCCSA TPM 2.0 25x24mm USB2.0 PORT5
SHEET 49 SHEET 24 Optional USB2.0 PORT6
SHEET 38
874 Ball FCBGA MIC
IN
HP
OUT
(USB3 PORT5)
32.768 KHz
SHEET 54
AC_IN Charger EC LPC
SHEET 50 SHEET 24,25,26,27,28,29,30,
ITE 8587 31,32
0.5"~11" 33 MHz
128pins LQFP
N850 7IN1 6-7P-N85H7-003
14*14*1.6mm
Azalia Codec
BIOS ALC269 VC2 SPK-L & SPK-R
MAIN BOARD (N850) SHEET 40
6-71-N85H0-D02A SPI SHEET 39 SHEET 39
SHEET 24 <14"
SHEET 1~53
INT. K/B EC SMBUS AZALIA LINK 24 MHz
B B
AUDIO BOARD SHEET 41 PCIE
PHONE JACK x2;USB2.0 x1;USB3.0 x1 THERMAL SMART SMART 100 MHz
6-71-N8508-D03 SENSOR FAN BATTERY CNVI
SHEET 54
AC-IN
32.768KHz
N850 POWER SWITCH BOARD

480 Mbps
SHEET 2 SHEET 40 SHEET 50 NGFF A.E Key REALTEK

5 Gbps
USB2.0

USB3.1
M.2 WLAN+BT 25
6-71-N850S-D03 RTL8411B MHz
SHEET 55 CNVI LAN CARD READER
SATA I/II/III 6.0Gb/s PCIE PORT 7
PCIE PORT 5
N850 Hall Sensor BOARD USB2.0
SHEET 36
20 PORT14
6-71-N8501-D03A MHz SHEET 34 SATA
SHEET 56
USB3.1
N850 CLICK BOARD USB3.0 NGFF M Key 6IN1
CC LOGIC PCIE 4X SSD RJ-45
6-71-N85H2-D02 SHEET 57 PCIE SHEET 36 SOCKET
SHEET 37 SHEET 36
PORT
A
NGFF 9,10,11,12 A

N870 LED BOARD SATA HDD CCD +D-Mic M.2 B Key FINGER (Optional charger)
SHEET 34
SATA PORT4 USB2.0 PORT8 3G / LTE USB2.0
6-71-N8704-D04 SHEET 58 USB2.0 PORT1 USB2.0 PORT3
USB2.0 PORT7 PORT10
SHEET 37 SHEET 38 SHEET 59
(USB3 PORT1) (USB3 PORT3,4) ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SHEET 33,34 SHEET 35 SHEET 35 Title
N850 FINGER BOARD TYPE-A TYPE-C [01]BLOCK DIAGRAM
SHEET 59 Size Document Number Re v
6-71-N85HF-D01 USB3.0/USB3.1 USB3.0/USB3.1 A3 SCHEMATIC1 6-7P-N85J7-001 D02B

Date : Friday, March 02, 2018 Sheet 1 of 63

5 4 3 2 1

B - 2 System Block Diagram

 Schematic Diagrams

Processor 1/6
5 4 3 2 1

U30C
PEG_TX_0
10 PEG_RX0 E25 B25 C549 0.22u_10V_X5R_04
D25 PEG_RXP_0 PEG_TXP_0 A25 PEG_TX#_0 PEG_TX0 10
10 PEG_RX#0 C548 0.22u_10V_X5R_04
PEG_RXN_0 PEG_TXN_0 PEG_TX#0 10
E24 B24 PEG_TX_1
C546 0.22u_10V_X5R_04
10 PEG_RX1
10 PEG_RX#1 F24 PEG_RXP_1 PEG_TXP_1 C24 PEG_TX#_1
C547 0.22u_10V_X5R_04
PEG_TX1 10 6-36-00180-250
PEG_RXN_1 PEG_TXN_1 PEG_TX#1 10
E23 B23 PEG_TX_2
C577 0.22u_10V_X5R_04
CPU HOLD
10 PEG_RX2 PEG_RXP_2 PEG_TXP_2 PEG_TX#_2 PEG_TX2 10
10 PEG_RX#2
D23 A23 C576 0.22u_10V_X5R_04
PEG_RXN_2 PEG_TXN_2 PEG_TX#2 10
E22 B22 PEG_TX_3
D 10 PEG_RX3 C574 0.22u_10V_X5R_04 H32 H26 H31 D
PEG_RXP_3 PEG_TXP_3 PEG_TX#_3 PEG_TX3 10
10 PEG_RX#3 F22 C22 C575 0.22u_10V_X5R_04 H6_5D4_3 H6_5D4_3 H6_5D4_3
PEG_RXN_3 PEG_TXN_3 PEG_TX#3 10
E21 B21 PEG_TX_4
10 PEG_RX4 C579 0.22u_10V_X5R_04
PEG_RXP_4 PEG_TXP_4 PEG_TX#_4 PEG_TX4 10
10 PEG_RX#4 D21 A21 C578 0.22u_10V_X5R_04
PEG_RXN_4 PEG_TXN_4 PEG_TX#4 10
E20 B20 PEG_TX_5
10 PEG_RX5 C585 0.22u_10V_X5R_04
F20 PEG_RXP_5 PEG_TXP_5 C20 PEG_TX#_5 PEG_TX5 10
10 PEG_RX#5 C586 0.22u_10V_X5R_04
PEG_RXN_5 PEG_TXN_5 PEG_TX#5 10 10/3
PEG_TX_6
10 PEG_RX6 E19 B19 C590 0.22u_10V_X5R_04
PEG_RXP_6 PEG_TXP_6 PEG_TX#_6 PEG_TX6 10
10 PEG_RX#6 D19 A19 C589 0.22u_10V_X5R_04
PEG_RXN_6 PEG_TXN_6 PEG_TX#6 10
E18 B18 PEG_TX_7
10 PEG_RX7 C587 0.22u_10V_X5R_04
F18 PEG_RXP_7 PEG_TXP_7 C18 PEG_TX#_7 PEG_TX7 10
10 PEG_RX#7 C588 0.22u_10V_X5R_04
PEG_RXN_7 PEG_TXN_7 PEG_TX#7 10
D17 A17
E17 PEG_RXP_8 PEG_TXP_8 B17
PEG_RXN_8 PEG_TXN_8

B.Schematic Diagrams
F16 C16
E16 PEG_RXP_9 PEG_TXP_9 B16
PEG_RXN_9 PEG_TXN_9
D15 A15
E15 PEG_RXP_10 PEG_TXP_10 B15
PEG_RXN_10 PEG_TXN_10
F14 C14
E14 PEG_RXP_11 PEG_TXP_11 B14 3.3V
PEG_RXN_11 PEG_TXN_11
D13
E13 PEG_RXP_12
PEG_RXN_12
PEG_TXP_12
PEG_TXN_12
A13
B13
PLACE NEAR CPU
C C

2
F12 C12
E12 PEG_RXP_13 PEG_TXP_13 B12 RT1
PEG_RXN_13 PEG_TXN_13
D11 A11
100k_1%_04_NTC P/N 6-17-10420-734

1
E11 PEG_RXP_14 PEG_TXP_14 B11
Max Length
space
: < 0.6"
: 15 mils
min Trace Width: 5 mils
F10
E10
PEG_RXN_14

PEG_RXP_15
PEG_TXN_14

PEG_TXP_15
C10
B10 R340
THERM_VOLT 40
Sheet 2 of 60
PEG_RXN_15 PEG_TXN_15

VCCIO
R379
PEG_COMP G2
PEG_RCOMP
20K_1%_04
Processor 1/6
24.9_1%_04

D8 B8
25 DMI_IT_MR_0_DP E8 DMI_RXP_0 DMI_TXP_0 A8 DMI_MT_IR_0_DP 25
25 DMI_IT_MR_0_DN DMI_RXN_0 DMI_TXN_0 DMI_MT_IR_0_DN 25
E6 C6
25 DMI_IT_MR_1_DP F6 DMI_RXP_1 DMI_TXP_1 B6 DMI_MT_IR_1_DP 25
25 DMI_IT_MR_1_DN DMI_RXN_1 DMI_TXN_1 DMI_MT_IR_1_DN 25
D5 B5
25 DMI_IT_MR_2_DP E5 DMI_RXP_2 DMI_TXP_2 A5 DMI_MT_IR_2_DP 25
25 DMI_IT_MR_2_DN DMI_RXN_2 DMI_TXN_2 DMI_MT_IR_2_DN 25
J8 D4
25 DMI_IT_MR_3_DP J9 DMI_RXP_3 DMI_TXP_3 B4 DMI_MT_IR_3_DP 25
25 DMI_IT_MR_3_DN DMI_RXN_3 DMI_TXN_3 DMI_MT_IR_3_DN 25
CFL_H_62_INT_IP_CRB_CFLH
B B
3 OF 13
U30D

K36 D29
20 IGPU_LANE0P K37 DDI1_TXP_0 EDP_TXP_0 E29 EDP_TXP_0 22
20 IGPU_LANE0N J35 DDI1_TXN_0 EDP_TXN_0 F28 EDP_TXN_0 22
20 IGPU_LANE1P J34 DDI1_TXP_1 EDP_TXP_1 E28 EDP_TXP_1 22 EDP to Panel
20 IGPU_LANE1N DDI1_TXN_1 EDP_TXN_1 EDP_TXN_1 22
ŅŅŊġ ŕŐġ ŮŅő 20 IGPU_LANE2P
H37
DDI1_TXP_2 EDP_TXP_2
A29
EDP_TXP_2 22
(support 4K Panel)
H36 B29
20 IGPU_LANE2N J37 DDI1_TXN_2 EDP_TXN_2 C28 EDP_TXN_2 22
20 IGPU_LANE3P J38 DDI1_TXP_3 EDP_TXP_3 B28 EDP_TXP_3 22
20 IGPU_LANE3N DDI1_TXN_3 EDP_TXN_3 EDP_TXN_3 22
D27 C26
20 IGPU_AUX_CH_P E27 DDI1_AUXP EDP_AUXP B26 EDP_AUXP 22
20 IGPU_AUX_CH_N DDI1_AUXN EDP_AUXN EDP_AUXN 22
H34
23 HDMI_DATA0P H33 DDI2_TXP_0
23 HDMI_DATA0N F37 DDI2_TXN_0 A33 EDP_DISP_UTIL
23 HDMI_DATA1P DDI2_TXP_1 EDP_DISP_UTIL
ʼnŅŎŊġ IJįĵţ 23 HDMI_DATA1N
G38
F34 DDI2_TXN_1
23 HDMI_DATA2P F35 DDI2_TXP_2 D37 EDP_RCOMP
R22 24.9_1%_04 VCCIO
23 HDMI_DATA2N DDI2_TXN_2 DISP_RCOMP
E37
23 HDMI_CLOCKP DDI2_TXP_3
CLOSE TO CPU
E36
23 HDMI_CLOCKN DDI2_TXN_3
F26
Max Length : < 0.6"
E26 DDI2_AUXP space : 20 mils
DDI2_AUXN
A
C34
min Trace Width: 5 mils A

D34 DDI3_TXP_0
B36 DDI3_TXN_0 3.3V 17,22,33,35,42,43,45,47,48
B34 DDI3_TXP_1 VCCIO 6,43
F33 DDI3_TXN_1
E33
C33
DDI3_TXP_2
DDI3_TXN_2 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
B33 DDI3_TXP_3 Title
DDI3_TXN_3
PROC_AUDIO_CLK
G27 AUD_AZACPU_SCLK 27
[02] Processor 1/7-DMI/PEG/DISPLAY
A27 G25 AUD_AZACPU_SDO_R 27
B27 DDI3_AUXP PROC_AUDIO_SDI G29 PROC_AUDIO_SDO R317 20_1%_04 Size Document Number Re v
DDI3_AUXN PROC_AUDIO_SDO
4 of 13
AUD_AZACPU_SDI 27
A3 SCHEMATIC1 6-71-N85J0-D01 D02B
CLOSE TO CPU
CFL_H_62_INT_IP_CRB_CFLH Date : Friday, March 02, 2018 Sheet 2 of 63
5 4 3 2 1

Processor 1/6 B - 3
 Schematic Diagrams

Processor 2/6
5 4 3 2 1

8 M_A_DQ[63:0] 9 M_B_DQ[63:0]
U30A U30B
M_A_DQ0 BR6 AG1 M_B_DQ0 BT11 AM9
M_A_DQ1 BT6 DDR0_DQ_0/DDR0_DQ_0 DDR0_CKP_0/DDR0_CKP_0 AG2 M_A_CLK_DDR0 8 M_B_DQ1 BR11 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKP_0/DDR1_CKP_0 AN9 M_B_CLK_DDR0 9
M_A_DQ2 DDR0_DQ_1/DDR0_DQ_1 DDR0_CKN_0/DDR0_CKN_0 M_A_CLK_DDR#0 8 M_B_DQ2 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKN_0/DDR1_CKN_0 M_B_CLK_DDR#0 9
BP3 AK2 BT9 AM7
M_A_DQ3 BR3 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKP_1/DDR0_CKP_1 AK1 M_A_CLK_DDR1 8 M_B_DQ3 BR8 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKP_1/DDR1_CKP_1 AM8 M_B_CLK_DDR1 9
M_A_DQ4 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKN_1/DDR0_CKN_1 M_A_CLK_DDR#1 8 M_B_DQ4 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKN_1/DDR1_CKN_1 M_B_CLK_DDR#1 9
D BN5 AL3 BP11 AM11 D
M_A_DQ5 BP6 DDR0_DQ_4/DDR0_DQ_4 NC/DDR0_CKP_2 AK3 M_B_DQ5 BN11 DDR1_DQ_4/DDR0_DQ_20 NC/DDR1_CKP_2 AM10
M_A_DQ6 DDR0_DQ_5/DDR0_DQ_5 NC/DDR0_CKN_2 M_B_DQ6 DDR1_DQ_5/DDR0_DQ_21 NC/DDR1_CKN_2
BP2 AL2 BP8 AJ10
M_A_DQ7 BN3 DDR0_DQ_6/DDR0_DQ_6 NC/DDR0_CKP_3 AL1 M_B_DQ7 BN8 DDR1_DQ_6/DDR0_DQ_22 NC/DDR1_CKP_3 AJ11
M_A_DQ8 BL4 DDR0_DQ_7/DDR0_DQ_7 NC/DDR0_CKN_3 M_B_DQ8 BL12 DDR1_DQ_7/DDR0_DQ_23 NC/DDR1_CKN_3
M_A_DQ9 BL5 DDR0_DQ_8/DDR0_DQ_8 AT1 M_B_DQ9 BL11 DDR1_DQ_8/DDR0_DQ_24 AT8
M_A_DQ10 DDR0_DQ_9/DDR0_DQ_9 DDR0_CKE_0/DDR0_CKE_0 M_A_CKE0 8 M_B_DQ10 DDR1_DQ_9/DDR0_DQ_25 DDR1_CKE_0/DDR1_CKE_0 M_B_CKE0 9
BL2 AT2 BL8 AT10
M_A_DQ11 BM1 DDR0_DQ_10/DDR0_DQ_10 DDR0_CKE_1/DDR0_CKE_1 AT3 M_A_CKE1 8 M_B_DQ11 BJ8 DDR1_DQ_10/DDR0_DQ_26 DDR1_CKE_1/DDR1_CKE_1 AT7 M_B_CKE1 9
M_A_DQ12 DDR0_DQ_11/DDR0_DQ_11 DDR0_CKE_2/DDR0_CKE_2 M_B_DQ12 DDR1_DQ_11/DDR0_DQ_27 DDR1_CKE_2/DDR1_CKE_2
BK4 AT5 BJ11 AT11
M_A_DQ13 BK5 DDR0_DQ_12/DDR0_DQ_12 DDR0_CKE_3/DDR0_CKE_3 M_B_DQ13 BJ10 DDR1_DQ_12/DDR0_DQ_28 DDR1_CKE_3/DDR1_CKE_3
M_A_DQ14 DDR0_DQ_13/DDR0_DQ_13 M_B_DQ14 DDR1_DQ_13/DDR0_DQ_29
BK1 AD5 BL7 AF11
M_A_DQ15 BK2 DDR0_DQ_14/DDR0_DQ_14 DDR0_CS#_0/DDR0_CS#_0 AE2 M_A_CS#0 8 M_B_DQ15 BJ7 DDR1_DQ_14/DDR0_DQ_30 DDR1_CS#_0/DDR1_CS#_0 AE7 M_B_CS#0 9
M_A_DQ16 DDR0_DQ_15/DDR0_DQ_15 DDR0_CS#_1/DDR0_CS#_1 M_A_CS#1 8 M_B_DQ16 DDR1_DQ_15/DDR0_DQ_31 DDR1_CS#_1/DDR1_CS#_1 M_B_CS#1 9
BG4 AD2 BG11 AF10
M_A_DQ17 BG5 DDR0_DQ_16/DDR0_DQ_32 NC/DDR0_CS#_2 AE5 M_B_DQ17 BG10 DDR1_DQ_16/DDR0_DQ_48 NC/DDR1_CS#_2 AE10
M_A_DQ18 DDR0_DQ_17/DDR0_DQ_33 NC/DDR0_CS#_3 M_B_DQ18 DDR1_DQ_17/DDR0_DQ_49 NC/DDR1_CS#_3
BF4 BG8
M_A_DQ19 BF5 DDR0_DQ_18/DDR0_DQ_34 AD3 M_B_DQ19 BF8 DDR1_DQ_18/DDR0_DQ_50 AF7
M_A_DQ20 DDR0_DQ_19/DDR0_DQ_35 DDR0_ODT_0/DDR0_ODT_0 M_A_ODT0 8 M_B_DQ20 DDR1_DQ_19/DDR0_DQ_51 DDR1_ODT_0/DDR1_ODT_0 M_B_ODT0 9
B.Schematic Diagrams

BG2 AE4 BF11 AE8

M_A_DQ21 BG1 DDR0_DQ_20/DDR0_DQ_36 NC/DDR0_ODT_1 AE1 M_A_ODT1 8 M_B_DQ21 BF10 DDR1_DQ_20/DDR0_DQ_52 NC/DDR1_ODT_1 AE9 M_B_ODT1 9
M_A_DQ22 BF1 DDR0_DQ_21/DDR0_DQ_37 NC/DDR0_ODT_2 AD4 M_B_DQ22 BG7 DDR1_DQ_21/DDR0_DQ_53 NC/DDR1_ODT_2 AE11
M_A_DQ23 BF2 DDR0_DQ_22/DDR0_DQ_38 NC/DDR0_ODT_3 M_B_DQ23 BF7 DDR1_DQ_22/DDR0_DQ_54 NC/DDR1_ODT_3
M_A_DQ24 BD2 DDR0_DQ_23/DDR0_DQ_39 AH5 M_B_DQ24 BB11 DDR1_DQ_23/DDR0_DQ_55 AH10
M_A_DQ25 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAB_4/DDR0_BA_0 M_A_BA0 8 M_B_DQ25 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAB_3/DDR1_MA_16 M_B_RAS# 9
BD1 AH1 BC11 AH11
M_A_DQ26 BC4 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_6/DDR0_BA_1 AU1 M_A_BA1 8 M_B_DQ26 BB8 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_2/DDR1_MA_14 AF8 M_B_WE# 9
M_A_DQ27 BC5 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_5/DDR0_BG_0 M_A_BG0 8 M_B_DQ27 BC8 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAB_1/DDR1_MA_15 M_B_CAS# 9
M_A_DQ28 BD5 DDR0_DQ_27/DDR0_DQ_43 AH4 M_B_DQ28 BC10 DDR1_DQ_27/DDR0_DQ_59 AH8
M_A_DQ29 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_3/DDR0_MA_16 M_A_RAS# 8 M_B_DQ29 DDR1_DQ_28/DDR0_DQ_60 DDR1_CAB_4/DDR1_BA_0 M_B_BA0 9

Sheet 3 of 60 M_A_DQ30
M_A_DQ31
M_A_DQ32
BD4
BC1
BC2
AB1
DDR0_DQ_29/DDR0_DQ_45 DDR0_CAB_2/DDR0_MA_14
DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_1/DDR0_MA_15
DDR0_DQ_31/DDR0_DQ_47
AG4
AD1

AH3
M_A_WE#
M_A_CAS#
8
8
M_B_DQ30
M_B_DQ31
M_B_DQ32
BB10
BC7
BB7
AA11
DDR1_DQ_29/DDR0_DQ_61
DDR1_DQ_30/DDR0_DQ_62
DDR1_DQ_31/DDR0_DQ_63
DDR1_CAB_6/DDR1_BA_1
DDR1_CAA_5/DDR1_BG_0
AH9
AR9

AJ9
M_B_BA1
M_B_BG0
9
9

Processor 2/6 C
M_A_DQ33 AB2 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_9/DDR0_MA_0 AP4 M_A_A0 8 M_B_DQ33 AA10 DDR1_DQ_32/DDR1_DQ_16 DDR1_CAB_9/DDR1_MA_0 AK6 M_B_A0 9 C
M_A_DQ34 AA4 DDR0_DQ_33/DDR1_DQ_1 DDR0_CAB_8/DDR0_MA_1 AN4 M_A_A1 8 M_B_DQ34 AC11 DDR1_DQ_33/DDR1_DQ_17 DDR1_CAB_8/DDR1_MA_1 AK5 M_B_A1 9
M_A_DQ35 AA5 DDR0_DQ_34/DDR1_DQ_2 DDR0_CAB_5/DDR0_MA_2 AP5 M_A_A2 8 M_B_DQ35 AC10 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_5/DDR1_MA_2 AL5 M_B_A2 9
M_A_DQ36 AB5 DDR0_DQ_35/DDR1_DQ_3 NC/DDR0_MA_3 AP2 M_A_A3 8 M_B_DQ36 AA7 DDR1_DQ_35/DDR1_DQ_19 NC/DDR1_MA_3 AL6 M_B_A3 9
M_A_DQ37 AB4 DDR0_DQ_36/DDR1_DQ_4 NC/DDR0_MA_4 AP1 M_A_A4 8 M_B_DQ37 AA8 DDR1_DQ_36/DDR1_DQ_20 NC/DDR1_MA_4 AM6 M_B_A4 9
M_A_DQ38 DDR0_DQ_37/DDR1_DQ_5 DDR0_CAA_0/DDR0_MA_5 M_A_A5 8 M_B_DQ38 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_0/DDR1_MA_5 M_B_A5 9
AA2 AP3 AC8 AN7
M_A_DQ39 AA1 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_2/DDR0_MA_6 AN1 M_A_A6 8 M_B_DQ39 AC7 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_2/DDR1_MA_6 AN10 M_B_A6 9
M_A_DQ40 V5 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_4/DDR0_MA_7 AN3 M_A_A7 8 DDR1_DQ_39/DDR1_DQ_23 DDR1_CAA_4/DDR1_MA_7 M_B_A7 9
M_A_DQ41 V2 DDR0_DQ_40/DDR1_DQ_8 DDR0_CAA_3/DDR0_MA_8 AT4 M_A_A8 8 M_B_DQ40 W8 AN8
M_A_DQ42 U1 DDR0_DQ_41/DDR1_DQ_9 DDR0_CAA_1/DDR0_MA_9 AH2 M_A_A9 8 M_B_DQ41 W7 DDR1_DQ_40/DDR1_DQ_24 DDR1_CAA_3/DDR1_MA_8 AR11 M_B_A8 9
M_A_DQ43 U2 DDR0_DQ_42/DDR1_DQ_10 DDR0_CAB_7/DDR0_MA_10 AN2 M_A_A10 8 M_B_DQ42 V10 DDR1_DQ_41/DDR1_DQ_25 DDR1_CAA_1/DDR1_MA_9 AH7 M_B_A9 9
M_A_DQ44 V1 DDR0_DQ_43/DDR1_DQ_11 DDR0_CAA_7/DDR0_MA_11 AU4 M_A_A11 8 M_B_DQ43 V11 DDR1_DQ_42/DDR1_DQ_26 DDR1_CAB_7/DDR1_MA_10 AN11 M_B_A10 9
M_A_DQ45 V4 DDR0_DQ_44/DDR1_DQ_12 DDR0_CAA_6/DDR0_MA_12 AE3 M_A_A12 8 M_B_DQ44 W11 DDR1_DQ_43/DDR1_DQ_27 DDR1_CAA_7/DDR1_MA_11 AR10 M_B_A11 9
M_A_DQ46 U5 DDR0_DQ_45/DDR1_DQ_13 DDR0_CAB_0/DDR0_MA_13 AU2 M_A_A13 8 M_B_DQ45 W10 DDR1_DQ_44/DDR1_DQ_28 DDR1_CAA_6/DDR1_MA_12 AF9 M_B_A12 9
M_A_DQ47 U4 DDR0_DQ_46/DDR1_DQ_14 DDR0_CAA_9/DDR0_BG_1 AU3 M_A_BG1 8 M_B_DQ46 V7 DDR1_DQ_45/DDR1_DQ_29 DDR1_CAB_0/DDR1_MA_13 AR7 M_B_A13 9
M_A_DQ48 R2 DDR0_DQ_47/DDR1_DQ_15 DDR0_CAA_8/DDR0_ACT# M_A_ACT# 8 M_B_DQ47 V8 DDR1_DQ_46/DDR1_DQ_30 DDR1_CAA_9/DDR1_BG_1 AT9 M_B_BG1 9
M_A_DQ49 P5 DDR0_DQ_48/DDR1_DQ_32 AG3 M_B_DQ48 R11 DDR1_DQ_47/DDR1_DQ_31 DDR1_CAA_8/DDR1_ACT# M_B_ACT# 9
M_A_DQ50 R4 DDR0_DQ_49/DDR1_DQ_33 NC/DDR0_PAR AU5 DDR0_A_PARITY 8 M_B_DQ49 P11 DDR1_DQ_48/DDR1_DQ_48 AJ7
M_A_DQ51 P4 DDR0_DQ_50/DDR1_DQ_34 NC/DDR0_ALERT# DDR0_A_ALERT# 8 M_B_DQ50 P7 DDR1_DQ_49/DDR1_DQ_49 NC/DDR1_PAR AR8 DDR1_B_PARITY 9
M_A_DQ52 R5 DDR0_DQ_51/DDR1_DQ_35 M_B_DQ51 R8 DDR1_DQ_50/DDR1_DQ_50 NC/DDR1_ALERT# DDR1_B_ALERT# 9
M_A_DQ53 P2 DDR0_DQ_52/DDR1_DQ_36 BR5 M_A_DQS#0 M_A_DQS#[3:0] 8 M_B_DQ52 R10 DDR1_DQ_51/DDR1_DQ_51
M_A_DQ54 R1 DDR0_DQ_53/DDR1_DQ_37DDR0_DQSN_0/DDR0_DQSN_0 BL3 M_A_DQS#1 M_B_DQ53 P10 DDR1_DQ_52/DDR1_DQ_52 BN9 M_B_DQS#0 M_B_DQS#[3:0] 9
M_A_DQ55 P1 DDR0_DQ_54/DDR1_DQ_38DDR0_DQSN_1/DDR0_DQSN_1 BG3 M_A_DQS#2 M_B_DQ54 R7 DDR1_DQ_53/DDR1_DQ_53
DDR1_DQSN_0/DDR0_DQSN_2 BL9 M_B_DQS#1
M_A_DQ56 M4 DDR0_DQ_55/DDR1_DQ_39DDR0_DQSN_2/DDR0_DQSN_4 BD3 M_A_DQS#3 M_B_DQ55 P8 DDR1_DQ_54/DDR1_DQ_54
DDR1_DQSN_1/DDR0_DQSN_3 BG9 M_B_DQS#2
M_A_DQ57 M1 DDR0_DQ_56/DDR1_DQ_40DDR0_DQSN_3/DDR0_DQSN_5 AA3 M_A_DQS#4 M_A_DQS#[7:4] 8 M_B_DQ56 L11 DDR1_DQ_55/DDR1_DQ_55
DDR1_DQSN_2/DDR0_DQSN_6 BC9 M_B_DQS#3
M_A_DQ58 L4 DDR0_DQ_57/DDR1_DQ_41DDR0_DQSN_4/DDR1_DQSN_0 U3 M_A_DQS#5 M_B_DQ57 M11 DDR1_DQ_56/DDR1_DQ_56
DDR1_DQSN_3/DDR0_DQSN_7 AC9 M_B_DQS#4 M_B_DQS#[7:4] 9
M_A_DQ59 L2 DDR0_DQ_58/DDR1_DQ_42DDR0_DQSN_5/DDR1_DQSN_1 P3 M_A_DQS#6 M_B_DQ58 L7 DDR1_DQ_57/DDR1_DQ_57
DDR1_DQSN_4/DDR1_DQSN_2 W9 M_B_DQS#5
M_A_DQ60 M5 DDR0_DQ_59/DDR1_DQ_43DDR0_DQSN_6/DDR1_DQSN_4 L3 M_A_DQS#7 M_B_DQ59 M8 DDR1_DQ_58/DDR1_DQ_58
DDR1_DQSN_5/DDR1_DQSN_3 R9 M_B_DQS#6
M_A_DQ61 M2 DDR0_DQ_60/DDR1_DQ_44DDR0_DQSN_7/DDR1_DQSN_5 M_B_DQ60 L10 DDR1_DQ_59/DDR1_DQ_59
DDR1_DQSN_6/DDR1_DQSN_6 M9 M_B_DQS#7
B M_A_DQ62 L5 DDR0_DQ_61/DDR1_DQ_45 BP5 M_A_DQS0 M_A_DQS[3:0] 8 M_B_DQ61 M10 DDR1_DQ_60/DDR1_DQ_60
DDR1_DQSN_7/DDR1_DQSN_7 B
M_A_DQ63 L1 DDR0_DQ_62/DDR1_DQ_46DDR0_DQSP_0/DDR0_DQSP_0 BK3 M_A_DQS1 M_B_DQ62 M7 DDR1_DQ_61/DDR1_DQ_61 BP9 M_B_DQS0 M_B_DQS[3:0] 9
DDR0_DQ_63/DDR1_DQ_47DDR0_DQSP_1/DDR0_DQSP_1 BF3 M_A_DQS2 M_B_DQ63 L8 DDR1_DQ_62/DDR1_DQ_62
DDR1_DQSP_0/DDR0_DQSP_2 BJ9 M_B_DQS1
BA2 DDR0_DQSP_2/DDR0_DQSP_4 BC3 M_A_DQS3 DDR1_DQ_63/DDR1_DQ_63
DDR1_DQSP_1/DDR0_DQSP_3 BF9 M_B_DQS2
BA1 NC/DDR0_ECC_0 DDR0_DQSP_3/DDR0_DQSP_5 AB3 M_A_DQS4 M_A_DQS[7:4] 8 AW11 DDR1_DQSP_2/DDR0_DQSP_6 BB9 M_B_DQS3
AY4 NC/DDR0_ECC_1 DDR0_DQSP_4/DDR1_DQSP_0 V3 M_A_DQS5 AY11 NC/DDR1_ECC_0 DDR1_DQSP_3/DDR0_DQSP_7 AA9 M_B_DQS4 M_B_DQS[7:4] 9
AY5 NC/DDR0_ECC_2 DDR0_DQSP_5/DDR1_DQSP_1 R3 M_A_DQS6 AY8 NC/DDR1_ECC_1 DDR1_DQSP_4/DDR1_DQSP_2 V9 M_B_DQS5
BA5 NC/DDR0_ECC_3 DDR0_DQSP_6/DDR1_DQSP_4 M3 M_A_DQS7 AW8 NC/DDR1_ECC_2 DDR1_DQSP_5/DDR1_DQSP_3 P9 M_B_DQS6
BA4 NC/DDR0_ECC_4 DDR0_DQSP_7/DDR1_DQSP_5 AY10 NC/DDR1_ECC_3 DDR1_DQSP_6/DDR1_DQSP_6 L9 M_B_DQS7
AY1 NC/DDR0_ECC_5 AY3 AW10 NC/DDR1_ECC_4 DDR1_DQSP_7/DDR1_DQSP_7
AY2 NC/DDR0_ECC_6 DDR0_DQSP_8/DDR0_DQSP_8 BA3 AY7 NC/DDR1_ECC_5 AW9
1 OF 13
NC/DDR0_ECC_7 DDR0_DQSN_8/DDR0_DQSN_8 AW7 NC/DDR1_ECC_6 DDR1_DQSP_8/DDR1_DQSP_8 AY9
NC/DDR1_ECC_7 DDR1_DQSN_8/DDR1_DQSN_8
DDR CHANNEL A
CFL_H_62_INT_IP_CRB_CFLH

CLOSE TO CPU
DDR_RCOMP0 G1 BN13
R378 121_1%_04
DDR_RCOMP1 H1 DDR_RCOMP_0 DDR_VREF_CA BP13 DIMM_DQ_CPU_VREF_A DIMM_CA_CPU_VREF_A 8
R380 75_1%_04
DDR_RCOMP2 J2 DDR_RCOMP_1 DDR0_VREF_DQ BR13
R381 100_1%_04 2 OF 13
DDR_RCOMP_2 DDR1_VREF_DQ DIMM_DQ_CPU_VREF_B 9

Max Length : < 0.5" DDR CHANNEL B

CFL_H_62_INT_IP_CRB_CFLH
space : 25 mils
min Trace Width: 15 mils

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[03] Processor 3/7-DDR4
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 3 of 63

5 4 3 2 1

B - 4 Processor 2/6
 Schematic Diagrams

Processor 3/6
5 4 3 2 1

1.05_VCCST
NEAR CPU Ʉ CFG[0]: Stall reset sequence after PCU
PLL lock until de-asserted:
Max Length : < 3" (Near CPU) U30E — 1 = (Default) Normal Operation;
space : 15 mils No stall.
R39 R40 B31 BN25 CFG0
— 0 = Stall.
29 PCH_CPU_BCLK_R_DP BCLKP CFG_0 T11 Ʉ CFG[1]: Reserved configuration lane.
A32 BN27
Alert# between the CLK & Data 100_04 56.2_1%_04 29 PCH_CPU_BCLK_R_DN BCLKN CFG_1 BN26 Ʉ CFG[2]: PCI Express* Static x16 Lane
CFG_2 Numbering Reversal.
SVID need avoid the noise 29 PCH_CPU_PCIBCLK_R_DP
D35
PCI_BCLKP CFG_3
BN28 CFG3 T74
D 29 PCH_CPU_PCIBCLK_R_DN
C36 BR20 CFG4 R332 1K_04 — 1 = Normal operation D
PCI_BCLKN CFG_4 BM20 CFG5 R58 1K_04 — 0 = Lane numbers reversed.
47 H_CPU_SVIDDAT CFG_5
47 H_CPU_SVIDALRT# 29 CPU_24MHZ_R_DP
E31
CLK24P CFG_6
BT20 CFG6 R341 1K_04 Ʉ CFG[3]: Reserved configuration lane.
29 CPU_24MHZ_R_DN
D31 BP20 CFG7 T84 Ʉ CFG[4]: eDP enable:
47 H_CPU_SVIDCLK CLK24N CFG_7 BR23 CFG8 T82 — 1 = Disabled.
R41 CFG_8 BR22
CFG_9 — 0 = Enabled.
BT23
220_04 CFG_10 BT22
Ʉ CFG[6:5]: PCI Express* Bifurcation
CFG_11 BM19 — 00 = 1 x8, 2 x4 PCI Express*
CFG_12 BR19 — 01 = reserved
CFG_13 BP19 — 10 = 2 x8 PCI Express*
VIDALERT# BH31 CFG_14 BT19 — 11 = 1 x16 PCI Express*
BH32 VIDALERT# CFG_15 Ʉ CFG[7]: PEG Training:
BH29 VIDSCK BN23 — 1 = (default) PEG Train
H_PROCHOT# BR30 VIDSOUT CFG_17 BP23
R319 499_1%_04 PROCHOT# immediately following RESET# de
47 H_PROCHOT# PROCHOT# CFG_16 BP22
CFG_19 assertion.
BT13 BN22 — 0 = PEG Wait for BIOS for
45 DDR_VTT_PG_CTRL DDR_VTT_CNTL CFG_18
CLOSE TO CPU

B.Schematic Diagrams
training.
(0.3" ~ 1.5") BR27 Ʉ CFG[19:8]: Reserved configuration
BPM#_0 BT27 lanes.
CLOSE TO CPU BPM#_1 BM31
< 0.5" VCCST_PWRGD
R25 60.4_1%_04
VCCST_PWRGD_CPU H13 BPM#_2 BT30
VCCST_PWRGD BPM#_3 1.05DX_VCCSTG
PDG P.569
R299 20_1%_04 27 H_PWRGD
BT31
26 H_PM_DOWN BP35 PROCPWRGD BT28 H_TDO
26 PLTRST_CPU_N R333 *0402_short-p
BM34 RESET# PROC_TDO BL32 H_TDI PCH_JTAG_TDO 27 H_TDO
26 H_PM_SYNC R21 *0402_short-p R321 *51_04
TO PCH-H 26 PCH_PECI PM_DOWN BP31 PM_SYNC PROC_TDI BP28 H_TMS PCH_JTAG_TDI 27
R38 *0402_short-p
BT34 PM_DOWN PROC_TMS BR28 H_TCK PCH_JTAG_TMS 27 H_TCK
R297 *0402_short-p R334 *0402_short-p R320 51_04
C TO EC 40 H_PECI J31 PECI PROC_TCK PCH_JTAGX 27 C
26 PCH_THERMTRIP#

Sheet 4 of 60
THERMTRIP# BP30 H_TRST#
R318 *0402_short-p CLOSE TO CPU
H_SKTOCC_N PROC_TRST# H_PREQ# H_TRST#_R 32
28 H_SKTOCC_N BR33 BL30 R20 *0402_short-p
PROC_SELECT# BN1 SKTOCC# PROC_PREQ# BP27 H_PRDY#
R330 *0402_short-p
PCH_XDP_PREQ#_R 32 < 1.1"
PROC_SELECT# PROC_PRDY# PCH_XDP_PRDY#_R 32 3.3VA
R382

SKL_CNL_N:
FLOAT FOR SKL
*0_04 BM30

AT13
CATERR#

ZVM#
CFG_RCOMP
BT25 CFG_RCOMP
H_SKTOCC_N
R298 100K_04
Processor 3/6
AW13
GND FOR CNL MSM# R331
AU13
AY13 RSVD1 49.9_1%_04
RSVD2
5 OF 13

CFL_H_62_INT_IP_CRB_CFLH

PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS

1.05_VCCST
1: (DEFAULT)NORMAL OPERATION;
VCCST_PWRGD CLOSE TO CPU LANE# DEFINITION MATCHES
VDD3
R42 (0.3" ~ 1.5") CFG2 SOCKET PIN MAP DEFINITION
0: LANE REVERSAL
1K_04
B VCCST_PWRGD B
R24
100K_04 DISPLAY PORT PRESENCE STRAP
6

SYS_PWRGD# 2 G 1: DISABLED;
C194
S Q2A *0.1u_10V_X7R_04 NO PHYSICAL DISPLAY PORT ATTACHED
1
3

D MTDK3S6R TO EMBEDDED DISPLAY PORT

22,25,40,47 ALL_SYS_PWRGD
R26 20K_04 5 G CFG4 0: ENABLED;
S Q2B AN EXTERNAL DISPLAY PORT DEVICE
4

MTDK3S6R IS CONNECTED TO THE EMBEDDED

C137
DISPLAY PORT
*0.1u_10V_X7R_04
PCIE PORT BIFURCATION STRAPS

11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1.05DX_VCCSTG
CFG[6:5] 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
H_PROCHOT#
R322 1K_04

DEFENSIVE PULL DOWN SITE

D

Q32
C550
G 1: (Default) PEG Train immediately following xxRESETB de assertion
A
40 H_PROCHOT_EC
2SK3018S3 47P_50V_NPO_04 CFG7 0: PEG Wait for BIOS for training A
S

R335

100K_04
CAD Note: Capacitor need to be placed
close to buffer output pin ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
3.3VA 9,24,26,27,30,48
1.05DX_VCCSTG 6,27,48
[04]Processor 4/7-CLK/JTAG/MISC
1.05_VCCST 6,26,47,48 Size Document Number Re v
VDD3 24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53
VCCIO 2,6,43
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 4 of 63

5 4 3 2 1

Processor 3/6 B - 5
 Schematic Diagrams

Processor 4/6
5 4 3 2 1

VCORE VCORE 128A VCORE

D
VCORE D
U30J U30I
AA13 AH13
K14 W35 AA31 VCC1 VCC64 AH14
L13 VCC1 VCC64 W36 AA32 VCC2 VCC65 AH29
L14 VCC2 VCC65 W37 AA33 VCC3 VCC66 AH30
N13 VCC3 VCC66 W38 AA34 VCC4 VCC67 AH31
N14 VCC4 VCC67 Y29 AA35 VCC5 VCC68 AH32
N30 VCC5 VCC68 Y30 AA36 VCC6 VCC69 AJ14
N31 VCC6 VCC69 Y31 AA37 VCC7 VCC70 AJ29
N32 VCC7 VCC70 Y32 AA38 VCC8 VCC71 AJ30
N35 VCC8 VCC71 Y33 AB29 VCC9 VCC72 AJ31
N36 VCC9 VCC72 Y34 AB30 VCC10 VCC73 AJ32
N37 VCC10 VCC73 Y35 AB31 VCC11 VCC74 AJ33
N38 VCC11 VCC74 Y36 AB32 VCC12 VCC75 AJ34
P13 VCC12 VCC75 AB35 VCC13 VCC76 AJ35
P14 VCC13 AB36 VCC14 VCC77 AJ36
B.Schematic Diagrams

P29 VCC14 AB37 VCC15 VCC78 AK31

P30 VCC15 AB38 VCC16 VCC79 AK32
P31 VCC16 AC13 VCC17 VCC80 AK33
P32 VCC17 AC14 VCC18 VCC81 AK34
P33 VCC18 AC29 VCC19 VCC82 AK35
P34 VCC19 AC30 VCC20 VCC83 AK36
P35 VCC20 AC31 VCC21 VCC84 AK37
P36 VCC21 AC32 VCC22 VCC85 AK38
R13 VCC22 AC33 VCC23 VCC86 AL13
Sheet 5 of 60 R31
R32
R33
VCC23
VCC24
VCC25
AC34
AC35
AC36
VCC24
VCC25
VCC26
VCC87
VCC88
VCC89
AL29
AL30
AL31
VCC26 VCC27 VCC90

Processor 4/6 R34 AD13 AL32

C C
R35 VCC27 AD14 VCC28 VCC91 AL35
R36 VCC28 AD31 VCC29 VCC92 AL36
R37 VCC29 AD32 VCC30 VCC93 AL37
R38 VCC30 AD33 VCC31 VCC94 AL38
T29 VCC31 AD34 VCC32 VCC95 AM13
T30 VCC32 AD35 VCC33 VCC96 AM14
T31 VCC33 AD36 VCC34 VCC97 AM29
T32 VCC34 AD37 VCC35 VCC98 AM30
T35 VCC35 AD38 VCC36 VCC99 AM31
VCORE T36 VCC36 AE13 VCC37 VCC100 AM32
T37 VCC37 AE14 VCC38 VCC101 AM33
T38 VCC38 AE30 VCC39 VCC102 AM34
U29 VCC39 AE31 VCC40 VCC103 AM35
C240 C271 C242 C239 C241 C190 C272 C243 U30 VCC40 AE32 VCC41 VCC104 AM36
U31 VCC41 AE35 VCC42 VCC105 AN13
10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06
*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06
U32 VCC42 AE36 VCC43 VCC106 AN14
U33 VCC43 AE37 VCC44 VCC107 AN31
U34 VCC44 AE38 VCC45 VCC108 AN32
U35 VCC45 AF29 VCC46 VCC109 AN33
U36 VCC46 AF30 VCC47 VCC110 AN34
V13 VCC47 AF31 VCC48 VCC111 AN35
V14 VCC48 AF32 VCC49 VCC112 AN36
V31 VCC49 AF33 VCC50 VCC113 AN37
V32 VCC50 AF34 VCC51 VCC114 AN38
V33 VCC51 AF35 VCC52 VCC115 AP13
V34 VCC52 AF36 VCC53 VCC116 AP30
V35 VCC53 AF37 VCC54 VCC117 AP31
V36 VCC54 AF38 VCC55 VCC118 AP32
B V37 VCC55 AG14 VCC56 VCC119 AP35 B
V38 VCC56 AG31 VCC57 VCC120 AP36
W13 VCC57 AG32 VCC58 VCC121 AP37 VCORE
W14 VCC58 AG33 VCC59 VCC122 AP38
W29 VCC59 AG34 VCC60 VCC123 K13
W30 VCC60 AG35 VCC61 VCC124
VCC61 VCC62
9/27 Power
W31 AG36 PR257
W32 VCC62 VCC63
VCC63 100_04

10 OF 13 PJ36 *1mm
CFL_H_62_INT_IP_CRB_CFLH AG37 1 2
VCORE VCC_SENSE AG38 1 2 VCC_VCORE_SENSE 47
VSS_SENSE VSS_VCORE_SENSE 47
9 OF 13 PJ37 *1mm
CFL_H_62_INT_IP_CRB_CFLH
Default PR258
C182 C185 C278 C183 C186 C277 C188 C136 C276 C273 C187 C189 C134 C270 C184
100_04
1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04
*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

A A

C181 C135 C274

*1u_6.3V_X6S_04

1u_6.3V_X6S_04

*1u_6.3V_X6S_04

VCORE 46 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[05] Processor 5/7-POWER1
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 5 of 63

5 4 3 2 1

B - 6 Processor 4/6
 Schematic Diagrams

Processor 5/6

5 4 3 2 1

PLACE CAP BACKSIDE

VDDQ 1.05_VCCST 1.05_VCCST
VCCSA VDDQ
C275 C193 C245
U30L

10u_4V_X6S_06

1u_6.3V_X6S_04

1u_6.3V_X6S_04
11.1A
D J30 AA6 3.3A D
K29 VCCSA1 VDDQ1 AE12 U30M
K30 VCCSA2 VDDQ2 AF5
place to angle
K31 VCCSA3 VDDQ3 AF6
K32 VCCSA4 VDDQ4 AG5 TP_SKL_E2 E2
VCCSA5 VDDQ5 TP_SKL_E3 RSVD_TP5
K33 AG9 E3
K34 VCCSA6 VDDQ6 AJ12 TP_SKL_E1 E1 IST_TRIG
K35 VCCSA7 VDDQ7 AL11 TP_SKL_D1 D1 RSVD_TP4
L31 VCCSA8 VDDQ8 AP6 1.05DX_VCCSTG VCCSFR_OC RSVD_TP3
L32 VCCSA9 VDDQ9 AP7 TP_SKL_BR1 BR1 BK28
L35 VCCSA10 VDDQ10 AR12 TP_SKL_BT2 BT2 RSVD_TP1 RSVD11 BJ28
L36 VCCSA11 VDDQ11 AR6 RSVD_TP2 RSVD10
L37 VCCSA12 VDDQ12 AT12 C191 C192 C287 C292 BN35
L38 VCCSA13 VDDQ13 AW6 RSVD15

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

B.Schematic Diagrams
M29 VCCSA14 VDDQ14 AY6 J24
M30 VCCSA15 VDDQ15 J5 H24 RSVD28
M31 VCCSA16 VDDQ16 J6 BN33 RSVD27
M32 VCCSA17 VDDQ17 K12 BL34 RSVD14
M33 VCCSA18 VDDQ18 K6 RSVD13
M34 VCCSA19 VDDQ19 L12 TP_SKL_N29 N29
M35 VCCSA20 VDDQ20 L6 TP_SKL_R14 R14 RSVD30
VCCIO M36 VCCSA21 VDDQ21 R6 TP_SKL_AE29 AE29 RSVD31
VCCSA22 VDDQ22 T6 TP_SKL_AA14 AA14 RSVD2
VDDQ23 W6 AP29 RSVD1
6.4A VDDQ24 Y12 1.2V AP14 RSVD5
AG12 VDDQ25 VCCSFR_OC A36 RSVD4
G15 VCCIO1 VSS_A36

C
G17
G19
G21
VCCIO2
VCCIO3
VCCIO4 VCCPLL_OC1
BH13
BJ13
A37

H23
VSS_A37
C
Sheet 6 of 60
H15 VCCIO5 VCCPLL_OC2 G11 32 PCH_2_CPU_TRIGGER PROC_TRIGOUT J23 PROC_TRIGIN

Processor 5/6
R59 30.1_1%_04
H16 VCCIO6 VCCPLL_OC3 1.05DX_VCCSTG VCCFUSEPRG 32 CPU_2_PCH_TRIGGER PROC_TRIGOUT
H17 VCCIO7 H30 0.06A
1.05_VCCST
F30
H19 VCCIO8 VCCST RSVD24
H20 VCCIO9 H29 R23 *0402_short-p
H21 VCCIO10 VCCSTG2 E30
H26 VCCIO11 G30 0.02A NEAR TO CPU PIN RSVD23
H27 VCCIO12 VCCSTG1 VCCIO
J15 VCCIO13 H28 0.15A B30 BL31
J16 VCCIO14 VCCPLL1 J28 C30 RSVD7 RSVD12 AJ8
VCCIO15 VCCPLL2 1.05_VCCST RSVD21 RSVD3
J17 PJ34 Default R75 G13
J19 VCCIO16 *1mm RSVD25
J20 VCCIO17 M38 1 2 VCCSA_SENSE G3
100_04
J21 VCCIO18 VCCSA_SENSE M37 1 2 VSSSA_SENSE VCCSA_SENSE 47 J3 RSVD26 C38 TP_SKL_B38
J26 VCCIO19 VSSSA_SENSE VSSSA_SENSE 47 RSVD29 RSVD22 C1 TP_SKL_C1
*1mm
J27 VCCIO20 H14 PJ35 VCCIO_SENSE RSVD20 BR2 TP_SKL_BR2
VCCIO21 VCCIO_SENSE J14 VSSIO_SENSE VCCIO_SENSE 43 TP_SKL_BR35 BR35 RSVD17 BP1 TP_SKL_BP1
VSSIO_SENSE VSSIO_SENSE 43 TP_SKL_BR31 BR31 RSVD19 RSVD16 B38 TP_SKL_C38
TP_SKL_BH30 BH30 RSVD18 RSVD8 B2 TP_SKL_B2
9/27 Power R76
RSVD9 RSVD6
12 OF 13
CFL_H_62_INT_IP_CRB_CFLH 100_04 13 OF 13
?
CFL_H_62_INT_IP_CRB_CFLH

VCCSA ?

VCCSA_SENSE
PR255 100_04
B B
VSSSA_SENSE
PR256 100_04

PLACE CAP IN BACK SIDE

PLACE CAP BACKSIDE PLACE CAP IN BOARD EDGE
CPU_BACK_VCCSA
VDDQ VCCIO
CPU_TOP_VCCSA

VDDQ VCCSA VCCSA VCCSA VCCSA

C408 C289 C392 C422 C279 C280 C244

C524 C83 C80 C525 C82 C44 C81 C526
*22u_6.3V_X6S_08

*22u_6.3V_X6S_08

*22u_6.3V_X6S_08

*22u_6.3V_X6S_08

10u_4V_X6S_06

22u_6.3V_X6S_08

*10u_4V_X6S_06

C290 C382 C291 C666 C288

*22u_6.3V_X5R_06

*22u_6.3V_X5R_06

*10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

10u_6.3V_X5R_06

1u_6.3V_X5R_04

1u_6.3V_X5R_04
10u_4V_X6S_06

10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

D02_02/26_A

D02_12/14_H
A A

8,9,45,48 VDDQ
2,43 VCCIO
49 VCCSA ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
4,27,48 1.05DX_VCCSTG Title
4,26,47,48
48 VCCSFR_OC
1.05_VCCST
[06] Processor 6/7-POWER2
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 6 of 63

5 4 3 2 1

Processor 5/6 B - 7
 Schematic Diagrams

Processor 6/6

5 4 3 2 1

VCCGT VCCGT
32A
U30F U30G U30H
A10 AK4 AW5 BJ15 BN4 F15 U30K
A12 VSS_1
VSS_82 AL10 AY12 VSS_163
VSS_244 BJ18 BN7 VSS_325 VSS_409 F17 AT14 BD35
A16 VSS_2
VSS_83 AL12 AY33 VSS_164
VSS_245 BJ22 BP12 VSS_326 VSS_410 F19 AT31 VCCGT1 VCCGT80 BD36
A18 VSS_3
VSS_84 AL14 AY34 VSS_165
VSS_246 BJ25 BP14 VSS_327 VSS_411 F2 AT32 VCCGT2 VCCGT81 BE31
A20 VSS_4
VSS_85 AL33 B9 VSS_166
VSS_247 BJ29 BP18 VSS_328 VSS_412 F21 AT33 VCCGT3 VCCGT82 BE32
A22 VSS_5
VSS_86 AL34 BA10 VSS_167
VSS_248 BJ30 BP21 VSS_329 VSS_413 F23 AT34 VCCGT4 VCCGT83 BE33
A24 VSS_6
VSS_87 AL4 BA11 VSS_168
VSS_249 BJ31 BP24 VSS_330 VSS_414 F25 AT35 VCCGT5 VCCGT84 BE34
A26 VSS_7
VSS_88 AL7 BA12 VSS_169
VSS_250 BJ32 BP25 VSS_331 VSS_415 F27 AT36 VCCGT6 VCCGT85 BE35
A28 VSS_8
VSS_89 AL8 BA37 VSS_170
VSS_251 BJ33 BP26 VSS_332 VSS_416 F29 AT37 VCCGT7 VCCGT86 BE36
A30 VSS_9
VSS_90 AL9 BA38 VSS_171
VSS_252 BJ34 BP29 VSS_333 VSS_417 F3 AT38 VCCGT8 VCCGT87 BE37
D VSS_10
VSS_91 VSS_172
VSS_253 VSS_334 VSS_418 VCCGT9 VCCGT88 D
A6 AM1 BA6 BJ35 BP33 F31 AU14 BE38
A9 VSS_11
VSS_92 AM12 BA7 VSS_173
VSS_254 BJ36 BP34 VSS_335 VSS_419 F36 AU29 VCCGT10 VCCGT89 BF13
AA12 VSS_12
VSS_93 AM2 BA8 VSS_174
VSS_255 BK13 BP7 VSS_336 VSS_420 F4 AU30 VCCGT11 VCCGT90 BF14
AA29 VSS_13
VSS_94 AM3 BA9 VSS_175
VSS_256 BK14 BR12 VSS_337 VSS_421 F5 AU31 VCCGT12 VCCGT91 BF29
AA30 VSS_14
VSS_95 AM37 BB1 VSS_176
VSS_257 BK15 BR14 VSS_338 VSS_422 F8 AU32 VCCGT13 VCCGT92 BF30
AB33 VSS_15
VSS_96 AM38 BB12 VSS_177
VSS_258 BK18 BR18 VSS_339 VSS_423 F9 AU35 VCCGT14 VCCGT93 BF31
AB34 VSS_16
VSS_97 AM4 BB2 VSS_178
VSS_259 BK22 BR21 VSS_340 VSS_424 G10 AU36 VCCGT15 VCCGT94 BF32
AB6 VSS_17
VSS_98 AM5 BB29 VSS_179
VSS_260 BK25 BR24 VSS_341 VSS_425 G12 AU37 VCCGT16 VCCGT95 BF35
AC1 VSS_18
VSS_99 AN12 BB3 VSS_180
VSS_261 BK29 BR25 VSS_342 VSS_426 G14 AU38 VCCGT17 VCCGT96 BF36
AC12 VSS_19
VSS_100 AN29 BB30 VSS_181
VSS_262 BK6 BR26 VSS_343 VSS_427 G16 AV29 VCCGT18 VCCGT97 BF37
AC2 VSS_20
VSS_101 AN30 BB4 VSS_182
VSS_263 BL13 BR29 VSS_344 VSS_428 G18 AV30 VCCGT19 VCCGT98 BF38
AC3 VSS_21
VSS_102 AN5 BB5 VSS_183
VSS_264 BL14 BR34 VSS_345 VSS_429 G20 AV31 VCCGT20 VCCGT99 BG29
AC37 VSS_22
VSS_103 AN6 BB6 VSS_184
VSS_265 BL18 BR36 VSS_346 VSS_430 G22 AV32 VCCGT21 VCCGT100 BG30
AC38 VSS_23
VSS_104 AP10 BC12 VSS_185
VSS_266 BL19 BR7 VSS_347 VSS_431 G23 AV33 VCCGT22 VCCGT101 BG31
B.Schematic Diagrams

AC4 VSS_24
VSS_105 AP11 BC13 VSS_186
VSS_267 BL20 BT12 VSS_348 VSS_432 G24 AV34 VCCGT23 VCCGT102 BG32
AC5 VSS_25
VSS_106 AP12 BC14 VSS_187
VSS_268 BL21 BT14 VSS_349 VSS_433 G26 AV35 VCCGT24 VCCGT103 BG33
AC6 VSS_26
VSS_107 AP33 BC33 VSS_188
VSS_269 BL22 BT18 VSS_350 VSS_434 G28 AV36 VCCGT25 VCCGT104 BG34
AD10 VSS_27
VSS_108 AP34 BC34 VSS_189
VSS_270 BL29 BT21 VSS_351 VSS_435 G4 AW14 VCCGT26 VCCGT105 BG35
AD11 VSS_28
VSS_109 AP8 BC6 VSS_190
VSS_271 BL33 BT24 VSS_352 VSS_436 G5 AW31 VCCGT27 VCCGT106 BG36
AD12 VSS_29
VSS_110 AP9 BD10 VSS_191
VSS_272 BL35 BT26 VSS_353 VSS_437 G6 AW32 VCCGT28 VCCGT107 BH33
AD29 VSS_30
VSS_111 AR1 BD11 VSS_192
VSS_273 BL38 BT29 VSS_354 VSS_438 G8 AW33 VCCGT29 VCCGT108 BH34
AD30 VSS_31
VSS_112 AR13 BD12 VSS_193
VSS_274 BL6 BT32 VSS_355 VSS_439 G9 AW34 VCCGT30 VCCGT109 BH35
AD6 VSS_32
VSS_113 AR14 BD37 VSS_194
VSS_275 BM11 BT5 VSS_356 VSS_440 H11 AW35 VCCGT31 VCCGT110 BH36
AD8 VSS_33
VSS_114 AR2 BD6 VSS_195
VSS_276 BM12 C11 VSS_357 VSS_441 H12 AW36 VCCGT32 VCCGT111 BH37
AD9 VSS_34
VSS_115 AR29 BD7 VSS_196
VSS_277 BM13 C13 VSS_358 VSS_442 H18 AW37 VCCGT33 VCCGT112 BH38
AE33 VSS_35
VSS_116 AR3 BD8 VSS_197
VSS_278 BM14 C15 VSS_359 VSS_443 H22 AW38 VCCGT34 VCCGT113 BJ16
AE34 VSS_36
VSS_117 AR30 BD9 VSS_198
VSS_279 BM18 C17 VSS_360 VSS_444 H25 AY29 VCCGT35 VCCGT114 BJ17
AE6 VSS_37
VSS_118 AR31 BE1 VSS_199
VSS_280 BM2 C19 VSS_361 VSS_445 H32 AY30 VCCGT36 VCCGT115 BJ19
AF1 VSS_38
VSS_119 AR32 BE2 VSS_200
VSS_281 BM21 C21 VSS_362 VSS_446 H35 AY31 VCCGT37 VCCGT116 BJ20
AF12 VSS_39
VSS_120 AR33 BE29 VSS_201
VSS_282 BM22 C23 VSS_363 VSS_447 J10 AY32 VCCGT38 VCCGT117 BJ21
AF13 VSS_40
VSS_121 AR34 BE3 VSS_202
VSS_283 BM23 C25 VSS_364 VSS_448 J18 AY35 VCCGT39 VCCGT118 BJ23

Sheet 7 of 60 AF14
AF2
AF3
AF4
VSS_41
VSS_122
VSS_42
VSS_123
VSS_43
VSS_124
VSS_44
VSS_125
VSS_45
VSS_126
AR35
AR36
AR37
AR38
BE30
BE4
BE5
BE6
VSS_203
VSS_284
VSS_204
VSS_285
VSS_205
VSS_286
VSS_206
VSS_287
VSS_207
VSS_288
BM24
BM25
BM26
BM27
C27
C29
C31
C37
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
J22
J25
J32
J33
AY36
AY37
AY38
BA13
VCCGT40
VCCGT41
VCCGT42
VCCGT43
VCCGT44
VCCGT119
VCCGT120
VCCGT121
VCCGT122
VCCGT123
BJ24
BJ26
BJ27
BJ37
AG10 AR4 BF12 BM28 C5 J36 BA14 BJ38

Processor 6/6 AG11 VSS_46

VSS_127 AR5 BF33 VSS_208
VSS_289 BM29 C8 VSS_370 VSS_454 J4 BA29 VCCGT45 VCCGT124 BK16
C AG13 VSS_47
VSS_128 AT29 BF34 VSS_209
VSS_290 BM3 C9 VSS_371 VSS_455 J7 BA30 VCCGT46 VCCGT125 BK17 C
AG29 VSS_48
VSS_129 AT30 BF6 VSS_210
VSS_291 BM33 D10 VSS_372 VSS_456 K1 BA31 VCCGT47 VCCGT126 BK19
AG30 VSS_49
VSS_130 AT6 BG12 VSS_211
VSS_292 BM35 D12 VSS_373 VSS_457 K10 BA32 VCCGT48 VCCGT127 BK20
AG6 VSS_50
VSS_131 AU10 BG13 VSS_212
VSS_293 BM38 D14 VSS_374 VSS_458 K11 BA33 VCCGT49 VCCGT128 BK21
AG7 VSS_51
VSS_132 AU11 BG14 VSS_213
VSS_294 BM5 D16 VSS_375 VSS_459 K2 BA34 VCCGT50 VCCGT129 BK23
AG8 VSS_52
VSS_133 AU12 BG37 VSS_214
VSS_295 BM6 D18 VSS_376 VSS_460 K3 BA35 VCCGT51 VCCGT130 BK24
AH12 VSS_53
VSS_134 AU33 BG38 VSS_215
VSS_296 BM7 D20 VSS_377 VSS_461 K38 BA36 VCCGT52 VCCGT131 BK26
AH33 VSS_54
VSS_135 AU34 BG6 VSS_216
VSS_297 BM8 D22 VSS_378 VSS_462 K4 BB13 VCCGT53 VCCGT132 BK27
AH34 VSS_55
VSS_136 AU6 BH1 VSS_217
VSS_298 BM9 D24 VSS_379 VSS_463 K5 BB14 VCCGT54 VCCGT133 BL15
AH35 VSS_56
VSS_137 AU7 BH10 VSS_218
VSS_299 BN12 D26 VSS_380 VSS_464 K7 BB31 VCCGT55 VCCGT134 BL16
AH36 VSS_57
VSS_138 AU8 BH11 VSS_219
VSS_300 BN14 D28 VSS_381 VSS_465 K8 BB32 VCCGT56 VCCGT135 BL17
AH6 VSS_58
VSS_139 AU9 BH12 VSS_220
VSS_301 BN18 D3 VSS_382 VSS_466 K9 BB33 VCCGT57 VCCGT136 BL23
AJ1 VSS_59
VSS_140 AV37 BH14 VSS_221
VSS_302 BN19 D30 VSS_383 VSS_467 L29 BB34 VCCGT58 VCCGT137 BL24
AJ13 VSS_60
VSS_141 AV38 BH2 VSS_222
VSS_303 BN2 D33 VSS_384 VSS_468 L30 BB35 VCCGT59 VCCGT138 BL25
AJ2 VSS_61
VSS_142 AW1 BH3 VSS_223
VSS_304 BN20 D6 VSS_385 VSS_469 L33 BB36 VCCGT60 VCCGT139 BL26
AJ3 VSS_62
VSS_143 AW12 BH4 VSS_224
VSS_305 BN21 D9 VSS_386 VSS_470 L34 BB37 VCCGT61 VCCGT140 BL27
AJ37 VSS_63
VSS_144 AW2 BH5 VSS_225
VSS_306 BN24 E34 VSS_387 VSS_471 M12 BB38 VCCGT62 VCCGT141 BL28
AJ38 VSS_64
VSS_145 AW29 BH6 VSS_226
VSS_307 BN29 E35 VSS_388 VSS_472 M13 BC29 VCCGT63 VCCGT142 BL36
AJ4 VSS_65
VSS_146 AW3 BH7 VSS_227
VSS_308 BN30 E38 VSS_389 VSS_473 N10 BC30 VCCGT64 VCCGT143 BL37
AJ5 VSS_66
VSS_147 AW30 BH8 VSS_228
VSS_309 BN31 E4 VSS_390 VSS_474 N11 BC31 VCCGT65 VCCGT144 BM15
AJ6 VSS_67
VSS_148 AW4 BH9 VSS_229
VSS_310 BN34 E9 VSS_391 VSS_475 N12 BC32 VCCGT66 VCCGT145 BM16
W4 VSS_68
VSS_149 U6 T2 VSS_230
VSS_311 P38 N3 VSS_392 VSS_476 N2 BC35 VCCGT67 VCCGT146 BM17
W5 VSS_69
VSS_150 V12 T3 VSS_231
VSS_312 P6 N33 VSS_393 VSS_477 BT8 BC36 VCCGT68 VCCGT147 BM36
Y10 VSS_70
VSS_151 V29 T33 VSS_232
VSS_313 R12 N34 VSS_394 VSS_478 BR9 BC37 VCCGT69 VCCGT148 BM37
Y11 VSS_71
VSS_152 V30 T34 VSS_233
VSS_314 R29 N4 VSS_395 VSS_479 BC38 VCCGT70 VCCGT149 BN15
Y13 VSS_72
VSS_153 A14 T4 VSS_234
VSS_315 AY14 N5 VSS_396 A3 BD13 VCCGT71 VCCGT150 BN16
Y14 VSS_73
VSS_154 AD7 T5 VSS_235
VSS_316 BD38 N6 VSS_397 VSS_A3 A34 BD14 VCCGT72 VCCGT151 BN17
Y37 VSS_74
VSS_155 V6 T7 VSS_236
VSS_317 R30 N7 VSS_398 VSS_A34 A4 BD29 VCCGT73 VCCGT152 BN36
Y38 VSS_75
VSS_156 W1 T8 VSS_237
VSS_318 T1 N8 VSS_399 VSS_A4 B3 BD30 VCCGT74 VCCGT153 BN37
Y7 VSS_76
VSS_157 W12 T9 VSS_238
VSS_319 T10 N9 VSS_400 VSS_B3 B37 BD31 VCCGT75 VCCGT154 BN38
Y8 VSS_77
VSS_158 W2 U37 VSS_239
VSS_320 T11 P12 VSS_401 VSS_B37 BR38 BD32 VCCGT76 VCCGT155 BP15
Y9 VSS_78
VSS_159 W3 U38 VSS_240
VSS_321 T12 P37 VSS_402 VSS_BR38 BT3 BD33 VCCGT77 VCCGT156 BP16
AK29 VSS_79
VSS_160 W33 BJ12 VSS_241
VSS_322 T13 M14 VSS_403 VSS_BT3 BT35 BD34 VCCGT78 VCCGT157 BP17
AK30 VSS_80
VSS_161 W34 BJ14 VSS_242
VSS_323 T14 M6 VSS_404 VSS_BT35 BT36 BP37 VCCGT79 VCCGT158 BR37
VSS_81
VSS_162 VSS_243
VSS_324 N1 VSS_405 VSS_BT36 BT4 BP38 VCCGT159 VCCGT164 BT15
F11 VSS_406 VSS_BT4 C2 BR15 VCCGT160 VCCGT165 BT16
6 OF 13 7 OF 13
CFL_H_62_INT_IP_CRB_CFLH CFL_H_62_INT_IP_CRB_CFLH F13 VSS_407 VSS_C2 D38 BR16 VCCGT161 VCCGT166 BT17 VCCGT
VSS_408 VSS_D38 BR17 VCCGT162 VCCGT167 BT37
B B
CFL_H_62_INT_IP_CRB_CFLH VCCGT163 VCCGT168
8 OF 13
VCCGT_SENSE
PJ39 *1mm VSSGT_SENSE PR259 100_04
AH37 1 2
VSSGT_SENSE VCCGT_SENSE VSSGT_SENSE 47
AH38 1 2
VCCGT_SENSE VCCGT_SENSE 47
11 OF 13 PJ38 *1mm
CFL_H_62_INT_IP_CRB_CFLH Default
VSSGT_SENSE
9/27 Power PR260 100_04

PLACE CAP IN BACK SIDE

CPU_BACK_VCCGT
VCCGT

PLACE CAP IN BOARD EDGE C262 C236 C266 C174 C533 C268 C535 C534 C78 C79 C536 C233 C265
10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06

10u_4V_X6S_06
*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06

*10u_4V_X6S_06
CPU_TOP_ V C C G T

VCCGT

C237 C234 C177 C235 C267 C238

22u_6.3V_X6S_08

22u_6.3V_X6S_08

22u_6.3V_X6S_08

22u_6.3V_X6S_08

22u_6.3V_X6S_08

22u_6.3V_X6S_08

VCCGT

C172 C232 C173 C261 C132 C176 C178 C180 C133 C257 C260 C230 C264 C269 C231 C263 C259 C175 C229 C131 C179 C258
A A
1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04

1u_6.3V_X6S_04
*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04

*1u_6.3V_X6S_04
VCCGT 46

D02_02/26_A ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[07] Processor 7/7-POWER/GND
Size Document Number Rev
Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 7 of 63

5 4 3 2 1

B - 8 Processor 6/6
 Schematic Diagrams

DDR4 CHA SO-DIMM

5 4 3 2 1

Channel A SO-DIMM 0[RAM1] J_DIMMA_1A

RVS TYPE
H=5.2mm
M_A_DQ[63:0] 3
VDDQ

163
J_DIMMA_1B

258
VTT_MEM

2.5V

160 VDD19 VTT

M_A_DQ1 VDD18
137 8 159
3 M_A_CLK_DDR0 139 CK0_T DQ0 7 M_A_DQ0 154 VDD17 259
3 M_A_CLK_DDR#0 138 CK0_C DQ1 20 M_A_DQ3 153 VDD16 VPP2 257
3 M_A_CLK_DDR1 140 CK1_T DQ2 21 M_A_DQ2 148 VDD15 VPP1
3 M_A_CLK_DDR#1 CK1_C DQ3 M_A_DQ4 VDD14
4 147
109 DQ4 3 M_A_DQ5 142 VDD13 3.3VS
3 M_A_CKE0 CKE0 DQ5 M_A_DQ7 VDD12
D 110 16 141 D
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 3 M_A_CKE1 CKE1 DQ6 M_A_DQ6 VDD11
17 136 255
DDR4_DRAMRST# 149 DQ7 28 M_A_DQ9 135 VDD10 VDDSPD
9,27 DDR4_DRAMRST# 3 M_A_CS#0 157 S0* DQ8 29 M_A_DQ13 130 VDD9
3 M_A_CS#1 S1* DQ9 41 M_A_DQ11 129 VDD8 C376 C377
155 DQ10 42 M_A_DQ15 124 VDD7
3 M_A_ODT0 161 ODT0 DQ11 24 M_A_DQ8 123 VDD6 0.1u_10V_X5R_04 *2.2u_6.3V_X5R_04
3 M_A_ODT1 ODT1 DQ12 25 M_A_DQ12 118 VDD5
DQ13 M_A_DQ14 VDD4
115 38 117
PLACE THE CAP CLOSE TO SODIMM 3 M_A_BG0 113 BG0 DQ14 37 M_A_DQ10 112 VDD3 11/28
DDR_VREFCA_CHA_DIMM 3 M_A_BG1 150 BG1 DQ15 50 M_A_DQ16 111 VDD2
3 M_A_BA0 145 BA0 DQ16 49 M_A_DQ21 VDD1
3 M_A_BA1 BA1 DQ17 62 M_A_DQ23 GND1
C374 144 DQ18 63 M_A_DQ22 MT1 GND2
3
M_A_A0 A0 DQ19 M_A_DQ20 MT2

B.Schematic Diagrams
133 46
0.1u_10V_X7R_04 3
M_A_A1 132 A1 DQ20 45 M_A_DQ17 PLACE NEAR TO PIN
3
M_A_A2 131 A2 DQ21 58 M_A_DQ19 251 252
3
M_A_A3 M_A_DQ18
12/04 3
M_A_A4
128
126
A3
A4
DQ22
DQ23
59
70 M_A_DQ25
247
243
VSS
VSS
VSS
VSS
248
244
3
M_A_A5 127 A5 DQ24 71 M_A_DQ29 239 VSS VSS 238
3
M_A_A6 122 A6 DQ25 83 M_A_DQ31 235 VSS VSS 234
3
M_A_A7 125 A7 DQ26 84 M_A_DQ26 231 VSS VSS 230
3
M_A_A8 A8 DQ27 M_A_DQ24 VSS VSS

VDDQ 3
3
3
M_A_A9
M_A_A10
M_A_A11
121
146
120
119
A9
A10_AP
A11
DQ28
DQ29
DQ30
66
67
79
80
M_A_DQ28
M_A_DQ30
M_A_DQ27
227
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
214
Sheet 8 of 60
3
M_A_A12 A12 DQ31 M_A_DQ32 VSS VSS

C
Close to DDR4

R184
3
M_A_A13
3 M_A_WE#
3 M_A_CAS#
158
151
156
152
A13
A14_WE*
A15_CAS*
DQ32
DQ33
DQ34
174
173
187
186
M_A_DQ37
M_A_DQ39
M_A_DQ34
209
205
201
197
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
196 C
DDR4 CHA SO-
3 M_A_RAS# A16_RAS* DQ35 M_A_DQ36 VSS VSS

DDR4_DRAMRST#
470_04

3 M_A_ACT#
114
ACT*
DQ36
DQ37
DQ38
170
169
183
182
M_A_DQ33
M_A_DQ38
M_A_DQ35
193
189
185
181
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
180
DIMM
143 DQ39 195 M_A_DQ44 175 VSS VSS 176
3 DDR0_A_PARITY 116 PARITY DQ40 194 M_A_DQ40 171 VSS VSS 172
C381
3 DDR0_A_ALERT# DIMM0_CHA_EVENT# 134 ALERT* DQ41 207 M_A_DQ42 167 VSS VSS 168
DDR4_DRAMRST# 108 EVENT* DQ42 208 M_A_DQ43 107 VSS VSS 106
*0.1u_10V_X7R_04
RESET* DQ43 191 M_A_DQ41 103 VSS VSS 102
DDR_VREFCA_CHA_DIMM 164 DQ44 190 M_A_DQ45 99 VSS VSS 98
VREFCA DQ45 203 M_A_DQ47 93 VSS VSS 94
254 DQ46 204 M_A_DQ46 89 VSS VSS 90
9 SMB_DATA_MAIN_DDR4 253 SDA DQ47 216 M_A_DQ48 85 VSS VSS 86
9 SMB_CLK_MAIN_DDR4 SCL DQ48 215 M_A_DQ49 81 VSS VSS 82
DQ49 M_A_DQ54 VSS VSS
000 166
SA2 DQ50
228
M_A_DQ53
77
VSS VSS
78
260 229 73 72
256 SA1 DQ51 211 M_A_DQ50 69 VSS VSS 68
SA0 DQ52 212 M_A_DQ52 65 VSS VSS 64
DQ53 224 M_A_DQ55 61 VSS VSS 60
DQ54 M_A_DQ51 VSS VSS
CHA_DIMM0=000 DQ55
225
M_A_DQ56
57
VSS VSS
56
92 237 51 52
CHA_DIMM1=001 91 CB0_NC DQ56 236 M_A_DQ60 47 VSS VSS 48
CB1_NC DQ57 M_A_DQ63 VSS VSS
CHB_DIMM0=010 101
CB2_NC DQ58
249
M_A_DQ62
43
VSS VSS
44
9/13 Common Design 105 250 39 40
CHB_DIMM1=011 88 CB3_NC DQ59 232 M_A_DQ57 35 VSS VSS 36
VDDQ 87 CB4_NC DQ60 233 M_A_DQ61 31 VSS VSS 30
2.5V 100 CB5_NC DQ61 245 M_A_DQ59 27 VSS VSS 26
104 CB6_NC DQ62 246 M_A_DQ58 23 VSS VSS 22
B CB7_NC DQ63 19 VSS VSS 18 B
12 13 M_A_DQS0 M_A_DQS[3:0] 3 15 VSS VSS 14
VDDQ DM0*/DBI0* DQS0_T M_A_DQS1 VSS VSS
C379 C378 R181 33 34 9 10
54 DM1*/DBI1* DQS1_T 55 M_A_DQS2 5 VSS VSS 6
240_1%_04 DM2*/DBI2* DQS2_T M_A_DQS3 VSS VSS
10u_6.3V_X5R_06 1u_6.3V_X5R_04 75 76 1 2
178 DM3*/DBI3* DQS3_T 179 M_A_DQS4 M_A_DQS[7:4] 3 VSS VSS
DIMM0_CHA_EVENT# 199 DM4*/DBI4* DQS4_T 200 M_A_DQS5

VTT_MEM
11/28 220 DM5*/DBI5*
DM6*/DBI6*
DQS5_T
DQS6_T
221 M_A_DQS6
M_A_DQS7
241 242 D4AR0-26001-1P52
96 DM7*/DBI7* DQS7_T 97
DM8*/DBI8* DQS8_T
M_A_DQS#0 M_A_DQS#[3:0] 3 VDDQ
11
DQS0_C M_A_DQS#1
C385 C386 C840 32
DQS1_C 53 M_A_DQS#2
DQS2_C 74 M_A_DQS#3
*10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
DQS3_C 177 M_A_DQS#4 M_A_DQS#[7:4] 3
DQS4_C
DQS5_C
198 M_A_DQS#5
M_A_DQS#6
R172
月D I M M䪗㒢 㓦
12/04 DQS6_C
219
240 M_A_DQS#7
1K_1%_04
DQS7_C 95 DDR_VREFCA_CHA_DIMM
162 DQS8_C
VDDQ 165 S2*/C0
S3*/C1 C373
R173
*0.1u_10V_X7R_04
D4AR0-26001-1P52 1K_1%_04
C393 C371 C400 C411 C395 C398 C372 C396
6-86-24260-019
*10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06
6,9,45,48 VDDQ
A R174 2_1%_04 A
3 DIMM_CA_CPU_VREF_A 9,45 VTT_MEM
VDDQ 11/28 11/28 2nd ass'y BOM 9,45 2.5V
6-86-24202-AB4 C383
9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS
6-86-24202-AB5
0.022u_16V_X7R_04
C675 C674 C673 C669 C672 C668 C670 C671 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
R182 Title
*1u_6.3V_X5R_04 *1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 1u_6.3V_X5R_04
24.9_1%_04 [08] DDR4 CHA SO-DIMM_0
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 8 of 63

5 4 3 2 1

DDR4 CHA SO-DIMM B - 9

 Schematic Diagrams

DDR4 CHB SO-DIMM

5 4 3 2 1

J_DIMMB_2B VTT_MEM
STD TYPE
Channel B SO-DIMM 0[RAM2]
VDDQ
2.5V
163 258
H=5.2mm 160
159
VDD19
VDD18
VTT

J_DIMMB_2A 154 VDD17 259

153 VDD16 VPP2 257
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 137 8 M_B_DQ5 M_B_DQ[63:0] 3 148 VDD15 VPP1
DDR4_DRAMRST# 3 M_B_CLK_DDR0 139 CK0_T DQ0 7 M_B_DQ1 147 VDD14
8,27 DDR4_DRAMRST# 3 M_B_CLK_DDR#0 CK0_C DQ1 M_B_DQ7 VDD13 3.3VS
138 20 142
3 M_B_CLK_DDR1 CK1_T DQ2 M_B_DQ2 VDD12
140 21 141
3 M_B_CLK_DDR#1 CK1_C DQ3 M_B_DQ4 VDD11
4 136 255
109 DQ4 3 M_B_DQ0 135 VDD10 VDDSPD
D 3 M_B_CKE0 M_B_DQ6 D
110 CKE0 DQ5 16 130 VDD9
3 M_B_CKE1 CKE1 DQ6 M_B_DQ3 VDD8
17 129 C402 C430
149 DQ7 28 M_B_DQ10 124 VDD7
3 M_B_CS#0 157 S0* DQ8 29 M_B_DQ14 123 VDD6 0.1u_10V_X5R_04 2.2u_6.3V_X5R_04
3 M_B_CS#1 S1* DQ9 41 M_B_DQ12 118 VDD5
DQ10 M_B_DQ15 VDD4
155 42 117
3 M_B_ODT0 ODT0 DQ11 M_B_DQ8 VDD3
161 24 112
PLACE THE CAP CLOSE TO SODIMM 3 M_B_ODT1 ODT1 DQ12 25 M_B_DQ9 111 VDD2 D02_01/31_H
DDR_VREFCA_CHB_DIMM 115 DQ13 38 M_B_DQ11 VDD1
3 M_B_BG0 BG0 DQ14 M_B_DQ13
113 37 GND1
3 M_B_BG1 150 BG1 DQ15 50 M_B_DQ22 MT1 GND2
3 M_B_BA0 BA0 DQ16 M_B_DQ17 MT2
B.Schematic Diagrams

C697 145 49 PLACE NEAR TO PIN

3 M_B_BA1 BA1 DQ17 62 M_B_DQ20
144 DQ18 63 M_B_DQ19 251 252
0.1u_10V_X7R_04
3
M_B_A0 133 A0 DQ19 46 M_B_DQ18 247 VSS VSS 248
3
M_B_A1 132 A1 DQ20 45 M_B_DQ16 243 VSS VSS 244
3
M_B_A2 131 A2 DQ21 58 M_B_DQ21 239 VSS VSS 238
D02_12/04_H 3
M_B_A3 A3 DQ22 M_B_DQ23 VSS VSS
128 59 235 234
3
M_B_A4 126 A4 DQ23 70 M_B_DQ30 231 VSS VSS 230
3
M_B_A5 127 A5 DQ24 71 M_B_DQ28 227 VSS VSS 226
3
M_B_A6 A6 DQ25 M_B_DQ31 VSS VSS

Sheet 9 of 60
2.5V 122 83 223 222
3
M_B_A7 125 A7 DQ26 84 M_B_DQ29 217 VSS VSS 218
3
M_B_A8 121 A8 DQ27 66 M_B_DQ27 213 VSS VSS 214
3
M_B_A9 A9 DQ28 M_B_DQ25 VSS VSS
146 67 209 210
3
M_B_A10 A10_AP DQ29 M_B_DQ24 VSS VSS
DDR4 CHB SO- C403

10u_6.3V_X5R_06
C404

1u_6.3V_X5R_04 VDDQ
3
M_B_A11
3
M_B_A12
3
M_B_A13
120
119
158
151
A11
A12
A13
DQ30
DQ31
DQ32
79
80
174
173
M_B_DQ26
M_B_DQ35
M_B_DQ38
205
201
197
193
VSS
VSS
VSS
VSS
VSS
VSS
206
202
196
192
3 M_B_WE# M_B_DQ37

DIMM C 156 A14_WE* DQ33 187 189 VSS VSS 188 C

3 M_B_CAS# 152 A15_CAS* DQ34 186 M_B_DQ36 185 VSS VSS 184
D02_12/04_H 3 M_B_RAS# A16_RAS* DQ35 M_B_DQ34 VSS VSS
R207 170 181 180
DQ36 169 M_B_DQ39 175 VSS VSS 176
240_1%_04 114 DQ37 183 M_B_DQ33 171 VSS VSS 172
3 M_B_ACT# ACT* DQ38 182 M_B_DQ32 167 VSS VSS 168
VTT_MEM 143 DQ39 195 M_B_DQ45 107 VSS VSS 106
VTT_MEM 3 DDR1_B_PARITY PARITY DQ40 M_B_DQ41 VSS VSS
116 194 103 102
3 DDR1_B_ALERT# DIMM0_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 99 98
DDR4_DRAMRST# 108 EVENT* DQ42 208 M_B_DQ43 93 VSS VSS 94
RESET* DQ43 191 M_B_DQ44 89 VSS VSS 90
C428 C429 C838 DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ40 85 VSS VSS 86
VREFCA DQ45 203 M_B_DQ47 81 VSS VSS 82
10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
254 DQ46 204 M_B_DQ42 77 VSS VSS 78
8,9 SMB_DATA_MAIN_DDR4 253 SDA DQ47 216 M_B_DQ54 73 VSS VSS 72
8,9 SMB_CLK_MAIN_DDR4 SCL DQ48 215 M_B_DQ48 69 VSS VSS 68
D02_12/04_H D02_12/04_H DQ49 M_B_DQ49 VSS VSS
010 166
SA2 DQ50
228
M_B_DQ55
65
VSS VSS
64
3.3VS
260 229 61 60
256 SA1 DQ51 211 M_B_DQ52 57 VSS VSS 56
SA0 DQ52 212 M_B_DQ51 51 VSS VSS 52
DQ53 224 M_B_DQ53 47 VSS VSS 48
CHA_DIMM0=000 DQ54 225 M_B_DQ50 43 VSS VSS 44
DQ55 M_B_DQ57 VSS VSS
CHA_DIMM1=001 92
CB0_NC DQ56
237
M_B_DQ62
39
VSS VSS
40
91 236 35 36
CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ56 31 VSS VSS 30
SMB_DATA 27,37,45 CB2_NC DQ58 M_B_DQ63 VSS VSS
DESIGN NOTE:
SM BUS 5VS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232 M_B_DQ59
27
23 VSS VSS
26
22
CB4_NC DQ60 M_B_DQ61 VSS VSS
㚫㚱⸚㒦䘬 ⓷ 柴婳㉱ GND⊭ 央 87 233 19 18
CB5_NC DQ61 M_B_DQ60 VSS VSS
6

⣏ VI A㗪
␐怕婳 怈暊 2 0 mil D 100 245 15 14
B 104 CB6_NC DQ62 246 M_B_DQ58 9 VSS VSS 10 B
Q10A
3.3VA R186 2G MTDK3S6R CB7_NC DQ63 5 VSS VSS 6
1/10
S 12 13 M_B_DQS0 M_B_DQS[3:0] 3 1 VSS VSS 2
VDDQ
1

DM0*/DBI0* DQS0_T M_B_DQS1 VSS VSS

1K_04 33 34
54 DM1*/DBI1* DQS1_T 55 M_B_DQS2
R185 R188 1K_04 3.3VS
75 DM2*/DBI2* DQS2_T 76 M_B_DQS3
178 DM3*/DBI3* DQS3_T 179 M_B_DQS4 M_B_DQS[7:4] 3
1K_04 D4AS0-26001-1P52
DM4*/DBI4* DQS4_T M_B_DQS5
6

D 199 200
SMB_DATA_MAIN_DDR4 8,9 220 DM5*/DBI5* DQS5_T 221 M_B_DQS6
SMB_CLK 27,37,45 DM6*/DBI6* DQS6_T M_B_DQS7 VDDQ
Q11B 2G 241 242
MTDK3S6R Q11A S 96 DM7*/DBI7* DQS7_T 97
1

DM8*/DBI8* DQS8_T
3

D
M_B_DQS#0 M_B_DQS#[3:0] 3
3

MTDK3S6R D 11
25,27 PM_PCH_PWROK
5G
S 5G
Q10B
MTDK3S6R
DQS0_C
DQS1_C
32
53
M_B_DQS#1
M_B_DQS#2
R474
1K_1%_04
月D I M M䪗㒢 㓦
12/04
4

S DQS2_C 74 M_B_DQS#3
4

DQS3_C 177 M_B_DQS#4 M_B_DQS#[7:4] 3 DDR_VREFCA_CHB_DIMM

DQS4_C 198 M_B_DQS#5
R189 1K_04 3.3VS DQS5_C 219 M_B_DQS#6
DQS6_C 240 M_B_DQS#7 C699
R475
DQS7_C 95
VDDQ SMB_CLK_MAIN_DDR4 8,9 DQS8_C 1K_1%_04 *0.1u_10V_X7R_04
162
165 S2*/C0
S3*/C1
R473 2_1%_04
3 DIMM_DQ_CPU_VREF_B
C412 C399 C394 C384 C407 C423 C401 C397 D4AS0-26001-1P52
C696
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
A 6-86-24260-003 0.022u_16V_X7R_04 A

VDDQ 11/28 11/28 2nd ass'y BOM R472

6-86-24202-AB4 24.9_1%_04
6-86-24202-AB5
C380 C705 C703 C701 C704 C702 C700 C410
12/04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *0.1u_10V_X7R_04 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 *0.1u_10V_X7R_04
8,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
8,45 2.5V
3.3VS
[9] DDR4 CHB SO-DIMM_0
20,21,23,37,38,39,40,41,42,51 5VS Size Document Number Re v
D02_02/26_A 4,24,26,27,30,48
6,8,45,48
3.3VA
VDDQ A3 SCHEMATIC1 6-71-N85J0-D01 D02B
8,45 VTT_MEM Date : Friday, March 02, 2018 Sheet 9 of 63
5 4 3 2 1

B - 10 DDR4 CHB SO-DIMM

 Schematic Diagrams

VGA PCI-E Interface

5 4 3 2 1

NV3V3

U150A
BGA_0908_P080_P085_P100_290X290 R4
COMMON
1/19 PCI_EXPRESS
PLACE NEAR BALLS PLACE NEAR BGA Q1
10K_04

N17=>1.0V 2SK3018S3
SNN_PEXWAKE PEX_VDD PEX_CLKREQ#
AJ11 PEX_WAKE N17P GB4C-128 D02_12/14_H 29 PEG_CLKREQ#
D S
PEX_DVDD PEX_IOVDD AG19
AJ12 PEX_RST PEX_DVDD PEX_IOVDD AG21
16,17 GPU_PEX_RST#
PEX_CLKREQ# PEX_DVDD PEX_IOVDD AG22 C112 C108 C110 C114 C67 C115 C502 C503 C501

G
AK12 PEX_CLKREQ PEX_DVDD PEX_IOVDD AG24
17,51 NVVDD_PWRGD
VGA_PEXCLK PEX_DVDD PEX_IOVDD AH21 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 4.7u_6.3V_X5R_06 4.7u_6.3V_X6S_06 *22u_6.3V_X5R_06 10u_4V_X6S_06 22u_6.3V_X6S_08
VGA_PEXCLK# AL13 PEX_REFCLK PEX_DVDD PEX_IOVDD AH25
D 29 VGA_PEXCLK AK13 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT D
29 VGA_PEXCLK# PEX_REFCLK
PEX_RX0 3300 mA total
C49 0.22u_10V_X5R_04 AK14 PEX_TX0
2 PEG_RX0 PEX_RX0#
C51 0.22u_10V_X5R_04 AJ14 PEX_TX0
2 PEG_RX#0
AN12 PEX_RX0 PLACE NEAR BALLS PLACE NEAR BGA D02_12/14_H
2 PEG_TX0 AM12 AG13
2 PEG_TX#0 PEX_RX0 PEX_HVDD PEX_IOVDDQ
PEX_HVDD PEX_IOVDDQ AG15
PEX_RX1
C52 0.22u_10V_X5R_04 PEX_RX1# AH14 PEX_TX1 PEX_HVDD PEX_IOVDDQ AG16 1V8_RUN
2 PEG_RX1
C50 0.22u_10V_X5R_04 AG14 PEX_TX1 PEX_HVDD PEX_IOVDDQ AG18
2 PEG_RX#1
PEX_HVDD PEX_IOVDDQ AG25 C106 C69 C104 C100 C120 C30 C16 C68 C66 C17
AN14 PEX_RX1 PEX_HVDD PEX_IOVDDQ AH15
2 PEG_TX1 AM14 AH18
PEX_RX1 PEX_HVDD PEX_IOVDDQ 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 4.7u_6.3V_X5R_06 4.7u_6.3V_X6S_06 *22u_6.3V_X5R_06 10u_4V_X6S_06 10u_4V_X6S_06 22u_6.3V_X6S_08
2 PEG_TX#1
PEX_RX2 PEX_HVDD PEX_IOVDDQ AH26
AK15 AH27 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
C46 0.22u_10V_X5R_04 PEX_RX2# PEX_TX2 PEX_HVDD PEX_IOVDDQ
2 PEG_RX2 AJ15 AJ27
C47 0.22u_10V_X5R_04 PEX_TX2 PEX_HVDD PEX_IOVDDQ RAMCFG: 0x0
2 PEG_RX#2
AK27
AP14
PEX_HVDD PEX_IOVDDQ
AL27 (Samsung ᷕ
⿏ K4G80325FB-HC28 )
2 PEG_TX2 PEX_RX2 PEX_HVDD PEX_IOVDDQ
AP15 PEX_RX2 PEX_HVDD PEX_IOVDDQ AM28 RVL-07916-001_v10 (Samsung Medion consigned K4G80325FB-HC25)
2 PEG_TX#2
PEX_RX3 PEX_HVDD PEX_IOVDDQ AN28
C41 0.22u_10V_X5R_04 PEX_RX3# AL16 PEX_TX3 RAMCFG: 0x2
2 PEG_RX3
C42 0.22u_10V_X5R_04 AK16
2 PEG_RX#3 PEX_TX3 [Hynix Medion consigned H5GQ8H24MJR-R4C]

B.Schematic Diagrams
VGA_ROM_SI
AN15 PEX_RX3 1V8_AON R78 100K_04 R79 *100K_04
2 PEG_TX3 AM15
2 PEG_TX#3 PEX_RX3 VGA_ROM_SO
N16P-GT PEX_RX4 R64 100K_04 R63 *100K_04 SOR_EXPOSED Audio: 0x8
C38 0.22u_10V_X5R_04 PEX_RX4# AK17 PEX_TX4 VGA_ROM_SCLK
2 PEG_RX4
C37 0.22u_10V_X5R_04 AJ17 PEX_TX4 R62 100K_04 R65 *100K_04
2 PEG_RX#4
N16P-GT AN17 PEX_RX4
2 PEG_TX4
AM17 PEX_RX4 GC6 2.0 VGA_STRAP0
2 PEG_TX#4 1V8_RUN
N16P-GT PEX_RX5 16mil 1V8_AON R47 100K_04 R53 *100K_04
C40 0.22u_10V_X5R_04 AH17 PEX_TX5
2 PEG_RX5 PEX_RX5# VGA_STRAP1

Sheet 10 of 60
C39 0.22u_10V_X5R_04 AG17 PEX_TX5 210 mA total R45 100K_04 R52 *100K_04
2 PEG_RX#5
PEX_PLL_HVDD AH12 R272 0_06 VGA_STRAP2 RAMCFG: 0x7
N16P-GT AP17 PEX_RX5 N17P GB4C-128 N17P-STUFF R46 100K_04 R50 *100K_04
2 PEG_TX5 AP18 AG12 C65 C513 C512
(Samsung K4G41325FE-HC28)
2 PEG_TX#5 PEX_RX5 NC PEX_SVDD_3V3 VGA_STRAP3
C N16P-GT R61 100K_04 R66 *100K_04 C
PEX_RX6

VGA PCI-E
C28 0.22u_10V_X5R_04 PEX_RX6# AK18 PEX_TX6 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 *4.7u_6.3V_X5R_06 VGA_STRAP4
2 PEG_RX6
C29 0.22u_10V_X5R_04 AJ18 PEX_TX6 R48 *100K_04 R54 100K_04 ASSORTED: 0_0_0_1
2 PEG_RX#6 NV FOOTPRINT
VGA_STRAP5
N16P-GT AN18 PEX_RX6 PLACE NEAR BALLS R313 *100K_04 R329 100K_04
2 PEG_TX6 AM18
2 PEG_TX#6 PEX_RX6

Interface
N16P-GT
PEX_RX7
C27 0.22u_10V_X5R_04 PEX_RX7# AL19 PEX_TX7
2 PEG_RX7 AK19
C26 0.22u_10V_X5R_04 PEX_TX7
2 PEG_RX#7
N17 b
N16P-GT AN20 PEX_RX7 L17 . HCB1608KF-300T60
2 PEG_TX7 1V8_RUN
AM20 PEX_RX7 16mil VID_PLLVDD
2 PEG_TX#7
N17P-STUFF
AK20 PEX_TX8 U150O
AJ20 PEX_TX8 PS1_VDD_SENSE C514 C64
VDD_SENSE L4 BGA_0908_P080_P085_P100_290X290
GPU_VDD_SENSE 51
AP20 PEX_RX8 22u_6.3V_X5R_06 0.1u_10V_X7R_04 COMMON
AP21 PEX_RX8 PS1_GND_SENSE 12/19 XTAL_PLL
L5 GPU_PLLVDD D02_12/14_H
NV FOOTPRINT
GND_SENSE GPU_VSS_SENSE 51
AH20 PEX_TX9 1V8_RUN L16 . HCB1608KF-300T60 N17P GB4C-128
AG20 AD8 1V8_AON
PEX_TX9 12mil PLLVDD XS_PLLVDD
AE8 SP_PLLVDD
AN21 PEX_RX9
AM21 PEX_RX9 C515 C505 C96 C94 AD7 VID_PLLVDD NC
R49
AK21 10u_6.3V_X5R_06 22u_6.3V_X5R_06 0.1u_10V_X7R_04 0.1u_10V_X7R_04
10/2 AJ21
PEX_TX10
PEX_TX10 N17P GB4C-128
GF108/GKx GF11 7
*100K_04
P8 NV FOOTPRINT NV FOOTPRINT
GPIO22 3V3AUX_NC PLACE UNDER BALLS
AN23 47uF P/N : 6-07-47611-2C0
6-34-D90C0-021-1 AM23
PEX_RX10
PEX_RX10
R328 10K_04
X_SSIN
H1 XTALSSIN XTALOUTBUFF
X_OUTBUFFNV FOOTPRINT
J4
D02_12/14_H
H24 H25 H29 H30 AL22 PEX_TX11 PLACE NEAR BALLS
H6_0D3_7 H6_0D3_7 H6_0D3_7 H6_0D3_7 AK22 PEX_TX11 H3 XTALIN XTALOUT H2

AP23 R51
PEX_RX11
AP24 PEX_RX11 N17P GB4C-128 100K_04
NC PEX_TSTCLK_OUT AJ26
AK23 AK26 X2 FSX-3M_27.000MHz_12FEO
B PEX_TX12 NC PEX_TSTCLK_OUT XTAL_OUT B
AJ23 PEX_TX12 XTAL_IN 4 3 NV FOOTPRINT
1 2
C571
AN24 PEX_RX12
AM24 PEX_RX12 C572
12p_50V_NPO_04
6-22-27R00-1BH
AH23
GPU 坢
⫼ AG23
PEX_TX13
PEX_TX13
N17P GB4C-128
NC PEX_PLLVDD AG26
12p_50V_NPO_04
1/11
6-22-27R00-1BG

AN26 PEX_RX13
6-07-12034-1A0 11/30 6-07-12034-1A0
AM26 PEX_RX13 U150P 11/30
BGA_0908_P080_P085_P100_290X290
AK24 PEX_TX14 N17P GB4C-128 GPU_TESTMODE COMMON
AJ24 PEX_TX14 NVJTAG_SEL TESTMODE AK11 R279 10K_04 13/19 MISC2

AP26 PEX_RX14 NV FOOTPRINT

AP27 PEX_RX14
VGA_ROM_CS#
AL25 PEX_TX15 ROM_CS H6
AK25 PEX_TX15 VGA_ROM_SI
PEX_TERMP ROM_SI H5 VGA_ROM_SO
AN27 PEX_RX15 PEX_TERMP AP29 R277 2.49K_1%_04 VGA_STRAP0 ROM_SO H7 VGA_ROM_SCLK
AM27 PEX_RX15 VGA_STRAP1 J2 STRAP0 ROM_SCLK H4
NV FOOTPRINT J7 STRAP1
VGA_STRAP2
VGA_STRAP3
J6 STRAP2
CHANGE VGA_STRAP4
J5 STRAP3
J3 STRAP4

N17P GB4C-128
GPIO24:HPD_IFPF BUFRST L2 NV Check 7/27

U150F
BGA_0908_P080_P085_P100_290X290 1V8_AON VGA_STRAP5 N17P GB4C-128
COMMON J1 MULTISTRAP_REF_GND L3
GPIO8 GPIO8_MEM_VDD_CTL 52
18/19 NC/VDD33 STRAP5 N17P GB4C-128
N17P GB4C-128 C198 C197 C573 C499 GPIO8:MEM_VDD_CTL
A A
AC6 NC 1V8_AON 3V3_AON J8
AJ28 NC 1V8_AON 3V3_AON K8 0.1u_10V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06
AJ4 NC VDD18 3V3_MAIN L8
AJ5 NC VDD18 3V3_MAIN M8
AL11 NC
C15 NC
D19 NC 1V8_RUN
D20 NC 16,53 PEX_VDD
D23
D26
H31
NC
NC
C196

0.1u_10V_X7R_04
C199

0.1u_10V_X7R_04
C141

1u_6.3V_X5R_04
C504

4.7u_6.3V_X5R_06
11,53 1V8_RUN
16,17,18,51,52,53 1V8_AON
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
NC FB_VREF 16 GPU_PLLVDD Title
T8
16 GPIO23_GPU_PEX_RST_HOLD# V32
NC GPIO23
NC
16,48 NV3V3 [10] VGA PCI-E Interface
Size Document Number Rev
Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 10 of 63

5 4 3 2 1

VGA PCI-E Interface B - 11

 Schematic Diagrams

VGA Frame Buffer Interface

E D C B A

Term Description U150C

BGA_0908_P080_P085_P100_290X290 FBB_CMD[31:0]
The total trace length measured COMMON
from GPU ball to capacitor is FBB_CMD[31:0] 14,15
Under GPU no more than 150 mil 3/19 FBB

Frame Buffer Interface Near GPU

The total trace length measured
from GPU ball to capacitor is no
more than 850 mil
14 FBB_D[31:0]
FBB_D[31:0] U150D
BGA_0908_P080_P085_P100_290X290
FBB_D0 COMMON
U150B FBB_D1 G9 FBB_D0 15/19 FBVDDQ FBVDDQ
BGA_0908_P080_P085_P100_290X290 FBB_D2
E9 FBB_D1
COMMON G8 FBB_D2 FBVDDQ AA27
FBB_D3
2/19 FBA FBB_D4 F9 FBB_D3 FBVDDQ AA30
FBB_D5 F11 FBB_D4 FBVDDQ AB27 C117 C118 C207 C158
FBA_D[31:0] FBB_D6
G11 FBB_D5 FBVDDQ AB33
12 FBA_D[31:0] N 1 7 ᶵᶲẞ FBB_D7 F12 FBB_D6 FBVDDQ AC27 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
N17P GB4C-128 G12 FBB_D7 FBVDDQ AD27
FBA_D0 FBB_D8 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
FBA_D1
L28 FBA_D0 FB_CLAMP E1 R339 *10K_04
FBB_D9
G6 FBB_D8 FBVDDQ AE27
BUFRST_N
FBA_D2 M29 FBA_D1 FBB_D10 F5 FBB_D9 FBVDDQ AF27 PLACE UNDER BGA
D D
FBA_D3 L29 FBA_D2 N16P-GT FBB_D11 E6 FBB_D10 FBVDDQ AG27
FBA_D4
M28 FBA_D3 FBB_D12
F6 FBB_D11 FBVDDQ B13
N31 FBA_D4 F4 FBB_D12 FBVDDQ B16
FBA_D5 FBB_D13 FBVDDQ
FBA_D6 P29 FBA_D5 FB_REFPLL_AVDD FB_DLL_AVDD K27 FB_PLLAVDD FBB_D14 G4 FBB_D13 FBVDDQ B19
FBA_D7 R29 FBA_D6 FBB_D15 E2 FBB_D14 FBVDDQ E13
FBA_D8 P28 FBA_D7 FBB_D16 F3 FBB_D15 FBVDDQ E16
FBA_D9 J28 FBA_D8 C218 C35 FBB_D17 C2 FBB_D16 FBVDDQ E19 C124 C206 C203 C213
H29 FBA_D9 D4 FBB_D17 FBVDDQ H10
FBA_D10 FBB_D18
FBA_D11 J29 FBA_D10 0.1u_10V_X7R_04 22u_6.3V_X5R_06 FBB_D19 D3 FBB_D18 FBVDDQ H11 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
FBA_D12
H28 FBA_D11 FBB_D20
C1 FBB_D19 FBVDDQ H12
G29 NV FOOTPRINT B3 H13 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
FBA_D13 FBA_D12 NV FOOTPRINT FBB_D21 FBB_D20 FBVDDQ
FBA_D14
E31 FBA_D13 FBB_D22
C4 FBB_D21 FBVDDQ H14 PLACE NEAR BGA
E32 FBA_D14 B5 FBB_D22 FBVDDQ H15
FBA_D15 FBB_D23
FBA_D16 F30 FBA_D15 FBB_D24 C5 FBB_D23 FBVDDQ H16
FBA_D17 C34 FBA_D16 N16P-GX FBA_DPLLAVDD FBB_D25 A11 FBB_D24 FBVDDQ H18 FBVDDQ
FBA_D18 D32 FBA_D17 FBB_D26 C11 FBB_D25 FBVDDQ H19
B33 D11 H20
B.Schematic Diagrams

FBA_D19 FBA_D18 FBB_D27 FBB_D26 FBVDDQ

C33 FBA_D19 B11 FBB_D27 FBVDDQ H21
FBA_D20 FBB_D28
FBA_D21 F33 FBA_D20 FBB_D29 D8 FBB_D28 FBVDDQ H22 C202 C116 C159 C302
FBA_D22 F32 FBA_D21 FBB_D30 A8 FBB_D29 FBVDDQ H23
FBA_D23 H33 FBA_D22 FBB_D[63:32] FBB_D31 C8 FBB_D30 FBVDDQ H24 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
FBA_D24
H32 FBA_D23 FBB_D32
B8 FBB_D31 FBVDDQ H8
15 FBB_D[63:32] NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
P34 FBA_D24 F24 FBB_D32 FBVDDQ H9
FBA_D25 FBB_D33 FBB_CMD0
FBA_D26
P32 FBA_D25 FBB_D34
G23 FBB_D33 FBB_CMD0 D13 FBB_CMD1 FBVDDQ L27 PLACE UNDER BGA
FBA_D27 P31 FBA_D26 FBB_D35 E24 FBB_D34 FBB_CMD1 E14 FBB_CMD2 FBVDDQ M27
FBA_D28
P33 FBA_D27 FBB_D36
G24 FBB_D35 FBB_CMD2 F14 FBB_CMD3 FBVDDQ N27
FBA_D29 L31 FBA_D28 FBB_D37 D21 FBB_D36 FBB_CMD3 A12 FBB_CMD4 FBVDDQ P27 FBVDDQ
L34 FBA_D29 FBA_CMD[31:0] E21 FBB_D37 FBB_CMD4 B12 FBVDDQ R27
FBA_D30 FBB_D38 FBB_CMD5

Sheet 11 of 60 FBA_D[63:32] FBA_D31 L32 FBA_D30 FBB_D39 G21 FBB_D38 FBB_CMD5 C14 FBB_CMD6 FBVDDQ T27
L33 FBA_CMD[31:0] 12,13 F21 B14 T30
13 FBA_D[63:32] FBA_D32 FBA_D31 FBB_D40 FBB_D39 FBB_CMD6 FBB_CMD7 FBVDDQ
FBA_D33 AG28 FBA_D32 FBA_CMD0 FBB_D41 G27 FBB_D40 FBB_CMD7 G15 FBB_CMD8 FBVDDQ T33 C212 C201 C119 C301
FBA_D34
AF29 FBA_D33 FBA_CMD0 U30 FBA_CMD1 FBB_D42
D27 FBB_D41 FBB_CMD8 F15 FBB_CMD9 FBVDDQ V27
AG29 FBA_D34 FBA_CMD1 T31 G26 FBB_D42 FBB_CMD9 E15 FBVDDQ W27 10u_4V_X6S_06 10u_4V_X6S_06 10u_4V_X6S_06 10u_4V_X6S_06
FBA_D35 FBA_CMD2 FBB_D43 FBB_CMD10

VGA Frame Buffer FBA_D36 AF28 FBA_D35 FBA_CMD2 U29 FBA_CMD3 FBB_D44 E27 FBB_D43 FBB_CMD10 D15 FBB_CMD11 FBVDDQ W30
AD30 R34 E29 A14 W33 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
FBA_D37 FBA_D36 FBA_CMD3 FBA_CMD4 FBB_D45 FBB_D44 FBB_CMD11 FBB_CMD12 FBVDDQ
FBA_D38 AD29 FBA_D37 FBA_CMD4 R33 FBA_CMD5 FBB_D46 F29 FBB_D45 FBB_CMD12 D14 FBB_CMD13 FBVDDQ Y27 PLACE UNDER BGA
FBA_D39 AC29 FBA_D38 FBA_CMD5 U32 FBA_CMD6 FBB_D47 E30 FBB_D46 FBB_CMD13 A15 FBB_CMD14
C AD28 FBA_D39 FBA_CMD6 U33 D30 FBB_D47 FBB_CMD14 B15 C
FBA_D40 FBA_CMD7 FBB_D48 FBB_CMD15 N17P GB4C-128

Interface FBA_D41
AJ29 FBA_D40 FBA_CMD7 U28 FBA_CMD8 FBB_D49
A32 FBB_D48 FBB_CMD15 C17 FBB_CMD16 52 FB_VDD_SENSE
F1 FBVDDQ_PROBE FBVDDQ
FBA_D42 AK29 FBA_D41 FBA_CMD8 V28 FBA_CMD9 FBB_D50 C31 FBB_D49 FBB_CMD16 D18 FBB_CMD17 FBVDDQ_SENSE
FBA_D43 AJ30 FBA_D42 FBA_CMD9 V29 FBA_CMD10 FBB_D51 C32 FBB_D50 FBB_CMD17 E18 FBB_CMD18
FBA_D44
AK28 FBA_D43 FBA_CMD10 V30 FBA_CMD11 FBB_D52
B32 FBB_D51 FBB_CMD18 F18 FBB_CMD19 52 FB_VSS_SENSE
F2 GND_PROBE
AM29 FBA_D44 FBA_CMD11 U34 D29 FBB_D52 FBB_CMD19 A20 PROBF_FB_GND C210 C216 C215
FBA_D45 FBA_CMD12 FBB_D53 FBB_CMD20
FBA_D46 AM31 FBA_D45 FBA_CMD12 U31 FBA_CMD13 FBB_D54 A29 FBB_D53 FBB_CMD20 B20 FBB_CMD21 FB_CAL_PD_VDDQ
FBA_D47 AN29 FBA_D46 FBA_CMD13 V34 FBA_CMD14 FBB_D55 C29 FBB_D54 FBB_CMD21 C18 FBB_CMD22 J27 FB_CAL_PD_VDDQ 10u_4V_X6S_06 10u_4V_X6S_06 22u_4V_X6S_06
FBA_D48 AM30 FBA_D47 FBA_CMD14 V33 FBA_CMD15 FBB_D56 B29 FBB_D55 FBB_CMD22 B18 FBB_CMD23
AN31 Y32 B21 G18 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
FBA_D49 FBA_D48 FBA_CMD15 FBA_CMD16 FBB_D57 FBB_D56 FBB_CMD23 FBB_CMD24 FB_CAL_PU_GND
AN32 FBA_D49 FBA_CMD16 AA31 C23 FBB_D57 FBB_CMD24 G17 H27 FB_CAL_PU_GND PLACE NEAR BGA
FBA_D50 FBA_CMD17 FBB_D58 FBB_CMD25
FBA_D51 AP30 FBA_D50 FBA_CMD17 AA29 FBA_CMD18 FBB_D59 A21 FBB_D58 FBB_CMD25 F17 FBB_CMD26
FBA_D52 AP32 FBA_D51 FBA_CMD18 AA28 FBA_CMD19 FBB_D60 C21 FBB_D59 FBB_CMD26 D16 FBB_CMD27 FB_CAL_TERM_GND
FBA_D53 AM33 FBA_D52 FBA_CMD19 AC34 FBA_CMD20 FBB_D61 B24 FBB_D60 FBB_CMD27 A18 FBB_CMD28 H25 FB_CALTERM_GND
AL31 AC33 C24 D17 FBVDDQ
FBA_D54 FBA_D53 FBA_CMD20 FBA_CMD21 FBB_D62 FBB_D61 FBB_CMD28 FBB_CMD29
AK33 FBA_D54 FBA_CMD21 AA32 B26 FBB_D62 FBB_CMD29 A17
FBA_D55 FBA_CMD22 FBB_DBI[3:0] FBB_D63 FBB_CMD30
FBA_D56 AK32 FBA_D55 FBA_CMD22 AA33 FBA_CMD23 C26 FBB_D63 FBB_CMD30 B17 FBB_CMD31
AD34 FBA_D56 FBA_CMD23 Y28 14 FBB_DBI[3:0] FBB_CMD31 E17 FBVDDQ C160 C204 C31 C161
FBA_D57 FBA_CMD24
FBA_D58
AD32 FBA_D57 FBA_CMD24 Y29 FBA_CMD25 FBB_DBI0
FBA_D59 AC30 FBA_D58 FBA_CMD25 W31 FBA_CMD26 FBB_DBI1 E11 FBB_DQM0 FBB_CMD_RFU0 C12 R80 *60.4_1%_04 22u_4V_X6S_06 22u_4V_X6S_06 22u_4V_X6S_06 22u_4V_X6S_06
AD33 FBA_D59 FBA_CMD26 Y30 FBB_DBI[7:4] E3 FBB_DQM1 FBB_CMD_RFU1 C20 R81 *60.4_1%_04
FBA_D60 FBA_CMD27 FBB_DBI2 NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
FBA_D61 AF31 FBA_D60 FBA_CMD27 AA34 FBA_CMD28 15 FBB_DBI[7:4] FBB_DBI3 A3 FBB_DQM2
FBA_D62 AG34 FBA_D61 FBA_CMD28 Y31 FBA_CMD29 FBB_DBI4 C9 FBB_DQM3 PLACE NEAR BGA
FBA_D63 AG32 FBA_D62 FBA_CMD29 Y34 FBA_CMD30 FBB_DBI5 F23 FBB_DQM4
FBA_DBI[3:0] AG33 FBA_D63 FBA_CMD30 Y33 FBA_CMD31 FBB_DBI6
F27 FBB_DQM5
FBA_CMD31 V31 FBVDDQ C30 FBB_DQM6
12 FBA_DBI[3:0] FBB_DBI7 FBC_DEBUG0
FBA_DBI0 FBB_EDC[3:0] A24 FBB_DQM7 FBB_DEBUG0 G14 FBC_DEBUG1
FBA_DBI1 P30 FBA_DQM0 FBA_CMD_RFU0 R32 R68 *60.4_1%_04 14 FBB_EDC[3:0] FBB_DEBUG1 G20
FBA_DBI[7:4] FBA_DBI2
F31 FBA_DQM1 FBA_CMD_RFU1 AC32 R7 *60.4_1%_04 FBB_EDC0
13 FBA_DBI[7:4] FBA_DBI3 F34 FBA_DQM2 FBB_EDC1 D10 FBB_DQS_WP0
M32 FBA_DQM3 FBB_EDC[7:4] D5 FBB_DQS_WP1
FBA_DBI4 FBB_EDC2 FBB_CLK0
FBA_DBI5 AD31 FBA_DQM4 15 FBB_EDC[7:4] FBB_EDC3 C3 FBB_DQS_WP2 FBB_CLK0 D12 FBB_CLK0# FBB_CLK0 14
FBA_DBI6
AL29 FBA_DQM5 FBB_EDC4
B9 FBB_DQS_WP3 FBB_CLK0 E12 FBB_CLK1 FBB_CLK0# 14
FBA_DBI7 AM32 FBA_DQM6 FBB_EDC5 E23 FBB_DQS_WP4 FBB_CLK1 E20 FBB_CLK1# FBB_CLK1 15
FBA_EDC[3:0] AF34 FBA_DQM7 FBA_DEBUG0 R28 FBB_EDC6
E28 FBB_DQS_WP5 FBB_CLK1 F20 FBB_CLK1# 15
FBA_DEBUG1 AC28 B30 FBB_DQS_WP6
12 FBA_EDC[3:0] FBB_EDC7
FBA_EDC0 A23 FBB_DQS_WP7
B FBA_EDC1 M31 FBA_DQS_WP0 B
FBA_EDC[7:4] FBA_EDC2 G31 FBA_DQS_WP1 FBA_CLK0
13 FBA_EDC[7:4] FBA_EDC3 E33 FBA_DQS_WP2 FBA_CLK0 R30 FBA_CLK0# FBA_CLK0 12 D9 FBB_DQS_RN0 FBB_WCK01 F8 FBB_WCK01 14
M33 R31 E4 E8
FBA_EDC4
FBA_EDC5
AE31
FBA_DQS_WP3
FBA_DQS_WP4
FBA_CLK0
FBA_CLK1 AB31
FBA_CLK1
FBA_CLK1#
FBA_CLK0#
FBA_CLK1
12
13
B2
FBB_DQS_RN1
FBB_DQS_RN2
FBB_WCK01
FBB_WCK23 A5
FBB_WCK01#
FBB_WCK23
14
14
DDR A FBVDDQ
FBA_EDC6
AK30 FBA_DQS_WP5 FBA_CLK1 AC31 FBA_CLK1# 13
A9 FBB_DQS_RN3 FBB_WCK23 A6 FBB_WCK23# 14 FBA_CMD14
FBA_EDC7 AN33 FBA_DQS_WP6 D22 FBB_DQS_RN4 FBB_WCK45 D24 FBB_WCK45 15 12 FBA_CMD14 FBA_CMD30 R36 10K_04
AF33 FBA_DQS_WP7 D28 FBB_DQS_RN5 FBB_WCK45 D25 FBB_WCK45# 15 13 FBA_CMD30 R15 10K_04
A30 FBB_DQS_RN6 FBB_WCK67 B27
FBB_WCK67 15 FBA_CMD13
B23 FBB_DQS_RN7 FBB_WCK67 C27 FBB_WCK67# 15 12 FBA_CMD13 FBA_CMD29
R35 10K_04
M30 FBA_DQS_RN0 FBA_WCK01 K31 FBA_WCK01 12 13 FBA_CMD29 R14 10K_04
H30 FBA_DQS_RN1 FBA_WCK01 L30 FBA_WCK01# 12 FBB_WCKB01 D6
E34 FBA_DQS_RN2 FBA_WCK23 H34 FBA_WCK23 12 FBB_WCKB01 D7
M34 FBA_DQS_RN3 FBA_WCK23 J34 FBB_WCKB23 C6
FBA_WCK23# 12
AF30 FBA_DQS_RN4 FBA_WCK45 AG30 FBA_WCK45 13 FBB_WCKB23 B6
AK31 FBA_DQS_RN5 FBA_WCK45 AG31 FBA_WCK45# 13 FBB_WCKB45 F26
AM34 FBA_DQS_RN6 FBA_WCK67 AJ34 FBA_WCK67 13 FBB_WCKB45 E26
AF32 FBA_DQS_RN7 FBA_WCK67 AK34 FBA_WCK67# 13 FBB_WCKB67 A26
FBB_WCKB67 A27
FBA_WCKB01 J30 FB_PLLAVDD
J31 H17
FBA_WCKB01
FBA_WCKB23 J32
FBB_PLL_AVDD
N17:1.8V,N16P:1.05V
DDR B FBVDDQ
FBA_WCKB23 J33 FBB_CMD14
FBA_WCKB45 AH31 C209 R102 10K_04
14 FBB_CMD14 FBB_CMD30
FBA_WCKB45 AJ31 15 FBB_CMD30 R104 10K_04
1V8_RUN L1 . HCB1608KF-300T60 FBA_WCKB67 AJ32 0.1u_10V_X7R_04 FBB_CMD13
N17P-STUFF FBA_WCKB67 AJ33 FB_PLLAVDD 14 FBB_CMD13 FBB_CMD29 R101 10K_04
NV FOOTPRINT
FB_VREF_TP N17P GB4C-128 FB_PLLAVDD 15 FBB_CMD29 R103 10K_04
H26 FB_VREF GPCPLL_AVDD FBA_PLL_AVDD U27 L2 . HCB1608KF-300T60
1V8_RUN
N17:1.8V,N16P:1.05V
C217
C162 C18
0.1u_10V_X7R_04
0.1u_10V_X7R_04 22u_6.3V_X5R_06 FB_CAL_PD_VDDQ
NV FOOTPRINT
R55 40.2_1%_04
NV FOOTPRINT FBVDDQ

FB_CAL_PU_GND NV FOOTPRINT
NV Check 7/27 PLACE NEAR BALLS D02_12/14_H R56 40.2_1%_04
A A
C21 C20 C22 C19
FB_CAL_TERM_GND
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 4.7u_6.3V_X6S_06 22u_6.3V_X5R_06 R67 60.4_1%_04
NV FOOTPRINT NV FOOTPRINT
NV FOOTPRINT

D02_02/26_A
D02A_02/14_H

10,53
10,16,53
1V8_RUN
PEX_VDD
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
12,13,14,15,52 FBVDDQ Title
[11] VGA Frame Buffer Interfac
Size Document Number Rev
Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 11 of 63

E D C B A

B - 12 VGA Frame Buffer Interface

 Schematic Diagrams

VGA Frame Buffer A

5 4 3 2 1
U151B
U151C
INS1220714
INS1221418
BGA170
COMMON BGA170
11,13 FBA_CMD[31:0] COMMON
FBA_CMD12
G3
FBA_CMD15 L3 RAS
FBA_SOE0
Normal
FBA_CMD5 CAS J1
11 FBA_CLK0 L12 MF_VSS/SOE* FBVDDQ
FBA_CMD0 WE
G12 add 1k to VSS
11 FBA_CLK0# CS B10 VSS VDD C10
R289
11 FBA_D[31:0] FBA_CMD8 B5 VSS VDD C5
J4 ABI 1K_04
D10 VSS VDD D11
U151D U151A FBA_CMD10 G10 VSS VDD G1
H4 A0_A10
INS1221112 INS1220380 FBA_CMD11 G5 VSS VDD G11
H5 A1_A9
BGA170 BGA170 FBA_CMD2 H1 VSS VDD G14
D COMMON COMMON H11 A2_BA0 D
FBA_CMD1 H14 VSS VDD G4
H10 A3_BA3
NORMAL NORMAL FBA_CMD3 K11 GND K1 VSS VDD L1
FBA_D0 FBA_D16 FBA_CMD4 A4_BA2 K14 L11
A4 V11 K10 VSS VDD
FBA_D1 DQ0 FBA_D17 DQ16 FBA_CMD7 A5_BA1 L10 L14
A2 V13 K5 VSS VDD
FBA_D2 DQ1 FBA_D18 DQ17 FBA_CMD6 A6_A11 L5 L4
B4 T11 K4 VSS VDD
FBA_D3 DQ2 FBA_D19 DQ18 FBA_CMD9 A7_A8 P10 P11
B2 T13 J5 VSS VDD
FBA_D4 DQ3 FBA_D20 DQ19 RFU_A12 T10 R10
E4 N11 VSS VDD
FBA_D5 DQ4 FBA_D21 DQ20 T5 R5
E2 N13 VSS VDD
FBA_D6 DQ5 FBA_D22 DQ21 FBVDDQ
F4 DQ6 M11 DQ22
FBA_D7 FBA_D23 A1 VSSQ VDDQ B1
F2 DQ7 M13 DQ23 A12 VSSQ VDDQ B12
FBA_EDC0 FBA_EDC2 FBA_CMD13 A14 VSSQ VDDQ B14
C2 EDC0 R13 EDC2 J2 RESET
FBA_DBI0 D2 FBA_DBI2 FBA_CMD14 A3 VSSQ VDDQ B3
DBI0 P13 DBI2 J3 CKE C1 VSSQ VDDQ D1
VREFD A10 VREFD V10
C11 D12

B.Schematic Diagrams
J12 VSSQ VDDQ
CLK C12 D14
x32 x16 x32 x16 J11 VSSQ VDDQ
FBA_D8 FBA_D24 CLK C14 D3
A11 V4 VSSQ VDDQ
FBA_D9 DQ8 NC FBA_D25 DQ24 NC C3 E10
A13 V2 VSSQ VDDQ
FBA_D10 DQ9 NC FBA_D26 DQ25 NC C4 E5
B11 T4 R326 VSSQ VDDQ
FBA_D11 DQ10 NC FBA_D27 DQ26 NC E1 F1
B13 T2 R327 VSSQ VDDQ
FBA_D12 DQ11 NC FBA_D28 DQ27 NC E12 F12
E11 N4 VSSQ VDDQ
FBA_D13 DQ12 NC FBA_D29 DQ28 NC E14 F14
E13 N2 40.2_1%_04 VSSQ VDDQ
FBA_D14 DQ13 NC FBA_D30 DQ29 NC 40.2_1%_04 E3 F3

Sheet 12 of 60
F11 M4 VSSQ VDDQ
FBA_D15 DQ14 NC FBA_D31 DQ30 NC F10 G13
F13 M2 VSSQ VDDQ
DQ15 NC DQ31 NC F5 G2
A5 VSSQ VDDQ
FBA_EDC1 FBA_EDC3 NC_RFU_A5 H13 H12
C13 R2 V5 VSSQ VDDQ
FBA_DBI1 EDC1 GND FBA_DBI3 EDC3 NC NC_RFU_V5 H2 H3

VGA Frame Buffer

D13 P2 C570 VSSQ VDDQ
DBI1 NC DBI3 NC K13 K12
VSSQ VDDQ
FBVDDQ K2 VSSQ VDDQ K3
C D4 WCK01 P4 WCK23 C
11 FBA_WCK01 M10 VSSQ VDDQ L13
D5 WCK01 P5 WCK23 0.01u_16V_X7R_04
11 FBA_WCK01# M5 L2

A
VSSQ VDDQ
N1 VSSQ VDDQ M1
K4G41325FE-HC28 K4G41325FE-HC28
N12 VSSQ VDDQ M12
CHANGE R338 Gary_for NV feedback N14 VSSQ VDDQ M14
549_1%_04
N3 VSSQ VDDQ M3
R1 VSSQ VDDQ N10
11 FBA_WCK23 0.4
FBA_VREFC0 R11 VSSQ VDDQ N5
11 FBA_WCK23# J14 VREFC R12 VSSQ VDDQ P1
FBA_ZQ0 R14 VSSQ VDDQ P12
J13 ZQ R3 VSSQ VDDQ P14
R344
FBA_SEN0 R4 VSSQ VDDQ P3
931_1%_04 J10 SEN V1 VSSQ VDDQ T1
FBA_VREF_FET_L V12 VSSQ VDDQ T12
C583 V14 T14
6

D R337 R82 R325 K4G41325FE-HC28 VSSQ VDDQ

V3 VSSQ VDDQ T3
Q7A 1.33K_1%_04 121_1%_04 1K_04

820p_50V_X7R_04
2 G MTDK3S6R
13,14,15,16 GPIO10_FBVREF_ALTV S K4G41325FE-HC28
1

GND

GND GND GND GND

GND

11 FBA_EDC[3:0] FBA_EDC0
FBA_EDC1
FBA_EDC2
B FBA_EDC3 B

11 FBA_DBI[3:0] FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3

FBVDDQ
FBVDDQ
FBVDDQ
VOEFS!ESBN
C246 C248 C283 C540 C282 C165 C284 C584 C542

1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 *0.1u_10V_X7R_04 *0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_4V_X6S_06 10u_4V_X6S_06

GND
GND GND

FBVDDQ FBVDDQ
FBVDDQ
OFBS!ESBN
A A

C582 C539 C219 C247 C163 C164 C541

10u_4V_X6S_06 10u_4V_X6S_06 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 *1u_6.3V_X6S_04 1u_6.3V_X6S_04 *1u_6.3V_X6S_04

11,13,14,15,52 FBVDDQ
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[12] VGA Frame Buffer A
Size Document Number Re v
GND GND
GND
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 12 of 63

5 4 3 2 1

VGA Frame Buffer A B - 13

 Schematic Diagrams

VGA Frame Buffer A

5 4 3 2 1

U152B U152C
INS1224528 INS1224754
BGA170_MIRR BGA170_MIRR
COMMON COMMON R288 1K_04 FBVDDQ
11,12 FBA_CMD[31:0]
FBA_CMD28
L3 RAS
Mirrored
11 FBA_CLK1 FBA_CMD31 FBA_SOE3
G3 CAS SOE*/MF_VDD J1
11 FBA_CLK1# FBA_CMD21 G12
FBA_CMD16 L12 WE add 1k to VDD
CS B10 VSS VDD C10 FBVDDQ
11 FBA_D[63:32]
B5 VSS VDD C5
FBA_CMD24 J4 D10 D11
U152D U152A ABI VSS VDD
G10 VSS VDD G1
INS1225672 INS1226066 FBA_CMD26 K4
BGA170_MIRR BGA170_MIRR A0_A10 G5 VSS VDD G11
COMMON COMMON
FBA_CMD27 K5 H1 G14
FBA_CMD18 K11 A1_A9 VSS VDD
D H14 G4 D
MIRROR ED MIRROR ED FBA_CMD17 K10 A2_BA0 VSS VDD
A3_BA3 K1 VSS VDD L1
FBA_CMD19 H11
x32 x16 x32 x16 A4_BA2 K14 VSS VDD L11
FBA_D32 V4 FBA_D48 A11 FBA_CMD20 H10 L10 L14
FBA_D33 DQ0 NC FBA_D49 DQ16 NC FBA_CMD23 H5 A5_BA1 VSS VDD
V2 DQ1 A13 DQ17 A6_A11 L5 VSS VDD L4
FBA_D34 NC FBA_D50 NC FBA_CMD22 H4
T4 DQ2 B11 DQ18 A7_A8 P10 VSS VDD P11
FBA_D35 NC FBA_D51 NC FBA_CMD25 J5
T2 DQ3 B13 DQ19 RFU_A12 T10 VSS VDD R10
FBA_D36 NC FBA_D52 NC
N4 DQ4 E11 DQ20 T5 VSS VDD R5 FBVDDQ
FBA_D37 N2
NC FBA_D53 E13
NC

FBA_D38 DQ5 NC FBA_D54 DQ21 NC

M4 DQ6 F11 DQ22 A1 VSSQ VDDQ B1
FBA_D39 M2
NC FBA_D55 F13
NC
A12 B12
DQ7 NC DQ23 NC VSSQ VDDQ
A14 VSSQ VDDQ B14
FBA_EDC4 R2 FBA_EDC6 C13 FBA_CMD29 J2 A3 B3
FBA_DBI4 P2 EDC0 NC FBA_DBI6 EDC2 GND FBA_CMD30 RESET VSSQ VDDQ
DBI0 NC
D13 DBI2 NC
J3 CKE C1 VSSQ VDDQ D1
B.Schematic Diagrams

C11 VSSQ VDDQ D12

J12 CLK C12 VSSQ VDDQ D14
VREFD V10 VREFD A10 J11 CLK C14 VSSQ VDDQ D3
FBA_D40 FBA_D56
V11 DQ8 A4 DQ24 C3 VSSQ VDDQ E10
FBA_D41 V13 FBA_D57 A2 C4 E5
DQ9 DQ25 VSSQ VDDQ

Sheet 13 of 60 FBA_D42
FBA_D43
FBA_D44
FBA_D45
T11
T13
N11
DQ10
DQ11
DQ12
FBA_D58
FBA_D59
FBA_D60
FBA_D61
B4
B2
E4
DQ26
DQ27
DQ28
R286 R287
E1
E12
E14
VSSQ
VSSQ
VSSQ
VDDQ
VDDQ
VDDQ
F1
F12
F14
N13 E2 40.2_1%_04 E3 F3

VGA Frame Buffer FBA_D46 DQ13 FBA_D62 DQ29 40.2_1%_04 VSSQ VDDQ
M11 DQ14 F4 DQ30 F10 VSSQ VDDQ G13
FBA_D47 FBA_D63
M13 DQ15 F2 DQ31 F5 VSSQ VDDQ G2
A5 NC_RFU_A5 H13 VSSQ VDDQ H12
FBA_EDC5 R13 FBA_EDC7 C2 V5 H2 H3

A C
FBA_DBI5
P13

P4
EDC1
DBI1

WCK01
FBA_DBI7
D2

D4
EDC3
DBI3

WCK23 FBVDDQ
C520
NC_RFU_V5
K13
K2
M10
VSSQ
VSSQ
VSSQ
VSSQ
VDDQ
VDDQ
VDDQ
VDDQ
K12
K3
L13
C
11 FBA_WCK45
P5 WCK01 D5 WCK23 0.01u_16V_X7R_04 M5 VSSQ VDDQ L2
11 FBA_WCK45#
N1 VSSQ VDDQ M1
K4G41325FE-HC28 K4G41325FE-HC28 N12 VSSQ VDDQ M12
CHANGE R276 N14 VSSQ VDDQ M14
549_1%_04 N3 VSSQ VDDQ M3
11 FBA_WCK67 R1 VSSQ VDDQ N10
11 FBA_WCK67# R11 VSSQ VDDQ N5
FBA_VREFC1
J14 VREFC R12 VSSQ VDDQ P1
R14 VSSQ VDDQ P12
FBA_ZQ2
J13 R3 P14
ZQ VSSQ VDDQ
R285 R275 C509 R4 VSSQ VDDQ P3
FBA_SEN2
J10 V1 T1
931_1%_04 1.33K_1%_04 SEN VSSQ VDDQ

820p_50V_X7R_04
V12 VSSQ VDDQ T12
FBA_VREF_FET_H V14 T14
VSSQ VDDQ

3
D R5 R284 K4G41325FE-HC28 V3 VSSQ VDDQ T3
Q7B 121_1%_04 1K_04
5 G MTDK3S6R K4G41325FE-HC28
12,14,15,16 GPIO10_FBVREF_ALTV
4 S GND GND
GND

GND GND GND

11 FBA_EDC[7:4]
FBA_EDC4
FBA_EDC5
FBA_EDC6
B B
FBA_EDC7

11 FBA_DBI[7:4]
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBVDDQ
FBVDDQ
FBVDDQ
VOEFS!ESBN
C510 C121 C34 C71 C33 C72 C32 C507 C511

1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X5R_04 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_4V_X6S_06 10u_4V_X6S_06

GND
GND GND

FBVDDQ FBVDDQ
FBVDDQ
OFBS!ESBN
A A

C527 C529 C122 C508 C123 C528 C70

10u_4V_X6S_06 10u_6.3V_X5R_06 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 *1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

11,12,14,15,52 FBVDDQ
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[13] VGA Frame Buffer A
Size Document Number Re v
GND GND
GND
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 13 of 63

5 4 3 2 1

B - 14 VGA Frame Buffer A

 Schematic Diagrams

VGA Frame Buffer B

5 4 3 2 1

U158B U158C
INS1233936 INS1234206
BGA170 BGA170
COMMON COMMON

11,15 FBB_CMD[31:0] FBB_CMD12 G3

RAS
Normal
FBB_CMD15 FBB_SOE0
L3 CAS J1 MF_VSS/SOE*
FBB_CMD5 L12 FBVDDQ
11 FBB_CLK0 WE add 1k to VSS
FBB_CMD0 G12 B10 C10
11 FBB_CLK0# CS VSS VDD
R374
B5 VSS VDD C5
FBB_CMD8 1K_04
11 FBB_D[31:0] J4 ABI D10 VSS VDD D11
G10 VSS VDD G1
FBB_CMD10 H4 G5 G11
U158D U158A A0_A10 VSS VDD
FBB_CMD11
INS1233730 INS1235576 H5 A1_A9 H1 VSS VDD G14
D FBB_CMD2 D
BGA170 BGA170 H11 A2_BA0 H14 VSS VDD G4
COMMON COMMON FBB_CMD1 H10 K1 L1
FBB_CMD3 K11 A3_BA3 GND VSS VDD
NORMAL NORMAL A4_BA2 K14 VSS VDD L11
FBB_CMD4 K10 L10 L14
FBB_D0 FBB_D16 A5_BA1 VSS VDD
A4 DQ0 V11 DQ16 FBB_CMD7 K5
FBB_D1 FBB_D17 A6_A11 L5 VSS VDD L4
A2 DQ1 V13 DQ17 FBB_CMD6
FBB_D2 FBB_D18 K4 A7_A8 P10 VSS VDD P11
B4 DQ2 T11 DQ18 FBB_CMD9
FBB_D3 FBB_D19 J5 RFU_A12 T10 VSS VDD R10
B2 DQ3 T13 DQ19
FBB_D4 FBB_D20 T5 VSS VDD R5
E4 DQ4 N11 DQ20
FBB_D5 FBB_D21 FBVDDQ
E2 DQ5 N13 DQ21
FBB_D6 FBB_D22 A1 VSSQ VDDQ B1
F4 DQ6 M11 DQ22
FBB_D7 FBB_D23 A12 VSSQ VDDQ B12
F2 DQ7 M13 DQ23 A14 VSSQ VDDQ B14
FBB_CMD13 J2 A3 B3
FBB_EDC0 FBB_EDC2

B.Schematic Diagrams
C2 R13 FBB_CMD14 J3 RESET VSSQ VDDQ
FBB_DBI0 EDC0 FBB_DBI2 EDC2 C1 D1
D2 P13 CKE VSSQ VDDQ
DBI0 DBI2 C11 D12
A10 V10 VSSQ VDDQ
VREFD VREFD J12 C12 D14
CLK VSSQ VDDQ
x32 x16 x32 x16
J11 CLK C14 VSSQ VDDQ D3
FBB_D8 FBB_D24 C3 VSSQ VDDQ E10
A11 DQ8 V4 DQ24
FBB_D9 NC FBB_D25 NC C4 VSSQ VDDQ E5
A13 DQ9 V2 DQ25
FBB_D10 NC FBB_D26 NC E1 VSSQ VDDQ F1
B11 DQ10 T4 DQ26 R349 R348
FBB_D11 NC FBB_D27 NC E12 F12

Sheet 14 of 60
B13 T2 VSSQ VDDQ
FBB_D12 DQ11 NC FBB_D28 DQ27 NC E14 F14
E11 N4 VSSQ VDDQ
FBB_D13 DQ12 NC FBB_D29 DQ28 NC E3 F3
E13 N2 40.2_1%_04 40.2_1%_04 VSSQ VDDQ
FBB_D14 DQ13 NC FBB_D30 DQ29 NC F10 G13
F11 M4 VSSQ VDDQ
FBB_D15 DQ14 NC FBB_D31 DQ30 NC F5 G2

VGA Frame Buffer

F13 M2 VSSQ VDDQ
DQ15 NC DQ31 NC A5 H13 H12
NC_RFU_A5 VSSQ VDDQ
FBB_EDC1 FBB_EDC3 V5 NC_RFU_V5 H2 VSSQ VDDQ H3
C13 EDC1 R2 EDC3
FBB_DBI1 GND FBB_DBI3 NC C594 K13 VSSQ VDDQ K12
D13 DBI1 P2 DBI3 K2 K3

B
NC NC
C VSSQ VDDQ C
M10 VSSQ VDDQ L13
D4 WCK01 P4 WCK23 FBVDDQ
11 FBB_WCK01 0.01u_16V_X7R_04 M5 VSSQ VDDQ L2
D5 WCK01 P5 WCK23 Gary_for NV feedback
11 FBB_WCK01# N1 VSSQ VDDQ M1
N12 VSSQ VDDQ M12
K4G41325FE-HC28 K4G41325FE-HC28
N14 VSSQ VDDQ M14
N16P-GT N16P-GT R376
N3 VSSQ VDDQ M3
549_1%_04
R1 VSSQ VDDQ N10
R11 VSSQ VDDQ N5
FBB_VREFC0 J14 R12 P1
11 FBB_WCK23 VREFC VSSQ VDDQ
11 FBB_WCK23# R14 VSSQ VDDQ P12
FBB_ZQ0
J13 R3 P14
C634 ZQ VSSQ VDDQ
R4 VSSQ VDDQ P3
R377 R375 FBB_SEN0
J10 SEN V1 VSSQ VDDQ T1

820p_50V_X7R_04
931_1%_04 1.33K_1%_04
V12 VSSQ VDDQ T12
FBB_VREF_FET_L V14 VSSQ VDDQ T14
K4G41325FE-HC28 V3 T3
6

D R100 R410 VSSQ VDDQ

Q39A 121_1%_04 1K_04 N16P-GT
2 G GND K4G41325FE-HC28
MTDK3S6R
12,13,15,16 GPIO10_FBVREF_ALTV S GND N16P-GT
GND
1

GND GND GND

11 FBB_EDC[3:0]
FBB_EDC0
FBB_EDC1
B B
FBB_EDC2
FBB_EDC3

11 FBB_DBI[3:0]
FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3

FBVDDQ
FBVDDQ
FBVDDQ
VOEFS!ESBN
C342 C647 C300 C343 C645 C632 C337 C648 C644

*1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_4V_X6S_06 10u_4V_X6S_06

GND
GND GND

FBVDDQ FBVDDQ
FBVDDQ
OFBS!ESBN
A A

C621 C619 C633 C635 C303 C320 C620

10u_4V_X6S_06 10u_4V_X6S_06 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[14] VGA Frame Buffer B
GND GND Size Document Number Re v
GND 11,12,13,15,52 FBVDDQ A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 14 of 63

5 4 3 2 1

VGA Frame Buffer B B - 15

 Schematic Diagrams

VGA Frame Buffer B

5 4 3 2 1

U154B U154C
INS1239845 INS1238663
BGA170_MIRR BGA170_MIRR
COMMON COMMON
R373 1K_04
11,14 FBB_CMD[31:0] FBB_CMD28 L3 RAS
Mirrored FBVDDQ
FBB_CMD31 FBB_SOE3
G3 CAS SOE*/MF_VDD J1
11 FBB_CLK1 FBB_CMD21 G12 WE add 1k to VDD
11 FBB_CLK1# FBB_CMD16
L12 CS B10 VSS VDD C10 FBVDDQ
B5 VSS VDD C5
11 FBB_D[63:32] FBB_CMD24 J4 ABI D10 VSS VDD D11
U154A
G10 VSS VDD G1
U154D INS1237895 FBB_CMD26
BGA170_MIRR K4 A0_A10 G5 VSS VDD G11
INS1238417
COMMON
FBB_CMD27 K5 H1 G14
BGA170_MIRR
FBB_CMD18 A1_A9 VSS VDD
D COMMON K11 H14 G4 D
MIRROR ED FBB_CMD17 A2_BA0 VSS VDD
K10 A3_BA3 K1 VSS VDD L1
MIRROR ED FBB_CMD19
x32 x16 H11 A4_BA2 K14 VSS VDD L11
FBB_D48 FBB_CMD20
x32 x16 A11 DQ16 H10 A5_BA1 L10 VSS VDD L14
FBB_D32 V4 FBB_D49 A13
NC FBB_CMD23 H5 L5 L4
FBB_D33 DQ0 NC FBB_D50 DQ17 NC FBB_CMD22 A6_A11 VSS VDD
V2 DQ1 B11 DQ18 H4 A7_A8 P10 VSS VDD P11
FBB_D34 NC FBB_D51 NC FBB_CMD25
T4 DQ2 B13 DQ19 J5 RFU_A12 T10 VSS VDD R10
FBB_D35 NC FBB_D52 NC
T2 DQ3 E11 DQ20 T5 VSS VDD R5 FBVDDQ
FBB_D36 N4
NC FBB_D53 E13
NC

FBB_D37 DQ4 NC FBB_D54 DQ21 NC

N2 DQ5 F11 DQ22 A1 VSSQ VDDQ B1
FBB_D38 M4
NC FBB_D55 F13
NC
A12 B12
FBB_D39 DQ6 NC DQ23 NC VSSQ VDDQ
M2 DQ7 NC
A14 VSSQ VDDQ B14
FBB_EDC6 FBB_CMD29
C13 EDC2 J2 RESET A3 VSSQ VDDQ B3
FBB_EDC4 FBB_DBI6 GND FBB_CMD30
R2 EDC0 D13 DBI2 J3 CKE C1 VSSQ VDDQ D1
FBB_DBI4 NC NC
P2 DBI0 NC
C11 VSSQ VDDQ D12
J12 C12 D14
B.Schematic Diagrams

CLK VSSQ VDDQ

VREFD A10 J11 CLK C14 VSSQ VDDQ D3
FBB_D56
VREFD V10 A4 DQ24 C3 VSSQ VDDQ E10
FBB_D40 FBB_D57
V11 DQ8 A2 DQ25 C4 VSSQ VDDQ E5
FBB_D41 V13 FBB_D58 B4 E1 F1
FBB_D42 DQ9 FBB_D59 DQ26 R347 VSSQ VDDQ

Sheet 15 of 60 FBB_D43
FBB_D44
FBB_D45
T11
T13
N11
N13
DQ10
DQ11
DQ12
FBB_D60
FBB_D61
FBB_D62
B2
E4
E2
F4
DQ27
DQ28
DQ29
R345

40.2_1%_04 40.2_1%_04
E12
E14
E3
F10
VSSQ
VSSQ
VSSQ
VDDQ
VDDQ
VDDQ
F12
F14
F3
G13
DQ13 DQ30 VSSQ VDDQ

VGA Frame Buffer

FBB_D46 FBB_D63
M11 DQ14 F2 DQ31 F5 VSSQ VDDQ G2
FBB_D47
M13 DQ15 A5 NC_RFU_A5 H13 VSSQ VDDQ H12
FBB_EDC7C2 V5 H2 H3
FBB_EDC5 FBB_DBI7 EDC3 NC_RFU_V5 VSSQ VDDQ
R13 EDC1 D2 DBI3 C593 K13 VSSQ VDDQ K12

B C

11 FBB_WCK45
FBB_DBI5 P13

P4
DBI1

WCK01
D4
D5
WCK23
WCK23
FBVDDQ
0.01u_16V_X7R_04
K2
M10
M5
VSSQ
VSSQ
VSSQ
VDDQ
VDDQ
VDDQ
K3
L13
L2
C

P5 WCK01 N1 VSSQ VDDQ M1

11 FBB_WCK45#
K4G41325FE-HC28 N12 VSSQ VDDQ M12
K4G41325FE-HC28 N16P-GT R371 N14 VSSQ VDDQ M14
N16P-GT 549_1%_04 Gary_for NV feedback N3 VSSQ VDDQ M3
R1 VSSQ VDDQ N10
0.4 R11 VSSQ VDDQ N5
11 FBB_WCK67 FBB_VREFC1
J14 VREFC R12 VSSQ VDDQ P1
11 FBB_WCK67#
R14 VSSQ VDDQ P12
FBB_ZQ2 J13 R3 P14
ZQ VSSQ VDDQ
R372 R105 C322 R4 VSSQ VDDQ P3
FBB_SEN2
931_1%_04 1.33K_1%_04 J10 SEN V1 VSSQ VDDQ T1

820p_50V_X7R_04
V12 VSSQ VDDQ T12
FBB_VREF_FET_H
R106 V14 VSSQ VDDQ T14

3
D 121_1%_04 R346 K4G41325FE-HC28 V3 VSSQ VDDQ T3
Q39B 1K_04 N16P-GT
5 G MTDK3S6R GND GND K4G41325FE-HC28
12,13,14,16 GPIO10_FBVREF_ALTV 4 S N16P-GT
GND

GND GND
GND

11 FBB_EDC[7:4]
FBB_EDC4
FBB_EDC5
FBB_EDC6
B FBB_EDC7 B

11 FBB_DBI[7:4]
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7

FBVDDQ
FBVDDQ
FBVDDQ
VOEFS!ESBN
C321 C340 C642 C338 C344 C304 C341 C618 C616

1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 *1u_6.3V_X6S_04 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_4V_X6S_06 10u_4V_X6S_06

GND
GND GND

FBVDDQ FBVDDQ
FBVDDQ
OFBS!ESBN
A A

C643 C641 C646 C630 C617 C339 C631

10u_4V_X6S_06 10u_4V_X6S_06 0.1u_10V_X7R_04 *0.1u_10V_X7R_04 1u_6.3V_X6S_04 *1u_6.3V_X6S_04 1u_6.3V_X6S_04

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[15] VGA Frame Buffer B
Size Document Number Re v

GND GND
11,12,13,14,52 FBVDDQ
A3 SCHEMATIC1 6-71-N85J0-D01 D02B
GND
Date : Friday, March 02, 2018 Sheet 15 of 63

5 4 3 2 1

B - 16 VGA Frame Buffer B

 Schematic Diagrams

VGA I/O
5 4 3 2 1

U150K U150L
BGA_0908_P080_P085_P100_290X290 BGA_0908_P080_P085_P100_290X290 U150N
COMMON COMMON BGA_0908_P080_P085_P100_290X290
7/19 IFPC 8/19 IFPD COMMON
4/19 DACA
U150M
ALL PINS NC FOR GF117 ALL PINS NC FOR GF117 GF108/GKx N17P GB4C-128 N17P GB4C-128 GF108/GKx BGA_0908_P080_P085_P100_290X290
SNN_A_SCL
N17P GB4C-128 N17P GB4C-128 AG10 DACA_VDD GPIO25 I2CA_SCL R4 SNN_A_SDA COMMON GND
RES T69
AF8 IFPC_RSET AN2 IFPD_RSET I2CA_SDA R5 9/19 IFPEF
GPIO26 T68
IFPCD_RSET N17P GB4C-128 DVI/HDMI DP NC DP AP9 DACA_VREF
N17P GB4C-128 DVI/HDMI RES
AP8 ALL PINS NC FOR GF117
DACA_RSET RES RES DACA_HSYNC AM9 R12 R13
AF7 IFPC_PLLVDD IFPC_AUX_SDA_N I2CW_S DA IFPC_AUX AG2 AG7 IFPD_PLLVDD IFPD_AUX_SDA_N I2CX_SDA IFPD_AUX AK2 DACA_VSYNC AN9
RES
IFPCD_PLLVDD IFPC_AUX_SCL I2CW_S CL IFPC_AUX
AG3 NC
IFPD_AUX_SCL I2CX_S CL IFPD_AUX AK3
100K_04 100K_04
N17P GB4C-128 DVI-DL DVI-SL/HDMI DP

D
IFPC_L3 AG4 IFPD_L3 AK5
RES DACA_RED AK9
GPU_PLLVDD ŮŪůŪġ ġ ŅőŠŇ D
TXC TXC
IFPC_L3 AG5 TXC IFPD_L3 AK4 DACA_GREEN AL10 IFPE_AUX_SDA_N I2CY_S DA I2CY_S DA IFPE_AUX AB4
TXC RES MDP_E_AUX#_SDA 21
IFPE_AUX_SCL I2CY_S CL I2CY_S CL IFPE_AUX AB3
20 mil MDP_E_AUX_SCL 21
IFPC_L2 AH4 IFPD_L2 AL4 DACA_BLUE AL9 AB8 IFPEF_PLLVDD
TXD0 TXD0 RES
IFPC TXD0 IFPC_L2 AH3 IFPD TXD0 IFPD_L2 AL3
IFPE_L3 AC5
TXC TXC MDP_E#3 21
TXD1 IFPC_L1 AJ2 TXD1 IFPD_L1 AM4 AD6 IFPEF_RSET IFPE_L3 AC4
TXC TXC MDP_E3 21
TXD1 IFPC_L1 AJ3 TXD1 IFPD_L1 AM3
9/25 PLACE AT BALLS IFPE_L2 AC3
TXD0 TXD0 MDP_E#2 21
IFPC_L0 AJ1 IFPD_L0 AM2 IFPE_L2 AC2
TXD2 TXD2 TXD0 TXD0 MDP_E2 21
IFPC_L0 AK1 PEX_VDD TXD2 IFPD_L0 AM1 C61 R6
TXD2
PEX_VDD 1K_1%_04 IFPE_L1 AC1
TXD1 TXD1 MDP_E#1 21
*0.1u_10V_X7R_04 IFPE_L1 AD1
TXD1 MDP_E1 21
N17P GB4C-128 N16 IFPE TXD1
20 mil AF6 IFPC_IOVDD
HPD_IFPB HPD_IFPC GPIO15 P2 20 mil AG6 IFPD_IOVDD
HPD_IFPD GPIO17 M6 IFPE_L0 AD3
TXD2 TXD2
AD2 MDP_E#0 21
IFP_IOVDD 9/25 IFP_IOVDD TXD2 IFPE_L0 MDP_E0 21
TXD2
D02_02/26_A GND GND

B.Schematic Diagrams
HPD_IFPE HPD_E HPD_E GPIO18 R1
IFPE_HPD_R# 18

PEX_VDD
20 mil
Sheet 16 of 60
9/25 9/25
PLACE Under GPU PLACE Near GPU
AC7
N17P
IFPE_IOVDD
IFP_IOVDD
GB4C-128

IFPF_AUX_SDA_N
IFPF_AUX_SCL
I2CZ_SDA
I2CZ_S CL
IFPF_AUX
IFPF_AUX
AF2
AF3
VGA I/O
AC8 IFPF_IOVDD
IFP_IOVDD
C C58 C60 C92 C57 AF1 C
TXC IFPF_L3
0.1u_10V_X7R_04 1u_6.3V_X5R_04 TXC IFPF_L3 AG1
0.1u_10V_X7R_04 4.7u_6.3V_X5R_06
TXD0 IFPF_L2 AD5
TXD3
TXD0 IFPF_L2 AD4
TXD3
NV Check 7/27
TXD4 TXD1 IFPF_L1 AF5
IFPF TXD4 TXD1 IFPF_L1 AF4

TXD2 IFPF_L0 AE4

1V8_AON TXD5
TXD2 IFPF_L0 AE3
TXD5
U28
SN74LV1T32DCKR
5

1 AC/BATL# 50 3D_VISION HPD_F GPIO19 P3

GPIO12_AC_DETECT
4 AC/BATL# AC_IN 䁢H,
2 VBATT_BOOST# 40 BATTERY 䁢 L
1.8V
H 䁢ᶵ旵 柣 EC Alway low, U150J
3

DGPIO12_AC_DETECT BGA_0908_P080_P085_P100_290X290
L 䁢昌柣 ⎒㚱 b i o s 忂䞍 ㇵ≽ ἄ ,
ᶵ䃞㯠 怈 㗗 LO W COMMON
6/19 IFPAB

NV_OVERT# ALL PINS NC FOR GF117

S D
D6 17 NV_OVERT# OVERT# 40
GPIO2_GPU_EVENT# N17P GB4C-128 GB4B-128
A C RB751S-40H Q4 IFPA_L3_N IFPA_TXC AN6
GPU_EVENT# 28
2SK3018S3 IFPA_L3 IFPA_TXC AM6

G
NV3V3 AJ8 IFPAB_RSET
10,17 GPU_PEX_RST# AN3
NV3V3 IFPA_L2_N IFPA_TXD0
IFPA_L2 IFPA_TXD0 AP3
SMC_VGA_THERM1
R28 10K_04 SMD_VGA_THERM1 R27 2.2K_04
B AH8 B
Q3A R29 2.2K_04 IFPAB_PLLVDD
2

C195 *0.1u_10V_X7R_04 MTDK3S6R AM5

G

IFPA_L1_N IFPA_TXD1
IFPA_L1 IFPA_TXD1 AN5
SMC_VGA_THERM
U150Q 1 6 1V8_AON
SMC_VGA_THERM 40,41
BGA_0908_P080_P085_P100_290X290
S

COMMON IFPA_L0_N IFPA_TXD2 AK6

5

Q3B IFPA_L0 AL6

G

11/19 MISC1 SMC_VGA_THERM1 GPIO2_GPU_EVENT# IFPA_TXD2

I2CS_SCL T4 SMD_VGA_THERM1
MTDK3S6R
SMD_VGA_THERM GPIO4_1V8_MAIN_EN
R30 10K_04
I2CS_SDA T3 4 3
SMD_VGA_THERM 40,41 GPIO6_NVVDD_PSI#
R293 10K_04
R34 10K_04 IFPA_AUX_SDA_N IFPA_TXD3 AH6
I2CC_SCL GPIO9_THERM_ALERT#
S

I2CC_SCL R2 I2CC_SDA GPIO12_AC_DETECT R312 10K_04 IFPA_AUX_SCL IFPA_TXD3 AJ6

I2CC_SDA R3 GPIO23_GPU_PEX_RST_HOLD#
R311 100K_04
I2CB_SCL NV_OVERT# R290 10K_04
10 GPIO23_GPU_PEX_RST_HOLD#
I2CB_SCL R7 I2CB_SDA R32 100K_04 PEX_VDD IFPB_L3_N IFPB_TXC AH9
K4 THERMDN I2CB_SDA R6
20 mil IFPB_L3 IFPB_TXC AJ9
9/25 PLACE Under GPU PLACE Near GPU GB4B-128 N17P GB4C-128
K3 THERMDP AG8 IFPA_IOVDD IFP_IOVDD
IFPB_L2_N IFPB_TXD4 AP5
GPIO1_GC6_FB_EN
R315 10K_04 AG9 IFPB_IOVDD IFP_IOVDD IFPB_L2 IFPB_TXD4 AP6
GPIO10_FBVREF_ALTV
AM10 JTAG_TCK GPIO21_RASTER_SYNC0 R83 100K_04
T67 AP11 JTAG_TMS R316 100K_04
T65
AM11 JTAG_TDI IFPB_L1_N IFPB_TXD5 AL7
T64
AP12 JTAG_TDO N17P N16P IFPB_L1 IFPB_TXD5 AM7
V_JTAG_TRST
T66 GPIO0_NVVDD_PWM_VID
AN11 JTAG_TRST PWM_VID GPIO0 P6
GC6_FB_EN GPIO1_GC6_FB_EN GPIO0_NVVDD_PWM_VID 51
GPIO1 M3
GC6_FB_EN MEM_VDD_CTL GPIO2_GPU_EVENT# GPIO1_GC6_FB_EN 17
GPU_EVENT# GPIO2 L6 GPIO3_PS_NVVDDS_VID IFPB_L0_N IFPB_TXD6 AM8
LCD_BL_PWM
R278 GPIO3 P5 NV reply 9/4 IFPB_L0 IFPB_TXD6 AN8
NVVDDS_PWM LCD_VCC GPIO4_1V8_MAIN_EN
1V8_MAIN_EN GPIO4 P7
LCD_BLEN GPIO4_1V8_MAIN_EN 17,18
10K_04 GPIO5 L7 1V8_AON 9/25
FRAME_LOCK# 3V3_MAIN_EN GPIO6_NVVDD_PSI#
PSI GPIO6 M7 IFPB_AUX_SDA_N IFPB_TXD7 AL8
GPU_EVENT#
N8 GPIO6_NVVDD_PSI# 51 AK8
LCD_BL_PWM 3D_VISION GPIO7 NV_OVERT# IFPB_AUX_SCL IFPB_TXD7
OVERT M1
OVERT OVERT GPIO9_THERM_ALERT# I2CB_SDA
THERM_ALERT GPIO9 M2 GPIO10_FBVREF_ALTV I2CB_SCL R31 1.8K_1%_04
SAME
GPIO10 L1 R33 1.8K_1%_04
A MEM_VREF_CTL SAME GPIO10_FBVREF_ALTV 12,13,14,15 I2CC_SDA A
GPIO11 M5 R291 1.8K_1%_04
LCD_VDD PWM_VID GPIO12_AC_DETECT I2CC_SCL
PWR_LEVEL GPIO12 N3 R292 1.8K_1%_04
SAME
GPIO13 M4 HPD_IFPA GPIO14 N4
LCD_BLEN PSI GPIO16_SYS_PEX_RST_MON#
R8
RESERVED FRAME_LOCK# GPIO16
GPIO20 P4
GPIO20_NVVDDS_PSI
NV reply 9/4 IFPAB
RESERVED RESERVED GPIO21_RASTER_SYNC0
RESERVED GPU_PEX_..# GPIO21 P1

10,48 NV3V3
10 GPU_PLLVDD
10,53 PEX_VDD
啵⣑ 暣 儎 CL EVO CO
.
Title
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
10,17,18,51,52,53
3.3VS
1V8_AON
[16] VGA I/O
10,11,53 1V8_RUN Size Document Number Rev
9,20,21,23,37,38,39,40,41,42,51
4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53
5VS
VDD3
Custom 6-71-N85J0-D01 6-71-W65R0-DN1 D02B

Date : Friday, March 02, 2018 Sheet 16 of 63

5 4 3 2 1

VGA I/O B - 17
 Schematic Diagrams

NVIDIA Power Sequence

1 2 3 4 5 6 7 8

3.3V U4

1 20
VDD FBVDDQ_EN NV_FBVDDQ_EN 52
2 19
27 NV_EN_DOWN VIN_DOWN PEX_VDD_EN NV_PEXVDD_EN 53
NV_NVVDDS_EN
3 18
16 NV_OVERT# OVERT# NVVDDS_EN
A 4 17 A
53 1V8_AON_PWRGD SUSB# NVVDD_EN NV_NVVDD_EN 51
NVVDDS_PWRGD
5 16
NVVDDS_PWRGD 3V3_SYS_EN NV_NV3V3_EN 48
6 15
16 GPIO1_GC6_FB_EN GC6_FB_EN 1V8_MAIN_EN NV_1V8RUN_EN 53
7 14
28,40 GC6_FB_EN GC6_FB_EN_PCH 1V8_AON_EN NV_1V8AON_EN 53

24,25 PLT_RST# 8 13
PLT_RST# GPIO4_1V8_MAIN_EN GPIO4_1V8_MAIN_EN 16,18

28 DGPU_RST#_PCH 9 12
dGPU_RST#_PCH dGPU_PWR_EN DGPU_PWR_EN 28,40
B.Schematic Diagrams

10 11
10,16 GPU_PEX_RST# GPU_PEX_RST# GND

SLG4U41681

Sheet 17 of 60 GPU_PEX_RST#
1V8_AON

R17 10K_04

NVIDIA Power 10,51 NVVDD_PWRGD

R11 0_04
NVVDDS_PWRGD
DGPU_PWR_EN

DGPU_RST#_PCH
R18 100K_04
12/04
R9 100K_04

Sequence GPU_PEX_RST#
R16 *100K_04

B B

C C

D D

2,22,33,35,42,43,45,47,48
10,16,18,51,52,53
3.3V
1V8_AON
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS Title
4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3 [17] NVIDIA POWER SEQUENCE
10,16,48 NV3V3
10,11,53 1V8_RUN Size Document Number Re v
Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 17 of 63

1 2 3 4 5 6 7 8

B - 18 NVIDIA Power Sequence

 Schematic Diagrams

NVIDIA GPIO Level Shift

1 2 3 4 5 6 7 8

1V8_AON

NVIDIA GPIO LEVEL SHIFT

R314
10K_04

DP_E
16 IFPE_HPD_R#

A FROM 8330B_RE A

D
Q5
MTN2002ZS3 G R77 1K_04
MDP_E_HPD 21,28

R60

C281
S
9/13 Common Design

220p_50V_NPO_04
1V8_AON

100K_04
1V8_MAIN

B.Schematic Diagrams
GC6_FB_EN NVVDD
NVVDDS
1V8_MAIN_EN
VR Complex
PEX&1.05V
24 GPIO4_1V8_MAIN_EN_R
R296 *0_04
GPIO4_1V8_MAIN_EN 16,17
Sheet 18 of 60
FBVDD/Q
D02_12/19_H NVIDIA GPIO Level
B B
Shift
GPU_PWR_EN
GPU_EVENT#
GPU GPU_RST# EC/PCH POWER RAIL State in GC6
SYS_PEX_RST_MON# PLATFORM_RST#
GPU_PEX_RST_HOLD# 1V8_AON ON

GC6 2.1 Control Signals 1V8_MAIN OFF

1.1V8_MAIN_EN
2.GC6_FB_EN PEX&1.05V OFF
3.GPU_EVENT#
4.GPU_PEX_RST_HOLD# NVVDD OFF
5.SYS_PEX_RST_MON# NVVDDS OFF
GPU_PEX_RST#
FBVDD/Q ON
DG P.93 note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.

C GPU_PWR_EN EN PGOOD C
(SYSTEM) GC6 2.1 - VR Complex
1V8_AON 1. GPU_PWR_EN N17E POWER ON SEQUENCE POWER OFF SEQUENCE
2. 1V8_MAIN_EN
1V8_AON 3. GC6_FB_EN
net PCH_GPIO Voltage
DGPU_PWR_EN (GPP_F23) (1V8_AON)

GPPG8_PCH_1V8RUN_EN (GPP_G8) (1V8_MAIN)

PGOOD EN PGOOD GPPG9_PCH_NV3V3_EN (GPP_G9) (NV3V3)

EN
PEX&1.05V
GPPG10_PCH_NVVDD_EN (GPP_G10) (NVVDD)
1V8_MAIN_EN 1V8_MAIN
GPU
GPPG11_PCH_NVVDDS_EN (GPP_G11) (NVVDDS)
EN PGOOD
GPPG0_PCH_PEXVDD_EN (GPP_G0) (PEX_VDD)
NVVDD
D FBVDDQ D

EN PGOOD
10,16,17,51,52,53
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
1V8_AON
3.3VS
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
FBVDD/Q [18] NVIDIA GPIO LEVEL SHIFT
GC6_FB_EN Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 18 of 63

1 2 3 4 5 6 7 8

NVIDIA GPIO Level Shift B - 19

 Schematic Diagrams

VGA NVVDD Coupling

5 4 3 2 1

Gary_from RS1 to PJ74 NVVDD

NVVDD
U150G U150I U150E
BGA_0908_P080_P085_P100_290X290 BGA_0908_P080_P085_P100_290X290 BGA_0908_P080_P085_P100_290X290
C105

A2
COMMON

GND
16/19 GND_1/2

GND AM25
COMMON
17/19 GND_2/2
COMMON
14/19 NVVDD
N17P GB4C-128
C145

1u_6.3V_X6S_04
C150

1u_6.3V_X6S_04
C153

1u_6.3V_X6S_04
C214

1u_6.3V_X6S_04 1u_6.3V_X6S_04
VOEFS!HQV
AA17 GND GND AN1 N19 GND GND T28 AA12 VDD VDDS NV FOOTPRINT
NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
AA18 GND GND AN10 N2 GND GND T32 AA14 VDD
AA20 GND GND AN13 N21 GND GND T5 AA16 VDD VDDS
AA22 GND GND AN16 N23 GND GND T7 AA19 VDD VDDS
AB12 GND GND AN19 N28 GND GND U12 AA21 VDD
AB14 GND GND AN22 N30 GND GND U14 AA23 VDD VDDS C113 C103 C146 C143
D AB16 GND GND AN25 N32 GND GND U16 AB13 VDD D
AB19 GND GND AN30 N33 GND GND U19 AB15 VDD 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
AB2 GND GND AN34 N5 GND GND U21 AB17 VDD NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
AB21 GND GND AN4 N7 GND GND U23 AB18 VDD
A33 GND GND AN7 P13 GND GND V12 AB20 VDD
AB23 GND GND AP2 P15 GND GND V14 AB22 VDD
AB28 GND GND AP33 P17 GND GND V16 AC12 VDD
AB30 GND GND B1 P18 GND GND V19 AC14 VDD VDDS C97 C200 C140 C107 C95 C156
AB32 GND GND B10 P20 GND GND V21 AC16 VDD
AB5 GND GND B22 P22 GND GND V23 AC19 VDD 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06
AB7 GND GND B25 R12 GND GND W13 AC21 VDD VDDS NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
AC13 GND GND B28 R14 GND GND W15 AC23 VDD
AC15 GND GND B31 R16 GND GND W17 M12 VDD D02_02/26_A
B.Schematic Diagrams

AC17 GND GND B34 R19 GND GND W18 M14 VDD VDDS
AC18 GND GND B4 R21 GND GND W20 M16 VDD
AA13 GND GND B7 R23 GND GND W22 M19 VDD C147 C142 C208 C144 C152 C98
AC20 GND GND C10 T13 GND GND W28 M21 VDD VDDS
AC22 GND GND C13 T15 GND GND Y12 M23 VDD 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 *4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 *4.7u_6.3V_X6S_06
AE2 GND GND C19 T17 GND GND Y14 N13 VDD NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
AE28 GND GND C22 T18 GND GND Y16 N15 VDD
AE30 GND GND C25 T2 GND GND Y19 N17 VDD
AE32 GND GND C28 T20 GND GND Y21 N18 VDD

Sheet 19 of 60 AE33
AE5
AE7
GND
GND
GND
GND
GND
GND
C7
D2
D31
T22 GND GND Y23 N20
N22
P12
VDD
VDD
VDD VDDS
C154 C138 C157 C91 C139

AH10 GND GND D33 P14 VDD 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06

VGA NVVDD AA15

AH13
AH16
GND
GND
GND
GND
GND
GND
E10
E22
E25
P16
P19
P21
VDD
VDD
VDD
VDDS
VDDS
NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT

C AH19 E5 AG11 AH11 P23 C

Coupling
GND GND GND GND VDD VDDS
AH2 GND GND E7 R13 VDD
AH22 GND GND F28 R15 VDD C45 C500 C530 C48 C506 C89 C88
AH24 GND GND F7 R17 VDD
AH28 GND GND G10 R18 VDD 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 10u_4V_X6S_06 10u_4V_X6S_06
AH29 GND GND G13 R20 VDD
AH30 GND GND G16 R22 VDD
AH32 GND GND G19 T12 VDD
AH33 GND GND G2 GND_OPT C16 T14 VDD VDDS
AH5 GND GND G22 GND_OPT W32 T16 VDD
AH7 GND GND G25 T19 VDD C90 C84 C516 C85 C523 C531 C532
AJ7 GND GND G28 Optional CMD GNDs (2) T21 VDD VDDS
AK10 GND GND G3 NC for 4-Lyr cards T23 VDD 10u_4V_X6S_06 4.7u_6.3V_X6S_06 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08
AK7 GND GND G30 U13 VDD
AL12 GND GND G32 U150H U15 VDD
AL14 GND GND G33 BGA_0908_P080_P085_P100_290X290 U17 VDD VDDS
AL15 GND GND G5 COMMON U18 VDD
AL17 GND GND G7 10/19 XVDD NV reply 9/4 U20 VDD C86 C87
AL18 K2 U22
AL2
AL20
GND
GND
GND
GND
GND
GND
K28
K30
CONFIGURABLE
POWER
CHANNELS
V13
V15
VDD
VDD
VDD
22u_6.3V_X6S_08 22u_6.3V_X6S_08 OFBS!HQV
AL21 GND GND K32 N17P GB4C-128 V17 VDD
AL23 GND GND K33 VDDS_SENSE XVDD U1 V18 VDD VDDS NVVDD
AL24 GND GND K5 GNDS_SENSE XVDD U2 NVVDD V20 VDD
AL26 GND GND K7 GPIO27:HPD_IFPC XVDD U3 V22 VDD
AL28 GND GND M13 XVDD U4 W12 VDD
AL30 M15 U5 W14
AL32
AL33
GND
GND
GND
GND
GND
GND
M17
M18
XVDD
XVDD
XVDD
U6
U7
W16
W19
VDD
VDD
VDD
VDDS C151

1u_6.3V_X6S_04
C109

1u_6.3V_X6S_04
C99

1u_6.3V_X6S_04
C205

1u_6.3V_X6S_04
C211

1u_6.3V_X6S_04
VOEFS!HQV
B AL5 M20 U8 W21 B
GND GND XVDD VDD VDDS NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
AM13 GND GND M22 W23 VDD
AM16 GND GND N12 Y13 VDD
AM19 GND GND N14 XVDD V1 Y15 VDD
AM22 GND GND N16 XVDD V2 Y17 VDD
XVDD V3 Y18 VDD C102 C111 C155 C323 C101 C149 C148
XVDD V4 Y20 VDD
XVDD V5 Y22 VDD 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 4.7u_6.3V_X6S_06 *4.7u_6.3V_X6S_06 *4.7u_6.3V_X6S_06
XVDD V6
NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT NV FOOTPRINT
XVDD V7
XVDD V8

W2
XVDD
XVDD
XVDD
W3
W4
C305 C306 C326 C325 C324 OFBS!HQV
XVDD W5 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 10u_4V_X6S_06 10u_4V_X6S_06
XVDD W7
XVDD W8

XVDD Y1
XVDD Y2
XVDD Y3
XVDD Y4
XVDD Y5
XVDD Y6 OWWEE OWWEET
A A
XVDD Y7
XVDD Y8 2v`21W`Y8S`17>?27qdt 2v`21W`Y8S`17>?6qdt
5/8v`7/4W`Y7T`17>?4qdt 5/8v`7/4W`Y7T`17>?2qdt
O28Q 21v`5W`Y7T`17! >?9qdt 21v`5W`Y7T`17! >?3qdt
XVDD AA1
XVDD AA2 33v`7/4W`Y7T`19>?2qdt 58v`3/6W`Y7T`19>?2qdt
XVDD AA3 58v`3/6W`Y7T`19>?2qdt
AA4 Title
XVDD
XVDD AA5
AA6
[19] VGA NVVDD Coupling
XVDD
XVDD AA7 Size Document Number Re v
51 NVVDD A3 6-71-N85J0-D01 D02B
XVDD AA8

Date : Friday, March 02, 2018 Sheet 19 of 63

5 4 3 2 1

B - 20 VGA NVVDD Coupling

 Schematic Diagrams

MDP

5 4 3 2 1

3.3VS MDP_PWR
MDP_PWR COMMON SHIELD6 GND4 D2
U3 SHIELD5 GND3
5 1 I_MDP_D3 6 5 I_MDP_D3J
VIN VOUT I_MDP_D#3 I_MDP_D#3J
7 4
C36 2 C43 8 3
GND PWR I_MDP_D2 9 2 I_MDP_D2J
20
20 I_MDP_D#2 I_MDP_D#2J
*10u_6.3V_X5R_06 4 3 10u_6.3V_X5R_06 GND 19 10 1
EN# OC# I_MDP_AUX#_R 18 AUX_CHN
19

18
uP7549UMA5-20
I_MDP_D#2J 17 LANE_2N
17
AUX_CHP16 I_MDP_AUX_R
D DT1140-04LP-7 D
2014/6/24 SY6288D20AAC: 6-02-62882-9C0 I_MDP_D2J 15 LANE_2P
16

21,23,37,42 SUSB uP7549UMA5-20: 6-02-75495-9C0 15

GND
3.3VS 14
14 D3
GND 13
I_MDP_D#3J 12 LANE_3N
13 I_MDP_D0 6 5 I_MDP_D0J
I_MDP_D3J 10 LANE_3P
12
LANE_1N 11 I_MDP_D#1J I_MDP_D#0 7 4 I_MDP_D#0J
11
R308 8 3
I_MDP_D1J 9
10 I_MDP_D1 9 2 I_MDP_D1J
Close to Display PORT *100K_04 7
LANE_1P
GND 8
9
GND 8
I_MDP_D#1 10 1 I_MDP_D#1J

I_MDPC_CEC 7
6 CONFIG2
I_MDP_MODE 4 CONFIG1
6
LANE_0N 5
I_MDP_D#0J
5
DT1140-04LP-7
I_MDP_D0J 4

B.Schematic Diagrams
3 LANE_0P
I_MDP_D#0 3 I_MDP_HPD_R
4 3 C126 0.1u_10V_X7R_04 1 GND HPD 2
2 IGPU_LANE0N L6
2
R309
I_MDP_D0 1
*DVI2012F2SF-900T05_08-SHORT 1 2 C127 0.1u_10V_X7R_04 J_MDP1
2 IGPU_LANE0P
1M_04 C17714-101
I_MDP_D#1
4 3 C77 0.1u_10V_X7R_04 PCB Footprint = C17714-120A8-L SHIELD2 GND2
2 IGPU_LANE1N L5 SHIELD1 GND1
I_MDP_D1
2 IGPU_LANE1P
*DVI2012F2SF-900T05_08-SHORT 1

4
2

3
C125

C73
0.1u_10V_X7R_04

0.1u_10V_X7R_04
I_MDP_D#2
Sheet 20 of 60
2 IGPU_LANE2N

MDP
L3
1 2 I_MDP_D2
*DVI2012F2SF-900T05_08-SHORT C74 0.1u_10V_X7R_04
2 IGPU_LANE2P

C 4 3 I_MDP_D#3
C75 0.1u_10V_X7R_04 C
2 IGPU_LANE3N L4
1 2 I_MDP_D3 5VS
*DVI2012F2SF-900T05_08-SHORT C76 0.1u_10V_X7R_04
2 IGPU_LANE3P

G
9/13 Common Design

S D I_MDP_HPD_R
R310 1K_04
28 I_MDP_HPD

AC
Q30

220p_50V_NPO_04
R307

iGPU/ Optimus DISPLAY PORT 2SK3018S3 D30

BAV99 RECTIFIER

C545
A

C
100K_04
3.3VS

MDP_PWR
R303
G2

100K_1%_04
G

6 1 4 3 I_MDP_AUX#_R
C543 0.1u_10V_X7R_04
2 IGPU_AUX_CH_N
S

D
D

Q28A Q28B
MTDK3S6R MTDK3S6R
B B
G2

5
G

I_MDP_AUX_R
C544 0.1u_10V_X7R_04 6 1 4 3
2 IGPU_AUX_CH_P
S

D
D

R304 Q29A Q29B

MTDK3S6R MTDK3S6R
100K_1%_04

5VS

R305 5VS
G2

10K_04
G

6 1 4 3 I_MDP_AUX#_R
R306
28 I_MDP_DATA
6
S

D 10K_04
D

Q26A Q26B
MTDK3S6R MTDK3S6R Q31A G2
S
1

MTDK3S6R D
Q31B
I_MDP_MODE
G2

MTDK3S6R G5
G

A A
S
4

6 1 4 3 I_MDP_AUX_R
28 I_MDP_CLK
S

D
D

Q27A Q27B
MTDK3S6R MTDK3S6R
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[20]MDP (iGPU)
Size Document Number Re v
9,21,23,37,38,39,40,41,42,51
8,9,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
5VS
3.3VS A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 20 of 63

5 4 3 2 1

MDP B - 21
 Schematic Diagrams

MDP
5 4 3 2 1

From NV DP_E PLEASE CLOSE TO CONNECTOR mini-Display (dGPU)

Close to Display PORT
4 3 D_MDP_E#3
C166 0.1u_10V_X7R_04
16 MDP_E#3 L7
D_MDP_E3 9/21 NV request
1 2 C167 0.1u_10V_X7R_04 3.3VS
16 MDP_E3
NV_MDP_PWR
*DVI2012F2SF-900T05_08-SHORT U29
D 5 1 D
VIN VOUT
D_MDP_E#2
4 3 C168 0.1u_10V_X7R_04 C581 2 C569
16 MDP_E#2 L8 GND
1 2 D_MDP_E2 4 3
C169 0.1u_10V_X7R_04 *10u_6.3V_X5R_06 10u_6.3V_X5R_06
16 MDP_E2 EN# OC#
*DVI2012F2SF-900T05_08-SHORT
uP7549UMA5-20

2014/6/24 SY6288D20AAC: 6-02-62882-9C0

D_MDP_E#1 20,23,37,42 SUSB uP7549UMA5-20: 6-02-75495-9C0
4 3 C221 0.1u_10V_X7R_04
16 MDP_E#1
D_MDP_E1
D02_0302_S
L10 1 2 C222 0.1u_10V_X7R_04
16 MDP_E1
*DVI2012F2SF-900T05_08-SHORT
B.Schematic Diagrams

D_MDP_E0 COMMON SHIELD6 GND4

1 2 C224 0.1u_10V_X7R_04
16 MDP_E0 SHIELD5 GND3
L11 D_MDP_E#0
4 3 C223 0.1u_10V_X7R_04 NV_MDP_PWR
16 MDP_E#0
*DVI2012F2SF-900T05_08-SHORT
PWR 20
20

Sheet 21 of 60 inductor for EMI

DP_TDB_AUX#_E

D_MDP_E#2J
18

17
AUX_CHN

LANE_2N
18
19

17
GND

AUX_CHP16
19

DP_TDB_AUX_E
D_MDP_E2J

MDP
16
15 LANE_2P
15
GND 14
14
GND 13
D_MDP_E#3J 13

C
12 LANE_3N
C
D_MDP_E3J 10 LANE_3P
12
LANE_1N 11
D_MDP_E#1J
11

D_MDP_E1J 9
10
LANE_1P 9
7 GND 8
GND 8
G_MDPE_CEC 6 CONFIG2
7
NV_MDP_PWR R342 *5.1M_04
G_MDPE_MODE 6 D_MDP_E#0J
4 CONFIG1
5
LANE_0N 5
NV_MDP_PWR C537
D_MDP_E0J 3 LANE_0P
4
D4
1
3
HPD
MDP_E_HPD_R
BAT54CS3 2

3
GND

0.01u_16V_X7R_04
⛐dGPU 㗪 DD C / R343 C591
2

C
Q23B Q23A J_MDP2

2
AUX MTDK3S6R MTDK3S6R 1M_04 C17714-101

0.01u_16V_X7R_04
G
㗗M u l t i p l a x 3 4 1 6 R37
PCB Footprint = C17714-120A8-L SHIELD2 GND2

D
PIN
D

A
SHIELD1 GND1
100K_1%_04

2
DP_TDB_AUX#_E
16 MDP_E_AUX#_SDA C129 0.1u_10V_X7R_04

DP_TDB_AUX_E
16 MDP_E_AUX_SCL C128 0.1u_10V_X7R_04

Q22A Q22B R19 5VS

MTDK3S6R MTDK3S6R
From NV DP_E 6 1 4 3 100K_1%_04
S

D
D

B B
G

5VS
2 G

R302
5

10K_04
G_DP_MODE_R
R301

6
D 10K_04 DP ESD W/O LEVELSHIFT ᶲ , NE T⎗SW
暨 P
A
Q25A
MTDK3S6R G 2
S
D5

3
D D_MDP_E2 6 5 D_MDP_E2J
D_MDP_E#2 7 4 D_MDP_E#2J
G_MDPE_MODE
G 5
8 3
S D_MDP_E3 D_MDP_E3J
9 2

4
Q25B D_MDP_E#3 10 1 D_MDP_E#3J
MTDK3S6R

DT1140-04LP-7
D7

To PCH/NV D_MDP_E#1
10 1 D_MDP_E#1J
MDP_E_HPD_R D_MDP_E1 D_MDP_E1J
L9 HCB1005KF-121T20 9 2
18,28 MDP_E_HPD
AC

8 3
D_MDP_E#0 7 4 D_MDP_E#0J
D_MDP_E0 D_MDP_E0J
D8 6 5
A C220 A
BAV99 RECTIFIER DT1140-04LP-7
A

220p_50V_NPO_04
3/18 ㍉
岤
⺢
嬘ἧ䓐 2 0 K VE S D

11/28
NV_MDP_PWR
Title
[21]MDP (dGPU)
10,16,48 NV3V3
Size Document Number Re v
8,9,20,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS
A3 6-71-N85J0-D01 D02B
9,20,23,37,38,39,40,41,42,51 5VS
Date : Friday, March 02, 2018 Sheet 21 of 63

5 4 3 2 1

B - 22 MDP
 Schematic Diagrams

Panel, Inverter
5 4 3 2 1

PANEL POWER
PANEL CONNECTOR VIN
Default
PJ7 VLED

OPEN_2A
LED PANEL (EDP Channel). 2 1

PLVDD Q8A
J_LCD1 VIN *MTS3572G6
D 2A 1 4 3
D

C607 2 1 S2 D2
3 2 C252 C251 D02A

G2
4 3
4 C250

*0.1u_50V_Y5V_06

*0.1u_50V_Y5V_06
1u_6.3V_X5R_04 5

5
6 5
D02_12/21_H 7 6 3.3V R351
C556 0.1u_10V_X7R_04 8 7 *0.22u_50V_Y5V_06
2 EDP_TXN_0 9 8
C557 0.1u_10V_X7R_04 R70 *4.7K_06
2 EDP_TXP_0 10 9 R364
C558 0.1u_10V_X7R_04 11 10 GND5 *150K_04 6
2 EDP_TXN_1 12 11 GND5 GND4
C559 0.1u_10V_X7R_04 *10K_04 D Q33A
2 EDP_TXP_1 13 12 GND4 GND3

B.Schematic Diagrams
D02_02/26_A R71 *100K_04
14 13 GND3 GND2 LVDD_EN#1
C560 0.1u_10V_X7R_04 2 G *MTDK5S6R
2 EDP_TXN_2 15 14 GND2 GND1
C561 0.1u_10V_X7R_04 R69 3 S
2 EDP_TXP_2 16 15 GND1 D 1
C564 0.1u_10V_X7R_04 17 16 *100K_04 Q33B
2 EDP_TXN_3 17
C565 0.1u_10V_X7R_04 18 5 G
2 EDP_TXP_3 19 18
3.3VS R323 10K_04 S *MTDK5S6R
19

6
C566 0.1u_10V_X7R_04 20 4
2 EDP_AUXN 21 20

Sheet 22 of 60
C568 0.1u_10V_X7R_04 Q8B

D1
2 EDP_AUXP 22 21
R324 10K_04
23 22 NB_ENAVDD 1
R353 *0_04
24 23 G1 *MTS3572G6

S1
26 EDP_BRIGHTNESS INV_BLON 24

Panel, Inverter
25
eDPHPD 26 25

2
27 26 R352 *0_04
2A 28 27 25,35,40,42,43,45,48 SUSB# LVDD_EN
VLED 28
29
C614

C615

C C
30 29
30
LVDFH-03008-TP00+
0.01u_50V_X7R_04

0.1u_50V_Y5V_06

PCB Footprint = lvdfh-030xx-tx00

current = 0.3A
INV_BLON
3.3V
3.3V

9/13 Common Design 3.3VS

C
A

3.3V
D32
*BAV99N3 U36A

14
74LVC08APW U36B

14
AC

1 74LVC08APW
40 BKL_EN
eDPHPD R355 1K_04 3BLON14
EDP_HPD 28
2 6BLON2
26 BLON
5
C613 6-06-75140-068 R458 100K_04

7
U36C

14
7
220p_50V_NPO_04 74LVC08APW
9
3.3V INV_BLON
R454 *100K_04 8
BRIGHTNESS SB_BLON
10
U36D

14
B 32 SB_BLON B
74LVC08APW R354

7
12 C612
37,40 LID_SW#
11 LID_SW#1 100K_04
13 0.1u_10V_X7R_04
4,25,40,47 ALL_SYS_PWRGD

7
3.3VS Entire trace of Panel VCC should be wider than 80-mil
U160 G5016 C843

1 6 1u_6.3V_X5R_04
2 IN1 IN2 7
IN1 IN2
PLVDD
13
14 OUT1 OUT2
8
9
PLVDD 3.3V 3A PLVDD
OUT1 OUT2
22u_6.3V_X5R_06

G5016_CT1 12 10 G5016_CT1
C854 C853
CT1 CT2
C852
VBIAS

1u_6.3V_X5R_04

*10u_6.3V_X5R_06
GND

GND
EN1

EN2

C850
680p_50V_X7R_04
3

15

11

A NB_ENAVDD A
NB_ENAVDD
5V NB_ENAVDD 26
C846
1u_6.3V_X5R_04
R714
100K_04 D02_01/02_H ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ON Title
27,42,43,44,45,46,47,49,50,51,52
9,20,21,23,37,38,39,40,41,42,51
VIN
5VS
[22]PANEL,INVERTER
2,17,33,35,42,43,45,47,48 3.3V Size Document Number Re v
8,9,20,21,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
35,37,42,45,46,47,48,49,52,53
3.3VS
5V
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 22 of 63

5 4 3 2 1

Panel, Inverter B - 23
 Schematic Diagrams

HDMI
5 4 3 2 1

1. Differential pair mismatch < 5 mil

R4.4 ཥ ቚIENJ!2/5c!5L3L!Mbzpv u!Hvjef/ 2. CPU to Level Shift total trace length < 5.5” ,via count ʀ 2 ,referenc e t o ground .
3. Level Shift to HDMI connector total trace length < 1” ,via count ʀ 2 ,referenc e t o ground .
Support HDMI 1.4b 4K2K, 暨
≈ 4K2 K leve l shifter, 4. Trace Impedance follow Intel PDG. 85 Ohm +/- 15%
暨
⹎
Layout攟㍏⇞Chi pse t to L evel shi fter <5.5 i nch, Le v
l 5.
e Connectorἧ 䓐SM D Typ e
䓐SM D Type
shifter to Connector <1 inch, Connectorἧ
⤪攟⹎䃉㱽 䫎 ⎰ <5.5", ⇯ 暨 天 ἧ 䓐 P S8 407A,
攟⹎䫎 ⎰ 5 " +1", ⎗ ἧ 䓐 AS 1 4 4 2 K 婳ASMEDIA ⸓ ⾁ 䡢 娵 ㆾ
ἧ䓐 P S 8 2 01A

L>5.5" ⤪
暨
天 忶 4K
,婳 ἧ 䓐 P S 8 4 0 1 A
2
K HDMI_5VS

HDMI CONNECTOR (W/O HDMI Repeater)

A
D D

Gary_for leakage current D9

RB751S-40H
5VS 9/13 Common Design
5VS

C
6-02-75495-9C0 HDMI_5VS
U6 6-21-14230-019
C249 5 1 J_HDMI1
VIN VOUT R87 R84

22u_6.3V_X5R_06

22u_6.3V_X5R_06
*10u_6.3V_X5R_06 2 C285 C286
GND 4.7K_04 4.7K_04
4 3
20,21,37,42 SUSB EN# OC# HDMI_HPD-C HDMI_SCL-C
GND 19
uP7549UMA5-20 18 HOT PLUG DETECT
D02_12/14_H +5V 17
HDMI_SDA-C HDMI ESD W/O LEVELSHIFT ᶲ , NE T⎗SW
暨 P
A
B.Schematic Diagrams

HDMI_SDA-C DDC/CEC GND D10

16
SDA HDMI_SCL-C
TMDS_CLOCK# 15 TMDS_DATA0 TMDS_DATA0J
SCL 6 5
14 TMDS_DATA0# TMDS_DATA0# TMDS_DATA0#J
RESERVED HDMI_CEC 7 4
13
TMDS_CLOCK#J CEC 8 3
12 TMDS_CLOCK TMDS_CLOCKJ
R85 TMDS CLOCK- 9 2
11 TMDS_CLOCK# TMDS_CLOCK#J
EMC11 TMDS_CLOCKJ CLK SHIELD R86 10 1
10
*1.5p_50V_04 *180_1%_04 TMDS CLOCK+ TMDS_DATA0#J *180_1%_04
9
TMDS_CLOCK 8 TMDS DATA0-
SHIELD0 TMDS_DATA0J DT1140-04LP-7
7 TMDS_DATA0
TMDS_DATA1#J

Sheet 23 of 60 TMDS_DATA1# 6 TMDS DATA0+

TMDS DATA1- 5 D13
TMDS_DATA1J SHIELD1
4 TMDS_DATA2# TMDS_DATA2 TMDS_DATA2J
TMDS DATA1+ TMDS_DATA2#J 6 5
3 TMDS_DATA2# TMDS_DATA2#J
R92 TMDS DATA2- 7 4
2

HDMI *180_1%_04
TMDS_DATA1
SHIELD2
TMDS DATA2+
1
TMDS_DATA2J
R93

*180_1%_04
TMDS_DATA1
TMDS_DATA1#
8
9
10
3
2
1
TMDS_DATA1J
TMDS_DATA1#J

C EMI TMDS_DATA2
C

䁢COMMO N CHOK
㓡 暞 ẞ
E SHOR
T DT1140-04LP-7
枸䔁暣旣嶐 -+ℑ 䪗 旣ῤ晐 E M I 婧 㔜 嬲≽ EMI
16-A1030-1003-0
PIN GND1~4=GND
䁢COMMO N CHOK E SHOR
㓡 暞
T ẞ
枸䔁暣 旣 嶐 -+ℑ 䪗 旣ῤ晐 E M I 婧 㔜 嬲≽

Gary_Reserved bypass circuit

䃉L EVEL S HI F T㗪
天ᶲ ẞ
HDMI_DATA0P BRANCH POINT TMDS_DATA2 BRANCH POINT
2 HDMI_DATA0P HDMI_DATA0N C308 0.1u_10V_X7R_04 TMDS_DATA2# R395 499_1%_04
C307 0.1u_10V_X7R_04 R394 499_1%_04
2 HDMI_DATA0N Q36
HDMI_DATA1P TMDS_DATA1 2SK3018S3
2 HDMI_DATA1P HDMI_DATA1N C311 0.1u_10V_X7R_04 TMDS_DATA1# R366 499_1%_04
C310 0.1u_10V_X7R_04 R367 499_1%_04 D S
2 HDMI_DATA1N
HDMI_DATA2P TMDS_DATA0
2 HDMI_DATA2P HDMI_DATA2N C309 0.1u_10V_X7R_04 TMDS_DATA0# R393 499_1%_04
C295 0.1u_10V_X7R_04 R370 499_1%_04
2 HDMI_DATA2N

G
HDMI_CLOCKP TMDS_CLOCK 䃉L EVEL S HI F T㗪
天ᶲ ẞ
2 HDMI_CLOCKP HDMI_CLOCKN C294 0.1u_10V_X7R_04 TMDS_CLOCK# R369 499_1%_04 5VS
C293 0.1u_10V_X7R_04 R368 499_1%_04 HDMI_5VS
2 HDMI_CLOCKN
B B

C
A

A
D11 D12 D31

BAV99 RECTIFIER

BAV99 RECTIFIER

BAV99 RECTIFIER
Gary_Reserved bypass circuit

AC

AC

AC
HDMI_SCL-C

HDMI_SDA-C

HDMI_HPD-C
20K_04 R356

3.3VS

R396
Q37

G
1M_04 2SK3018S3
HDMI_HPD HDMI_HPD-C
S D
28 HDMI_HPD

2
Q9A

G
HDMI_CTRLCLK MTDK3S6R HDMI_SCL-C
1 6
28 HDMI_CTRLCLK

5
Q9B

G
HDMI_CTRLDATA MTDK3S6R HDMI_SDA-C
A A
4 3
28 HDMI_CTRLDATA

D
SCL/SDA 暨 䪗
PULL HIGH (CHECK PCH )
9,20,21,37,38,39,40,41,42,51 5VS
8,9,20,21,22,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS
6,8,9,45,48 VDDQ

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[23] HDMI 1.4b
Size Document Number Re v
Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 23 of 63

5 4 3 2 1

B - 24 HDMI
 Schematic Diagrams

PCH 1/9
5 4 3 2 1

BOOT HALT JTAG ODT

ENABLE:LOW DISABLE:LOW ESPI FLASH SHARING MODE
BOARD_ID1
MASTER ATTACHED FLASH SHARING:LOW R163 10K_04
(INTERNAL WEAK PU) (INTERNAL WEAK PU) SLAVE ATTACEHD FLASH SHARING:HIGH R154 *10K_04
3.3VS BOARD ID1
(INTERNAL WEAK PD)
3.3VA
BOARD_ID2
H: N85
3.3VA R165 *10K_04
R156 *10K_04
3.3VS L: N87 9/21
SPI0_MOSI SPI0_MISO
R128 U34A
100K_04 R404
12/04 BE36 AV29 PLT_RST# 17,25
GPP_A11/PME#/SD_VDD2_PWR_EN# GPP_B13/PLTRST#
SPI_SI_R SPI_SO_R *4.7K_04
R15 Y47 T105
GPP_H_12 R13 RSVD2 GPP_K16/GSXCLK Y46
D T102 D
RSVD1 GPP_K12/GSXDOUT Y48 GPP_G_14_GSXDIN:
R129 R431 GPP_K13/GSXSLOAD W46 GPP_K_14_GSXDIN T100 DMI AC COUPLING FULL VOLTAGE MODE
AL37 GPP_K14/GSXDIN AA45
*4.7K_04 *4.7K_04 VSS GPP_K15/GSXSRESET# WHEN SAMPLED LOW 3.3VS
GPP_H12 T35 AN35
TP
SPI_SI_R EXTTS_SNI_DRV0
AU41 AL47 4 5
SPI_SO_R BA45 SPI0_MOSI GPP_E3/CPU_GP0 AM45 TCH_PNL_INTR#
3 6
SPI_CS_0# AY47 SPI0_MISO GPP_E7/CPU_GP1 BF32 2 7
SPI_SCLK_R SPI0_CS0# GPP_B3/CPU_GP2 EXTTS_SNI_DRV1
AW47 BC33 1 8 *10K_8P4R_04
AW48 SPI0_CLK GPP_B4/CPU_GP3 RN5
SPI0_CS1# AE44 SML4ALERT#
CONSENT STRAP PESONALITY STRAP SPI_WP# SPI_IO2 GPP_H18/SML4ALERT# T23 9/22
ENABLE:LOW ENABLE:LOW R434 33_04 AY48 AJ46 SML4DATA T112
SPI_HOLD# SPI_IO3 BA46 SPI0_IO2 GPP_H17/SML4DATA AE43
(INTERNAL WEAK PU) (INTERNAL WEAK PU) R436 33_04 SML4CLK T24

B.Schematic Diagrams
AT40 SPI0_IO3 GPP_H16/SML4CLK AC47 GPP_H15
SPI0_CS2# GPP_H15/SML3ALERT# AD48 SML3DATA
GPP_H14/SML3DATA T22
BE19 AF47 SML3CLK T101
BF19 GPP_D1/SPI1_CLK/SBK1_BK1 GPP_H13/SML3CLK AB47 GPP_H_12
18 GPIO4_1V8_MAIN_EN_R BF18 GPP_D0/SPI1_CS#/SBK0_BK0 GPP_H12/SML2ALERT# AD47 3.3VA
SPIO_IO2 SPIO_IO3 SML2DATA T108
BE18 GPP_D3/SPI1_MOSI/SBK3_BK3 GPP_H11/SML2DATA AE48 SML2CLK
GPP_D2/SPI1_MISO/SBK2_BK2 GPP_H10/SML2CLK T103
D02_12/18_H BC17 External pull-up is required.
BD17 GPP_D22/SPI1_IO3 BB44 INTRUDER# R143 1M_04 Recommend 100K if pulled

Sheet 24 of 60
GPP_D21/SPI1_IO2 1 OF 13 INTRUDER# VCC_RTC up to 3.3V
R405
SPI_IO2 SPI_IO3
HM370
100K_04

R430
*4.7K_04
R432
*1K_04
U34M
GPP_H15 PCH 1/9
C BD4 C
BOARD_ID1 AW13 CNV_WR_CLKN BE3 CNVI_WGR_CLK_DN 34
R402
BOARD_ID2 BE9 GPP_G0/SD_CMD CNV_WR_CLKP CNVI_WGR_CLK_DP 34
TPM_DET BF8 GPP_G1/SD_D0 BB3 *20K_04
BF9 GPP_G2/SD_D1 CNV_WR_D0N BB4 CNVI_WGR_D0N 34
D02_12/18_H SMI#_R GPP_G3/SD_D2 CNV_WR_D0P CNVI_WGR_D0P 34
T121 BG8 BA3
BE8 GPP_G4/SD_D3 CNV_WR_D1N BA2 CNVI_WGR_D1N 34
BD8 GPP_G5/SD_CD# CNV_WR_D1P CNVI_WGR_D1P 34
AV13 GPP_G6/SD_CLK BC5
1V8_LDO GPP_G7/SD_WP CNV_WT_CLKN BB6 CNVI_WT_CLK_DN 34
D02_12/04_H CNV_WT_CLKP CNVI_WT_CLK_DP 34
AP3 BE6
AP2 GPP_I11/M2_SKT2_CFG0 CNV_WT_D0N BD7 CNVI_WT_D0N 34
AN4 GPP_I12/M2_SKT2_CFG1 CNV_WT_D0P BG6 CNVI_WT_D0P 34
Close to PCH Side R140
1V8_LDO AM7 GPP_I13/M2_SKT2_CFG2 CNV_WT_D1N BF6 CNVI_WT_D1N 34
20K_04 GPP_I14/M2_SKT2_CFG3 CNV_WT_D1P BA1 CNVI_WT_D1P 34
150_1%_04 R428
CNV_WT_RCOMP
20K_04 CNVI_BRI_RSP AV6 B12 PCIECOMP_N
R699 100_1%_04 R350 Mismatch : +- 5 mils
34 CNVI_GNSS_PA_BLANKING AY3 GPP_J0/CNV_PA_BLANKING PCIE_RCOMPN A13 PCIECOMP_P
R138 0_04
CNVI_RGI_RSP 43,48 GPP_J1_C10# AR13 GPP_J1/CPU_VCCIO_PWR_GATE# PCIE_RCOMPP BE5
R700 20K_04 200_1%_04 R158
AV7 GPP_J11/A4WP_PRESENT SD_RCOMP_1P8 BE4
D02_12/04_H GPP_J10 SD_RCOMP_3P3
200_1%_04 R137 Place GND Shield (4 mils)
AW3 BD1
AT10 GPP_J_2 GPPJ_RCOMP_1P81 BE1 Avoid the CLK signal
CNVI_BRI_DT AV4 GPP_J_3 GPPJ_RCOMP_1P82 BE2
R427 33_04 200_1%_04 R139
34 CNVI_BRI_DT AY2 GPP_J_4_CNV_BRI_DT_UART0_RTSB GPPJ_RCOMP_1P83
34 CNVI_BRI_RSP CNVI_RGI_DT BA4 GPP_J5/CNV_BRI_RSP/UART0_RXD Y35
R159 33_04
34 CNVI_RGI_DT AV3 GPP_J6/CNV_RGI_DT/UART0_TXD RSVD2 Y36
34 CNVI_RGI_RSP AW2 GPP_J7/CNV_RGI_RSP/UART0_CTS# RSVD3 D02_12/07_H
34 CNVI_MFUART2_RXD AU9 GPP_J8/CNV_MFUART2_RXD BC1
B 34 CNVI_MFUART2_TXD GPP_J9/CNV_MFUART2_TXD RSVD1 AL35 B
TP T37
13 OF 13
HM370

For ITE IT8587B Test 3.3VS

1V8_LDO 1V8_LDO D02_12/04_H
HSPI_MSI
R130 *0402_short-p
SPI_SI_R D02_12/04_H GPIO
40 HSPI_MSI HSPI_MSO SPI_SO_R
R435 *0402_short-p XTAL SELECT-1 H: W / TPM
40 HSPI_MSO HSPI_SCLK SPI_SCLK_R
R422 *0402_short-p Enable CNVI HIGH -> 24 MHZ L: W/O TPM R164
40 HSPI_SCLK HSPI_CE# SPI_CS_0#
R433 *0402_short-p R161 R438 LOW -> 38.4 MHZ 10K_04
40 HSPI_CE#
20K_04 Close to Connector Side 10K_04 Close to Connector Side
嶇 BIOS 䡢 娵 TPM
TPM_DET

CNVI_RGI_DT CNVI_BRI_DT
R155
SPI_3.3V D02_12/04_H *100K_04
Default SPI_* = 1"~6.5" W/O TPM

2 1
VDD3
PJ48 *1mm ME+BIOS ROM 16MB
RTC Wake UP
U38
8 5 SPI_SI_M SPI_SI_R
R464 33_04
VDD SI
A SPI_SO_M SPI_SO_R A
C678 2 R460 33_04
SO
SPI_WP# 3 1 SPI_CS0# SPI_CS_0# 1V8_LDO 30
0.1u_10V_X7R_04 R461 100K_04 R459 0_04
WP# CE#
6 SPI_SCLK_M SPI_SCLK_R
R463 33_04

R462 100K_04
SPI_HOLD# 7
SCK
4
3.3VA 4,9,26,27,30,48
SPI_3.3V 30 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
HOLD# VSS VCC_RTC 27,30 Title
R703
GD25B127DSIGR 100K_04
3.3VS 8,9,20,21,22,23,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
VDD3 4,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53
[24] PCH 1/12-SPI/SMBUS
Size Document Number Re v
6-04-02564-492 D02_12/04_H A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 24 of 63

5 4 3 2 1

PCH 1/9 B - 25
 Schematic Diagrams

PCH 2/9
5 4 3 2 1

U34B
K34 J3 USB_PN1 35
2 DMI_MT_IR_0_DN J35 DMI0_RXN USB2N_1 J2
2 DMI_MT_IR_0_DP
C33 DMI0_RXP USB2P_1 N13
USB_PP1 35 1- USB3 M/B Charger
2 DMI_IT_MR_0_DN B33 DMI0_TXN USB2N_2 N15
2 DMI_IT_MR_0_DP G33 DMI0_TXP USB2P_2 K4
2 DMI_MT_IR_1_DN DMI1_RXN USB2N_3 USB_PN3 35
F34 K3
2 DMI_MT_IR_1_DP C32 DMI1_RXP USB2P_3 M10
USB_PP3 35 3- Type-C
2 DMI_IT_MR_1_DN B32 DMI1_TXN USB2N_4 L9
2 DMI_IT_MR_1_DP K32 DMI1_TXP USB2P_4 M1
2 DMI_MT_IR_2_DN DMI2_RXN USB2N_5 USB_PN5 37 D02_01/03_H
J32 L2
2 DMI_MT_IR_2_DP
C31 DMI2_RXP USB2P_5 K7
USB_PP5
USB_PN6
37
37
5- Audio Port 1 USB3 Con.
2 DMI_IT_MR_2_DN B31 DMI2_TXN USB2N_6 K6
D
2 DMI_IT_MR_2_DP G30 DMI2_TXP USB2P_6 L4
USB_PP6
USB_PN7
37
33
6- Audio Port 2 USB2 Con. D
2 DMI_MT_IR_3_DN F30 DMI3_RXN USB2N_7 L3
2 DMI_MT_IR_3_DP C29 DMI3_RXP USB2P_7 G4
USB_PP7
USB_PN8
33
38
7- 3G
2 DMI_IT_MR_3_DN B29 DMI3_TXN USB2N_8 G5
2 DMI_IT_MR_3_DP
A25 DMI3_TXP USB2P_8 M6
USB_PP8 38 8- CCD
B25 DMI7_TXP USB2N_9 N8
P24 DMI7_TXN USB2P_9 H3
DMI7_RXP USB2N_10 USB_PN10 37
R24 H2
Differential between RCOMPN/RCOMPP. C26 DMI7_RXN USB2P_10 R10
USB_PP10 37 10- Finger
B26 DMI6_TXP USB2N_11 P9
Length matched to less than 1% trace. F26 DMI6_TXN USB2P_11 G1
G26 DMI6_RXP USB2N_12 G2
B27 DMI6_RXN USB2P_12 N3
B.Schematic Diagrams

C27 DMI5_TXP USB2N_13 N2 VDD3

L26 DMI5_TXN USB2P_13 E5
DMI5_RXP USB2N_14 USB_PN14 34
M26 F6
D29 DMI5_RXN USB2P_14 USB_PP14 34 14- BT
E28 DMI4_TXP AH36 USB_OC0#
K29 DMI4_TXN GPP_E9/USB2_OC0# AL40 USB_OC1#
M29 DMI4_RXP GPP_E10/USB2_OC1# AJ44 USB_OC2#
R144
DMI4_RXN GPP_E11/USB2_OC2# AL41 VISACH2_D3
GPP_E12/USB2_OC3# USB_OC4# 100K_04
G17 AV47

Sheet 25 of 60 7- USB3.1 Gen1 M.2 B Key

33
33
33
USB3_RXN7
USB3_RXP7
USB3_TXN7
F16
A17
B17
PCIE1_RXN/USB31_7_RXN GPP_F15/USB2_OC4#
PCIE1_RXP/USB31_7_RXPGPP_F16/USB2_OC5#
PCIE1_TXN/USB31_7_TXNGPP_F17/USB2_OC6#
AR35
AR37
AV43
USB_OC5#
USB_OC6#
USB_OC7#
GPD7
33 USB3_TXP7 R21 PCIE1_TXP/USB31_7_TXPGPP_F18/USB2_OC7#

PCH 2/9 P21

B18
C18
PCIE2_RXN/USB31_8_RXN
PCIE2_RXP/USB31_8_RXP USB2_COMP
PCIE2_TXN/USB31_8_TXN USB2_VBUSSENSE
F4
F3
U13
USB2_COMP
USB2_VBUSSENSE
TP_PCH_U13
R360
R358
113_1%_04
*1K_04

C K18 PCIE2_TXP/USB31_8_TXP RSVD1 G3 USB2_ID DESIGN NOTE:

R361 *1K_04 USB2 COMP RES: PLACE WITHIN 1 INCH C
J18 PCIE3_RXN/USB31_9_RXN USB2_ID
B19 PCIE3_RXP/USB31_9_RXP BE41 GPD7
C19 PCIE3_TXN/USB31_9_TXN GPD7
N18 PCIE3_TXP/USB31_9_TXP G45
R18 PCIE4_RXN/USB31_10_RXN PCIE24_TXP G46
D20 PCIE4_RXP/USB31_10_RXP PCIE24_TXN Y41
C20 PCIE4_TXN/USB31_10_TXN PCIE24_RXP Y40
F20 PCIE4_TXP/USB31_10_TXP PCIE24_RXN G48
G20 PCIE5_RXN PCIE23_TXP G49
B21 PCIE5_RXP PCIE23_TXN W44
HM370 PCIE Port 5 NO Function A22 PCIE5_TXN PCIE23_RXP W43 USB TABLE
K21 PCIE5_TXP PCIE23_RXN H48
J21 PCIE6_RXN PCIE22_TXP H47
D21 PCIE6_RXP PCIE22_TXN U41 USB2.0 USB3.0 DEVICE OC
HM370 PCIE Port 6 NO Function C21 PCIE6_TXN PCIE22_RXP U40
B23 PCIE6_TXP PCIE22_RXN F46 1 1 Charger, PORT 3 OC5
C23 PCIE7_TXP PCIE21_TXP G47
J24 PCIE7_TXN PCIE21_TXN R44 2 CCD OC5
HM370 PCIE Port 7 NO Function L24 PCIE7_RXP PCIE21_RXP T43
WLAN
F24 PCIE7_RXN PCIE21_RXN 3 OC4
G24 PCIE8_RXN
B24 PCIE8_RXP 4 OC4
HM370 PCIE Port 8 NO Function C24 PCIE8_TXN
PCIE8_TXP 2 OF 13 5 2 3G OC1
HM370 6 6 eSATA Combo OC1
BUF_PLT_RST# 7 OC0
B VDD3 B
VDD3 VDD3 8 8 PORT1 OC0
PM_PCH_PWROK 9,27
U16C 9 PORT2 OC2

14
U16D U16B 74LVC08APW
14

14
74LVC08APW 74LVC08APW 9
12 ALL_SYS_PWRGD 4 8 SYS_PWROK_R R425 1K_04
17,24 PLT_RST# 11 6 10 SYS_PWROK 27
13 BUF_PLT_RST# 34,36,38,40 5 40 PM_PWROK
47 VCORE_PG
EC DELAY 99ms(UP)

7
7

7
R195 R187
100K_04 10K_04
VDD3
D02_12/21_H
U16A

14
74LVC08APW
1 TO VR_ON & EC
43 VCCIO_PWRGD 3 ALL_SYS_PWRGD
2 ALL_SYS_PWRGD 4,22,40,47
R198 0_04
22,35,40,42,43,45,48 SUSB#
R196 *0_04
27 PCH_DPWROK 7 R197 C421
10K_04
*0.1u_10V_X7R_04

A A

ON

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[25] PCH 2/12-DMI/PCIE/USB2.0
Size Document Number Re v
4,9,24,26,27,30,48
4,24,27,30,34,36,37,40,42,43,44,48,50,51,52,53
3.3VA
VDD3 A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 25 of 63

5 4 3 2 1

B - 26 PCH 2/9
 Schematic Diagrams

PCH 3/9
5 4 3 2 1

BIOS RECOVERY
ENABLE :LOW PCH_RSVD MFG_MODE
3.3VS 3.3VS 3.3VS
3.3VS
12/04

R132 R417 R420

SCI# R403 10K_04
100K_04 10K_04 *10K_04
SATA_LED#
R407 10K_04
BIOS_REC PCH_RSVD MFG_MODE
SWI# R389 10K_04 3.3VA

D U34C D
GPP_F10 GPP_F11 GPP_F12 AR2 G36
T110
T116
AT5
AU4
CL_CLK
CL_DATA
PCIE9_RXN
PCIE9_RXP
F36
C34 PCIE9_TXN
C595 0.22u_10V_X5R_04
PCIE_RXN9_SSD
PCIE_RXP9_SSD
34
34
M2. PCIE (9~12)
T41
GPPG8_PCH_1V8AON_EN P48
CL_RST# PCIE9_TXN
PCIE9_TXP
D34 PCIE9_TXP
C596 0.22u_10V_X5R_04
PCIE_TXN9_SSD
PCIE_TXP9_SSD
34
34
(Reverse)
T97 GPPG9_PCH_NV3V3_EN GPP_K8
V47 K37
T106
T104
GPPG10_PCH_NVVDD_EN V48
GPPG11_PCH_NVVDDS_EN W47
GPP_K9
GPP_K10
PCIE10_RXN
PCIE10_RXP
J37
C35 PCIE10_TXN C598 0.22u_10V_X5R_04
PCIE_RXN10_SSD
PCIE_RXP10_SSD
34
34
M2. PCIE (9~12)
T107
T17
GPPG0_PCH_PEXVDD_EN
GPPG1_PCH_FBVDDQ_EN
L47
L46
GPP_K11
GPP_K0
PCIE10_TXN
PCIE10_TXP
B35 PCIE10_TXP C597 0.22u_10V_X5R_04
PCIE_TXN10_SSD
PCIE_TXP10_SSD
34
34
(Reverse)
T96 GPPG2_PCH_1V8RUN_EN U48 GPP_K1 F44
T95 U47 GPP_K2 PCIE15_RXN/SATA2_RXN E45 PCIE_RXN15_GLAN 36
40 SCI# SCI#
GPP_K3 PCIE15_RXP/SATA2_RXP B40 PCIE15_TXN PCIE_RXP15_GLAN 36

B.Schematic Diagrams
N48 C605 0.1u_10V_X7R_04

SWI#
N47
P47
GPP_K4
GPP_K5
PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
C40 PCIE15_TXP C606 0.1u_10V_X7R_04
PCIE_TXN15_GLAN
PCIE_TXP15_GLAN
36
36
RTL8411B GLAN
40 SWI# GPP_K6
R46 L41
GPP_K7 PCIE16_RXN/SATA3_RXN M40
PCIE11_TXP C36 PCIE16_RXP/SATA3_RXP B41
C599 0.22u_10V_X5R_04
34 PCIE_TXP11_SSD PCIE11_TXN PCIE11_TXP/SATA0A_TXP PCIE16_TXN/SATA3_TXN
M2. PCIE (9~12) 34 PCIE_TXN11_SSD
C600 0.22u_10V_X5R_04 B36
F39 PCIE11_TXN/SATA0A_TXN PCIE16_TXP/SATA3_TXP
C41
34 PCIE_RXP11_SSD PCIE11_RXP/SATA0A_RXP
(Reverse) 34 PCIE_RXN11_SSD
G38
PCIE11_RXN/SATA0A_RXN PCIE17_RXN/SATA4_RXN
K43
K44
SATA_RXN4 37
Sheet 26 of 60
BIOS_REC
PCH_RSVD
AR42
AR48 GPP_F10/SATA_SCLOCK
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN
A42
B42
SATA_RXP4
SATA_TXN4
37
37 Main HDD
GP39_GFX_CRB_DETECT GPP_F11/SATA_SLOAD PCIE17_TXP/SATA4_TXP SATA_TXP4 37

C603
MFG_MODE

0.1u_10V_X7R_04
AU47
AU46
PCIE14_TXN C39
GPP_F13/SATA_SDATAOUT0
GPP_F12/SATA_SDATAOUT1 PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
P41
R40
C42
PCH 3/9
C
34 PCIE_TXN14_WLAN PCIE14_TXP D39 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN D42
C604 0.1u_10V_X7R_04 C
WLAN 34 PCIE_TXP14_WLAN
34 PCIE_RXN14_WLAN
D46
C47
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN
PCIE18_TXP/SATA5_TXP
AK48 SATA_LED#
34 PCIE_RXP14_WLAN PCIE14_RXP/SATA1B_RXP GPP_E8/SATA_LED# SATA_LED# 38
B38 AH41 SATAGP0 12/04 T150
C38 PCIE13_TXN/SATA0B_TXN GPP_E0/SATAXPCIE0/SATAGP0 AJ43 SATAGP1 SATAGP1
PCIE13_TXP/SATA0B_TXP GPP_E1/SATAXPCIE1/SATAGP1 SATAGP1 34
C45 AK47 SATAGP2 T149 L: SATA
C46 PCIE13_RXN/SATA0B_RXN GPP_E2/SATAXPCIE2/SATAGP2 AN47 SATAGP3 H: PCIe
PCIE13_RXP/SATA0B_RXP GPP_F0/SATAXPCIE3/SATAGP_3 T151
AM46 12/04 1.05_VCCST
PCIE12_TXP E37 GPP_F1/SATAXPCIE4/SATAGP4 AM43
C601 0.22u_10V_X5R_04
M2. PCIE (9~12) 34 PCIE_TXP12_SSD
34 PCIE_TXN12_SSD
C602 0.22u_10V_X5R_04
PCIE12_TXN D38
J41
PCIE12_TXP/SATA1A_TXP GPP_F2/SATAXPCIE5/SATAGP5
PCIE12_TXN/SATA1A_TXN GPP_F3/SATAXPCIE6/SATAGP6
AM47
AM48
ODD_DA#_R
T114
T115
(Reverse) 34 PCIE_RXP12_SSD
34 PCIE_RXN12_SSD
H42 PCIE12_RXP/SATA_1A_RXP GPP_F4/SATAXPCIE7/SATAGP7
PCIE12_RXN/SATA1A_RXN AU48 R397
EDP_BRIGHTNESS 22 CLOSE TO PCH
SATA 1 B44
A44 PCIE20_TXP/SATA7_TXP
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
AV46
AV44
BLON 22 1K_04
(0.3" ~ 2")
PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN NB_ENAVDD 22
R37
R35 PCIE20_RXP/SATA7_RXP AD3 PCH_THERMTRIP#_R R398 30.1_1%_04
PCH_THERMTRIP#
PCH_THERMTRIP# 4
PCIE20_RXN/SATA7_RXN THRMTRIP# AF2 PCH_PECI_R R399 *12.1_1%_04 PCH_PECI 4
D43 PECI AF3 H_PM_SYNC_R R400 30.1_1%_04 H_PM_SYNC 4
C44 PCIE19_TXP/SATA6_TXP PM_SYNC AG5
PCIE19_TXN/SATA6_TXN PLTRST_CPU# PLTRST_CPU_N 4
N42 AE2 H_PM_DOWN 4
M44 PCIE19_RXP/SATA6_RXP PM_DOWN
PCIE19_RXN/SATA6_RXN 3 OF 13
HM370

CLOSE TO PCH
(< 0.5") 12/04
B B
3.3VS GFX SELECT TABLE
NORMAL GFX:LOW
CUSTOMER GFX:HIGH
R421

*10K_04
GP39_GFX_CRB_DETECT

R416
10K_04
GPP_F13

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[26] PCH 3/12-PCIE/SATA/HOST
4,9,24,27,30,48 3.3VA
8,9,20,21,22,23,24,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS Size Document Number Re v
4,6,47,48 1.05_VCCST A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 26 of 63

5 4 3 2 1

PCH 3/9 B - 27
 Schematic Diagrams

PCH 4/9
5 4 3 2 1

VDD3 R392 0_04 R391 *45.3K_1%_04

D02_0302_S U34D
ISH_GP_6_R
BD11 BF36
RTC3.2V 39 HDA_BITCLK HDA_BCLK/I2S0_SCLK GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF# PM_CLKRUN#
BE11 AV32 PM_CLKRUN# 28,40
39 HDA_SDIN0 HDA_SDOUT BF12 HDA_SDI0/I2S0_RXD GPP_A8/CLKRUN#
6-06-00054-06F 27,39 HDA_SDOUT BG13 HDA_SDO/I2S0_TXD BF41 LAN_DISABLE_N
39 HDA_SYNC HDA_SYNC/I2S0_SFRM GPD11/LANPHYPC BD42 PCH_SLP_WLAN#
VCC_RTC
ijıŮŪŭŴ D33 BE10 GPD9/SLP_WLAN#
39 HDA_RST# BF10 HDA_RST#/I2S1_SCLK BB46 DDR4_DRAMRST#
1 A ijıŮŪŭŴ HDA_SDI1/I2S1_RXD DRAM_RESET# DDR4_DRAMRST# 8,9
BE12 BE32 VRALERTB#
C 3 I2S1_TXD/SNDW2_DATA GPP_B2/VRALERT# GPP_B1
CLOSE TO PCH BD12 BF33
2 A I2S1_SFRM/SNDW2_CLK GPP_B1/GSPI1_CS1#/TIME_SYNC1
D BE29 D
AUD_AZACPU_SDO AM2 GPP_B0/GSPI0_CS1# R47
R142 R141 R414 30.1_1%_04
BAT54CS3 C629 2 AUD_AZACPU_SDO_R HDACPU_SDO GPP_K17/ADR_COMPLETE
AN3 AP29
2 AUD_AZACPU_SDI AUD_AZACPU_SCLK_R HDACPU_SDI GPP_B11/I2S_MCLK
R413 30.1_1%_04 AM3 AU3 SYS_PWROK 25
10u_6.3V_X5R_06 2 AUD_AZACPU_SCLK HDACPU_SCLK SYS_PWROK
20K_1%_04 20K_1%_04
AV18 BB47 PCIE_WAKE#
GPP_D8/I2S2_SCLK WAKE# SLP_A# PCIE_WAKE# 34,36
AW18 BE40
IJıŮŪŭŴ R441 0_04 BA17 GPP_D7/I2S2_RXD GPD6/SLP_A# BF40 PM_SLP_LAN#

RTC_VBAT_1
C360 34 CNVI_XTAL_CLKREQ GPP_D6/I2S2_TXD/MODEM_CLKREQ SLP_LAN# SLP_S0#
BE16 BC28

1
34 CNVI_RF_RST# GPP_D5/I2S2_SFRM/CNV_RF_RESET# GPP_B12/SLP_S0#
BF15 BF42
1u_6.3V_X5R_04 JOPEN1 GPP_D20/DMIC_DATA0/SNDW4_DATA GPD4/SLP_S3# SUSB#_PCH 40
BD16 BE42 SUSC#_PCH 40
*OPEN_10mil-1MM AV16 GPP_D19/DMIC_CLK0/SNDW4_CLK GPD5/SLP_S4# BC42
AW15 GPP_D18/DMIC_DATA1/SNDW3_DATA GPD10/SLP_S5#

2
GPP_D17/DMIC_CLK1/SNDW3_CLK BE45 SUS_CLK
GPD8/SUSCLK PM_BATLOW# SUS_CLK 34
RTC_RST#
BF44
SUS_PWR_ACK#_R DSX
B.Schematic Diagrams

R390 BE47 GPD0/BATLOW# BE35 R149 *0_04

SRTC_RST# RTCRST# GPP_A15/SUSACK# SUS_PWR_ACK# 40
BD46 BC37 SUSWARN# R146 *0_04
SRTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK SUS_WARN# 40
1K_04 R147 *1K_04
LAN_WAKEUP#
AY42 BG44 LAN_WAKEUP# 36,40
9,25 PM_PCH_PWROK BA47 PCH_PWROK GPD2/LAN_WAKE# BG42 AC_PRESENT
RSMRST# AC_PRESENT 40
RSMRST# GPD1/ACPRESENT BD39 SLP_SUS#_R
C361
PCH_DPWROK AW41 SLP_SUS# BE46 PWR_BTN#
1u_6.3V_X5R_04 25 PCH_DPWROK SYS_RESET# PWR_BTN# 40
DSW_PWROK GPD3/PWRBTN# AU2
SKIN_THRM_SNSR_ALERT_N SYS_RESET# SPKR_SMC_EXTSMI SYS_RESET# 28
BE25 AW29 R152 *0402_short-p

Sheet 27 of 60 SMB_CLK GPP_C2/SMBALERT# GPP_B14/SPKR PCH_SPKR 39

GPP_C5 9,37,45 SMB_CLK
BE26 AE3 H_PWRGD 4
SMB_DATA GPP_C0/SMBCLK CPUPWRGD
1

ESPI/LPC SELECT (for EC) 9,37,45 SMB_DATA

BF26
GPP_C5 BF24 GPP_C1/SMBDATA AL3 ITP_PMODE
J_RTC1 eSPI: 1
+

SML0_CLK BF25 GPP_C5/SML0ALERT# ITP_PMODE AH4 PCH_JTAGX

53011-00201-001

PCH 4/9 C
LPC: 0
(INTERNAL WEAK PD)
SML0_DATA
PCH_HOT_GNSS_DISABLE
SMC_CPU_THERM
SMD_CPU_THERM
BE24
BD33
BF27
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_C6/SML1CLK
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
AJ4
AH3
AH2
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
PCH_JTAGX 4
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI 4
4
4
C

BE27 AJ3
-

GPP_C7/SML1DATA 4 OF 13 PCH_JTAG_TCK
2

HM370

1.05DX_VCCSTG
D02_12/04_H PCH_JTAG_TDO
R411 51_04
SUSB#_PCH
R702 100K_04 PCH_JTAG_TCK
VDD3 SUSC#_PCH R412 51_04
R701 100K_04
VDD3
CLOSE TO CPU
3.3VA
R261 VDD3
< 1.1"
SMC_CPU_THERM
47K_04 1 8
U26 SMD_CPU_THERM 2 7 1K_8P4R_04
R262 RN6

5
TC7SZ08FU SMB_CLK
3 6
1 SMB_DATA
47K_04 4 5
4 RSMRST#
2

D
9/22
R253 0_04 G Q20

3
SML0_CLK
17 NV_EN_DOWN R445 1K_04
2SK3018S3 SML0_DATA

S
R444 1K_04

C
D22
VIN C A R263 90.9K_1%_04 B Q21 SUSWARN# R145 1K_04
SUSWARN# R148 *0402_short-p SUS_PWR_ACK#_R
B ZD5231BS2 MMBT3904H B

E
C483 R254
Non DSX VDD3

20K_1%_04

*0.1u_10V_X7R_04
Flash Descriptor Security Overide LAN_WAKEUP#
R449 *10K_04
Low = Disabled-(Default) 11/30 PCIE_WAKE#
R451 *4.7K_04
High = Enabled 40 EC_RSMRST#

R439 1K_04
ME_WE 40 PM_BATLOW#
1 8 VDD3
D38 AC_PRESENT
RN7 2 7 10K_8P4R_04
HDA_SDOUT KBC_RST#
A C 28,40 KBC_RST#
3 6 3.3VS
HDA_SDOUT 27,39
28,40 SMI# SMI# 4 5
RB751S-40H HDA_SDO
9/22
VCC_3P3DSW_PWRGD Design Note:
TOP SWAP OVERRIDE STRAP EXI BOOT STALL BYPASS PCH_DPWROK > 10ms Delay
SWAP ENABLE: HIGH ENABLE:HIGH
SWAP DISABLE(DEFAULT): LOW (INTERNAL WEAK PD)
(INTERNAL WEAK PD) PCH_DPWROK
R457 *0402_short-p RSMRST# RSMRST# R453 10K_04
3.3VS 3.3VA

R153 GPP_B14 R150 GPP_B23

A 150K_1%_04 *4.7K_04 A

SPKR_SMC_EXTSMI PCH_HOT_GNSS_DISABLE

1.05DX_VCCSTG 4,6,48
VIN 22,42,43,44,45,46,47,49,50,51,52
3.3VA 4,9,24,26,30,48
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1.05_VCCST 4,6,26,47,48 Title
VCC_RTC 24,30 [27] PCH 4/12-HDA/SMBUS/RTC
VDDQ 6,8,9,45,48
3.3VS 8,9,20,21,22,23,24,26,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 Size Document Number Re v
VDD3 4,24,25,30,34,36,37,40,42,43,44,48,50,51,52,53 A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 27 of 63

5 4 3 2 1

B - 28 PCH 4/9
 Schematic Diagrams

PCH 5/9
5 4 3 2 1

U34E

AT6 AL13 I_MDP_CLK

MDP OUT (B) (iGPU) 20 I_MDP_HPD GPP_I0/DDPB_HPD0/DISP_MISC0 GPP_I5/DDPB_CTRLCLK I_MDP_DATA I_MDP_CLK 20
HDMI OUT(C) AN10 AR8
23 HDMI_HPD GPP_I1/DDPC_HPD1/DISP_MISC1 GPP_I6/DDPB_CTRLDATA HDMI_CTRLCLK I_MDP_DATA 20
D T40 AP9 AN13 D
GPP_I2/DPPD_HPD2/DISP_MISC2 GPP_I7/DDPC_CTRLCLK HDMI_CTRLDATA HDMI_CTRLCLK 23
R111 1K_04 AL15 AL10
18,21 MDP_E_HPD GPP_I3/DPPE_HPD3/DISP_MISC3 GPP_I8/DDPC_CTRLDATA AL9 HDMI_CTRLDATA 23
MDP OUT(D,E) (dGPU) GPP_I9/DDPD_CTRLCLK
R113 100K_04 AR3
GPP_I10/DDPD_CTRLDATA AN40 DGPU_PWR_EN
GPP_F23/DDPF_CTRLDATA AT49 DGPU_RST#_PCH DGPU_PWR_EN 17,40
R121
GPP_F22/DDPF_CTRLCLK DGPU_RST#_PCH 17
USB TABLE 1M_04
AP41 H_SKTOCC_N 4
GPP_F14/EXT_PWR_GATE#/PS_ON#
USB2.0 USB3.0 DEVICE OC AN6 M45 DGPU_PRSNT#
22 EDP_HPD GPP_I4/EDP_HPD/DISP_MISC4 GPP_K23/IMGCLKOUT1 L48
1 1 Charger, PORT 3 OC5 GPP_K22/IMGCLKOUT0 T45 GC6_FB_EN DGPU_PWRGD 52
GPP_K21 T46 GPU_EVENT# GC6_FB_EN 17,40
R122
2 CCD OC5 GPP_K20 AJ47 DGPU_SELECT# GPU_EVENT# 16
100K_04 GPP_H23/TIME_SYNC0
3 WLAN OC4 5 OF 13

B.Schematic Diagrams
HM370
4 OC4
9/22 3.3VS
5 2 3G OC1 RN3
2.2K_8P4R_04
6 6 eSATA Combo OC1 I_MDP_CLK
1 8
I_MDP_DATA 2 7
7 OC0 HDMI_CTRLCLK
3 6

Sheet 28 of 60
HDMI_CTRLDATA
8 4 5
8 PORT1 OC0 DGPU_SELECT#
R406 *10K_04
DGPU_PRSNT#
R388 10K_04
9 PORT2 OC2

35 USB3_TXN1
F9
U34F
USB31_1_TXN GPP_A1/LAD0/ESPI_IO0
BB39
LPC_AD0 38,40
DGPU_PWR_EN
R133 *10K_04 C PCH 5/9
F7 AW37
1- USB3.1 Gen2 M/B Charger 35 USB3_TXP1 D11 USB31_1_TXP GPP_A2/LAD1/ESPI_IO1 AV37 LPC_AD1 38,40
35 USB3_RXN1 C11 USB31_1_RXN GPP_A3/LAD2/ESPI_IO2 BA38 LPC_AD2 38,40
35 USB3_RXP1 USB31_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 38,40
C3
D4 USB31_2_TXN BE38
USB31_2_TXP GPP_A5/LFRAME#/ESPI_CS0# LPC_FRAME# 38,40
B9 AW35 SERIRQ 3.3VS
USB31_2_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQA# SERIRQ 38,40
C9 BA36
USB31_2_RXP GPP_A7/PIRQA#/ESPI_ALERT0# BE39 KBC_RST# S4_STATE#
KBC_RST# 27,40 R448 *10K_04
C17 GPP_A0/RCIN#/ESPI_ALERT1# BF38 S4_STATE# PM_CLKRUN# 1 8
USB31_6_TXN GPP_A14/SUS_STAT#/ESPI_RESET# 27,40 PM_CLKRUN#
C16 SERIRQ RN4 2 7 10K_8P4R_04
G14 USB31_6_TXP LPC_PIRQA# 3 6
USB31_6_RXN CLK_PCI_KBC_R 24 Mhz SYS_RESET#
F14 BB36 R134 22_04 PCLK_KBC 40 27 SYS_RESET#
4 5
USB31_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK BB34 CLK_PCI_TPM_R
R135 22_04 PCLK_TPM 38
C15 GPP_A10/CLKOUT_LPC1 TPM
37 USB3_TXN5 USB31_5_TXN
9/22
37 USB3_TXP5
B15
USB31_5_TXP
5- Audio Port 1 37 USB3_RXN5
J13
K13 USB31_5_RXN GPP_K19/SMI#
T48
T47
SMI# SMI# 27,40
37 USB3_RXP5 USB31_5_RXP GPP_K18/NMI#
G12
35 USB3_TXP3 F11 USB31_3_TXP AH40 PCH_MUTE#
35 USB3_TXN3 USB31_3_TXN GPP_E6/SATA_DEVSLP2 T30
C10 AH35 DEVSLP1 34
35 USB3_RXP3 B10 USB31_3_RXP GPP_E5/SATA_DEVSLP1 AL48 12/04
35 USB3_RXN3 USB31_3_RXN GPP_E4/SATA_DEVSLP0 AP47
GPP_F9/SATA_DEVSLP7
3.4- USB3.1 Gen2 Type C 35 USB3_TXP4
C14
B14 USB31_4_TXP GPP_F8/SATA_DEVSLP6
AN37
AN46
35 USB3_TXN4 J15 USB31_4_TXN GPP_F7/SATA_DEVSLP5 AR47 KBLED_DET
B 35 USB3_RXP4 USB31_4_RXP GPP_F6/SATA_DEVSLP4 T111 B
K16 AP48
35 USB3_RXN4 USB31_4_RXN 6 OF 13 GPP_F5/SATA_DEVSLP3
HM370

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
10,16,17,18,51,52,53 1V8_AON
4,9,24,26,27,30,48 3.3VA
[28] PCH 5_6/12-DPP/ESPI/USB3.0
8,9,20,21,22,23,24,26,27,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS Size Document Number Re v
9,20,21,23,37,38,39,40,41,42,51 5VS
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 28 of 63

5 4 3 2 1

PCH 5/9 B - 29
 Schematic Diagrams

PCH 6/9
5 4 3 2 1

C649 15p_50V_NPO_04 PCI-E CLK Usage

1
4
1 ASM x142 USB 3.1
6-07-18034-1A0 5 GLAN
X3 R386 6 WLAN
FSX3M_24MHZ
1M_1%_04 8 PEG(NV)
SPEC: 20PPM 9 SSD (X 4 LANE)

2
3
D D

C636 15p_50V_NPO_04
U34G
BE33
GPP_A16/CLKOUT_48 PCH_XDP_CLK_DN
24 MHz Y3
D7 CLKOUT_ITPXDP Y4 PCH_XDP_CLK_DP
2015.9.11 4 CPU_24MHZ_R_DP CLKOUT_CPUNSSC_P CLKOUT_ITPXDP_P
4 CPU_24MHZ_R_DN
C6
XTAL ᶳ
㕡
ᶵ⎗ 㚱 P OWE RO
R ᾉ 嘇 CLKOUT_CPUNSSC
100 MHz B6 PCH_CPU_PCIBCLK_R_DN 4
32.768KHz ␴
暨 朊ᶵ ⎗ ㇻ V I A
ᶨ
⎴
PC
H CLKOUT_CPUPCIBCLK
4 PCH_CPU_BCLK_R_DP
B8 A6
PCH_CPU_PCIBCLK_R_DP 4
100 MHz
C657 15p_50V_NPO_04 C8 CLKOUT_CPUBCLK_P
CLKOUT_CPUPCIBCLK_P
4 PCH_CPU_BCLK_R_DN CLKOUT_CPUBCLK AJ6
CM200S XTAL24_O U9 CLKOUT_PCIE_N0 AJ7
XTAL24_IN XTAL_OUT CLKOUT_PCIE_P0

3
4
9/27 11/8 R452 U10
XTAL_IN AH9
B.Schematic Diagrams

XCLK_RBIAS T3 CLKOUT_PCIE_N1 AH10

10M_06 R385 60.4_1%_04
32.768KHZ X4 XCLK_BIASREF CLKOUT_PCIE_P1

2
1
6-22-32R76-0B2 CM200C_32.768KHZ RTC_X1 BA49 AE14
6-22-32R76-0BJ RTC_X2 BA48 RTCX1 CLKOUT_PCIE_N2 AE15
RTCX2 CLKOUT_PCIE_P2

Sheet 29 of 60
C661 15p_50V_NPO_04
BF31 AE6
BE31 GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N3 AE7
AR32 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_P3
GPP_B7/SRCCLKREQ2#

PCH 6/9 RTC(10M RES): DON'T CHANGE TO 0402 BB30 AC2

BA30 GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 AC3
LAN_CLKREQ# AN29 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_P4
36 LAN_CLKREQ# WLAN_CLKREQ# AE47 GPP_B10/SRCCLKREQ5# AB2
34 WLAN_CLKREQ# AC48 GPP_H0/SRCCLKREQ6# CLKOUT_PCIE_N5 AB3 CLK_PCIE_GLAN# 36 100 MHz
PEG_CLKREQ# AE41 GPP_H1/SRCCLKREQ7# CLKOUT_PCIE_P5 CLK_PCIE_GLAN 36
C
10 PEG_CLKREQ# AF48 GPP_H2/SRCCLKREQ8# W4 C
3.3VS SSD_CLKREQ# GPP_H3/SRCCLKREQ9# CLKOUT_PCIE_N6 CLK_PCIE_MINI# 34
34 SSD_CLKREQ#
AC41
GPP_H4/SRCCLKREQ10# CLKOUT_PCIE_P6
W3
CLK_PCIE_MINI 34
100 MHz
AC39
12/04 CARD_CLKREQ# AE39 GPP_H5/SRCCLKREQ11# W7
12/04 GPP_H6/SRCCLKREQ12# CLKOUT_PCIE_N7
AB48 W6
PEG_CLKREQ# GPP_H7/SRCCLKREQ13# CLKOUT_PCIE_P7
1 8 AC44
2 7 10K_8P4R_04 SSD_CLKREQ# AC43 GPP_H8/SRCCLKREQ14# AC14
RN1 VGA_PEXCLK# 10
LAN_CLKREQ# GPP_H9/SRCCLKREQ15# CLKOUT_PCIE_N8
3 6
CLKOUT_PCIE_P8
AC15 VGA_PEXCLK 10 100 MHz
4 5 V2
V3 CLKOUT_PCIE_N15 U2
WLAN_CLKREQ# CLKOUT_PCIE_P15 CLKOUT_PCIE_N9
R728 10K_04 U3 9/22
T2 CLKOUT_PCIE_P9
D02_01/05_H CLKOUT_PCIE_N14
T1 AC9
CLKOUT_PCIE_P14 CLKOUT_PCIE_N10 CLK_PCIE_SSD# 34
AC11 100 MHz
AA1 CLKOUT_PCIE_P10 CLK_PCIE_SSD 34
Y2 CLKOUT_PCIE_N13 AE9
CLKOUT_PCIE_P13 CLKOUT_PCIE_N11 AE11
PCIe* 100 MHz AC7 CLKOUT_PCIE_P11
AC6 CLKOUT_PCIE_N12 R6 1 2
CLKOUT_PCIE_P12 7 OF 13 CLKIN_XTAL CLKIN_XTAL_LCP 34
FCM1005KF-121T03 L31
HM370

R469
10K_04 C835
Close to PCH < 1"
5p_50V_NPO_04

12/01
6-07-33524-1A0
B B
D02_12/06_H

A A

VCC_RTC 24,27,30
VDD3 4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
3.3VS 8,9,20,21,22,23,24,26,27,28,32,34,36,37,38,39,40,41,42,47,51,52,53 Title
[29] PCH 7/12-CLKOUT
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 29 of 63

5 4 3 2 1

B - 30 PCH 6/9
 Schematic Diagrams

PCH 7/9
5 4 3 2 1

D D

+VCCRTCEXT
Default
C362
PJ10 U34H
1.05VA
1 2 +VCCMPHY_1P05 5.95A AA22 AW9 0.182A +VCCPHVC_3P3
3.3VA 1u_6.3V_X5R_04
AA23 VCCPRIM_1P051 VCCPRIM_3P32 PLACE 1-3MM FROM
*4mm AB20 VCCPRIM_1P052 BF47 +VCCRTCEXT PACKAGE EDGE
C349 AB22 VCCPRIM_1P053 DCPRTC1 BG47
AB23 VCCPRIM_1P054 DCPRTC2 +VCCPRTC_3P3
R131 *0402_short-p VCC_RTC
1u_6.3V_X5R_04 AB27 VCCPRIM_1P055 V23 0.095A +VCCPUSB2_3P3
VCCPRIM_1P056 VCCPRIM_3P35 3.3VA
AB28 C355 C356
AB30 VCCPRIM_1P057 AN44 0.05A +V3.3A_V1.8A_VCCPSPI
VCCPRIM_1P058 VCCSPI SPI_3.3V
AD20 1u_6.3V_X5R_04 1u_6.3V_X5R_04
AD23 VCCPRIM_1P059 BC49 0.000416A +VCCPRTC_3P3 PLACE 1-3MM FROM PLACE 3-5MM FROM

B.Schematic Diagrams
AD27 VCCPRIM_1P0510 VCCRTC1 BD49 PACKAGE EDGE PACKAGE EDGE
AD28 VCCPRIM_1P0511 VCCRTC2
AD30 VCCPRIM_1P0512 AN21 0.145A +VCCPGPPC_G_3P3 +VCCPHVLDO_3P3
3.3VA R157 *0603_short-p 3.3VA
AF23 VCCPRIM_1P0513 VCCPGPPG_3P3

R89 *0402_short-p
+VCCDUSB_1P05
Default
PJ9
AF27
AF30
VCCPRIM_1P0516
VCCPRIM_1P0517
VCCPRIM_1P0518
VCCPRIM_3P33
VCCPRIM_3P34
AY8
BB7
0.97A +VCCPHVLDO_3P3
C364

1u_6.3V_X5R_04
C358

1u_6.3V_X5R_04
Sheet 30 of 60
1.05VA +V3.3A_V1.8A_VCCPGPPHK

PCH 7/9
1.05VA 1 2 +VCCPRIM_1P05 6.66A U26 AC35 0.262A PLACE 1-3MM FROM PLACE 1-3MM FROM
C313 U29 VCCPRIM_1P0523 VCCPGPPHK1 AC36 PACKAGE EDGE PACKAGE EDGE
*4mm C336 C312 V25 VCCPRIM_1P0524 VCCPGPPHK2
V27 VCCPRIM_1P0525 AE35 0.174A +V3.3A_V1.8A_VCCPGPPEF +V3.3A_V1.8A_VCCPGPPHK
1u_6.3V_X5R_04 R109 *0402_short-p 3.3VA
1u_6.3V_X5R_04 22u_6.3V_X5R_06 V28 VCCPRIM_1P0526 VCCPGPPEF1 AE36
C V30 VCCPRIM_1P0527 VCCPGPPEF2 C333 C
V31 VCCPRIM_1P0528 AN24 0.14A +V3.3A_V1.8A_VCCPGPPD
+VCCDSW_1P05 VCCPRIM_1P0529 VCCPGPPD 1V8_LDO 9/21
*1u_6.3V_X5R_04
1.05VA R94 *0402_short-p +VCCPRIM_FUSE_1P05 0.0012A AD31 AN26 0.343A +V3.3A_V1.8A_VCCPGPPBC
3.3VA
PLACE 1-3MM FROM
C659 VCCPRIM_1P0514 VCCPGPPBC1 AP26 PACKAGE EDGE
R112 *0402_short-p +VCCPRIM_CNV_HVLDO_1P05 0.2A AE17 VCCPGPPBC2
1.05VA VCCPRIM_1P0515 +V3.3A_V1.8A_VCCPGPPEF
1u_6.3V_X5R_04 AN32 0.101A +V3.3A_V1.8A_VCCPGPPA
3.3VA R108 *0402_short-p 3.3VA
PLACE 1-3MM FROM +VCCDUSB_1P05 0.42A W22 VCCPGPPA
PACKAGE EDGE W23 VCCDUSB_1P051 AT44 0.106A +VCCPFUSE_3P3 C334
VCCDUSB_1P052 VCCPRIM_3P31 3.3VA
+VCCCLPLLEBB_1P05 +VCCDSW_1P05 BG45 BE48 0.113A +VCCPDSW_3P3
1.05VA R95 *0402_short-p *1u_6.3V_X5R_04
BG46 VCCDSW_1P051 VCCDSW_3P31 BE49 PLACE 1-3MM FROM
C335 VCCDSW_1P052 VCCDSW_3P32 PACKAGE EDGE
+VCCCLPLLEBB_1P05 0.109A W31 BB14 0.00767A +V3.3A_V1.8A_VCCPAZIO
VCCPRIM_MPHY_1P05 VCCHDA +VCCPDSW_3P3
1u_6.3V_X5R_04 R450 *0402_short-p VDD3
PLACE 1-3MM FROM +VCCAZPLL_1P05 0.015A D1 AG19 0.766A +VCCPRIM_1P8
PACKAGE EDGE VCCPRIM_1P0521 VCCPRIM_1P83 1V8_LDO
E1 AG20 C660
VCCPRIM_1P0522 VCCPRIM_1P84 AN15
+VCCAZPLL_1P05 +VCCAMPHYPLL_1P05 0.213A C49 VCCPRIM_1P85 AR15
1.05VA R357 0_06 1u_6.3V_X5R_04
D49 VCCAMPHYPLL_1P051 VCCPRIM_1P86 BB11 PLACE 1-3MM FROM
C623 E49 VCCAMPHYPLL_1P052 VCCPRIM_1P87 PACKAGE EDGE
VCCAMPHYPLL_1P053 AF19 0.0882A +VCCPHVLDO_1P8
+VCCA_XTAL_1P05 VCCPRIM_1P81 +V3.3A_V1.8A_VCCPAZIO
1u_6.3V_X5R_04 0.00428A P2 AF20 R136 0_06 3.3VA
P3 VCCA_XTAL_1P051 VCCPRIM_1P82
D02_12/25_H VCCA_XTAL_1P052 AF31 0.193A +VCCFHV1_2P 8
1.05VA C357 C363
PLACE 1-3MM FROM W19 VCCPRIM_1P0519 AG31 0.0859A +VCCFHV0_2P 8
PACKAGE EDGE VCCA_SRC_1P051 VCCPRIM_1P0520 1.05VA
1.05VA R98 *0402_short-p +VCCA_SRC_1P05 0.169A W20 *1p_50V_NPO_04 *1p_50V_NPO_04
VCCA_SRC_1P052 AK22 +VCCLDOSRAM_IN_1P24 1V8_LDO
C1 VCCPRIM_1P241 AK23
B +VCCA_OCPLL1_1P05 0.0198A C2 VCCAPLL_1P054 VCCPRIM_1P242 B
+VCCAMPHYPLL_1P05 VCCAPLL_1P055 AJ22 +VCCDPHY_1P24 +VCCPHVLDO_1P8
1.05VA R363 0_06 R110 *0_06
+VCCA_OC_1P05 0.0085A V19 VCCDPHY_1P241 AJ23
VCCA_BCLK_1P05 VCCDPHY_1P242 BG5 +VCCDPHY_1P24_MAR
C627 C626
+VCCA_BCLKPLL2_1P05 0.021A B1 VCCDPHY_1P243 R166 0_06 1.8VA
*22u_6.3V_X5R_06 1u_6.3V_X5R_04 B2 VCCAPLL_1P051 K47 R387 *100_04
D02_12/25_H VCCAPLL_1P052 VCCMPHY_SENSE 1.05VA
B3 K46 R362 *100_04 C350 C351
VCCAPLL_1P053 8 OF 13 VSSMPHY_SENSE
PLACE 1-3MM FROM HM370 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06
+VCCA_XTAL_1P05 PACKAGE EDGE D02_01/31_H
1.05VA R99 0_06 PLACE 1-3MM FROM PLACE 1-3MM FROM
PACKAGE EDGE PACKAGE EDGE
C315
+VCCDPHY_1P24_MAR
*22u_6.3V_X5R_06
C658
+VCCDPHY_1P24 +VCCLDOSRAM_IN_1P24
R120 *0402_short-p
4.7u_6.3V_X5R_06
PLACE 1-5MM FROM
+VCCA_OCPLL1_1P05 PACKAGE EDGE
1.05VA R359 *0402_short-p
11/30
C625

1u_6.3V_X5R_04
PLACE 1-5MM FROM
PACKAGE EDGE

+VCCA_OC_1P05
1.05VA R97 *0402_short-p

A C314 A

1u_6.3V_X5R_04
PLACE 1-3MM FROM 24 1V8_LDO
PACKAGE EDGE 53 1.8VA
4,9,24,26,27,48 3.3VA
1.05VA R88 *0402_short-p
+VCCA_BCLKPLL2_1P05
24 SPI_3.3V
43,48 1.05VA
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C296 4,24,25,27,34,36,37,40,42,43,44,48,50,51,52,53 VDD3 Title
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS [30] PCH 8/12-POWER
1u_6.3V_X5R_04 24,27 VCC_RTC
PLACE 1-5MM FROM Size Document Number Re v
PACKAGE EDGE A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 30 of 63

5 4 3 2 1

PCH 7/9 B - 31
 Schematic Diagrams

PCH 8/9
5 4 3 2 1

U34I U34L
A2 AL12 BG3 M24
A28 VSS_1 VSS_73 AL17 BG33 VSS_145 VSS_196 M32
VSS_2 VSS_74 VSS_146 VSS_197
D A3
A33
A37
VSS_3
VSS_4
VSS_75
VSS_76
AL21
AL24
AL26
BG37
BG4
BG48
VSS_147
VSS_148
VSS_198
VSS_199
M34
M49
M5
M8
M-MARK
M5
M-MARK
M3
M-MARK
M2
M-MARK
D
A4 VSS_5 VSS_77 AL29 C12 VSS_149 VSS_200 N12
A45 VSS_6 VSS_78 AL33 C25 VSS_150 VSS_201 N16
A46 VSS_7 VSS_79 AL38 C30 VSS_151 VSS_202 N34
A47 VSS_8 VSS_80 AM1 C4 VSS_152 VSS_203 N35
A48 VSS_9 VSS_81 AM18 C48 VSS_153 VSS_204 N37
A5 VSS_10 VSS_82 AM32 C5 VSS_154 VSS_205 N38
A8 VSS_11 VSS_83 AM49 D12 VSS_155 VSS_206 P26
AA19 VSS_12 VSS_84 AN12 D16 VSS_156 VSS_207 P29
AA20 VSS_13 VSS_85 AN16 D17 VSS_157 VSS_208 P4
AA25 VSS_14 VSS_86 AN34 D30 VSS_158 VSS_209 P46
VSS_15 VSS_87 VSS_159 VSS_210 M4 M7 M1 M6
AA27 AN38 D33 R12
VSS_16 VSS_88 VSS_160 VSS_211 M-MARK M-MARK M-MARK M-MARK
AA28 AP4 D8 R16
AA30 VSS_17 VSS_89 AP46 E10 VSS_161 VSS_212 R26
B.Schematic Diagrams

AA31 VSS_18 VSS_90 AR12 E13 VSS_162 VSS_213 R29

AA49 VSS_19 VSS_91 AR16 E15 VSS_163 VSS_214 R3
AA5 VSS_20 VSS_92 AR34 E17 VSS_164 VSS_215 R34
AB19 VSS_21 VSS_93 AR38 E19 VSS_165 VSS_216 R38
AB25 VSS_22 VSS_94 AT1 E22 VSS_166 VSS_217 R4
Sheet 31 of 60 AB31
AC12
AC17
VSS_23
VSS_24
VSS_25
VSS_95
VSS_96
VSS_97
AT16
AT18
AT21
E24
E26
E31
VSS_167
VSS_168
VSS_169
VSS_218
VSS_219
VSS_220
T17
T18
T32
VSS_26 VSS_98 VSS_170 VSS_221

PCH 8/9
AC33 AT24 E33 T4
AC38 VSS_27 VSS_99 AT26 E35 VSS_171 VSS_222 T49
AC4 VSS_28 VSS_100 AT29 E40 VSS_172 VSS_223 T5
AC46 VSS_29 VSS_101 AT32 E42 VSS_173 VSS_224 T7
AD1 VSS_30 VSS_102 AT34 E8 VSS_174 VSS_225 U12
AD19 VSS_31 VSS_103 AT45 F41 VSS_175 VSS_226 U15
C AD2
AD22
VSS_32
VSS_33
VSS_104
VSS_105
AV11
AV39
F43
F47
VSS_176
VSS_177
VSS_227
VSS_228
U17
U21 H18 H22 H1 C
AD25 VSS_34 VSS_106 AW10 G44 VSS_178 VSS_229 U24 C111D111N C111D111N C111D111N
AD49 VSS_35 VSS_107 AW4 G6 VSS_179 VSS_230 U33
AE12 VSS_36 VSS_108 AW40 H8 VSS_180 VSS_231 U38
AE33 VSS_37 VSS_109 AW46 J10 VSS_181 VSS_232 V20 H12
AE38 VSS_38 VSS_110 B47 J26 VSS_182 VSS_233 V22 2 4
AE4 VSS_39 VSS_111 B48 J29 VSS_183 VSS_234 V4
AE46 VSS_40 VSS_112 B49 J4 VSS_184 VSS_235 V46 3 1 5
AF22 VSS_41 VSS_113 BA12 J40 VSS_185 VSS_236 W25
AF25 VSS_42 VSS_114 BA14 J46 VSS_186 VSS_237 W27
AF28 VSS_43 VSS_115 BA44 J47 VSS_187 VSS_238 W28 MTH7_0D2_8
AG1 VSS_44 VSS_116 BA5 J48 VSS_188 VSS_239 W30 GND GND
AG22 VSS_45
VSS_46
VSS_117
VSS_118
BA6 J9 VSS_189
VSS_190
VSS_240
VSS_241
Y10 M/B PCH H5 H6
AG23 BB41 K11 Y12 c217d217n c217d217n
AG25 VSS_47 VSS_119 BB43 K39 VSS_191 VSS_242 Y17 H21 H9 H3 H2
VSS_48 VSS_120 VSS_192 VSS_243 2 4 2 4 2 4 2 4
AG27 BB9 M16 Y33
AG28 VSS_49 VSS_121 BC10 M18 VSS_193 VSS_244 Y38
VSS_50 VSS_122 VSS_194 VSS_245 3 1 5 3 1 5 3 1 5 3 1 5
AG30 BC13 M21 Y9
AG49 VSS_51 VSS_123 BC15 VSS_195 12 OF 13 VSS_246
AH12 VSS_52 VSS_124 BC19 HM370
AH17 VSS_53 VSS_125 BC24 MTH7_0D2_8 MTH7_0D2_8 MTH7_0D2_8 MTH7_0D2_8
VSS_54 VSS_126
9/21
AH33 BC26
AH38 VSS_55 VSS_127 BC31 GND GND GND GND GND
AJ19 VSS_56 VSS_128 BC35
AJ20 VSS_57 VSS_129 BC40
AJ25 VSS_58 VSS_130 BC45
AJ27 VSS_59 VSS_131 BC8 H10 H11
H8 H27
AJ28 VSS_60 VSS_132 BD43 H7_5D5_5 H16 H17 H7_0B5_0D2_8
B AJ30
AJ31
VSS_61
VSS_62
VSS_133
VSS_134
BE44
BF1
2
H20
4
H7_0D2_8 H7_0D2_8
C67D67N C67D67N B
AK19 VSS_63 VSS_135 BF2
VSS_64 VSS_136 3 1 5
AK20 BF3
AK25 VSS_65 VSS_137 BF48
AK27 VSS_66 VSS_138 BF49
AK28 VSS_67 VSS_139 BG17 MTH7_0D2_8
AK30 VSS_68 VSS_140 BG2 GND
AK31 VSS_69 VSS_141 BG22 GND GND GND GND
GND
AK4 VSS_70 VSS_142 BG25
AK46 VSS_71 VSS_143 BG28 H7
VSS_72 9 OF 13 VSS_144 H7_5D5_5
H19
HM370 D0_01/03_H Add for Mini DP adjust
2 4 H4

3 1 5 c111d111n

MTH7_0D2_8

GND GND

A A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[31] PCH 9_12/12-VSS,Holes
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 31 of 63

5 4 3 2 1

B - 32 PCH 8/9
 Schematic Diagrams

PCH 9/9
5 4 3 2 1
NO REBOOT STARP
ENABLE: HIGH
(INTERNAL WEAK PD)
3.3VS

U34J
R446 Y14
RSVD7 Y15
RSVD8
D *4.7K_04
LPSS_GSPI0_MOSI RSVD6
U37
U35
D
RSVD5
N32
RSVD3 R32
GPP_B18 RSVD4
AH15
RSVD2 AH14
RSVD1
AL2 PCH_XDP_PREQ#_R
PREQ# AM5 PCH_XDP_PRDY#_R PCH_XDP_PREQ#_R 4
PRDY# AM4 H_TRST#_R PCH_XDP_PRDY#_R 4
CPU_TRST# AK3 PCH_2_CPU_TRIGGER_R R415 30.1_1%_04
H_TRST#_R 4
PCH_2_CPU_TRIGGER 6
TRIGGER_OUT AK2
TRIGGER_IN CPU_2_PCH_TRIGGER 6
10 OF 13

B.Schematic Diagrams
HM370

Sheet 32 of 60
BOOT STARP
SPI:0
LPC:1
(INTERNAL WEAK PD)

PCH 9/9
U34K
LPSS_GSPI1_MOSI
BA26
BD30 GPP_B22/GSPI1_MOSI
AU26 GPP_B21/GSPI1_MISO BA20
GPP_B20/GSPI1_CLK GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
9/21
AW26 BB20
GPP_B19/GSPI1_CS0# GPP_D10/ISH_SPI_CLK/GSPI2_CLK BB16
C LPSS_GSPI0_MOSI BE30
BD29 GPP_B18/GSPI0_MOSI
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
AN18 C
BF29 GPP_B17/GSPI0_MISO
BB26 GPP_B16/GSPI0_CLK BF14
GPP_B15/GSPI0_CS0# GPP_D16/ISH_UART0_CTS#/CNV_WCEN AR18
11/30 BB24 GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN BF17
BE23 GPP_C9/UART0_TXD GPP_D14/ISH_UART0_TXD/I2C2_SCL BE17
AP24 GPP_C8/UART0_RXD GPP_D13/ISH_UART0_RXD/I2C2_SDA
BA24 GPP_C11/UART0_CTS# 9/13 GSYNC
GPP_C10/UART0_RTS# AG45
BD21 GPP_H20/ISH_I2C0_SCL AH46
AW24 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H19/ISH_I2C0_SDA
AP21 GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AU24 GPP_C13/UART1_TXD/ISH_UART1_TXD AH47
DEBUG GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL 12/1
TX -> D+ PLACE AT M/B BOT AH48
AV21 GPP_H21/ISH_I2C1_SDA
RX -> D- GPP_C23/UART2_CTS#
AW21
UART2_TXD BE20 GPP_C22/UART2_RTS# AV34 DGPU_PWM_SELECT#
UART2_RXD GPP_C21/UART2_TXD GPP_A23/ISH_GP5 T45
R443 *0_04 BD20 AW32
GPP_C20/UART2_RXD GPP_A22/ISH_GP4 SATA_PWR_EN 37
BA33
BE21 GPP_A21/ISH_GP3 BE34 3G_CONFIG2
GPP_C19/I2C1_SCL GPP_A20/ISH_GP2 T132
BF21 BD34
BC22 GPP_C18/I2C1_SDA GPP_A19/ISH_GP1 BF35 SB_BLON 12/1
BF23 GPP_C17/I2C0_SCL GPP_A18/ISH_GP0 BD38 SB_BLON 22
GPP_C16/I2C0_SDA GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
BE15
BE14 GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
GPP_D23/ISH_I2C2_SCL/I2C3_SCL 11 OF 13
HM370
B 9/21 Del SB_BLON pull up
B

A A
4,9,24,26,27,30,48 3.3VA ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3
Title
8,9,20,21,22,23,24,26,27,28,29,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS
[32] PCH 10_11/12-UART/I2C/GPIO
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 32 of 63

5 4 3 2 1

PCH 9/9 B - 33
 Schematic Diagrams

M.2 3G Card
5 4 3 2 1

普ᷕ㷔 溆
3G_EN
6-34-P750S-010 3G CARD 3G_3.3V
CURRENT2A㗪,DON'T DROP BELOW 3.135V
GPS_DISABLE#
3G_PWR_EN
3G_3.3V
80 mils
H28
H6_5D3_7 J_3G1 C830 220u_6.3V_6.3*4.4 GND

+
base on common design 75 74 C813 0.1u_10V_X7R_04
73 CONFIG_2 3.3V4 72
LTE GND10 3.3V3
71 70 C814 LTE 0.1u_10V_X7R_04
D 69 GND9 3.3V2 68 D
CONFIG_1 SUSCLK(32Khz)(O) DETECT_SW
67 66 LTE
65 Reset#(O)1.8V SIM Detect(O) 64
63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62 C815
61 ANTCTL2(I)1.8V COEX2(I/O)1.8V 60
59 ANTCTL1(I)1.8V COEX3(I/O)1.8V 58 470p_50V_X7R_04
ANTCTL0(I)1.8V NC1 LTE 䁢1.8 V LEVEL
57 56 HUAWEI MU736㬌PIN
55 GND8 NC0 54 HI: Present
53 REFCLKP PEWake#(IO) 52 䓐NORMA
CONNECTORἧ L CLOSED (㉱GN )
D
GND
51 REFCLKN CLKREQ#(IO) 50
49 GND7 PERST#(O) 48 ⤪ᶵἧ 䓐 婳 䡢娵⺈ ⓮ 㗗 ⏎ 暨 天 P UL L
47 PETp0/SATA-A+ GPIO_4(IO)1.8V 46 HI G H , ⺢
嬘
䶂嶗 䃉 P U L L HIG H 暣 旣
45 PETn0/SATA-A- GPIO_3(IO)1.8V 44
43 GND6 GPIO_2(IO)1.8V 42
41 PERp0/SATA-B- GPIO_1(IO)1.8V 40
B.Schematic Diagrams

39 PERn0/SATA-B+ GPIO_0(IO)1.8V 38
LTE 0.1u_10V_X7R_04 37 GND5 DEVSLP(O) 36 UIM_PWR
C834
25 USB3_TXP7 0.1u_10V_X7R_04 PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) UIM_DATA
LTE C833 35 34
25 USB3_TXN7 PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) UIM_CLK
33 32 C816
GND4 UIM_CLK(I) UIM_RST

Sheet 33 of 60 25
25
USB3_RXP7
USB3_RXN7
BODYSAR_N
31
29
27
25
PERp1/USB3.0-Rx+/SSIC-RxP
PERn1/USB3.0-Rx-/SSIC-RxN
GND3
UIM_RESET(I)
GPIO_8(IO)1.8V
GPIO_10(IO)1.8V
30
28
26
24
GPS_DISABLE#
R691 0_06
LTE
0.1u_10V_X7R_04

M.2 3G Card
3G_WAKE# 23 GPIO_12(IO)1.8V GPIO_7(IO)1.8V 22 LTE GND
Defau l t ᶵ
ᶲẞ LTE 21 GPIO_11(IO)1.8V
CONFIG_0
GPIO_6(IO)1.8V
GPIO_5(IO)1.8V
20 GND
3G_PWR_EN

B KEY HUAWEI MU736 ⎗

㍍⍿ 3.
3
V
C M2B_3GSSD_LED#R C
R692 11 10 T146
9 GND2 GPIO_9/DAS/DSS#(I)(OD) 8
25 USB_PN7 USB_D- W_DISABLE#1(O) PWR_ON_OFF 3G_EN 40
*100_04 7 6 R694 10K_04
25 USB_PP7 USB_D+ Full_Card_Power_Off#(O)1.8V
5 4
PWR_ON_OFF GND1 3.3V1 80 mils
3 2 LTE
GND0 3.3V0 3G_3.3V
1
CONFIG_3
R693 + C823 C818 C817
NFSB0-S6701-TP40
*12K_04 P/N = 6-21-84KD0-075 220u_6.3V_6.3*4.4 10u_6.3V_X5R_06 0.1u_10V_X7R_04
GND PCB Footprint = NXSB0-S67XX-XX40
LTE LTE LTE
LTE
GND GND GND
GND PCB Footprint婳
䡢娵㨇
㥳 ἧ 䓐 䘬 C o n ne ctor

SIM CONN
UIM_PWR
R8 *4.7K_04
UIM_DATA
3G POWER
LTE
J_SIM1 3GLTE
C6 0.01u_16V_X7R_04 3G_3.3V
B B
GND LTE
DETECT_SW (TOP VIEW) >120 mil >120 mil
SW1 C8 4 3
DETECT_SW UIM_MCMD UIM_DATA 3.3V S2 D2
C4 C7
UIM_CLK C3 UIM_DATA UIM_I/O C6 Qb

G2
UIM_RST C2 UIM_CLK UIM_VPP C5 C563 Ca C567
UIM_PWR UIM_RST UIM_GND

GND1
GND2
GND3
GND4
C1 C562 0.1u_10V_X7R_04 Q34A Ra

5
UIM_PWR 1u_6.3V_X5R_04 MTS3572G6 0.1u_10V_X7R_04
LTE LTE R424
LTE LTE
FLY-160429-02 10_06
GND1
GND2
GND3
GND4
C4 C5 Rc
R419
100K_04

D
LTE
*0.1u_10V_X7R_04 *22p_50V_NPO_04
Rb LTE Qa
GND R418 330K_04 G Q35
6-86-2B010-005

6
GND GND 2SK3018S3

S
LTE

D1
LTE
3G_POWER 1 Q34B ADD Ra, Qa Solution For PDA BUG:
40 3G_POWER G1 MTS3572G6 When Battery discharge to shutdown,

S1
the CMOS sometimes loss.
LTE

2
A A

5VS 9,20,21,23,37,38,39,40,41,42,51 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

3.3VS 8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
Title
5V 22,35,37,42,45,46,47,48,49,52,53
3.3V 2,17,22,35,42,43,45,47,48
[33] M.2 3G Card
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 33 of 63

5 4 3 2 1

B - 34 M.2 3G Card
 Schematic Diagrams

M.2 WLAN+BT, SSD

5 4 3 2 1

WLAN+BT 75
73
J_WLAN1

GND13 3.3V3
74
72
40 mil
WLAN_3.3V
24 CNVI_WT_CLK_DP WT_CLKP 3.3V2
71 70 C391 C390
24 CNVI_WT_CLK_DN 69 WT_CLKN PEWAKE1_N 68
67 GND12 CLKREQ1_N 66 C406 22u_6.3V_X5R_06 22u_6.3V_X5R_06
24 CNVI_WT_D0P 65 WT_D0P PERST1_N 64 CLKIN_XTAL_LCP
24 CNVI_WT_D0N 63 WT_D0N REFCLK0 62 CLKIN_XTAL_LCP 29
R168 10K_04 0.1u_10V_X5R_04
61 GND11 IRQ_N(I) 60 WLAN_3.3V
R169 10K_04
24 CNVI_WT_D1P 59 WT_D1P I2C CLK(O) 58
24 CNVI_WT_D1N 57 WT_D1N I2C DATA(IO) 56 12/01
GND10 W_DISABLE1_N(O) WLAN_EN 40 D02_01/31_H
D 27,36 PCIE_WAKE#
R466 *0_04 55 54
BT_EN 40
D02_12/14_H D
53 PEWAKE0_N W_DISABLE2_N(O) 52
29 WLAN_CLKREQ# 51 CLKREQ0_N PERST0_N(O) 50 32Khz BUF_PLT_RST# 25,34,36,38,40
49 GND9 SUSCLK(32Khz)(O) 48 SUS_CLK 27 VDD3
R170 *0_04
29 CLK_PCIE_MINI# 47 REFCLKN0 COEX1_TXD(I/O)1.8V 46 CNVI_MFUART2_RXD 24 D02_01/31_H
R179 *0_04
29 CLK_PCIE_MINI REFCLKP0 COEX2_RXD(I/O)1.8V CNVI_MFUART2_TXD 24 WLAN_3.3V
45 44 R180 *0_04
43 GND8 COEX3(I/O)1.8V 42 CNVI_GNSS_PA_BLANKING 24
26 PCIE_RXN14_WLAN 41 PERN0 CLINK_CLK 40 U13
26 PCIE_RXP14_WLAN PERP0 CLINK_DATA
11/30 >120 mil >120 mil
39 38 5 1
37 GND7 CLINK_RESET 36 VIN VOUT
26 PCIE_TXN14_WLAN 35 PETN0 UART_RTS/BRI_DT 34 CNVI_BRI_DT 24 4
R426 22_04 C387 C389
26 PCIE_TXP14_WLAN 33 PETP0 UART_CTS/RGI_RSP 32 CNVI_RGI_RSP 24 VIN/SS
GND6 UART_TX/RGI_DT CNVI_RGI_DT 24 3 2
1u_6.3V_X5R_04 0.1u_10V_X5R_04

B.Schematic Diagrams
VDD3 EN GND

E KEY UP7553PMA5-25

23 22 R429 22_04 M: NCT3522U -- 6-02-03522-9C0

R183

10K_04
24 CNVI_WGR_CLK_DP
24 CNVI_WGR_CLK_DN

24 CNVI_WGR_D0P
21
19
17
WGR_CLKP
WGR_CLKN
GND5
WGR_D0P
UART_RX/BRI_RSP
UART_WAKE_N
GND4
LED2_N(OD)
20
18
16 9/13 CRB
R442
11/30
71.5K_1%_04
CNVI_BRI_RSP 24
40 WLAN_PWR_EN

㍍
⇘ E C ,枰 冯EC䡢娵
S: AP2821KTR-G1 6-02-02821-9C0
Sheet 34 of 60
15 14
6-34-P750S-010
40 CNVI_DET#
24 CNVI_WGR_D0N

24 CNVI_WGR_D1P
24 CNVI_WGR_D1N
13
11
9
WGR_D0N
GND3
WGR_D1P
PCM_OUT/CLKREQ0
PCM_IN
PCM_SYNC/LCP_RSTN
12
10
8
CNVI_XTAL_CLKREQ

CNVI_RF_RST# 27
27

H33
M.2 WLAN+BT,
L: CNVi 7 WGR_D1N PCM_CLK 6 H6_5D3_7
H: W/O CNVi
25
25
USB_PN14
USB_PP14
5
3
1
GND2
USB_DN
USB_DP
LED1_N(OD)
3.3V1
3.3V0
4
2
40 mil
WLAN_3.3V
R440 75K_1%_04
SSD
GND1
C C
6-13-75021-28B
NFSE0-S6701-TP40
11/30

NGFF_M (M2) SSD (PCIE 4X)

3.3VS
>120 mil
3.3VS
SATAGP0 J_SSD1
H: PCIe R492 C731 C732 C733
L: SATA 75

22u_6.3V_X5R_06
10K_04 73 GND13 74 0.1u_10V_X7R_04 0.1u_10V_X7R_04
71 GND12 3.3V8 72
PCIE_SATA 69 GND11 3.3V7 70
26 SATAGP1 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 GND
NC18 SUSCLK(32Khz)(O) GND GND

M KEY
B
D02_12/14_H B
57 58 SSD_CLKREQ# Pu 10K near to PCH-H.
55 GND10 NC17 56
29 CLK_PCIE_SSD 53 REFCLKP NC16 54
29 CLK_PCIE_SSD# 51 REFCLKN PEWake#(IO) 52
49 GND9 CLKREQ#(IO) 50 SSD_CLKREQ# 29
26 PCIE_TXP12_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 25,34,36,38,40
47 48
26 PCIE_TXN12_SSD 45 PETn0/SATA-A- NC15 46
SATA1_RXN_SSD 43 GND8 NC14 44
R489 *0402_short-p
26 PCIE_RXN12_SSD SATA1_RXP_SSD PERp0/SATA-B- NC13
R488 *0402_short-p 41 42
26 PCIE_RXP12_SSD 39 PERn0/SATA-B+ NC12 40
Reserved GND7 NC11
37 38 R151 *0_04 12/04
26 PCIE_TXP11_SSD 35 PETp1 DEVSLP(O) 36 DEVSLP1 28
26 PCIE_TXN11_SSD PETn1 NC10 VDD3
33 34
31 GND6 NC9 32 3IN1 40
26 PCIE_RXP11_SSD 29 PERp1 NC8 30 80CLK 40
26 PCIE_RXN11_SSD 27 PERn1 NC7 28
25 GND5 NC6 26 3.3VS
26 PCIE_TXP10_SSD 23 PETp2 NC5 24 C693
26 PCIE_TXN10_SSD 21 PETn2 NC4 22
19 GND4 NC3 20 0.1u_10V_X7R_04
26 PCIE_RXP10_SSD 17 PERp2 NC2 18
26 PCIE_RXN10_SSD 15 PERn2 3.3V5 16
13 GND3 3.3V4 14 GND
26 PCIE_TXP9_SSD PETp3 3.3V3
11 12
26 PCIE_TXN9_SSD 9 PETn3 3.3V2 10
7 GND2 DAS/DSS#(I)(OD) 8 M2M_SSD1_LED# 38
26 PCIE_RXP9_SSD 5 PERp3 NC1 6
26 PCIE_RXN9_SSD PERn3 NC0 80 mils >120 mil
3 4 3.3VS
1 GND1 3.3V1 2
A 6-34-W940S-011 GND0 3.3V0 A

C691 C692 C690

H15 H14 H13 NFSM0-S6701-TP40 0.1u_10V_X7R_04 0.1u_10V_X7R_04
22u_6.3V_X5R_06

H6_0B9_0D3_7 H6_0B9_0D3_7 H6_0B9_0D3_7 P/N = 6-21-84KE0-075

GND PCB Footprint = NXSM0-S67XX-XX40
PCB Footprint婳
䡢娵㨇
㥳 ἧ 䓐 䘬 C o n ne ctor
GND GND GND
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
D02_12/14_H [34] M.2 WLAN+BT, PCIE4X SSD
3.3V 2,17,22,33,35,42,43,45,47,48
3.3VS 8,9,20,21,22,23,24,26,27,28,29,32,36,37,38,39,40,41,42,47,51,52,53 Size Document Number Re v
VDD3 4,24,25,27,30,36,37,40,42,43,44,48,50,51,52,53 A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 34 of 63

5 4 3 2 1

M.2 WLAN+BT, SSD B - 35

 Schematic Diagrams

USB Conn, USB Charger

5 4 3 2 1

6-02-75495-9C0
USB3.0 PORT(PORT3) VDD5 USBVCC_CH
80 mil U37
80 mil
R711 *200K_04 5 1
USBVCC3.1_1 D02_01/02_H C662 VIN VOUT
10u_6.3V_X5R_06 2 C366
GND
U159

6
*WUSB3831Q R456 *100K_04 4 3
3831_CC1 R167 *0_04 CHARGER EN# OC# 0.1u_10V_X5R_04
R712 *10K_04 3 1 22,25,40,42,43,45,48 SUSB# Default Low

VBUSD

GND FBVCONN
5V CTRL CC1 U11 9/13 Common Design
3831_CC2 USB_DD_ON# CHARGER uP7549UMA5-20
R708 *10K_04 4 2 R176 *0_04 8 1
ROLE CC2 40,42,44 DD_ON CB PRE#
CHARGER 3.0
USB_PN1 PA_USB1_DN_R
11 7 7 2
SEL OUT1 USB_PP1
TDM DM
PA_USB1_DP_R
D02_01/31_H
D 12 8 6 3 D
5V TDP DP

ID
VDD OUT2 3.3V

GND
C842 C841 5 4 CDP
VDD5 VCC CDP VDD5

10
*0.1u_10V_X7R_04 *4.7u_6.3V_X5R_06 C676 *SLG55593VTR R175

9
5V R709 TDFN8-2X2MM *10K_04
*0.1u_10V_X7R_04 CHARGER
*10K_04
CHARGER
R710 3831_USB_EN 9/13 Common Design
SLG55583VTR : 6-02-55583-9D0 P2P
*10K_04
SLG55593VTR : 6-02-55593-9D0

D
CB Smart CDP
G Q43 pin8 pin4 Function
*2SK3018S3

S
DCP autodetect with
枸
姕䁢 Sour c e ( SR C
)㚨⣏ ⎗ ㍸ὃ 3 A 暣㳩 0 X
B.Schematic Diagrams

mouse/keyboard wake up

1 0 S0 Charging with SDP

1 1 S0 Charging with CDP

Sheet 35 of 60 5V
9/22
J_TYPEC1
UCF3T-21S01-0P11
Y
W/O USB CHARGER
USBVCC3.1_1 A1 B12

USB Conn, C332

10u_6.3V_X5R_06
5
U7
IN OUT

GND
1

2
100 MIL

C348 C347
A_UTXP_SW2_J
A_UTXN_SW2_J A2
A3
GND

TX0_P
TX0_N
GND

RX0_P
RX0_N
B11
B10
USB3_RXP4_J
USB3_RXN4_J D02_01/03_H 42 DD_ON#
DD_ON#
R455 0_04
USB_DD_ON#

A4 B9 USB_PP1 PA_USB1_DP_R

USB Charger
USBVCC3.1_1 VBUS VBUS USBVCC3.1_1 25 USB_PP1 R178 0_04
4 3 0.1u_10V_X5R_04 *0.1u_10V_X7R_04
EN OCB 11/30 TYPEC_CC1 USB_PN1 PA_USB1_DN_R
A5 B8
D02_01/02_H SY6288E1AAC CC1 SBU2 25 USB_PN1 R177 0_04
TYPEC_UDP_J TYPEC_UDN_J
6-02-62881-9C0 TYPEC_UDN_J A6 B7 TYPEC_UDP_J
D02_01/31_H A7 USB2_P_T USB2_N_B B6
USB2_N_T USB2_P_B
C TYPEC_CC2 C
A8 B5 11/30
3831_USB_EN SBU1 CC2
D02_12/05_H USBVCC3.1_1
A9
VBUS VBUS
B4
USBVCC3.1_1
R119 USB3_RXN3_J A_UTXN_SW1_J
0_04 A10 B3
40 CC_EN USB3_RXP3_J RX1_N TX1_N A_UTXP_SW1_J
D02_01/03_H A11 B2
RX1_P TX1_P
A12 B1
GND GND

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
TYPE-C MAIN
_
6-21-B4K30-024
3.3V
D02_12/04_H
USBVCC3.1_1
D02_12/14_H USB3.0/3.1 PORT(PORT3)
C345 22u_6.3V_X5R_06
C331 22u_6.3V_X5R_06
C328 1u_6.3V_X5R_04

4.7K_04 R696

R695
C329 1u_6.3V_X5R_04
C330 1u_6.3V_X5R_04 3831_CC1
C327 1u_6.3V_X5R_04 R706 *0_04
3831_CC2

4.7K_04
R707 *0_04
D35 To Con.
TYPEC_CC1 USB3_TXP1_R
R704 0_04 1 10 11/30 C679 0.1u_10V_X7R_04 USB3_TXN1_R
40 CC1_DET TYPEC_CC2 28 USB3_TXP1
R705 0_04 2 9 C683 0.1u_10V_X7R_04
40 CC2_DET 28 USB3_TXN1
3 8 TYPEC_UDN_J D02_12/14_H
0_04 4 7 9/13 Common Design
ER2 TYPEC_UDP_J
5 6
C665 22u_6.3V_X5R_06
USBVCC_CH GND
1 2 DT1140-04LP-7
25 USB_PN3
B 4 3 B
25 USB_PP3 C677 22u_6.3V_X5R_06
EL23 GND
D02_01/02_H
0_04
ER4
close to connector 6-19-41001-286 J_USB1
*WCM2012F2S-161T03 D41 USB3_TXP1_R
ER1 0_04 9 GND1
SSTX+ SHIELD

Standard-A
6-19-41001-286 10 1
USB3_TXN1_R 1
VBUS
PA_USB1_DP_R 9 2 8 GND3
4 3 8 3 2 SSTX- SHIELD
USB_PP1R USB_PP1RJ D-
PA_USB1_DN_R EL24 USB_PN1R 7 4 USB_PN1RJ 4
1 2 6 5 3 GND
*WCM2012F2S-161T03 6 D+ GND4
D02_01/04_H To Con. To Con. SSRX+ SHIELD
DT1140-04LP-7 USB3_RXP1 7
ER3 0_04 5 GND_D GND2
USB3_RXP3_J 28 USB3_RXP1 USB3_RXN1 SSRX- SHIELD
USB3_RXP4_J 28 USB3_RXP3 C866 0.33u_6.3V_X5R_04 28 USB3_RXN1
28 USB3_RXP4 C865 0.33u_6.3V_X5R_04
C107NC-90939-L GND
USB3_TXP1_R 㒢
㓦月 役 C O NN . USB3_RXP1
D34 _ ESDPSA0402V12 D18 _ ESDPSA0402V12 USB3_TXN1_R USB3_RXN1
2 1 R724 220K_1%_04 2 1 R725 220K_1%_04 GND

1
1

1
USB3_RXN4_J D42 D40 D44 D43
28 USB3_RXN4 C867 0.33u_6.3V_X5R_04
USB3_RXN3_J TEA10402V15A0 TEA10402V15A0
28 USB3_RXN3 C868 0.33u_6.3V_X5R_04 TEA10402V15A0
D36 _ ESDPSA0402V12 TEA10402V15A0

2
2

2
2 1 R726 220K_1%_04

D17 _ ESDPSA0402V12
2 1 R727 220K_1%_04 D02_12/04_H

A_UTXP_SW2_J
C352 0.1u_10V_X7R_04
28 USB3_TXP4
A_UTXP_SW1_J
_ C664 0.1u_10V_X7R_04
D15 2 1 ESDPSA0402V12 28 USB3_TXP3
A D39 _ ESDPSA0402V12 A

A_UTXN_SW2_J 2 1
C353 0.1u_10V_X7R_04
28 USB3_TXN4
A_UTXN_SW1_J
C663 0.1u_10V_X7R_04
28 USB3_TXN3
_
D16 2 1 ESDPSA0402V12 D37 _ ESDPSA0402V12
2 1 2,17,22,33,42,43,45,47,48 3.3V
22,37,42,45,46,47,48,49,52,53 5V
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS
42,44 VDD5
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[35] USB3.0 CON, USB CHARGER
Size Document Number Re v

Custom
SCHEMATIC1 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 35 of 63

5 4 3 2 1

B - 36 USB Conn, USB Charger

 Schematic Diagrams

Card Reader / LAN RTL8411B

5 4 3 2 1

Crystal 䓐 HSX32 1S(3. 2X2. 5X0. 65)

㓡
meet realtek Freq tolerance 50ppm
LAN (RTL8411B) 6 IN 1 SOCKET - MMC / RSMMC
- SD / mini SD / SDHC / SDXC
J_CARD-REV1
RSET R194 2.49K_1%_04 Switching Regulator close to PIN48 SD_D2/MS_CLK_R P9
SD_DATA2
XTAL1 SD_D3/MS_D3_R P1
Gary_For common design VDD10 SD_DATA3
R246 10K_04 AVDD33 SD_CMD/MS_D2_R P2
SD_CMD

AVDD33
FOR S5 WAKE UP ON LAN

VDD10
P3
D TO SB PCH WAKE#. VDD10 SD_VSS1
D
R247 *0402_short-p P4
PCIE_WAKE# 27,34 (>20mil)
R217 1M_04 XTAL2 VCC_CARD SD_VDD
TO EC8587 PIN123 LAN_WAKEUP# SD_CLK/MS_D0_R P5
1 2 LAN_WAKEUP#
SD_CLK

SD_CD#
LAN_WAKEUP# 27,40 C435 C436

XTAL2
XTAL1
4 3 P6
SD_VSS2

*0.1u_10V_X7R_04
6-06-75140-068

0.1u_10V_X5R_04
X1 FSX3L 25MHZ SD_D0/MS_D1_R P7
C440 PCBfootprint: C441 SD_DATA0
HSX321G SD_D1_R
6p_50V_NPO_04 P8
6p_50V_NPO_04 SD_DATA1
48
47
46
45
44
43
42
41
40
39
38
37
GND1
6-07-06064-1A0 U19 BIOS pulls high or low to GPO pin, MS_BS/SD_WP# P10 GND1 GND2
Pkease refer to LAN/PHY Disable SD_WP GND2
HV_GIGA
RSET
LV_CEN
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED_CR
LANWAKEB
LED1/GPO
LED2
Application Note. GND3
49 SD_CD#

B.Schematic Diagrams
SPEC:30PPM P11 GND3 GND4
E_PAD
SD_C/D GND4
11/30 R242 1K_04 3.3VS CM2S-061-H-N
REG_OUT PCB Footprint = SD-10395-001-3

LAN_MDIP0 1 36
(>20mil)
R243
15K_1%_04 6-21-A4450-111 Sheet 36 of 60
LAN_MDIN0 MDIP0 REG_OUT
VDD10 ⼭E M I䡢
娵⬴ , 㓡 SH O R T
VDD10 LAN_MDIP1
LAN_MDIN1
2
3
4
5
MDIN0
AVDD10
MDIP1
VDDREG
ENSWREG
VDD1
35
34
33
32
ENSWREG
D3V3

VDD10
Remind that R109 using the
main power (S0 power). SD_CMD/MS_D2
SD_D0/MS_D1
SD_D1
R228
R192
R191
0_04
0_04
0_04
崘ℏ Ⰼ . SD_CMD/MS_D2_R
SD_D0/MS_D1_R
SD_D1_R
Card Reader /
LAN_MDIP2 MDIN1 VD33 AVDD33 SD_D2/MS_CLK SD_D2/MS_CLK_R

VDD10
LAN_MDIN2

LAN_MDIP3
6
7
8
MDIP2
MDIN2
AVDD10
ISOLATEBPIN
PERSTBPIN
CLKREQBPIN
31
30
29
ISOLATEB

CLKREQB
MS_BS/SD_WP#
BUF_PLT_RST# 25,34,38,40
R241 0_04 LAN_CLKREQ# 29
SD_CLK/MS_D0
SD_D3/MS_D3
R240
R215
R239
0_04
0_04
0_04
SD_CLK/MS_D0_R
SD_D3/MS_D3_R LAN RTL8411B

C434
9 28
C
LAN_MDIN3 10 MDIP3 QFN48 MS_BS/SD_WP# 27 VDD33/18
LAN_CLKREQ#⤪
ᶵἧ䓐⎗㕟 攳
,㕤 P C H 䪗 䚜 ㍍PUL LD O WN
9/13 Common Design C
11 MDIN3 DV33_18 26 RTL8411B_HSON
AVDD33 C446 0.1u_10V_X7R_04
HV_GIGA HSON RTL8411B_HSOP PCIE_RXN15_GLAN 26

*5p_50V_NPO_04
3.3VS
12 25 C445 0.1u_10V_X7R_04
VDD3 HSOP PCIE_RXP15_GLAN 26
capacitors must be close to pin side.
SD_CMD/MS_D2
SD_CLK/MS_D0

SD_D2/MS_CLK

C415
SD_D0/MS_D1

SD_D3/MS_D3

Close to chip
REFCLK_N
CARD_3V3

REFCLK_P

0.1u_10V_X5R_04
VDDTX
SD_D1

PIN12
HSIN
HSIP

RTL8411B AVDD33
13
14
15
16
17
18
19
20
21
22
23
24

6-03-08411-032 R244
SD_CMD/MS_D2
SD_CLK/MS_D0

SD_D2/MS_CLK

D02_01/31_H VDD3
SD_D0/MS_D1

SD_D3/MS_D3

CARD_3V3 CLK_PCIE_GLAN# 29 *0603_short-p

C419 C448 C416
CLK_PCIE_GLAN 29
EVDD10
SD_D1

VCC_CARD 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04

PCIE_TXN15_GLAN 26 D02_01/05_H
PCIE_TXP15_GLAN 26 PULL HIGH: SWR Mode
60 mil PIN11 PIN32 PIN48
6-07-10611-2G0
D3V3
C437 C444
VDD33/18 ENSWREG R229 *0402_short-p R245
VDD10 VDD10 VDD10 VDD10 CARD_3V3
0.1u_10V_X5R_04 10u_6.3V_X5R_06
PULL LOW: LDO Mode *0603_short-p LDO Mode
C418 C417 C449 C420 C447 C414
慷
䓊
䡢 娵 LDO M O D E O K ⼴,
B 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04 Near Cardreader CONN 㓡S H O R T暞 ẞ B
EVDD10
PIN3 PIN8 PIN32 PIN46 PIN27 PIN13 R216
D02_01/31_H
VDD10
䔞攱 ho
斄 t暣 㸸 /
s D㉼ ㍺㗪 , V CC_ C
C
A
R AR
D *0402_short-p C438 C439

GIGA LAN (RTL8411) L22

暣⡻ㅱ Ỷ 㕤0.5ặ䈡 , 㚨⮹暨 天 1 ms 㛇 攻 VDD3 meet rising time
>1ms 0.1u_10V_X5R_04 1u_6.3V_X5R_04

4 3 J_RJ_1 PIN20 PIN20

LAN_MDIP0 12 13 1 GND1
LMX1+ L21 DLMX1+
LAN_MDIN0 TD4+ MX4+ DA+ shield
11 14 LMX1- 1 2 *WCM2012F2S-161T03-short DLMX1- 2 GND2
LAN_MDIP1 TD4- MX4- DA- shield
9 16 LMX2+ 4 3 DLMX2+ 3
LAN_MDIN1 TD3+ MX3+ DB+
8 17 LMX2- L20 DLMX2- 6
TD3- MX3- DB-
1 2 *WCM2012F2S-161T03-short 0.2_06
4 3
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3
6
5
3
TD2+
TD2-
TD1+
MX2+
MX2-
MX1+
19
20
22
LMX3+
LMX3-
LMX4+
1
4 3
L19
2 *WCM2012F2S-161T03-short DLMX3-
DLMX4+
DLMX3+ 4
5
7
DC+
DC-
DD+
LAN POART CARD_3V3
R193

6-14-0R23F-01B-1
0.2R_5%_06
VCC_CARD

2 TD1- MX1-
23 LMX4- L18 DLMX4- 8
1 2 *WCM2012F2S-161T03-short DD-
10 15 NMCT_4
40 mil 130456-571
7 TCT4 MCT4 18 NMCT_3
4 TCT3 MCT3 21 NMCT_2 6-20-B4P30-008
1 TCT2 MCT2 24 NMCT_1
TCT1 MCT1
GST5009 LF
C538
A A
0.01u_16V_X7R_04
NMCT_R
R283 75_1%_04
R282 75_1%_04
R281 75_1%_04 4,24,25,27,30,34,37,40,42,43,44,48,50,51,52,53 VDD3
R280 75_1%_04 2,17,22,33,35,42,43,45,47,48
8,9,20,21,22,23,24,26,27,28,29,32,34,37,38,39,40,41,42,47,51,52,53
3.3V
3.3VS
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
C521 Title
[36]CARD READER/ LAN RTL8411B
1013 100PF 2KV 1206
modify ℙ
䓐䶂嶗 Size Document Number Re v
A3 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 36 of 63

5 4 3 2 1

Card Reader / LAN RTL8411B B - 37

 Schematic Diagrams

HDD, Click TP, Audio, Hall Con.

5 4 3 2 1

FOR SUPPORT OPTANE project, SATA HDD≈POWER 暣

GATEING嶗 HDD CONNECT1 (MASTER)
5VS Default SATA_5VS
PJ49 1 2 *OPEN-3mm

Gary_for OPTANE control 2.5A

9
U39

8
2.5A SATA_5VS 6-20-43790-122
J_HDD1 Gen3
C689 C688 VIN VOUT C681 C680 S1
S2 JHDD_SATA_TXP4
7 C728 0.01u_16V_X7R_04 SATA_TXP4 26
VOUT S3 JHDD_SATA_TXN4
C727 0.01u_16V_X7R_04

*10u_6.3V_X5R_06

*10u_6.3V_X5R_06

*10u_6.3V_X5R_06

*10u_6.3V_X5R_06
D SATA_TXN4 26 D
6 S4
VOUT SATA_5VS S5 JHDD_SATA_RXN4
C726 0.01u_16V_X7R_04 SATA_RXN4 26
JHDD_SATA_RXP4
5 S6 C725 0.01u_16V_X7R_04 SATA_RXP4 26
VOUT S7
*M5938BRD1U 3.3VS

P1
R465 P2
P3
*220_06 P4
32 SATA_PWR_EN 1 2 2 4 5V P5
OPEN_4mil EN VBIAS BY ἧ䓐䘬廠↢暣 ⡻ 婧㔜 , P6
B.Schematic Diagrams

PJ50 ὅ≇䌯 ( 旣ῤ& ⊭ 墅 ⣏ ⮷ ) P7

P8
R467 NC1 P9 SATA_5VS

D
Q40 NC2 P10

Sheet 37 of 60 *10K_04 C682

SUSB G
P11
P12
C684 C694 C687 C686

A
20,21,23,42 SUSB P13
*MTN2002ZG3

*1u_6.3V_X5R_04

S
ON

0.1u_10V_X7R_04

1u_6.3V_X5R_04

22u_6.3V_X5R_06

22u_6.3V_X5R_06
D45 P14

HDD, Click TP, *RB0540S2

50887-0220A-H01
P15

C
Audio, Hall Con. 11/03 1
GATE GND
3 P/N = 6-20-43790-122
PCB Footprint = 50887-0220A-XXX

㓦暣徜 嶗 枸䔁 ᶵᶲ
C C685 PIN GND1~2=GND C

*0.1u_10V_X7R_04 D02_12/14_H

Hall Sensor Finger FOR AUDIO BOARD 5V

D02_02/26_A
3.3VS GND
_

N85 N87 5V
C405
*0.1u_10V_X5R_04

GND2
40

PCB Footprint = FP201-040X1-0M

J_HALL1 J_HALL2 J_FP1
39
VDD3 1 VDD3 1 1 38
2 2 11/24 2 37
LID_SW# 3 LID_SW# 3 3 USB_PN10 25 36
22,40 LID_SW# 4 4 4 USB_PP10 25 35 D02_01/03_H
FP226H-004S10M *FP226H-004S10M FP226H-004S10M 34
33
32 0_04
ER9
31
30 USB_PP5_A
B 29 USB_PN5_A D02_01/03_H USB_PN5_A 1 2 B
28 USB_PN5 25
27 USB_PP5_A 4 3
USB3_RXP5 28 USB_PP5 25

CLICK PAD 26
25
24
23
USB3_RXN5

USB3_TXN5
28

28
ER10
EL27
0_04

22 USB3_TXP5 28
USB_PP6_A *WCM2012F2S-161T03
3.3VS 21
20 USB_PN6_A
D02_01/31_H 19 D02_01/03_H
18
C316 C299 C317 17 0_04
ER7
R91 R90 16
0.1u_10V_X5R_04 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 15
DT1140-04LP-7 14 USB_PN6_A 1 2
J_TP1 10K_04 10K_04 USB_PN6 25
13
6 TP_DATA_J 10 1 12 USB_PP6_A 4 3
5 TP_CLK_J TP_DATA 40 11 USB_PP6 25
9 2 EL26
4 TP_CLK 40 10 HP_SENSE 39
8 3
3 SMB_DATA_J SMB_DATA_R 9 MIC1_L_M MIC_SENSE 39 ER8 0_04
7 4 C298 C297 MIC1_L_M 39
2 SMB_CLK_J SMB_CLK_R 8 MIC1_R_M
6 5 MIC1_R_M 39
1 47p_50V_NPO_04 47p_50V_NPO_04 7
HEADPHONE-L 39 *WCM2012F2S-161T03
FP225H-006S10M 6
D14 5 HEADPHONE-R 39
11/30 3.3VS 4
3

GND1
6-24-40001-003
3.3VS 2
3.3VS 3.3VS 1 AUDG
A A
J_AUD1
FP201H-040S10M

Q38B R383 Q38A R384

AUDG
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
G5

G2

MTDK3S6R 2.2K_04 Gary_Change footprint MTDK3S6R 2.2K_04

3 4 SMB_DATA_R 6 1 SMB_CLK_R Title

22,35,42,45,46,47,48,49,52,53 5V
9,27,45 SMB_DATA 9,27,45 SMB_CLK
9,20,21,23,38,39,40,41,42,51 5VS [37]HDD,CLICK TP,AUDIO,HALL CON.
4,24,25,27,30,34,36,40,42,43,44,48,50,51,52,53 VDD3
D

2,17,22,33,35,42,43,45,47,48 3.3V Size Document Number Re v

8,9,20,21,22,23,24,26,27,28,29,32,34,36,38,39,40,41,42,47,51,52,53 3.3VS A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 37 of 63

5 4 3 2 1

B - 38 HDD, Click TP, Audio, Hall Con.

 Schematic Diagrams

LED, CCD, TPM, Power SW Con.

5 4 3 2 1

NGFF B & M KEY

LED ⤪PCI E SSD L E D⭂
L E D ≽ἄ㗪炻婳䓐㬌 䶂 嶗
佑 ⎴ SAT A
TPM 2.0 (SLB9665TT)
婳EC 復
↢ầ S S D
PIN24
LED≽ἄ䘬㊯䣢 炻德 忶 A P忂䞍 B IOS ⛐ ⏲ 䞍EC ↢≽ἄ

3.3VS U21 3.3VS

26 5
28,40 LPC_AD0 23 LAD0 VDD1 10
TC7SZ08FU
28,40 LPC_AD1 LAD1 VDD2
5

D 20 19 D
28,40 LPC_AD2 LAD2 VDD3
1 17 24 C442 C451 C452 C713
LED_HDD# 4 EC_SSD_LED# 40 28,40 LPC_AD3 LAD3 VDD4 TPM TPM TPM TPM
2 21 TPM 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
SATA_LED# 26 28 PCLK_TPM LCLK
A C D21 22
3

M2M_SSD1_LED# 34 28,40 LPC_FRAME# BUF_PLT_RST# LFRAME#

U24 RB751S-40H 16
25,34,36,40 BUF_PLT_RST# 9 LRESET#_1
LRESET#
6-52-55001-021 27 LRESET#_2
28,40 SERIRQ SERIRQ
GREEN YELLOW D27 R231 4.7K_04
TPM_PP 7 6 TPM_GPIO
R496 220_04 A C LED_HDD# TPM PP GPIO 9/13 Common Design
3.3VS
HDD LED

B.Schematic Diagrams
1
RY-SP190YG34-5M 2 NC_1
3 NC_2
GREEN YELLOW D26 8 NC_3
C AIRPLAN_LED# NC_4
3.3VS
R497 220_04 A

RY-SP190YG34-5M
AIRPLAN_LED# 40
12
13
14
NC_5
NC_6
GND_1
GND_2
4
11
18 Sheet 38 of 60
6-52-55001-021 Airplane mode 15 NC_7
NC_8
GND_3
GND_4
25

Asserted before entering S4

28
NC_9
SLB9665TT_5.61
LED, CCD, TPM,
LPC reset timing: TPM

LED_BAT_CHG
9/27 R269 220_04 1
D25
2
GREEN/YELLOW LPCPD# inactive to LRST# inactive 32~96us
HI: ACCESS
Power SW Con.
40 LED_BAT_CHG GND
TPM_PP LOW: NORMAL ( Internal PD )
C
*DT1140-04LP-7
SG
Y
BAT LED LRESET# R249 *0_04
BUF_PLT_RST# C

LED_BAT_FULL
R270 220_04 3 4 GND GPS! ҂ ٰ ё ᡂ୏
ૈ
40 LED_BAT_FULL 1 10
2 9 RY-SP155HYYG4-1
3 8
GND
4 7
GND 6-52-55002-04E
LED_ACIN 5 6 D28 GREEN/YELLOW
40 LED_ACIN
R267 220_04 1 2 GND

LED_PWR
D24

SG
Y
POWER ON LED
R268 220_04 3 4 GND
40 LED_PWR
RY-SP155HYYG4-1

CCD+DMIC CCD_PWR
D02_01/05_H
3.3VS 5VS
CCD_PWR
D02_01/05_H
N87Hx LED BOARD POWER SWITCH BOARD
ED1 ED2
3.3VS U1
1
1

1A 4 1
1A 48 mil ED3
VIN VOUT
Close to J_CCD2

1
5
*AVL18S02015
*AVL18S02015

C11 VIN
Close to J_CCD1

*AVL18S02015
C12
B 3 2 B
1u_6.3V_X5R_04
EN GND
2
2

2.2u_6.3V_X5R_04
UP7553PMA5-25 *AVL18S02015

2
D1 2 1 FP226H-004S10M
*FP225H-012S10M
40 CCD_EN LED_HDD# 3.3VS 1
R2 *1K_04
AIRPLAN_LED# 12 2
5VS LED_BAT_FULL 11 3
LED_BAT_CHG 10 40,42 M_BTN# 4
MIC_DATA_L LED_PWR 9 J_SW1
5 mil L14 HCB1005KF-121T20 NC1
39 MIC_DATA MIC_CLK_L LED_ACIN 8
5 mil L15 HCB1005KF-121T20 J_CCD2
39 MIC_CLK 7 NC2
C494 C493 6
1 5
D-MIC: mount L35 & L36 47p_50V_NPO_04 47p_50V_NPO_04 2 J_CCD1 4
C630 & C631 => 47p_50V_NPO_04 3 GND 3
USB_PN8_J USB_PN8_J

A-MIC: mount R414

C630 => 100p_50V_NPO_04
3.3VS
USB_PP8_J
4
5
6
7
3.3VS
USB_PP8_J
1
2
3
4
3.3VS
2
1
J_LED1 N875 LED BOARD
MIC_DATA_J 8 MIC_DATA_J 5
MIC_CLK_J 9 MIC_CLK_J 6
10 7 3.3VS For N875
11 8 J_LED2
12 85204-08001
1 3.3VS
*50208-01201-001
EMC12 EMI, Close to connector 2
3
DT1140-04LP-7 *0.01u_16V_X7R_04 4
A A
*FP226H-004S10M
1 10 USB_PN8_J 6-21-64D00-112 N870
25 USB_PN8 2 9 USB_PP8_J
25 USB_PP8 3 8
GND GND PCB Footprint = 50208-012xx-xxx_r GND
MIC_DATA_L
4 7 MIC_DATA_J
MIC_CLK_L 5 6 MIC_CLK_J
D02_12/01_H
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
D29 Title
22,35,37,42,45,46,47,48,49,52,53
9,20,21,23,37,39,40,41,42,51
5V
5VS
[38]LED,CCD,TPM,POWER SW CON.
6-24-40001-003 4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3
D02_12/05_H Size Document Number Re v
2,17,22,33,35,42,43,45,47,48
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,39,40,41,42,47,51,52,53
3.3V
3.3VS
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 38 of 63

5 4 3 2 1

LED, CCD, TPM, Power SW Con. B - 39

 Schematic Diagrams

Audio Codec ALC269 VC2

5 4 3 2 1

PCB Footprint㚜㎃ ALC26 9 VC2-QFN48-6 X 6M

AUDIO CODEC ALC269 VC2
EMI Require L13
Layout note:
PVDD1_2 HCB1005KF-121T20 5VS
GND and AUDG space is
D02_01/31_H 1 2 60mils ~ 100mils
DVDD_IO
R265 *0402_short-p
For 3.3V HDA Link. C490 C475
D R258 *0402_short-p R257 *0402_short-p D
3.3VS_AUD 10u_6.3V_X5R_06 0.1u_10V_X5R_04

C712 0.1u_10V_X7R_04 C473 C457 PIN39 PIN39

C836 0.1u_10V_X5R_04 10u_6.3V_X5R_06 0.1u_10V_X5R_04

3.3VS L26 3.3VS_AUD ANALOG DIGITAL
HCB1005KF-121T20 PIN9 PIN9 C476 C491
AUDG 1 2 10u_6.3V_X5R_06 0.1u_10V_X5R_04 5VS_AUD L25
D02_01/31_H HCB1005KF-121T20 5VS
C729 C472 C474 PIN46 PIN46 6-19-31001-247

1u_6.3V_X5R_04
1 2
*0.1u_10V_X7R_04 10u_6.3V_X5R_06 0.1u_10V_X5R_04

C
B.Schematic Diagrams

PD# Control C709 C708 C724 C723 C489

PIN1 PIN1 D23
AZ_RST# For 3.3V HDA 0.1u_10V_X7R_04 10u_6.3V_X5R_06 0.1u_10V_X7R_04 10u_6.3V_X5R_06

*ZD5231BS2
D02_02/26_A PIN38 PIN38
Link De-pop PIN25 PIN25 AUDG AUDG
6-06-00543-020

A
D02_01/31_H AUDG AUDG
FOR LAYOUT D46

39
46

25
38
1

9
BAT54AS3 U40
AZ_RST#_R
2 Close to Codec

DVDD1

DVDD-IO

PVDD1
PVDD2

AVDD1
AVDD2
CODEC_PD# SENSE_A MIC_SENSE

Sheet 39 of 60 3 4 13
A
R480 20K_1%_04
PD# Sense A MIC_SENSE 37
1 C
40 KBC_MUTE# LINE2_L HP_SENSE
A
14 R479 39.2K_1%_04
LINE2-L LINE2_R HP_SENSE 37
SPKOUTL+ 40 15

Audio Codec SPKOUTL-

SPKOUTR-
41

44
SPK-L+
SPK-L-

SPK-R-
LINE2-R

MIC2-L
MIC2-R
16
17
SPKOUTR+ 45

ALC269 VC2
C SPK-R+ SENSE_B C
18
47 Sense-B Close to Codec MIC1_VREFO_R
HDA_RST# For 1.5V T140 EAPD R481 2.2K_04
48 EAPD/COMBO 19 MIC1_VREFO_L
JDREF R478 20K_1%_04 R482 2.2K_04
HDA Link De-pop SPDIFO JDREF 20 MONO_OUT AUDG
MIC_DATA 2 MONO-OUT MIC1_L_M
38 MIC_DATA MIC_CLK GPIO0-DMIC-DAT MIC1_L_C MIC1_L
3 21 C711 4.7u_6.3V_X5R_06 R477 1K_04 MIC1_R_M MIC1_L_M 37
38 MIC_CLK GPIO1-DMIC-CLK MIC1-L MIC1_R_C MIC1_R
22 C710 4.7u_6.3V_X5R_06 R476 1K_04 MIC1_R_M 37
MIC1-R
Closed to SB. 䴙
ᶨ NE T N A ME DIGITAL
AZ_SDOUT_R
ANALOG LINE1-L
23 LINE1_L
LINE1_R
R490 33_04 5 24 C715 0.1u_10V_X7R_04
27 HDA_SDOUT SDATA-OUT LINE1-R
C720 22p_50V_NPO_04
AZ_BITCLK_R 6 27 CODEC_VREF
R485 33_04 C716 1u_6.3V_X5R_04
27 HDA_BITCLK BIT-CLK VREF
AZ_SDIN0_R 8 28 LDO_CAP
R484 33_04 C714 *100p_50V_NPO_04
27 HDA_SDIN0 SDATA-IN LDO_CAP MIC1_VREFO_R 9/13 Common Design
30
AZ_SYNC_R 10 MIC1-VREFO-R 29 MIC2_VREFO
R483 33_04 C707 10u_6.3V_X5R_06
27 HDA_SYNC SYNC MIC2-VREFO
AZ_RST#_R 11 32
R491 33_04 HEADPHONE-L
27 HDA_RST# RESET# HP-OUT-L HEADPHONE-L 37
33 HEADPHONE-R
BEEP_R HP-OUT-R HEADPHONE-R 37
12 AUDG

MIC1-VREFO-L
PCBEEP 35 CODEC_CBN
C722 2.2u_6.3V_X5R_04
C718 CBN
36 CODEC_CBP
D47
PC BEEP

DVSS2
D02 11/8

PVSS1
PVSS2

AVSS1
AVSS2
BAT54CS3 0.1u_10V_X7R_04 CBP 34

GND
1 A OPVEE
40 KBC_BEEP BEEP_C J_SPK1
C 3 BEEP R487 6.49K_1%_04 C717 C721
2 A 2 1
27 PCH_SPKR

42
43

49

26
37

31
FOR VOLUMN *100p_50V_NPO_04 ALC269Q-VC2-GR 2.2u_6.3V_X5R_04
B R486 C719 B
ADJUST SPKOUTL+_L
85204-0200N
6-06-00543-021 SPKOUTL+ L30 . 0_06
4.7K_04 100p_50V_NPO_04 AUDG 2 NC1
MIC1_VREFO_L C736 1 NC2
Thermal Pad place 9 AUDG
J_SPKL1
Via hole. *180p_50V_NPO_04

3.3VS_AUD SPKOUTL-_L
SPKOUTL- L27 . 0_06
6-20-43130-102
Thermal Pad Via Hole Max C730

5VS *180p_50V_NPO_04

20ms
SPKOUTR+_R
AZ_RST#
SPKOUTR+ L28 . HCB1608KF-800T30
85204-0200N
C734
2 NC1
180p_50V_NPO_04
PD# 1 NC2
J_SPKR1
SPKOUTR-_R
SPKOUTR- L29 . HCB1608KF-800T30
Dpefd! ! Tqfblfs! nffu! Q)SNT*! y! 91&
Tqfd/JG! Tqfblfs! ኱ ྗ ф ౗ ε ‫! ܭ‬Q\SNT^ y 9
1 &
- C735
A EMI 180p_50V_NPO_04 A
Ѹ ໪ ࿶җTqfb lfs!Wfo e p s!ᇡё/
D02_11/30_H

Speaker wire length less than 8000mils , It don't need LC Filter.

SPKOUTR+,R-,L+,L- Trace width
9,20,21,23,37,38,40,41,42,51
2,17,22,33,35,42,43,45,47,48
5VS
3.3V
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,40,41,42,47,51,52,53 3.3VS Title
Speaker 4 ohm------> 30mils, Via hole----->C40D20. [39]AUDIO CODEC ALC269 VC2
Speaker 8 ohm------> 20mils, Via hole----->C40D20. Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 39 of 63

5 4 3 2 1

B - 40 Audio Codec ALC269 VC2

 Schematic Diagrams

KBC-ITE IT8587
5 4 3 2 1

IT8587 KBC_AVDD
L12
ILy!tfsjbmt!nvtu!cf!tuvggfe-!Cvu!offe!up! ejtdsjnjobuf! O96! ps! O98
VDD3
D02_01/31_H HCB1005KF-121T20
. VDD3
IKy!tfsjbmt!bsf!gbdupsz!pqujpo-!boe!offe! up! ejtdsjnjobuf! O96! ps! O98
C466 C481 C482 C424
C425
10u_6.3V_X5R_06 0.1u_10V_X5R_04 0.1u_10V_X5R_04 0.1u_10V_X5R_04
0.1u_10V_X5R_04

C479
Connect VAULE FOR REFERENCE BY PROJECT
OPTION (⎗
ẍ
嬲≽ὅEC ㍸ ὃ䘬 E X E C L 堐)

3.3VS
0.1u_10V_X5R_04 KBC_AGND
D02_01/31_H
N850 N870 㛒
䚖
⛐ E X E CL堐
⇵䓐䵈刚
ᷕ䘬≇傥⎗ẍ冒 埴 ␥ ⎵
⫿ 橼 ẋ 堐 ⎗ OPT I O N
U22B
D 24 24 R220 D

114
121
127
1

11

26
50
92

74
J_KB1 J_KB1 J_KB2 J_KB2 AUTO_LOAD_PWR 10K_04
U22A

3
85208-24051 *85208-24051 76 OPTION 100
27 SUS_PWR_ACK# GPJ0/TACH2 OPTION 5VT/SSCE0#/GPG2 VDD3

VBAT
VCC

AVCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
10 58 KB-SI0 4 KB-SI0 4 OPTION
28,38 LPC_AD0 9 GPM0/LAD0 KSI0/STB# 59 5 5
KB-SI1 KB-SI1 OPTION
28,38 LPC_AD1 8 GPM1/LAD1 KSI1/AFD# 60 KB-SI2 6 KB-SI2 6 78 56
28,38 LPC_AD2 7 GPM2/LAD2 KSI2/INIT# 61 KB-SI3 8 KB-SI3 8 27 ME_WE GPJ2/DAC2//TACH0B
OPTION KSO16/SMOSI/GPC3 57 KB-SO16 41
28,38 LPC_AD3 13 GPM3/LAD3 KSI3/SLIN# 62 KB-SI4 11 KB-SI4 11 KSO17/SMISO/GPC5
OPTION KB-SO17 41
28 PCLK_KBC 6 GPM4/LPCCLK KSI4 63 KB-SI5 12 KB-SI5 12 OPTION
28,38 LPC_FRAME# GPM5/LFRAME#
LPC KSI5 IT8587
5 64 KB-SI6 14 KB-SI6 14 VBATT_BOOST# OPTION
28,38 SERIRQ 22 GPM6/SERIRQ KSI6 65 KB-SI7 15 KB-SI7 15 71
25,34,36,38 BUF_PLT_RST# GPD2/LPCRST#/5VT KSI7 16 VBATT_BOOST# 72 GPI5/ADC5/DCD1# OPTION 68
KBC_WRESET# K/B MATRIX 35 CC2_DET GPI6/ADC6/DSR1# GPI2/ADC2 CC1_DET 35 12/01
R250 100K_04 14 36 KB-SO0 1 KB-SO0 1
VDD3 WRST# KSO0/PD0
C465 0.1u_10V_X7R_04 37 KB-SO1 2 KB-SO1 2 12/01
126 KSO1/PD1 38 KB-SO2 3 KB-SO2 3
4 GPB5/GA20 KSO2/PD2 39 KB-SO3 7 KB-SO3 7 OPTION 96
50 AC_IN# GPB6/KBRST# KSO3/PD3 SMC_VGA_THERM 5VT/ID3/GPH3 DGPU_PWR_EN 17,28
16 40 KB-SO4 9 KB-SO4 9 SMD_VGA_THERM 115 OPTION OPTION 97
38 LED_ACIN 20 GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4 41 KB-SO5 10 KB-SO5 10 16,41 SMC_VGA_THERM 116 GPC1/SMCLK1/5VTOPTION OPTION 5VT/ID4/GPH4 98 WLAN_EN 34
27 AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5 16,41 SMD_VGA_THERM GPC2/SMDAT1/5VT OVERT# 16
OPTION 42 KB-SO6 13 KB-SO6 13
17,28 GC6_FB_EN
118 OPTION 5VT/ID5/GPH5
KSO6/PD6 43 KB-SO7 16 KB-SO7 16 GPF7/SMDAT2/PECIRQT#
OPTION
23 KSO7/PD7 44 KB-SO8 17 26 KB-SO8 17 26 11/30 OPTION 82
27,28 SMI# GPD3/ECSCI#/5VT KSO8/ACK# 5VT/EGAD/GPE1 RGB_KB-DET SUS_WARN# 27
15 45 KB-SO9 18 25 KB-SO9 18 25 24 OPTION OPTION 83
26 SCI# GPD4/ECSMI# KSO9/BUSY 46 KB-SO10 19 KB-SO10 19 38 EC_SSD_LED# GPA0/PWM0/5VT OPTION 5VT/EGCS#/GPE2 84 RGB_KB-DET 41

B.Schematic Diagrams
KSO10/PE CPU_FAN_PWM 5VT/EGCLK/GPE3 CNVI_DET# 34
77 DAC 51 KB-SO11 20 KB-SO11 20 EC_EN 28 OPTION VGA_FANSEN
39 KBC_MUTE# GPJ1 KSO11/ERR# 52 21 21 29 GPA2/PWM2/5VTOPTION OPTION 48
KB-SO12 KB-SO12 VGA_FAN_PWM
KSO12/SLCT 53 KB-SO13 22 KB-SO13 22 30 GPA3/PWM3/5VTOPTION TACH1/TMA1/GPD7 119
IT8587 KSO13
KSO14
54 KB-SO14 23 KB-SO14 23 CPU_FAN
GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PWRGD 4,22,25,47
55 KB-SO15 24 KB-SO15 24 KBLIGHT_ADJ 79 OPTION 2
KSO15 N850_WHITE GPJ3/DAC3/TACH1B 3G_POWER 33
BAT_DET ADC VGA_FAN 80 OPTION CK32KE/GPJ7 128
66 41 KBLIGHT_ADJ 81 GPJ4/DAC4/DCD0# CK32K/GPJ6 SLP_SUS# 43,48,53
BAT_VOLT N870_WHITE
GPI0/ADC0 GPJ5/DAC5/RIG0#
67
69 GPI1/ADC1
6-20-94AF0-124
R251 10K_04
2 THERM_VOLT 70 GPI3/ADC3 D02_01/03_H IT8587E/FX
50 TOTAL_CUR GPI4/ADC4 106
MODEL_ID 6-03-08587-0P4
CCD_EN 38
IT8587E/FX 5VT/SSCE1#/VCEN/TM/GPG0

Sheet 40 of 60
73
GPI7/ADC7/CTS1# 6-03-08587-0P4
107
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 3G_EN 33
SMBUS MODEL_ID RA RB Voltage
C R219 47_04 110 C
50 SMC_BAT 111 GPB3/SMCLK0/5VT 95
R234 47_04 N85 10K_1% X 3.3V

KBC-ITE IT8587
50 SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN 22
EC_PECI
117 R252 10K_04 N87 X 10K_1% 0V
GPF6/SMCLK2/PECI 35
5VT/RTS1#/GPE5 17 EC_RSMRST# 27
5VT/LPCPD#/GPE6 KBC_RST# 27,28
CPU_FANSEN
PWM 47
25 TACH0A/GPD6 VDD3
39 KBC_BEEP 31 GPA1/PWM1/5VT 120
38 LED_BAT_CHG
RA
32 GPA5/PWM5/5VT TMRI0/GPC4 124
38 LED_BAT_FULL 34 GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PWROK 25
SEQUENCE
憅
⮵ S U S C#⎓
愺 ≽
ἄ HW⮵
䫾, ⃰ 枸 䔁 MODEL_ID CHANGE R204 10K_04
38 LED_PWR GPA7/PWM7/RIG1#/5VT
1. NORMAL, 㬋
ⷠ
┇ ≽ 䡢娵㗗 ⏎SW⮵䫾⎗ẍ⃳ 㚵 CHANGE R203 *10K_04
PS/2 123
80CLK 85 CTX0/TMA0/GPB2 LAN_WAKEUP# 27,36 㬍H
SUSC#_PCH LOW, DD_ON & EC_EN⎴ I RB
34 80CLK 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT
34 3IN1 GPF2/PS2CLK1/DTR0#/5VT 19 VDD3
86 5VT/L80HLAT/BAO/GPE0 SWI# 26 2. SUSC#_PCH⃰HI ⎓愺EC 㗪 ,
42,44 USB_CHARGE_EN 88 GPF1/PS2DAT0/TMB1/5VT
OPTION
DD_ON HI, EC_EN DELAY 30ms⛐HI VDD3
34 BT_EN GPF3/PS2DAT1/RTS0#/5VT 112
OPTION
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 CC_EN 35 11/30 LIGHT_KB_DET#
89 U18 RGB_KB-DET R205 *100K_04
37 TP_CLK 41 LIGHT_KB_DET#

5
90 GPF4/PS2CLK2/5VT 93 TC7SZ08FU R199 *100K_04
37 TP_DATA GPF5/PS2DAT2/5VT 5VT/CLKRUN#/ID0/GPH0 SUSB#_PCH PM_CLKRUN# 27,28 EC_EN
99 SUSC#_PCH 1
5VT/ID6/GPH6 94 SUSB#_PCH 27 4 SMC_BAT
WAKE UP 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 SUSC#_PCH 27 SUSC#_PCH SUSC# 45,48 R218 1.5K_04
18 2 VDD3 SMD_BAT
42 PWR_SW# 21 GPD0/RI1# SUSB#_PCH BAT_DET R232 1.5K_04
22,37 LID_SW# GPD1/RI2#/5VT
ALSPI_CE#
PCH SUSC#_PCH VBATT_BOOST# R221 10K_1%_04
R206 10K_04

3
101 D02_12/06_H D02_11/29_H
5VT/FSCE#/GPG3 ALSPI_MSI HSPI_CE# 24 C
GP INTERRUPT 102 ALSPI_MSO AC
33 5VT/FMOSI/GPG4 103 HSPI_MSI 24 50 BAT_DET
27 PWR_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 ALSPI_SCLK HSPI_MSO 24 D20 A
105 VDD3
5VT/FSCK/GPG7 HSPI_SCLK 24 BAV99 RECTIFIER
UART C
108 104 U17 AC

R44

R43
34 WLAN_PWR_EN AIRPLAN_LED# 38

5
109 GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 TC7SZ08FU 50 BAT_VOLT
VDD3 4 H_PROCHOT_EC GPB1/TXD/SOUT0/5VTOPTION D19 A
SUSC#_PCH 1
BAV99 RECTIFIER
SUSB#_PCH SUSB#_PCH 4
SUSB# 22,25,35,42,43,45,48
1

4.7K_04

4.7K_04
125 2 AC_IN#
VCORE

35,42,44 DD_ON GPE4/PWRSW EC BAT_VOLT C478 0.1u_10V_X7R_04

AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7

EC_EN C426 1u_6.3V_X5R_04

R200 DD_ON
SMC_VGA_THERM CPU_FAN
C706 0.1u_10V_X7R_04

3
B B
10K_04 SMD_VGA_THERM C453 *5p_50V_NPO_04
12

1
27
49
91
113
122

75

KBC_MUTE# EC_PECI
R233 33_04
H_PECI 4

C480

R201 0.1u_10V_X7R_04 CPU_FANSEN

*10K_04 R336 4.7K_04
3.3VS
KBC_AGND
R202
*0402_short-p VGA_FANSEN
R273 4.7K_04

⇌us b c har ge r≇ 傥 ,
㕟
Pull low 㗪, 㚱, pul l hi g h
㗪㰺 㚱
KBC_AGND
For debug only
DEBUG PORT VDD3
VGA PWM FAN 3IN1 4
5VS_VGA_FAN 80CLK 3
J_FAN3 2
R274 *0402_short-p 1
5VS 1
2 J_80DEBUG1
C518 C519 Del DC Fan 85205-04001
10u_6.3V_X5R_06 10u_6.3V_X5R_06 3
4
PCB Footprint = 85205-0400M
85204-04001
PCB Footprint = 85205-0400M PWR_SW1
CPU PWM FAN CPU_FAN VGA_FAN_PWM
VGA_FAN
D02_12/06 3
4
TJE-532-Q-T/R
1
2 M_BTN# 38,42
5VS_CPU_FAN C517 100p_50V_NPO_04
J_FAN4 Del DC Fan VGA_FANSEN

5
6
5VS R300 *0402_short-p
A 1 A
C555 C553 2 C522 100p_50V_NPO_04
10u_6.3V_X5R_06 10u_6.3V_X5R_06 3
4
85204-04001 D02_12/06
PCB Footprint = 85205-0400M
CPU_FAN_PWM

CPU_FANSEN
C554 100p_50V_NPO_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title

C552 100p_50V_NPO_04
22,27,42,43,44,45,46,47,49,50,51,52 VIN [40]KBC-ITE IT8587
9,20,21,23,37,38,39,41,42,51 5VS Size Document Number Re v
4,24,25,27,30,34,36,37,42,43,44,48,50,51,52,53 VDD3
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,41,42,47,51,52,53 3.3VS Custom SCHEMATIC1 6-71-N85J0-D01 D02B

Dat e: Friday, March 02, 2018 Sheet 40 of 63

5 4 3 2 1

KBC-ITE IT8587 B - 41
 Schematic Diagrams

RGB KB Only
5 4 3 2 1

Ly!tfsjbmt!nvtu!cf!tuvggfe-!Cvu!offe!up!ejtdsjnjobuf!O96!ps!O98
D
Ky!tfsjbmt!bsf!gbdupsz!pqujpo-!boe!offe!up!ejtdsjnjobuf!O96!ps!O98 D

N 8 5 ᶲẞ
RGB KB Only ㌱ PJ3
㊧ 暨
3 layou
t

5VS
㲐シt
a ce ⮔ ⹎
r

2A
PCB Footprint = 87151-1207G_R-1
P/N = 6-20-94A20-112
87151-1207G

3.3VS 12
B.Schematic Diagrams

11
U35 KBZONE1_R 10
C369
27 3 KBZONE1_B KBZONE1_G 9
VCC OUT0 4 KBZONE1_R 4.7u_25V_X5R_08 KBZONE1_B 8

Sheet 41 of 60 OUT1 5 KBZONE1_G P65 KBZONE2_R 7

31 OUT2 KBZONE2_G 6
A0 KBZONE2_B KBZONE2_B 5
32 6
C655 1 A1 OUT3 8 KBZONE2_R KBZONE3_R 4
R423 J_KB1_1

RGB KB Only 0.1u_10V_X7R_04 10K_04 2

12
13
A2
A3
NC
NC1
OUT4
OUT5

OUT6
9

10
KBZONE2_G

KBZONE3_B
KBZONE3_R
40
40
KB-SO16
KB-SO17
KB-SO16
KB-SO17
P65
1
2
KBZONE3_G
KBZONE3_B
3
2
1
28 11 NC1 J_KBLED1
NC2 OUT7 14 KBZONE3_G RGB_KB-DET 3 NC2
24 OUT8 40 RGB_KB-DET 4 M:6-20-94K50-012
25 RESET# 15 FP215H-004S1BM S:6-20-94K60-012
16,40 SMC_VGA_THERM SCL OUT9
C
16,40 SMD_VGA_THERM
26
SDA OUT10
16
17
ᶲ
㍍妠 C O N N PCB Footprint = 85201-0405R
6-20-94A30-004
ᶳ
㍍妠 C O N N C
29 OUT11
30 NC3 19
C656 7 NC4 OUT12 20
GND OUT13

E_PAD
1000p_50V_X7R_04 18 21
23 GND1
GND2
OUT14
OUT15
22

TLC59116FIRHBR
N 8 7 ᶲẞ

33
PCB Footprint = 87151-1207G_R-1
㌱ PJ3
㊧ 暨
3 layou
t 㲐シt
a ce ⮔ ⹎
r P/N = 6-20-94A20-112
*87151-1207G
5VS 2A 12
TLC59116FIRHBR 11
KBZONE1_R 10
C370
KBZONE1_G 9
4.7u_25V_X5R_08 KBZONE1_B 8
P67 KBZONE2_R 7
KBZONE2_G 6
J_KB2_1 KBZONE2_B 5
KBZONE3_R 4
P67
KBZONE3_G 3
KB-SO16
1 KBZONE3_B 2
KB-SO17
2 NC1 1
RGB_KB-DET 3 NC2 J_KBLED2
4
*FP215H-004S1BM M:6-20-94K50-012
PCB Footprint = 85201-0405R S:6-20-94K60-012

B
ᶲ
㍍妠 C O N N 6-20-94A30-004 ᶳ
㍍妠 C O N N B

Used for 15" 䘥⃱ Used for 17"

KBC LED CONTROL
5VS
KBCLED 1
U9
8 5VS_KBC
KBC_LED
2 FON GND 7 J_KBC_LED2
3 VIN GND 6
5VS_KBC VOUT GND 6
C359 4 5
VSET GND C319 5
0.1u_10V_X5R_04 NCT3940S-A *10u_6.3V_X5R_06 4
LIGHT_KB_DET# 3
N870_WHITE
D02_01/31_H 2
1
40 KBLIGHT_ADJ
*50541-00601-002

5VS_KBC
KBC_LED N870_WHITE
A
J_KBC_LED1
6-20-94K40-106 A

6
C318 5
10u_6.3V_X5R_06 4
N850_WHITE
LIGHT_KB_DET# 3
2 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
1 Title
50541-00601-002 22,27,42,43,44,45,46,47,49,50,51,52 VIN [41] RGB KB Only
N850_WHITE 9,20,21,23,37,38,39,40,42,51 5VS
40 LIGHT_KB_DET# 2,17,22,33,35,42,43,45,47,48 3.3V Size Document Number Re v
6-20-94K40-106 4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3 SCHEMATIC1 6-71-N85J0-D01 D02B
A3
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,42,47,51,52,53 3.3VS
Date : Friday, March 02, 2018 Sheet 41 of 63
5 4 3 2 1

B - 42 RGB KB Only
 Schematic Diagrams

5V, 5VS, 3.3V, 3.3VS, 3.3VA

1 2 3 4 5

VDD3 EMI EMI

DD_ON# SUSB D02_11/29_H
VDD3

VIN
VIN VIN VIN

PR136 PR323
D02_02/26_A
10K_04 100K_04 VIN VA VIN1 C592 C130 C471
DD_ON# M E D I O N 烉S t u f f C1
SUSB

1000p_50V_X7R_04
0.01u_50V_X7R_04

0.01u_50V_X7R_04
DD_ON# 35 SUSB 20,21,23,37
C455 C456 C454 O t h e r 烉U n s t u f f

1000p_50V_X7R_04
D

D
PQ9 PQ8
PC93
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06
A G 2SK3018S3 PC92 G 2SK3018S3 A
35,40,44 DD_ON 22,25,35,40,43,45,48 SUSB# *0.1u_10V_X7R_04
S

S
*0.1u_10V_X7R_04
PR143 PR135 Clost to P2808B0
100K_04 100K_04

D02_11/29_H
VIN1
U20

B.Schematic Diagrams
R237 10K_04 1 8
VA VA VIN1
DDON_LATCH DD_ON
R238 1_1%_06 2 7 R235 100K_04
VIN VIN DD_ON_LATCH

38,40 M_BTN#
R236

R224
10K_04

*100K_04
3

4
M_BTN#

INSTANT-ON
PWR_SW#

GND
6

5
R223

R222
10K_04

1K_1%_04
VDD3

PWR_SW# 40
Sheet 42 of 60
40,44 USB_CHARGE_EN
R225 1K_1%_04 P2808B0
5V, 5VS, 3.3V,
VDD5

1 2
D02_02/26_A
VDD5
3.3VS, 3.3VA
B PJ19 C477 U23 G5016 C461 B
*3mm
*0.1u_10V_X5R_04 1 6 0.1u_10V_X5R_04

5V 6A
2

13
IN1
IN1
IN2
IN2
7

8 6AD02_01/31_H
5VS
5V OUT1 OUT2 5VS
14 9
C460 OUT1 OUT2 C450
R259 12 10 R230
0.1u_10V_X5R_04 CT1 CT2 0.1u_10V_X5R_04
*100_04 *100_04

VBIAS
GND

GND
EN1

EN2
C459 C458
220p_50V_NPO_04 470p_50V_X7R_04 Q16
D

D
VDD3_R VDD3_R
Q19 VDD3 PR142 10K_04 1 2 2 1 *2SK3018S3
3

15

11

5
DD_ON# G G
*2SK3018S3 PJ20 *CV-40mil PJ16 *CV-40mil SUSB
R260 R248
S

S
10K_04 10K_04
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB#
VDD5
PJ21 *1mm C464 C463 C462 PJ15 *1mm
Default 1u_6.3V_X5R_04 Default
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04
ON
SUSB#_EN 48

ON

C D02_01/31_H C
D02_02/26_A
VDD3 VDD3
C484 U25 G5016 C488

*0.1u_10V_X5R_04 1 6 0.1u_10V_X5R_04

6A
2 IN1
IN1
IN2
IN2
7

6A
3.3VS
3.3V 3.3V
C467
13
14 OUT1
OUT1
OUT2
OUT2
8
9
C470
3.3VS

12 10
CT1 CT2 R256
0.1u_10V_X5R_04 0.1u_10V_X5R_04
*100_04
VBIAS

R255
GND

GND
EN1

EN2

C468 C469
*100_04
220p_50V_NPO_04 330p_50V_X7R_04
D02_01/31_H D02_01/31_H Q18
3

15

11

D
D

*2SK3018S3
Q17 D02_12/07_H
R266 G
DD_ON# SUSB
G *2SK3018S3 10K_04
DD_ON_EN SUSB#_EN

S
VDD3 R264 10K_04
S

C485 C486 C487

1u_6.3V_X5R_04
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04

D D

44 VIN1
50 VA
22,27,43,44,45,46,47,49,50,51,52
6,8,9,45,48
VIN
VDDQ ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
35,44 VDD5 Title
4,24,25,27,30,34,36,37,40,43,44,48,50,51,52,53
22,35,37,45,46,47,48,49,52,53
VDD3
5V
[42] 5V,5VS,3.3V,3.3VS,3.3VA
9,20,21,23,37,38,39,40,41,51 5VS Size Document Number Re v
2,17,22,33,35,43,45,47,48
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,47,51,52,53
3.3V
3.3VS A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 42 of 63

1 2 3 4 5

5V, 5VS, 3.3V, 3.3VS, 3.3VA B - 43

 Schematic Diagrams

VDD1.0V, VCCIO
1 2 3 4 5

VDD1_EN
PJ17
TON_P1U1
1A VIN
9/19 power
PR138 100K_04 1 2 PR308 820K_1%_06
VDD3
OPEN PC99 PC255
*CV-40mil PC100
1.05VA

4.7u_25V_X7R_08

4.7u_25V_X7R_08
09/06

0.1u_25V_X7R_06
PU4 + +
Default
PJ18 PR141 PC98
PR139 0_04 1 2 0_06 0.1u_10V_X7R_04 PQ38
40,48,53 SLP_SUS#
OPEN 15 13 QM3004M3 6A

5
5
5
5
*CV-40mil EN_PSV BST
VREG5
DH_PU1 PR149 0_06
PC94 16 12 4 V1.05A
PR140 *0_04 9/12 TON DH PL19 1.05VA
VTT_SELECT VTT VR Output Voltages PJ53

1
2
3
53 1.8VA_PGD 0.01u_16V_X7R_04
LX_PU1 BCIHP0730-3R3M
low 1.1 V 1 11 2 1 1 2
A high (V1.1S_VTT) 1.05 V PR311 VOUT LX O.C.O 12A PCB Footprint = BCIHP0735A SHORT A

C
2.2_04

PC250
PC254
VCC_PU1 ILIM_PU1 PR148 PQ41 *3mm

5
5
5
5
2 10 4.02K_1%_04 QM3006M3 PD20 Default
VCC ILIM EMC22 PR307 *0_12
VFB_PU1 4 *1000p_50V_X7R_04 +
PC96

22u_6.3V_X5R_08
CSOD140BSH
3 9

390uF_2.5V_10m_6.3*6
VREG5

A
1
2
3
VFB VDD

M-SOD123
for EMI
1u_6.3V_X5R_04
DL_PU1 9/12
4 8
PGOOD DL EMR14 9/12
*5.1_06

VDD1.05A_PWRGD
6
AGND PGND
7
17
PC97 20mils-40mils
PGND 1u_6.3V_X5R_04
VDD3

NC

NC
PR147
10K_04
B.Schematic Diagrams

14
G5602R41U

PR145
45.3K_1%_04 0.75V * (1+(40.2K/100K)) = 1.05V

Sheet 43 of 60 PC95 *15p_50V_NPO_04

D02_02/07_H D02_01/03_H

VDD1.0V, VCCIO PR146

100K_1%_04

24,48 GPP_J1_C10#
PR109
3.3_06
09/06 VIN
R162

0_04
VCCIO
PC231 PC225 PC232 PC82

9
PU14

10u_25V_X5R_08

10u_25V_X5R_08

0.1u_25V_X7R_06
B 0.22u_10V_X5R_04 B
PL15 VCCIO

BST
MODE
LP#
BCIHP0735-R68M PJ46 *4mm
1
VIN SW
8
PCB Footprint = BCIHP0735A
7A VCCIO_R
1 2

6-19-41001-234 PC220 PC237 PC238 PC233 PC234 PC235 DEFAULT SHORT

9/12

330uF_2V_5*5*4.2

22u_6.3V_X5R_08

22u_6.3V_X5R_08

22u_6.3V_X5R_08

0.1u_25V_X7R_06

0.1u_25V_X7R_06
D02_02/26_A PR288
VDD3 12 +
Power 9/8
*0.1u_10V_X5R_04 C365 NB681GD-Z VOUT *100_04
PJ8 *CV-40mil
U10 PR111 100K_04 1 2 5

1
VDD3 EN
TC7SZ08FU

5
PJ56
VIN PJ57 D02_12/06_Henry
1 *1mm
45 DDR 1.35V_PWRGD 4 1 2

2
0
2 PJ44 *1mm
22,25,35,40,42,45,48 SUSB#
3.3V PC83 1 2
VCC
3.3V 3.3V DEFAULT SHORT *1mm 2 VCCIO_SENSE 6

3
PGND
D02_12/06_Henry *0.01u_50V_X7R_04 PR289
0
C1_VCCIO_VR PR110 0_04 PJ45 *1mm
PR122 PR123 3 0_04 1 2
C1 11 VSSIO_SENSE 6
EN AGND
*20K_04 20K_04
0 C1_VCCIO_VR C0_VCCIO_VR AGND_VCCIO Default
PR121 10K_04 4 AGND_VCCIO
C0
1mS

3V3
3.3V

PG
LP # C0_VCCIO_VR
PR120 10K_04 3.3V
LP# Masked Area
0

13

10
Soft Start <240uS
Vo PR119 PR287 PR290

0 20K_04 10K_04 5.1_06

25 VCCIO_PWRGD
PG PG Keep high during
LP#=0 period if no fault PC226
C occurs AGND_VCCIO C
0
1u_6.3V_X5R_04

PG on immediately PG off once EN off

once Vo is settled
AGND_VCCIO

LP # C1 C0 V CCI O EN LP # OUTP UT PG

0 X X 0V 0 0 0 V, Off LOW

1 0 0 0.85V 0 1 0 V, Off LOW

1 0 1 0.875V Normal turn on Asserted when

and fall to LP# output reaches
1 0 target value after nominal voltage
1 1 0 0.95V PG + 1 ms and remains high
during LP# = 0

1 1 1 0.975V 1 1 HI G H Remains asserted

after SS

D D

1.05VA 30,48
VCCIO 2,6 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
VDD3 4,24,25,27,30,34,36,37,40,42,44,48,50,51,52,53
Title
VIN 22,27,42,44,45,46,47,49,50,51,52
VDD5 35,42,44
[43] VDD1.0V, VCCIO
1.05_VCCST 4,6,26,47,48 Si ze Document Number Rev
VREG5 44
5V 22,35,37,42,45,46,47,48,49,52,53 A2 SCHEMATIC1 6-71-N85J0-D01 D02B
3.3V 2,17,22,33,35,42,45,47,48
Dat e: Friday, March 02, 2018 Sheet 43 of 63

1 2 3 4 5

B - 44 VDD1.0V, VCCIO
 Schematic Diagrams

VDD3, VDD5
5 4 3 2 1

PR312 PR316

78.7K_1%_04 78.7K_1%_04

D02_02/21_H

EN_5V
PC105
VIN
9/19 power 1000p_50V_X7R_04

20
5A

2
D PU16 D

3.48A VREG3 PC262 PC104

EN2

VFB2

CS2

CS1

VFB1

EN1
VIN PC103

1
*4.7u_25V_X7R_08

4.7u_25V_X7R_08
PC101 PC256 PC264 PC257

0.1u_25V_X7R_06
PC102 14 + + + +

VDD3 *4.7u_25V_X7R_08
VO1

4.7u_25V_X7R_08

*EEEFZ1E101P

*EEEFZ1E101P
0.1u_25V_X7R_06
+ + PC260

2
1u_6.3V_X5R_04 3 7
PQ39 VREG3 PGOOD PQ40
QM3004M3 PC258 PC261 QM3004M3
11.96A
12.67A PR318 0_06 9
VBST2 VBST1
17 PR319 0_06
VDD5

5
5
5
5

5
5
5
5
VDD3 0.1u_10V_X7R_04
0.1u_10V_X7R_04 9/19 power
4 PR150 0_06 10 16 PR310 0_06 4 Default VDD5
SYS3V PL17 DRVH2 DRVH1 PL18 SYS5V
PJ52 PJ55

3
2
1

1
2
3
BCIHP0730-4R7M BCIHP0730-2R2M

B.Schematic Diagrams
2 1 2 1 8 18 2 1 1 2
SW2 SW1
SHORT SHORT
*6mm PC265 PC251 PQ42 PQ43 *6mm
R1

C
5
5
5
5

5
5
5
5
+
PC259

Default QM3006M3 11 15 QM3006M3 EMC13 PC263

GND PAD
C

DRVL2 DRVL1
0.1u_10V_X7R_04

220u_6.3V_6.3*4.4

220u_6.3V_6.3*4.4
PD7 PD19 1000p_50V_X7R_04 PR309
R1

VREG5
+
4 4 PC252 30K_1%_06 PC253

VCLK
VIN
9/25 Power PR313 *1000p_50V_X7R_04 0.1u_10V_X7R_04

CSOD140BSH
3
2
1

1
2
3
*100p_50V_NPO_04

13K_1%_06 for EMI

CSOD140BSH

Sheet 44 of 60

A
EMR6
A

21

12

13

19
5.1_06 9/25 Power
TPS51275B-1RUKR R2
R2
C PR314 PR317
200K_04
PR315
19.1K_1%_06 C VDD3, VDD5
19.1K_1%_06

PR151
Vout=2*(1+R1/R2)
Vout=2*(1+R1/R2)
=2*(1+13K/20K) VIN1 VREG5

=3.3 PD8
PC106 =2*(1+30K/19.1K)
2.2_06
VIN C A
PC266 1u_6.3V_X5R_04
=5.1927
4.7u_25V_X5R_08
RB751S-40H

B B

VREG5

R271 Qpxfs! po! WEE40WEE6! QXN

10K_04

VREG5
EN_3V5V EN_5V

R495 R493
6 *0402_short-p
10K_04 D
Q41A
DD_ON_EN_VDD
2 G
Q41B 3 S MTDK3S6R
MTDK3S6R D 1
1

5 G PJ54 R494
35,40,42 DD_ON S *CV-40mil
A 4 100K_04 A
2
D

G CV Test
40,42 USB_CHARGE_EN
Q42
4,24,25,27,30,34,36,37,40,42,43,48,50,51,52,53 VDD3
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
S

35,42 VDD5
*2SK3018S3
42 VIN1
Title
22,27,42,43,45,46,47,49,50,51,52 VIN
43 VREG5
[44] VDD3,VDD5
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 44 of 63

5 4 3 2 1

VDD3, VDD5 B - 45
 Schematic Diagrams

DDR 1.2V / 0.6VS, 2.5V

5 4 3 2 1

DDR4 5V A
PD18
C PQ36 2A PC242 PC241
VIN

1.2V/0.6VS MDU1516

4.7u_25V_X7R_08

4.7u_25V_X7R_08
PU15 ULTRASO-8 PC240
G5616BRZ1U RB0540S2
+ +

0.1u_25V_X7R_06
VDDQ_R 9/21 Power G

VTT_MEM(0.6V) 9/19 power

13A 1.2V

S
PC245
PC246 0.1u_10V_X7R_04
19 18
DEFAULT SHORT VLDOIN VBST
Default EMR5
10u_6.3V_X5R_06

D
VTT_MEM
2 1 2A 20
VTT DRVH
17
PL16
VDDQ_R Default
D
0_06
PJ51 *2mm BCIHP0730-1R0M PJ47
1 16 1 2 PC236 PC239 1 2
PC247 VTTGND LL VDDQ
PR303 PCB Footprint = BCIHP0735A

330uF_2V_5*5*4.2

0.1u_10V_X7R_04
*0603_short-p EMR13 *8mm
22u_6.3V_X5R_08 2 15 PQ37 EMC21 +
VTTSNS DRVL MDU1531 PR280 *0_12

C
PD17 CSOD140BSH
*0603_short-p ULTRASO-8
3 14 OCP MAX: 14.2A 2200p_50V_X7R_04
GND PGND G
9/12 EMR12

S
PR302 402K_1%_04 9 13 PR299 4.12K_1%_06 5V

A
VIN TON CS
12 9/12
4 PVCC5 11
B.Schematic Diagrams

PC248 0.1u_10V_X7R_04 2.2_1%_06

VTTREF VCC5 PR300 2.2_04
PC243 PC244
10
PGOOD

1u_10V_Y5V_06

1u_10V_Y5V_06
3.3V

5 8
VDDQSNS S5 PR304
R470 *0603_short-p

Sheet 45 of 60 6
VDDQSET S3
7 10K_04

GND
VDDQSET
R468 *0402_short-p
DDR 1.35V_PWRGD 43

DDR 1.2V / 0.6VS,

21
C C

2.5V PR301 10K_1%_06 PR305 6.04K_1%_04

R213 47K_04 PC249 *100p_50V_NPO_04

D
5V
Q13
R471 10K_04 R211 100K_04 G 2SK3018S3
5V

S
⮔⹎≈⣏ 䁢 8m il

1
Q12 C431

D
R210 10K_04 G *0.1u_10V_X7R_04 PJ14
5V Q15 *CV-40mil
2SK3018S3

S
1
G CV Test
40,45,48 SUSC#

2
PJ13 2SK3018S3

S
C
*CV-40mil C432
R227 *10K_04 B Q14 CV Test

2
22,25,35,40,42,43,48 SUSB#
D02_12/05_H
R226 1K_04 MMBT3904H *0.22u_10V_X5R_04
4 DDR_VTT_PG_CTRL E
C443

0.01u_16V_X7R_04 暣⡻ 堐
ON
DDR GPIO OUTPUT VOLTAGE SELECT
B GPIO DDR Vout B

Lo 1.2V
Layout trace 2A after jumper Hi 1.35V
5V
5V
PC89
3.3V 2.5V
3A 3
PU3
4
1u_6.3V_X5R_04
2.5V

PC86 PC87 PR132 47K_04

2.5V_PG 1
VIN VCNTL
6
天
月 P I N4 儛 3A R214
*10_04
POK VOUT
10u_6.3V_X5R_06 0.1u_10V_X7R_04 5 PC91 U15
2 NC PR134 PC88 PC90 1 8 VDDQSET
EN *10u_6.3V_X5R_06 2 VCC OUT 7
8 7 3 BUS_SEL NC 6 C413
Default GND VFB Ra 21.5K_1%_04 82p_50V_NPO_04
22u_6.3V_X5R_08 C433 GND NC
9 R212 R1 4 5 *1u_6.3V_X5R_04
R208 *0402_short-p 1 2 GND SDA SCL
40,45,48 SUSC# *1u_6.3V_X5R_04
G9661-25ADJF11U *10K_04 *uP1804A
PJ11 *CV-40mil SMB_CLK 9,27,37
PR133 SMB_DATA 9,27,37
R209 10K_04 1 2 Rb Vout = 0.8V ( 1 + Ra / Rb )
3.3V
10K_1%_04 R190
PJ12 *CV-40mil C427 R2
*0_04
A
*0.1u_10V_X7R_04
2.52V = 0.8V ( 1 + 21.5/ 10 ) A
For CV test
4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3
8,9 2.5V
10,16,53 PEX_VDD
8,9 VTT_MEM ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
22,35,37,42,46,47,48,49,52,53 5V Title
22,27,42,43,44,46,47,49,50,51,52 VIN
6,8,9,48 VDDQ
[45] DDR 1.2V/0.6VS,2.5V
2,17,22,33,35,42,43,47,48 3.3V Size Document Number Re v
9,20,21,23,37,38,39,40,41,42,51
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53
5VS
3.3VS A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 45 of 63

5 4 3 2 1

B - 46 DDR 1.2V / 0.6VS, 2.5V

 Schematic Diagrams

VCore, VCCGT Output Stage

8 7 6 5 4 3 2 1

VIN

5V
6A
9/18 power PC34
PC153
9/19 power

PC152
9/18 power
VCORE & VCCCORE
VCCGT OUTPUT STAGE

4.7u_25V_X7R_08

4.7u_25V_X7R_08
D02_02/26_A

1u_25V_X7R_06
+ +
ME D I O N 烉S t u f f

PR5 PC130
Othe r 烉U n s t u f f EMC23 EMC5 ICCMAX=128A

0.1u_25V_X7R_06

0.1u_25V_X7R_06
2.2_06
PR161
2.2_06
6-14-0203B-01D
0.22u_16V_X7R_06 D1 1
IPL2=80A >3200 mil
PU7 2
NCP81151MNTBG
11/30
INS29162910 9/18 EMI 09/06 VCORE
D 1 8 PR186 2_06 3 G1 MLP08 close to MOSFET
D
BST HG COMMON 0.15UH/40A/DCR Typical 0.5m OHM
PL9 9/18 power
2 S1 4
47 PWM1_4PH/ICCMAX_4PH PWM SW 7 PCMB104T-R15MS
*10K_1%_06 PR185 D2
6 2 1
3 6 PQ24 8
46,47,49 DRON EN GND 7
CSD87350Q5D

2.2_1%_06
4 5 PC190 PC189 PC195

EMR9
VCC LG PR250

390uF_2.5V_10m_6.3*6

390uF_2.5V_10m_6.3*6

390uF_2.5V_10m_6.3*6
PAD *0402_short-p
PC119 5 G2 CSN1_4PH 47
+ + +
2.2u_6.3V_X5R_04 BOTTOM PAD CONNECT TO 9 EMC15 PR231
GND Through 4 VIAs
*0402_short-p VIN

2200p_50V_X7R_04
S2 SW1_4PH 47
BOTTOM PAD
CONNECT TO 9/12
GND Through

1
4 VIAs
+
PC110
+
PC224
+
PC111
E-CAP

2
*EEEFZ1E101P

*EEEFZ1E101P

*EEEFZ1E101P

B.Schematic Diagrams
VIN
6A
PC148 PC149
5V
PC36
VCORE

4.7u_25V_X7R_08

4.7u_25V_X7R_08
9/18 power

1u_25V_X7R_06
D02_01/03_H + +

EMC24 EMC4
PR7 PC117 VCORE
2.2_06 PR159

0.1u_25V_X7R_06 Sheet 46 of 60
0.1u_25V_X7R_06
2.2_06 6-14-0203B-01D
0.22u_16V_X7R_06 D1 1 9/19 power
PU5 2
NCP81151MNTBG PC68 PC61 PC59 PC69 PC70 PC77
11/30

VCore, VCCGT
INS29162044 9/18 EMI
C 1 8 PR182 2_06 3 G1 MLP08 close to MOSFET 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 C
BST HG COMMON
PL7
2 S1 4 PCMB104T-R15MS 0.15UH/40A/DCR Typical 0.5m OHM
47 PWM2_4PH/ADDR PWM SW 7
*10K_1%_06 PR181 D2
6 2 1
3 PQ22 8 PC60
GND 6

Output Stage
46,47,49 DRON EN PC74 PC67 PC62
7
2.2_1%_06

CSD87350Q5D
PR87 22u_6.3V_X6S_08
4 5 22uF_08*10
EMR7

VCC LG 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08

PAD CSN2_4PH 47
PC116 5 G2
BOTTOM PAD CONNECT TO *0402_short-p
9 EMC14
GND Through 4 VIAs PR84
2.2u_6.3V_X5R_04 9/21 Power
2200p_50V_X7R_04

VIN VIN
S2
SW2_4PH 47
BOTTOM PAD PC73 PC76
CONNECT TO *0402_short-p

PSLB30E227M

EMC29 0.01u_25V_X7R_04

EMC30
PSLB30E227M
GND Through D02_02/26_A EMC25 EMC26 EMC27 EMC28 D02_02/26_A
+ +
4 VIAs

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06
0.1u_25V_X7R_06
+
ME D I O N 烉S t u f f ME D I O N 烉S t u f f

4.7u_25V_X7R_08
Othe r 烉U n s t u f f Othe r 烉U n s t u f f

VIN

6A 2R5TPG220MUG
5V
PC151 PC150
CASE SIZE=B15G
footprint=b15g
4.7u_25V_X7R_08

4.7u_25V_X7R_08

9/18 power PC35

D02_02/26_A + +
1u_25V_X7R_06

ME D I O N 烉S t u f f
PR6 PC129 Othe r 烉U n s t u f f EMC31 EMC3
2.2_06 PR160 6-14-0203B-01D
2.2_06
0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.22u_16V_X7R_06 D1 1 9/19 power

PU6 11/30 2
NCP81151MNTBG
INS29161921
B 1 8 PR184 2_06 3 G1 MLP08
B
BST HG COMMON
9/18 EMI PL8
2 S1 4 close to MOSFET PCMB104T-R15MS 0.15UH/40A/DCR Typical 0.5m OHM
47 PWM3_4PH/VBOOT PWM SW 7
*10K_1%_06 PR183 D2 6 2 1
2.2_1%_06

3 PQ23 8
46,47,49 DRON EN GND 6
7
EMR8

CSD87350Q5D
4 5
VCC LG
PR86
PAD
*0402_short-p
PC118 5 G2
2200p_50V_X7R_04

EMC16 CSN3_4PH 47
BOTTOM PAD CONNECT TO
GND Through 4 VIAs 9
2.2u_6.3V_X5R_04 PR83
S2
*0402_short-p
9/18 power SW3_4PH 47
BOTTOM PAD VIN
CONNECT TO
GND Through
4 VIAs
EMC19 PC75
9/19 power
PC205 VCCGT
0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08

PWM1_2ph_BST_R
PC206 + + ICCMAX=15A VR recommend
PC203 09/06 Vcore 330uF*5 , 22uF*20
OCP=20A >1000 mil
1u_25V_X7R_06

PR264 PU12 0.22u_16V_X7R_06 9/18 EMI

close to MOSFET
GT 330uF*1 , 22uF*23
2
3
4

2.2_06 NCP81151MNTBG 0.15UH/40A/DCR 0.5m OHM

PWM1_2ph_BST PWM1_2ph_HG PWM1_2ph_HG_R VCCGT
1 8 PR267 0_1%_06 1 9/21 Power PL12 9/18 power
BST HG
2 PR266 10K_06 9 2
CMME063T-R15MS0R907
1 09/06
47 PWM1_2PH/ICCMAX_2PH PWM SW 7
2.2_1%_06
EMR4

3 6 8 PC191 PC196 PC200 PC192 PC194 PC193

46,47,49 DRON EN GND
PWM1_2ph_VCC PWM1_2ph_LG PWM1_2ph_LG-R PR261
5V PR265 2.2_06 4 5 PR262 0_1%_06 PC199 22u_6.3V_X6S_08 22u_6.3V_X6S_08 22u_6.3V_X6S_08 *22u_6.3V_X6S_08 *22u_6.3V_X6S_08 *22u_6.3V_X6S_08
VCC LG
5
6
7

CSN1_2PH 47
390uF_2.5V_10m_6.3*6

PAD +
PC204 PQ29
SM7320ESQG *0402_short-p 9/12
PR263
2.2u_6.3V_X5R_04 EMC10
A A
2200p_50V_X7R_04 SW1_2PH 47
7 VCCGT
*0402_short-p 22,27,42,43,44,45,47,49,50,51,52 VIN
9/21 Power 5 VCORE
VCCGT
6,49 VCCSA
BOTTOM PAD 22,35,37,42,45,47,48,49,52,53 5V
CONNECT TO 9/18 power
GND Through PC202
GT 挾 16A Choke 7X7, 劍 ᶵ 挾, Ch o
⽭枰ἧ䓐 10X1 0, m l
PSLB30E227M

4 VIAs G T e
k c2u +
⽭枰ἧ 䓐 2 3 pc s
7X7
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
CMME063T-R15MS0R907 [46] VCORE,VCCGT OUTPUT STAGE
0.15UH/38A/DCR 0.9m OHM Si ze Document Number Rev
A2 SCHEMATIC1 6-71-N85J0-D01 D02B

Dat e: Friday, March 02, 2018 Sheet 46 of 63

8 7 6 5 4 3 2 1

VCore, VCCGT Output Stage B - 47

 Schematic Diagrams

VCC_Core & VCCGT

8 7 6 5 4 3 2 1

09/06
9/27 Power Place close
PC38 1000p_50V_X7R_04 to pahse 1 L

6 VSSSA_SENSE PR58
VSN_1PH NTC3
100k_1%_04_NTC
Coffee Lake H Line 3+1+1 1.05_VCCST
499_1%_04

SA_SENSE 1000p_50V_X7R_04
PC39
49 CSN_1PH
2 1 PR234

14K_1%_06
PR214

7.5K_1%_06
SW_1PH 49 Freq. Vcore/GT=300kHz PR194 PR215
PC161

45.3_1%_04
100_04
VSP_1PH 1u_6.3V_X5R_04
6 VCCSA_SENSE PR59 PR233 PC157
D
1.96K_1%_04 9/20 power
10_1%_04 3300p_50V_X7R_04
CPU_AGND
D02_12/06_Henry 81215_SCLK PR48
SVID D

PC41 PR60 9/20 power PC160 49.9_1%_04

H_CPU_SVIDCLK 4
0.015u_16V_X7R_04
1000p_50V_X7R_04 2.21K_1%_04 D02_12/06_Henry 9/20 power 81215_ALERT PR47
PR213 0_04
3.3VS PWM1_1PH/ICCMAX_1PH 49 H_CPU_SVIDALRT# 4
PC159

39.2K_1%_04
3300p_50V_X7R_04 PC158 81215_SDIO PR22

220p_50V_NPO_04
PR49 PR193 10_04
PR50 9/20 power SA ICCMAX
CPU_AGND H_CPU_SVIDDAT 4

09/06 15.4K_1%_04 34.8K_1%_04

11.1A

2
10K_1%_04
Note Layout
9/27 Power Default
9/20 power PC33 1000p_50V_X7R_04
VCORE_PG 25 PJ23
VCC_VCORE_SENSE PC40 2 1
5 VCC_VCORE_SENSE ALL_SYS_PWRGD 4,22,25,40
0.015u_10V_X7R_04 SHORT
PC43 PR57 81215_SCLK OPEN_4mil
1.5K_1%_04 81215_ALERT PJ22 FOR CV EN 09/06
B.Schematic Diagrams

IA_SENSE 1000p_50V_X7R_04 PC42

100p_50V_NPO_04
81215_SDIO
2 1
3.3V
5 VSS_VCORE_SENSE PR61
VSN_4PH IA ilim OPEN
VSN_1PH OPEN_4mil PR168 9/27 Power
1.5K_1%_04 6+2=128A=29.4K_1%_04
PC44 2200p_50V_X7R_04
4+2=86A=19.6K_1%_04 VSP_1PH
SVID 10K_1%_04

VCCGT_SENSE 7
Note Layout
PC198
CPU_AGND PR166 1000p_50V_X7R_04
GT_SENSE
1.5K_1%_04

Sheet 47 of 60 IA
PC45
IA imon
6+2=128A=24.9K_1%_04
4+2=86A=24.7K_1%_04
VSSGT_SENSE 7

53

52
51
50
49
48
47
46
45
44
43
42
41
40
PC53 PR63 470p_50V_X7R_04 PC134 2200p_50V_X7R_04
47p_50V_NPO_04 49.9_1%_04

VCC_Core & PR212 D02_12/06_Henry

VR_RDY

SCLK
PAD

VSP_1PH
VSN_1PH
COMP_1PH
ILIM_1PH
CSN_1PH
CSP_1PH
IMON_1PH

PWM_1PH/ICCMAX_1PH
EN

ALERT#
SDIO
24.9K_1%_04
C PR191 60.4K_1%_04 CPU_AGND PR24 PC2 PC4 C
9/20 power 49.9_1%_04 470p_50V_X7R_04 47p_50V_NPO_04
VCC_VCORE_SENSE
GT imon
VCCGT PR78 PC52 PR62 PC156 VSN_4PH 1 39 PR23 *100_04
2 VSP_4PH VRHOT# 38 H_PROCHOT# 4
3.65K_1%_04 1K_1%_04 470p_50V_X7R_04
2200p_50V_X7R_04 CPU_AGND DIFFOUT_4PH 3 VSN_4PH
IMON_4PH
VSP_2PH
VSN_2PH
37 32A PR25 PR1 PC3 2200p_50V_X7R_04
FB_4PH 4 36 DIFFOUT_2PH PC135 470p_50V_X7R_04 1K_1%_04 3.65K_1%_04
DIFFOUT_4PH IMON_2PH CPU_AGND
COMP_4PH 5 35 FB_2PH
6 FB_4PH PU2 DIFFOUT_2PH 34 9/20 power
ILIM_4PH COMP_4PH FB_2PH COMP_2PH
CSCOMP_4PH9/20 power PR64 29.4K_1%_04 7 NCP81215MNTXG 33 ILIM_2PH
8 ILIM_4PH COMP_2PH 32 13K_1%_04 9/20 power
CSSUM_4PH CSCOMP_4PH ILIM_2PH CSCOMP_2PH
9 31 CSSUM_2PH PR26
Place close IA PR65 10 CSSUM_4PH CSCOMP_2PH 30
CSP1_4PH

1
to Phase 1 L 75K_1%_04 11 CSREF_4PH CSSUM_2PH 29 D02_12/06_Henry PR2
CSP2_4PH CSP1_4PH CSREF_2PH CSP1_2PH
NTC4 PC47 PC155 12 28 75K_1%_04 NTC5

PWM1_4PH/ICCMAX_4PH

PWM1_2PH/ICCMAX_2PH
CSP3_4PH CSP2_4PH CSP1_2PH CSP2_2PH

PWM4_4PH/ROSC_MPH
13 27

PWM2_2PH/ROSC_1PH
100k_1%_04_NTC PC46 9/20 power 100k_1%_04_NTC
0.1u_16V_X7R_04 CSP3_4PH CSP2_2PH PC133 PC5
1000p_50V_X7R_04

2
TSENSE_1PH/PSYS
PWM3_4PH/VBOOT
560p_50V_X7R_04 footprint 5V 5V *1000p_50V_X7R_04

PWM2_4PH/ADDR
PR80 Place close GT
PR79 D02_12/06_Henry
qfn52-6x6mm 0.1u_25V_X7R_06
46,47 SW1_4PH to Phase 1 L
165K_1%_04 PR28 PR27

TSENSE_4PH

TSENSE_2PH
52.3K_1%_04
1K_1%_04 1K_1%_04 PC6 PR3

CSP4_4PH
D02_12/06_Henry CPU_AGND 820p_50V_X7R_04 165K_1%_04
PR81

DRON
46,47 SW2_4PH PR4

VRMP
VIN CPU_AGND

VCC
52.3K_1%_04 Total Current Sense Amplifier SW1_2PH 46,47
PR51 69.8K_1%_06
1K_1%_04 9/20 power 9/20 power
PR82

14
15
16
17
18
19
20
21
22
23
24
25
26
46,47 SW3_4PH PC174 ENABLE PSYS 120W CSREF_2PH
52.3K_1%_04 D02_12/06_Henry 0.1u_10V_X7R_04 PSYS 50 PR164 10_1%_06
PC175 CSN1_2PH 46
TSENSE_4PH
9/20 power 0.01u_25V_X7R_04 PC132 D02_02/13_H
CPU_AGND CPU_AGND
46 CSN1_4PH TSENSE_2PH 0.1u_10V_X7R_04 PR190
PR66 10_1%_04 CPU_AGND 15K_1%_04 PR190
PSYS 15k_1% ⿏
(ᷕ 120 W Adaptor)
CSREF_4PH 5V CPU_AGND 47.5k_1%(MEDION CSP1_2PH
150W Adaptor)
CPU_AGND PR162 7.5K_1%_04
46 CSN2_4PH 46,49 DRON SW1_2PH 46,47
PR69 10_1%_04 PR232 PR189
2.2_06 12.4K_1%_04 GT ICCMAX PC131
PC154 PR163
46 CSN3_4PH
PR72 10_1%_04 1u_6.3V_X5R_04 0.022u_25v_X7R_04 *100K_1%_04
PR188
PWM1_2PH/ICCMAX_2PH 46
PR187 97.6K_1%_04 CSREF_2PH
B 215K_1%_04 B
CPU_AGND
9/29 Power
FSW 5V
CORE/GT=300kHz
9/18 power
SA=600kHz
to IA MOS Gate CPU_AGND CPU_AGND
PR29
*2K_04
IA ICCMAX
46 PWM1_4PH/ICCMAX_4PH
128A=100K PSYS

PR211
86A=67.2K
100K_1%_04 PR192 *0402_short-p
CPU_AGND

46 PWM2_4PH/ADDR TSENSE
PR68 9/29 Power Place close Place close CPU_AGND
9.1K_1%_04 CSP1_4PH PR210 to phase 1 mosfet to phase 1 mosfet Note AGND&GND
46,47 SW1_4PH TSENSE_4PH TSENSE_2PH
CPU_AGND 4.3K_1%_04
PC48
PR67 46 PWM3_4PH/VBOOT
*100K_1%_04 33n_50V_X7R_06 PR230 PR100
CSREF_4PH 0_04 0_04
Default For CV Vboot
PR71

1
9.1K_1%_04 CSP2_4PH

1
PJ28

2
46,47 SW2_4PH PJ27 NTC2 NTC1
PC49 OPEN_4mil PR229 PR101
OPEN_4mil

100k_1%_04_NTC

100k_1%_04_NTC
2
PR70 25.5K_1%_04 25.5K_1%_04

2
*100K_1%_04 33n_50V_X7R_06 OPEN/SHORT OPEN/SHORT

1
CSREF_4PH
PR209
9/20 power
PR208
PR75 24.9K_1%_04
9.1K_1%_04 CSP3_4PH 9/20 power 169K_1%_04
A 2,17,22,33,35,42,43,45,48 3.3V A
46,47 SW3_4PH 4,6,26,48 1.05_VCCST
22,27,42,43,44,45,46,49,50,51,52 VIN
PC50 CPU_AGND CPU_AGND
22,35,37,42,45,46,48,49,52,53 5V
PR74 6,49 VCCSA
*100K_1%_04 33n_50V_X7R_06
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,51,52,53 3.3VS
CSREF_4PH 5,46 VCORE
7,46 VCCGT
D02_12/06_H

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[47] VCC_CORE & VCCGT
Si ze Document Number Rev
A2 SCHEMATIC1 6-71-N85J0-D01 D02B

Dat e: Friday, March 02, 2018 Sheet 47 of 63

8 7 6 5 4 3 2 1

B - 48 VCC_Core & VCCGT

 Schematic Diagrams

1.0DX_VCCSTG/VCCSFR_OC, 3.3VA
5 4 3 2 1

SHORT NOTE:
1.05DX_VCCSTG Ton need <65us
1.05V VCCST 1 2
1.05_VCCST
M5938 TURON-ON TIME=60us
SHORT
1.05VA PJ59 OPEN_1mm PJ60 1mm

2
U161

4 2A D02_01/31_H
1.05_VCCST 1.05VA
1.05DX_VCCSTG 1 2
1.05DX_VCCSTG

C855 C856 VIN VOUT U5

D C859 D
D02_01/31_H
1u_6.3V_X5R_04

1A VOUT1_U140

*10u_6.3V_X5R_06
2 4

0.1u_10V_X5R_04
VIN VOUT C860
VDD3 R715
VDD3 C857 C858

0.1u_10V_X5R_04
*100_04

1u_6.3V_X5R_04

*10u_6.3V_X5R_06
R716 R717 R718

6
*100K_04 PQ44A D VDD3 *100_04
*MTDK3S6R 100K_04
R719 2G
10K_04

1
VCCST_EN R740 *0402_short-p S
SHORT R720

1
6 5 PQ45A
40,45 SUSC# ON VBIAS 5V
PJ61

3
PQ44B D PJ62

6
*100K_04 *MTDK3S6R D
*MTDK3S6R SUSB#_C10# *CV-40mil VCCSTG_EN R741 *0402_short-p
VCCST_EN 2 1 6 5

2
5G ON VBIAS 5V
2G
*0.1u_16V_X7R_04 C861

4
1mm

*0.1u_10V_X7R_04 C863
S

1
PQ45B

3
C862 D

B.Schematic Diagrams
C864 *MTDK3S6R
VCCSTG_EN

0.1u_10V_X5R_04
5G

0.1u_10V_X5R_04
S

4
1 3
GND NC

FA7609 1 3
C

D02_12/27_H
GND

FA7609
NC

D02_12/27_H
C
Sheet 48 of 60
1.0DX_VCCSTG/
VDD3
VCCSFR_OC,
3.3VA
U14 NV3V3
SN74LV1T08DCKR
5

1 R723 0_04
42 SUSB#_EN SUSB#_C10#
4
2
24,43 GPP_J1_C10# VDD3 3.3V VDDQ
1.8V PR93
3

100_04

R721 *0_04
PR94 NV3V3 C650
U33 G5016
C654
VCCSFR_OC

6
100K_04 PQ4A D
0.1u_10V_X7R_04 1 6 0.1u_10V_X7R_04
MTDK3S6R 2 IN1 IN2 7
2G PJ40 1A IN1 IN2 1A PJ41
S
1 2 13 8 1 2

1
NV3V3 OUT1 OUT2 VCCSFR_OC
14 9
3

PQ4B *1mm OUT1 OUT2 *1mm

D Default
B D02_12/28_H MTDK3S6R 12 10 C640 Default B
NV_NV3V3_EN_R CT1 CT2
5G C637 0.1u_10V_X7R_04

VBIAS
S 0.1u_10V_X7R_04 C639 DEFAULT SHORT

GND

GND
EN1

EN2
4

C638
*100p_50V_NPO_04
68p_50V_NPO_04

15

11

5
BIOS+EC setup
3.3VA 17 NV_NV3V3_EN
R408 0_04
NV_NV3V3_EN_R

C652
5V R409

R722
*0_04

0_04
SUSB#_C10#

SUSB#
SUSB# 22,25,35,40,42,43,45
C651 1u_6.3V_X5R_04 C653
G0, S5, S4:low *0.22u_10V_X5R_04
S4 support RTC wake:high *0.22u_10V_X5R_04 D02_12/28_H
EM5290
VDD3 3.3VA PCBfootprint:
TDFN14-2X3MM-A
D02_01/31_H
U12
5 1 1.5A 2nd source G5016

VIN VOUT
4 C368 D02_12/19_H
C388 VIN/SS C367
3 2
*0.1u_10V_X7R_04 EN GND 0.1u_10V_X5R_04 10u_6.3V_X5R_06
2,17,22,33,35,42,43,45,47 3.3V
UP7553PMA5-25
10,16 NV3V3
4,6,26,47 1.05_VCCST
4,9,24,26,27,30 3.3VA
M: uP7553 ---- 6-02-07553-9C0 4,24,25,27,30,34,36,37,40,42,43,44,50,51,52,53 VDD3
40,43,53 SLP_SUS# S: AP2821KTR-G1 6-02-02821-9C0 35,42,44 VDD5
2,6,43 VCCIO
A 6,8,9,45 VDDQ A
6 VCCSFR_OC
22,35,37,42,45,46,47,49,52,53 5V
4,6,27 1.05DX_VCCSTG
30,43 1.05VA

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[48]1.0DX_VCCSTG/VCCSFR_OC, 3.3VA
Size Document Number 6-71-N85J0-D01 R ev
Custom SCHEMATIC1 D02B

Date: Friday, March 02, 2018 Sheet 48 of 63

5 4 3 2 1

1.0DX_VCCSTG/VCCSFR_OC, 3.3VA B - 49
 Schematic Diagrams

VCCSA
8 7 6 5 4 3 2 1

Coffee Lake H Line 3+1+1

SA=600kHz
D D

D02_02/26_A
M E D I O N 烉S t u f f
VIN
O t h e r 烉U n s t u f f
PC172
9/19 power
PC147
VCCSA
ICCMAX=11.1

4.7u_25V_X7R_08

4.7u_25V_X7R_08
PC54 + +

PWM_1b_BST_R
0.1u_25V_X7R_06
IPL2=10 >400 mil
09/06
B.Schematic Diagrams

PC173

PR207 PU10 0.22u_16V_X7R_06 PQ26

5
5
5
5
2.2_06 NCP81253MNTBG QM3004M3 0.68UH/25A/DCR 5.5m OHM Max
0_1%_06
PWM_1b_BST PWM_1b_HG PWM_1b_HG_R 4 PL11
PR242
1
BST HG
8
PR90 *10K_06 BCIHP0735-R68M BCIHP0735A 09/06 VCCSA

1
2
3
PWM_1b_Phase
2 7 1 2
47 PWM1_1PH/ICCMAX_1PH PWM SW

Sheet 49 of 60

PC187
46,47 DRON
3
GND 6 0_1%_06
EN
PQ25 EMR3 C25 C15
PWM_1b_VCC PWM_1b_LG PWM_1b_LG_R PR89

5
5
5
5
PR53 2.2_06 PR228 QM3006M3

22u_6.3V_X6S_08
5V 4 5

22u_6.3V_X6S_08
VCC LG +
PD16

VCCSA PAD CSN_1PH 47

*390uF_2.5V_10m_6.3*6
4 2.2_1%_06
C PC37 C

1
2
3
*0402_short-p

CSOD140BSH
PR88
2.2u_6.3V_X5R_04 9/12

A
EMC9
SW_1PH 47
2200p_50V_X7R_04
*0402_short-p
9/20 power
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs

VCCSA

PC65 PC66 PC63 PC64

VR recommend 22u_6.3V_X6S_08
22u_6.3V_X6S_08
*22u_6.3V_X6S_08
*22u_6.3V_X6S_08

SA 22uF*15
B B

9/12

4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52,53 VDD3
6 VCCSA
22,35,37,42,45,46,47,48,52,53 5V
22,27,42,43,44,45,46,47,50,51,52 VIN

A 8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52,53 3.3VS A
7,46 VCCGT

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[49] VCCSA
Size Document Number Re v
A3 SCHEMATIC1 6-71-N85J0-D01 D02B

Date : Friday, March 02, 2018 Sheet 49 of 63

8 7 6 5 4 3 2 1

B - 50 VCCSA
 Schematic Diagrams

AC_In, Charger
1 2 3 4 5

SMART CHARGER TI24780S

A A

PC15 PC16 PC17 PC18

1000p_50V_X7R_04

1000p_50V_X7R_04
Power 9/8

0.1u_25V_X7R_06

0.1u_25V_X7R_06
09/06

A
PD11 PD15
MDL914S2 MDL914S2
VIN

B.Schematic Diagrams
9/14 Power VDD3 9/19 power

C
VA1 D02_12/06_H
PC24 PC128 PC145 PC51 EMC33 EMC32
PR35 D02_02/26_A

4.7u_25V_X7R_08

4.7u_25V_X7R_08

4.7u_25V_X7R_08

4.7u_25V_X7R_08

0.1u_25V_X7R_06

0.1u_25V_X7R_06
PQ19 PQ27 9/13 Power 287K_1%_04
MDU1512 MDU1512 PR34 + + + + ME D I O N 烉S t u f f
ULTRASO-8 ULTRASO-8 ILIM
Othe r 烉U n s t u f f
VA
VA_SS
J_DC_JACK1 EML1 D S S D PRS2 75K_1%_04
HCB2012KF-800T80 0.01_1%_32

Sheet 50 of 60
4

1 PC19 PC32
0.047u_25V_X7R_06

2
*SMAJ20A PD13

3 PC138 PC137 C492 PC136 PC146 PC25 PC1

C

0.1u_25V_X7R_06
G

3
5

1000p_50V_X7R_04

1000p_50V_X7R_04
PR155

1500p_50V_04
AC_In, Charger
2DC3003-002211 PR170 PR169 PR243 PR244 10_1%_06
PC115
0.1u_25V_X7R_06

0.1u_25V_X7R_06

10u_25V_X5R_08

0.1u_25V_X7R_06

PR21
*0402_short-p PC12 *0402_short-p JBAT2

5
5
5
5

5
5
5
5
4.7_06
4.7_06 4.7_06 PR32
A

B PC13 1u_25V_X7R_06 4.02K_1%_04 PQ17 PQ20 5 B

9/20 Power 0.1u_25V_X7R_06 BATDRV 4 QM3006M3 4 QM3006M3
PC120 4
PC11 0.1u_25V_X7R_06
2.2u_25V_X5R_08

1
2
3

1
2
3
PC23 3
0.1u_25V_X7R_06 2.2u_16V_X5R_06 PC127 2
REGN PQ18 1
QM3004M3 0.01u_25V_X7R_04 *C144DF-105A8-L

5
5
5
5
PR45 PR46 BTST PR18 0_06

29

28
27
26
25
24
23
22
4.02K_1%_04 4.02K_1%_04 PL4 PRS1
6-20-B3810-003 PU1 HIDRV 4 BCIHP0730-4R7M 0.01_1%_32 V_BAT JBAT1
P/N = 2 1

BTST
PHASE
HIDRV

LODRV
VCC

REGN
GND_2

GND_1

5 1
5 2
5 3
PCB Footprint = TDC-099DHSR2-L-005-J-1 PC14 PQ21 5
SMC_BAT

5
10/2 Power 0.047u_25V_X7R_06 QM3006M3 SMD_BAT PL2 HCB1005KF-121T20
4

10u_25V_X5R_08 PC114

PC113
PC28

PC27
PR13 ACN 1 21 Phase HCB1005KF-121T20
ACP 2 ACN ILIM 20 LODRV 4 PR37 PL1 3
470K_04 CMSRC 3 ACP BQ24780SRUYR SRP 19 2

1
2
3
ACDRV 4 CMSRC SRN 18 1

10u_25V_X5R_08

*10u_25V_X5R_08

*10u_25V_X5R_08
ACDRV BATDRV 40 BAT_DET

C7

C3

C2
ACPRES 5 17 SRP 10_04 PR33 *20K_04 C144DF-105A8-L
ACDET 6 ACOK BATSRC 16 SRN

PROCHOT#

C
IOUT 7 ACDET TB_STAT# 15 10_04 PR52

CMPOUT
IADP BATPRES# PD14 PD2 PD10 PD1

IDCHG

CMPIN
PMON

30p_50V_NPO_04

30p_50V_NPO_04

30p_50V_NPO_04
PC8 10_04 PR178

SDA
SCL

RB0540S2

RB0540S2
*MMSZ5232BS

*MMSZ5232BS
PR14 0.1u_25V_X7R_06 PC20
SMC_BAT 40
0.1u_25V_X7R_06

A
75K_1%_04 PC21
8
9
10
11
12
13
14
SMD_BAT 40
0.1u_25V_X7R_06
PC10
PC22
100p_50V_NPO_04 PR180 PR179 0.1u_25V_X7R_06
10K_1%_04 *10K_1%_04 PR36
9/22 Power 2.2_06
PR17 0_04 16.5K=120W
100p_50V_NPO_04

PR16 *0_04 PC26

16,50 AC/BATL#
PC7 PR15 VDD3
*16.5K_1%_04 4700p_50V_X7R_04
PR12 0_04 PR156
47 PSYS
10K_1%_04

9/19 power 9/19 power

VDD3
SMD_BAT
C PR30 0_04 C

SMC_BAT
PR31 0_04

Battery Voltage:
PR11 0_04
VDD3 12V~16.8V TOTAL_CUR 40
PQ10 PR152
PC9 V_BAT MTE1K0P15KN3 300K_1%_04
PR10 PC85 S D BATVLT
BAT_VOLT 40
100p_50V_NPO_04

PR8 *24K_1%_04 *1u_25V_X5R_06

10K_04 PR20

C
G
PR171 PC121
Option close to EC 100K_04 PD9
VDD3 AC/BATL# 16,50
60.4K_1%_04 0.1u_25V_X7R_06 *RB0540S2
D

BATGS
PQ1

A
G
Default PR9 2SK3018S3
S

G PQ12
PJ2 47K_04
VDD3
2SK3018S3
VA_SS

S
1 2
OPEN
*CV-40mil
AC_IN# 40
PR158
6-21-D34J0-105
PJ1
C

PD12 10K_04
1 2 C A B PQ11
VA
OPEN
*CV-40mil ZD5245BS2 MMBT3904H
E

PR157
D D
10K_04
D02A modify

AC_IN

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
4,24,25,27,30,34,36,37,40,42,43,44,48,51,52,53 VDD3 Title
42 VA [50] AC_IN,CHARGER
22,27,42,43,44,45,46,47,49,51,52 VIN
Si ze Document Number Rev
A2 SCHEMATIC1 6-71-N85J0-D01 D02B

Dat e: Friday, March 02, 2018 Sheet 50 of 63

1 2 3 4 5

AC_In, Charger B - 51
 Schematic Diagrams

NVVDD
5 4 3 2 1

NVVDD FOR N17_VGA

PJ26
*CV-40mil 9/19 power VIN
1 2 PR197 4.7K_04 VDD3

PJ25
D D
*CV-40mil PC124 PC112
Power 9/8 PR218 NVVDD_EN 1 2 PR195 0_04
NV_NVVDD_EN 17

4.7u_25V_X7R_08

4.7u_25V_X7R_08
16 GPIO0_NVVDD_PWM_VID
*0402_short-p PC140 Default + +
PR199
*100K_04
*0.1u_10V_X5R_04
D02_01/03_H
9/14 Power VIN

NVVDD_VREF PR198 1K_04 1V8_AON

PC164

EMC34
EMC6

PC126

PC183

PC201

PC171
NVVDD_FBDRTN 4700p_50V_X7R_04 PR196 0_04
GPIO6_NVVDD_PSI# 16
PR216 9/18 EMI
close to MOSFET + + +
PR200 PC141
20.5K_1%_04

0.1u_25V_X7R_06
0.1u_25V_X7R_06

10u_25V_X5R_08

EEEFZ1E101P

EEEFZ1E101P

EEEFZ1E101P
PR219
B.Schematic Diagrams

NVVDD_REFADJ *0_04 *47p_50V_NPO_04

6.19K_1%_04 PC166

PR220
PR217

4.32K_1%_04
0.1u_10V_X7R_04
D1 1
2
9/19 power
D1 1
2
OCP=140A
DEFAULT SHORT
16.5K_1%_04 11/30
UGATE1_NVVDD
PR19
EMI
1_06 3 G1
INS29023115
MLP08 3 G1
INS29023035
MLP08

PR221
COMMON COMMON
isat=90A 0.6V~1.2V
PC165 PR38 S1 4 S1 4
309_1%_04 NVVDD
PR201 100K_04 D2 6 D2 6 PL6
PC142

Sheet 51 of 60 4700p_50V_X7R_04 0_04 0.1u_25V_X7R_06

PQ16
8
7
PQ15
8
7
NV_VDD_L CMMS104T-R22MS
59A 59A
2360 mil

C
9/14 Power
CSD87350Q5D *CSD87350Q5D

PC176
08 2 4

PC182

PC197

PC188

PC177
OCP PD3 EMR1

NVVDD PU9 5 G2 5 G2

CSOD140BSH
5.1_06 + + + +
9 9 NVDD+NVDDS Merged

390uF_2.5V_10m_6.3*6
REFIN

VID

PSI

EN

UGATE1

BOOST1
S2 S2

0.1u_10V_X7R_04

390uF_2.5V_10m_6.3*6

390uF_2.5V_10m_6.3*6

390uF_2.5V_10m_6.3*6
A
C C
VIN PR202
NVVDD_REFADJ PH1_NVVDD
6 24 EMC7
REFADJ PHASE1 30K_1%_04
NVVDD_VREF
PC167 *0.01u_50V_X7R_04 8 23 220p_50V_NPO_04
VREF LGATE1
PR239 0_04 PR222 300K_1%_04 9 22 PR176 0_06 RON=2.8mR
TON PWM3 VIN
PR105 0_04
300KHZ NVVDD_FBDRTN
10 up9509PQAG 21
PVCC_NVVDD
PR177 2.2_04
D02_01/03_H
10 GPU_VSS_SENSE FBDRTN PVCC 5VS 9/19 power VIN
NVVDD_FB
PR103 100_04 11 20

EMC35
EMC2

PC29
FB LGATE2

UGATE2
PR241 PC168 PC143

PGOOD

BOOT2
ISEN3

ISEN2

ISEN1
*0_04 *33p_50V_NPO_04 12 19

GND
PR104 0_04 COMP PHASE2 1u_6.3V_X5R_04 PC125 PC123
10 GPU_VDD_SENSE 9/18 EMI

10u_25V_X5R_08
0.1u_25V_X7R_06
0.1u_25V_X7R_06

4.7u_25V_X7R_08

4.7u_25V_X7R_08
close to MOSFET
PR102 100_04

25

13

14

15

16

17

18
+ +
NVVDD 1 2 PR223
EMI

PH2_NVVDD
PJ6 *CV-40mil 0_04

UGATE2_NVVDD
D1 1 D1 1
PR224
2 2
*100K_04
11/30 INS29022803
INS29022763
UGATE2_NVVDD MLP08
3 G1 MLP08
COMMON
3 G1 COMMON
PC170 PC169 PR40 1_06
PR205 PR39 S1 4 S1 4
isat=90A
*4700p_50V_X7R_04 1000p_50V_X7R_04 PH2_NVVDD 499_1%_04 100K_04 D2 6 D2 6 PL5
8 8 NV_VDD_R CMMS104T-R22MS
PR204 7 7
PR226 PR225 499_1%_04 PQ13 PQ14
PH1_NVVDD

C
CSD87350Q5D *CSD87350Q5D

NVVDD_PWRGD_R
*15.8K_1%_04 15K_1%_04 PR203 PD4 EMR2
PC144 5 G2 5 G2

CSOD140BSH
0_04 0.1u_25V_X7R_06 5.1_06
S2 9 S2 9

A
PR54
PR227 EMC8
9/19 power 9/15 Power
*0_04
B 0_04 220p_50V_NPO_04 B
PC56 *0.022u_25V_X7R_04 NVVDD
PC55 *8200p_50V_X7R_04 Close to Choke
NV_VDD_L
PR206 PR76 *10K_1%_04
NVVDD_FB
PR320 *0_04
VIN 0_04
PC57 *0.022u_25V_X7R_04
NVVDD
EMC36 EMC37 EMC38 EMC39
9/28 Close to IC PC58 *8200p_50V_X7R_04 Close to Choke
NVVDD_PWRGD 10,17
NV_VDD_R

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06

0.1u_25V_X7R_06
PR77 *10K_1%_04
PR85 10K_04 3.3VS

NVVDD D02_01/03_H
㓦暣䶂嶗

PR95 PR99 PR96 PR98

VDD3 15_1%_06 15_1%_06 15_1%_06 15_1%_06 VIN

*10u_6.3V_X5R_06 PC71
EMC40 0.01u_25V_X7R_04

EMC41 0.01u_25V_X7R_04

PR97
A A
2K_04
5
5
5
5

PQ6

4 QM3006M3
1
2
3

PQ5 4,24,25,27,30,34,36,37,40,42,43,44,48,50,52,53 VDD3

D

2SK3018S3 8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,52,53 3.3VS

NV_NVVDD_EN 22,27,42,43,44,45,46,47,49,50,52 VIN
G PC72
9,20,21,23,37,38,39,40,41,42 5VS
*10u_6.3V_X5R_06
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
S

22,35,37,42,45,46,47,48,49,52,53 5V
D02_01/03_H 2,17,22,33,35,42,43,45,47,48 3.3V
10,11,53 1V8_RUN Title
10,16,17,18,52,53 1V8_AON
6,8,9,45,48 VDDQ
[51]NVVDD
Size Document Number Rev
19
11,12,13,14,15,52
NVVDD
FBVDDQ
Custom 6-71-N85J0-D01 D02B

Date: Friday, March 02, 2018 Sheet 51 of 63

5 4 3 2 1

B - 52 NVVDD
 Schematic Diagrams

FBVDDQ
5 4 3 2 1

FBVDDQ PHASE 1 and 2

PJ43
1 2 PR282 4.7K_04 VDD3
OPEN
D
FBVDDQ FOR N17_VGA *CV-40mil D

PJ42
FBVDDQ_EN NV_FBVDDQ_EN
1 2 PR281 0_04 NV_FBVDDQ_EN 17
OPEN
FBVDDQ_VREF *CV-40mil
9/13 Power PC221 Default
*0.47u_6.3V_X5R_04 9/13 Power

PR128

4.99K_1%_04 VIN

9/19 power
PR292 1K_04 1V8_AON
PC229 PC215 PC214
PR129 PR283

4.7u_25V_X7R_08

4.7u_25V_X7R_08
1u_6.3V_X5R_04
10K_04 *0_04 EMC1 + +

B.Schematic Diagrams
0.1u_25V_X7R_06
PR293 40.2K_1%_04 0.704V VREFIN
PQ30

PC227
QM3004M3
OCP=30A

5
5
5
5
PR291 PC228

12.1K_1%_04 1000p_50V_X7R_04
EMI 9/18 EMI
close to MOSFET Peak current=20A
UGATE1 PR275 0_06 4
*0.01u_50V_X7R_04
6-08-10224-2J0

1
2
3
PR274 FBVDDQ
11A 1.35V
PR284 PC222 100K_04 PL13
0_04 0.1u_25V_X7R_06 11A FB_VDDQ_LCMME063T-R24MS1R197

PQ31
Sheet 52 of 60

C
5
5
5
5

PC209

PC207

PC208
QM3006M3
PD6 EMR10
PU13 4 + +

1
FBVDDQ

CSOD140BSH
5.1_06
300KHZ 9/14 Power

1
2
3

0.1u_10V_X7R_04

390uF_2.5V_10m_6.3*6

390uF_2.5V_10m_6.3*6
REFIN

VID

PSI

EN

UGATE1

BOOST1

A
C PR277 C
PR125 66.5K_1%_04 6 20 EMC17
REFADJ PHASE1 *30K_1%_04
FBVDDQ_VREF
PC230 *0.01u_50V_X7R_04 8 19 220p_50V_NPO_04
VREF LGATE1
FBVDDQ_VREF
PR127 0_04 PR126 54.9K_1%_04 9 up1666QQKF VIN
FS/OC
FB_VSS_SENSE 9/14 Power
PR298 0_04 FBDRTN 10 18 PVCC PR278 2.2_04
11 FB_VSS_SENSE FBDRTN PVCC 5V
FBVDDQ_FB
PR296 100_04 11 17
FB LGATE2

UGATE2
PGOOD
PC216

BOOT2
PC218 PC217
12 16

GND
COMP PHASE2 1u_6.3V_X5R_04

4.7u_25V_X7R_08

4.7u_25V_X7R_08
EMC20

check + +

0.1u_25V_X7R_06
9/13 Power

21

13

14

15
PR124 0_04 PR295 1K_1%_04 qfn20-3x3mm-rt8816 EMI PQ33
9/20 power
11 FB_VDD_SENSE QM3004M3
9/18 EMI

5
5
5
5
PR297 100_04 close to MOSFET 9/13 Power
FBVDDQ

UGATE2
UGATE2 PR106 0_06 4

1
2
3
PR107
100K_04 PL14
6A FB_VDDQ_R CMME063T-R24MS1R197

PQ32

C
5
5
5
5
QM3006M3
3.3VS PR285 PC223 PD5 EMR11
4

CSOD140BSH
PC80 PC79 0_04 0.1u_25V_X7R_06 5.1_06

1
2
3

A
*4700p_50V_X7R_04 1000p_50V_X7R_04 PR108
EMC18
PR286 *30K_1%_04
PR115 PR114 220p_50V_NPO_04
10K_04
9/19 power
*15.8K_1%_04 51K_1%_04 9/15 Power
SS
B PC210 *0.022u_25V_X7R_04 B
FBVDDQ
PC78 *8200p_50V_X7R_04 Close to Choke
PR113
FB_VDDQ_L
PR268 *10K_1%_04
0_04 Please EE check FBVDDQ_FB
PR321 *0_04

DGPU_PWRGD PC211 *0.022u_25V_X7R_04 FBVDDQ

DGPU_PWRGD 28
9/28 Close to IC PC212 *8200p_50V_X7R_04 Close to Choke
FB_VDDQ_R
PR269 *10K_1%_04

FBVDDQ
㓦暣䶂嶗

PR272 PR270 PR271 PR273

15_1%_06 15_1%_06 15_1%_06 15_1%_06

VDD3

*10u_6.3V_X5R_06 PC219
VREFIN
Please EE check PR276
1V8_AON 9/13 Power Rbot2 2K_04 PQ34

5
5
5
5
1V8_AON PR294 QM3006M3
78.7K_1%_04
4
PR131 PR130

1
2
3
PR117 10K_1%_04
D

A
PQ35 A
*1K_1%_04 2SK3018S3
6

D 0_04 NV_FBVDDQ_EN
PR279 0_04 G PC213
2 G *10u_6.3V_X5R_06
S

S PQ7A
3

from NV L = 1.55V D MTDK3S6R PC84

H = 1.35V *0.01u_16V_X7R_04
PR116 *0402_short-p 5 G
10 GPIO8_MEM_VDD_CTL S PQ7B
4

PR118 MTDK3S6R
10K_1%_04 PC81

0.01u_16V_X7R_04
GND
GND 4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,53
22,27,42,43,44,45,46,47,49,50,51
VDD3
VIN
啵⣑ 暣 儎 CL EVO C .
O
Title
11,12,13,14,15
2,17,22,33,35,42,43,45,47,48
FBVDDQ
3.3V [52]FBVDDQ
22,35,37,42,45,46,47,48,49,53 5V
GND 8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,53 3.3VS Si ze Document Number Rev
10,16,17,18,51,53 1V8_AON A2 D02B
6-71-N85J0-D01
Dat e: Friday, March 02, 2018 Sheet 52 of 63
5 4 3 2 1

FBVDDQ B - 53
 Schematic Diagrams

PEX_VDD/3V3/1.8V
5 4 3 2 1

5V

PEX_VDD
PC185 PC184
PR245
22u_6.3V_X5R_08 PU11
INS19762842
0.1u_10V_X7R_04 1.0V
10_06
G5671RE1U
PR249 10K_04 DFN10 PEX_VDD
3.3VS G5671RE1U PEX_VDD_R
PEX_VDD_PWRGD
4 PGOOD VIN
9
T62
PJ30 *CV-40mil Default
17 NV_PEXVDD_EN
PR236 0_04 1 2
PEXVDD_EN
5 EN
OpenVR eg

PS6_SW_PEXVDD
3A
VIN 10 PL101 2 BCIHP0420TB-2R2M 1 2
Default PS6_VCC_PEXVDD
PJ31 *CV-40mil PC180 8 VCC PJ32
PR237 10K_04 1 2 SW
2 PC186 PC181 *3mm
VDD3
*0.1u_10V_X5R_04 SW 3

22u_6.3V_X5R_08

22u_6.3V_X5R_08
D PC178 D
6 FB
0.1u_10V_X7R_04 THERM
11 PS6_FB_RC_PEXVDD
NC NC PR248 0_04
PC179 *22p_50V_NPO_04

7
PS6_FB_PEXVDD Rt
PR247 13.7K_1%_04

Rb
PR246 20K_1%_04

GND
Vout= Vref * (1+(Rt/Rb))
1.05V= 0.6* (1+(15K/20K))

Open VREG Type 0

B.Schematic Diagrams

VDD3

VDD3

PC107 PC108 PR44

PR153
PR43 22u_6.3V_X5R_08 PU8 0.1u_10V_X7R_04 10K_1%_04
INS19763324
10K_04 10_06 3A
RT8071CGQW
DFN10

Default 0.200 COMMON

PR42 *160K_04 Default 1.8VA
9 PGOOD VIN
3
43 1.8VA_PGD

Sheet 53 of 60 3A @ 1.8V
OpenVR eg
PR175 0_04 1 2 10 EN/FS
4A PJ29
40,43,48 SLP_SUS# 8 0.400 1 2 BCIHP0420TB-2R2M 1 2
BOOT/NC PC31 *0.01u_16V_X7R_04 PL3
PJ24 *CV-40mil
2 VCC PC162 PC139 *3mm PC163
SW
6

PEX_VDD/3V3/1.8V

22u_6.3V_X5R_08

22u_6.3V_X5R_08

0.1u_10V_X7R_04
SW
7
PR41 PJ3 4
PC30 PC109 GND
1 2 1 FB GND 5
VDD3
C *0.22u_10V_X5R_04 1u_6.3V_X5R_04 THERM 11 C
PC122 3300p_50V_X7R_04 PR172 0_04 PR174 0_04
10K_04 *CV-40mil
Rt
PR173 20K_1%_04

Rb
PR154 10K_1%_04
Vout= Vref * (1+(Rt/Rb))
1.8V= 0.6 * (1+(20K/10K))

㓦暣䶂嶗 1V8_RUN PEX_VDD_R

1V8_AON

VDD3 VDD3
PR91 VDD3
PR55 PR240
100_04
PR56 100_04 PR92 15_1%_06
100K_04 100K_04

6
D PR238
6

6
100K_04 PQ28A
PQ2A D NV_1V8RUN_EN# PQ3A D
2G MTDK3S6R
MTDK3S6R MTDK3S6R
2G S 2G

1
S S
3

1
PQ2B D PQ3B D

3
PQ28B
NV_1V8AON_EN_R MTDK3S6R MTDK3S6R
1.8V_RUN_EN_R MTDK3S6R
D
5G 5G PEXVDD_EN
S S 5G
4

4
S

4
B B

1.8VA 1.8VA
C497 C496 C495
U27 G5016
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
1 6

1V8_AON 1A
2

13
IN1
IN1
IN2
IN2
7

8 2A
1V8_RUN
1V8_AON OUT1 OUT2 1V8_RUN
14 9
PR235 C498 OUT1 OUT2
10K_04 12 10
0.1u_10V_X7R_04 CT1 CT2
17 1V8_AON_PWRGD

VBIAS
C13 C14

GND

GND
EN1

EN2
100p_50V_NPO_04 100p_50V_NPO_04

15

11

5
D02_12/19_H
NV_1V8AON_EN_R 1.8V_RUN_EN_R
R1 0_04 VDD3 R3 0_04
17 NV_1V8AON_EN NV_1V8RUN_EN 17
C9 C8 C10
1u_6.3V_X5R_04
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04

A A

43,44 VREG5
30 1.8VA
35,42,44 VDD5

4,24,25,27,30,34,36,37,40,42,43,44,48,50,51,52 VDD3
8,9,20,21,22,23,24,26,27,28,29,32,34,36,37,38,39,40,41,42,47,51,52 3.3VS
10,16,17,18,51,52 1V8_AON
2,17,22,33,35,42,43,45,47,48 3.3V
啵 ⣑ 暣 儎 CL EVO CO .
Title
4,9,24,26,27,30,48
22,35,37,42,45,46,47,48,49,52
3.3VA
5V [53]PEX_VDD/3V3/1.8V
10,11 1V8_RUN
10,16 PEX_VDD Si ze Document Number Rev
A2 D02B
10,16,48 NV3V3

Dat e:
6-71-N85J0-D01
Friday, March 02, 2018 Sheet 53 of 63
5 4 3 2 1

B - 54 PEX_VDD/3V3/1.8V
 Schematic Diagrams

Audio Board

5 4 3 2 1

1AR *0_04 4AR *0_04

6-71-N8508-D03 2AR

3AR
*0_04

*0_04
5AR

6AR
*0_04

*0_04 A_5V
USB PORT(PORT9) USB2.0 CON AC12 *22u_6.3V_X5R_08 AGND

A_USBVCC2
60 mil
A_USBVCC2 AC4 0.1u_10V_X7R_04 AGND
AU3
60 mil 60 mil
Ἕㆸ慵䔲 5 1
AUDIO BOARD Connector AC18
VIN VOUT

GND
2 AC2 AC9 AC20 CLOSE TO CONNECTOR
AC10 22u_6.3V_X5R_08 AGND

D D

0.1u_10V_X7R_04

*0.1u_16V_X7R_04

10u_6.3V_X5R_06
10u_6.3V_X5R_064 3 AJ_USB2
EN# OC# AD37 1
AGND V+
SY6288D20AAC GND2
Gary_Change CON. for ME issue AGND AGND AGND DT1140-04LP-7 2 GND2 GND1
AUSB2_PP9 AUSB_PP9_C DATA_L GND1
A_5V 6-02-62882-9C0 6 5
AUSB2_PN9 7 4 AUSB_PN9_C 3
AGND AGND
AJ_AUD1 DATA_H
AGND AGND
8 3 AGND
GND3
AGND
GND1

1 9 2 4 GND4
AER5 0_04 GND AGND
2 10 1
3
4 AUSB_PP9 AUSB2_PP9 C107BF-10405-L
Gary_D02 for ALC269-VB7 co-lay 1 2
5 AGND AGND

B.Schematic Diagrams
6 AUSB_PN9
4 3 AEL1 AUSB2_PN9
7 Gary_D02 for BUG solution
8
9
10
A_3.3VS_AUD *WCM2012F2S-161T03

AER6 0_04 USB3.0 CON 60 mil

AC33 *22u_6.3V_X5R_08 AGND

11 AUSB_PP8 AGND AC27 22u_6.3V_X5R_08

A_USBVCC1 AGND
12 AUSB_PN8
13 6-19-41001-286 AC31 0.1u_10V_X7R_04 AGND
AGND

Sheet 54 of 60
14 AUSB3_RX8_P

+
15 AUSB3_RX8_N AC32 *100u_6.3V_B_A AGND
16
17 AUSB3_TX8_N AGND D02_01/02_H CLOSE TO CONNECTOR AJ_USB1
18
19
20
AUSB3_TX8_P

AUSB_PP9 AGND
AD35
AUSB3_TX8_P_C 9
SSTX+ SHIELD
GND1 Audio Board

Standard-A
21 AUSB_PN9 1 10 1
AUSB3_TX8_N_C VBUS
C 22 2 9 8 C
AGND AUSB_PN8_C SSTX-
23 AGND 3 8 AGND
2 GND3
AUSB3_TX8_N AUSB3_TX8N AUSB3_TX8_N_C D- SHIELD
24 AC25 0.1u_10V_X7R_04 4 7 4
AUSB3_TX8_P AUSB3_TX8P AUSB3_TX8_P_C AUSB_PP8_C GND
25 AC26 0.1u_10V_X7R_04 5 6 3 GND4
AUSB3_RX8_P_C 6 D+ SHIELD
26
27 Gary_D02 for ALC269-VB7 co-lay DT1140-04LP-7 7 SSRX+
AD36 AUSB3_RX8_N_C GND_D
28 5 GND2
PCB Footprint = FP201-040X1-0M

D02_01/02_H AUSB2_PN8 AUSB_PN8_C SSRX- SHIELD

FP201H-040S10M

29 5 6
AUSB2_PP8 AUSB_PP8_C
30 AHP_SENSE 4 7
31 AMIC_SENSE AGND
3 8 AGND AGND C19007-90905-L NEW AGND
AUSB3_RX8_P AUSB3_RX8_P_C
32 2 9
AMIC1-L AUSB3_RX8_N AUSB3_RX8_N_C
33 1 10
AMIC1-R Gary_SWAP
34 AHEADPHONE-L
35 AHEADPHONE-R
A_5V D02_01/03_H A_USBVCC1
36 60 mil AU1 60 mil DT1140-04LP-7
37 5 1
38
VIN VOUT Gary_SWAP 6-19-41001-286
GND2

39 AC15 2 AC30 AC29 AC28 AER7 0_04

A_AUDG GND
40

0.1u_10V_X7R_04

*0.1u_16V_X7R_04

10u_6.3V_X5R_06
10u_6.3V_X5R_064 3
EN# OC# AUSB_PN8 AUSB2_PN8
4 3
_ SY6288D20AAC
AUSB_PP8
AGND 1 2 AEL7 AUSB2_PP8
AGND AGND *WCM2012F2S-161T03
A_AUDG
6-02-62882-9C0 AGND AGND AGND
AER8 0_04

D02_01/02_H
B B
AJ_MIC1
6-19-31001-004
AUDIO JACK AMIC_SENSE
AMIC1-R AL4 FCM1005KF-121T03
AMIC1-R_R
5
4
3
6
AMIC1-L_R
AC11 *0.1u_16V_X7R_04 AMIC1-L AL5 FCM1005KF-121T03 2
1
AC14 *0.1u_16V_X7R_04 JK06006BQ7648
6-19-31001-004 AC8 AC7 PCB Footprint = 2SJ-T351-018-A
AC1 0.1u_10V_X7R_04 P/N = 6-20-B28L0-006
100p_50V_NPO_04 MIC IN
AC3 0.1u_10V_X7R_04 Resistor 32 or 33_04 100p_50V_NPO_04
meet WLK Test
BLACK
AGND A_AUDG VT1802P 6-19-31001-245 A_AUDG AJ_HP1
AH4 AH1 75_04 6-19-31001-271 5
2 4 C71D71N
6-19-31001-004 AHP_SENSE 4
AHEADPHONE-R_R
AHEADPHONE-R AR11 82_04 AHEADPHONE-R-R AL2 FCM1005KF-121T03 3
3 1 5 6
AHEADPHONE-L_R
AHEADPHONE-L AR12 82_04 AHEADPHONE-L-R AL3 FCM1005KF-121T03 2
1
MTH6_0D2_3 JK06006BQ7648
6-19-31001-004 AC6 AC5 PCB Footprint = 2SJ-T351-018-A
Gary_D02 for BUG solution
P/N = 6-20-B28L0-006
AGND AGND
AH3 100p_50V_NPO_04 100p_50V_NPO_04
HEADPHONE
2 4 BLACK
A A
3 1 5 AH5
C71D71N ALC269-VB7 CO-LAY D02_01/02_H A_AUDG
6-20-B2800-106 2SJ-T351-S23
MTH6_0D2_3

AGND AGND
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Gary_D02 for ME design Title
[54]AUDIO BOARD
Size Document Number Re v
A3 6-71-N8508-D03 D03

Date : Friday, March 02, 2018 Sheet 54 of 63

5 4 3 2 1

Audio Board B - 55
 Schematic Diagrams

Power Switch Board

5 4 3 2 1

1BR *0_04 4BR *0_04

POWER SW BOARD 6-71-N850S-D03 2BR

3BR
*0_04

*0_04
5BR

6BR
*0_04

*0_04
D

Ἕㆸ慵䔲
B.Schematic Diagrams

Sheet 55 of 60
Power Switch C C
BH_3.3VS BH_3.3VS
POWER POWER
Board POWER
BOTTOM
BUTTON BUTTON
LED LED
6-53-31500-B41 BR4 BR5
820_06 820_06
BSW1 Gary_change for ME
For N855/N870 T4BJB10BQR
BJ_SW1 1 2
6-13-82001-2AB 6-13-82001-2AB
BH_3.3VS
3 4 BPWRBTN# N85RC_RN N87RC_RN
1
2
3 BDGND PCBfootprint:
BPWRBTN# TJE-53X-Q Gary_D02 for N870 ME design
4 BSW1

A
FP226H-004S10M BDGND 5
N855N870RC_RN 1 2 BD4 N85RC_RN BD5 N87RC_RN
3 4
6 WHITE WHITE

C
RY-SP190DBW71-5A RY-SP190DBW71-5A
For N850 6-52-57301-022 6-52-57301-022
BJ_SW2
BH_3.3VS BDGND BDGND
1
2
B 3 BDGND B
BPWRBTN#
4
FP226H-004S10M
N850RC_RN

BH2 BH4 BH1

H5_5D2_3 H5_5D2_3 C71D71N

BDGND BDGND

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[55]POWER SWITCH BOARD
Size Document Number Re v
A3 6-71-N850S-D03 D03

Date : Friday, March 02, 2018 Sheet 55 of 63

5 4 3 2 1

B - 56 Power Switch Board

 Schematic Diagrams

Hall Sensor Board

5 4 3 2 1

HALL Sensor Board

1HR *0_04 4HR *0_04
D D
2HR *0_04 5HR *0_04

3HR *0_04 6HR *0_04

2/8
Ἕㆸ慵䔲

B.Schematic Diagrams
H_VDD3

HR2 100K_04
6-02-09249-LC0
6-02-00248-LC2
OLD Value MH248-ALFA-ESO
Sheet 56 of 60
HU1
H_LIDSW# HR1 H_LID_SW# H_VDD3
HJ_HALL1
1
Hall Sensor Board
C 1 2 C
VCC OUT H_GND 2
GND

*0402_short-p H_LID_SW# 3
4

2
HC2 HC1
AH9249NTR-G1 HD1 FP226H-004S10M
3
0.1u_10V_X7R_04

*100p_50V_NPO_04 *V15AVLC0402

H_GND H_GND H_GND

1
H_GND

B B

HH3
HH2 HH1 2 4
C71D71N C71D71N
3 1 5

MTH6_0D2_3

H_GND H_GND
A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[56]HALL SENSOR BOARD
Size Document Number Rev
A4 6-71-N8501-D03A D04

Date: Friday, March 02, 2018 Sheet 56 of 63

5 4 3 2 1

Hall Sensor Board B - 57

 Schematic Diagrams

Click Board

5 4 3 2 1

1CR *0_04 4CR *0_04

6-71-N8502-D03 2CR

3CR
*0_04

*0_04
5CR

6CR
*0_04

*0_04
CUSB_PN7
CUSB_PP7
1
2
CU1

10 CUSB_PN7_R
9 CUSB_PP7_R
CR1 1M_04
C_XIN

C_XOUT

C_GND 3 8 C_GND C_GND

4 7 3 4

Ἕㆸ慵䔲 5 6 C_GND 2 1
CX1
DT1140-04LP-7 CC3 HSX321G_12Mhz CC4
D D

15p_50V_NPO_04 15p_50V_NPO_04
C2.5V C3.3V

C_GND C_GND

CC5 CC6 CC7 CC8

B.Schematic Diagrams

0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06

CJ_FPB1

C_GND C_GND C2.5V 1 2

3 4
CMOSI 5 6
CMCLK 7 8 CLED1

Sheet 57 of 60 N87 CTP_VCC

CMCS
CMISO
C_XIN
9
11
13
10
12
14
CLED2
CDISCON

CLED1 CR2 10K_04 15 16

Click Board 8
CLED2 CR3 10K_04
C_XOUT
C_RST_N
17
19
21
18
20
22 CUSB_PN7_R
CUSB_PP7_R
C3.3V 23 24
7 C_TP_CLK 57
C 6 C_CTPBUTTON_L C_TP_DATA 57
*CON24A C
5 C_CTPBUTTON_R
C_GND QPOFZ-24R2-XD-Z-LD
4
3 C_GND C_GND
2 C_SMB_CLK 57 Place Botton
1 C_SMB_DATA 57 C3.3V
CJ_TP3

S
FP225H-008S11M G CDISCON
6-20-94K30-108 C_GND
N87RC_RN CQ1
D02 AO3415 C3.3V

D
CUSB_PP7_R
CR4 1.5K_04
CL1
C_RST_N HCB1005KF-121T20
CTP_VCC CR5 47K_04 FP226H-004S10M
C3.3V
4
3 CUSB_PN7 C_GND
CC9 CR6 27.4_1%_04
2 CUSB_PP7
CC1 CC2 CR7 27.4_1%_04
1u_6.3V_X5R_04 1
0.1u_10V_X7R_04 *10u_6.3V_X5R_06 N85 CJ_FP1

CJ_TP2 N87RC_RN
C_GND C_GND CJ_TP1 C_GND
6 D02
5 C_TP_DATA 57 C_CTPBUTTON_L
4 C_TP_CLK 57 C_CTPBUTTON_R 1
B 3 2 NC1 B
2 C_SMB_DATA 57 3 NC2
1 C_SMB_CLK 57 4
FPC0502-6AW-S-HF FP215H-004S1BM
6-20-94K10-006 PCB Footprint = 85201-0405R
N87RC_RN N85RC_RN
C_GND C_GND

LIFT RIGHT LIFT RIGHT

KEY KEY KEY KEY
6-53-31500-B41
CSW1 CSW2 CSW4 CSW3
T4BJB10BQR T4BJB10BQR T4BJB10BQR T4BJB10BQR
C_CTPBUTTON_L C_CTPBUTTON_R C_CTPBUTTON_L C_CTPBUTTON_R
1 2 1 2 1 2 1 2
3 4 3 4 3 4 3 4

6-53-31500-B40 6-53-31500-B40 6-53-31500-B40 6-53-31500-B40

C_GND W/O Finger C_GND C_GND

W/ Finger C_GND
6-53-31500-B41
A A

CH9
o70x110D70x110n CH5 CH6 CH3 CH7 CH8 CH2
CH4 CH1 2 4 2 4 2 4 2 4 2 4 2 4
C71D71N C71D71N
3 1 5 3 1 5 3 1 5 3 1 5 3 1 5 3 1 5 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
MTH6_0D2_3 MTH6_0D2_3 MTH6_0D2_3 MTH6_0D2_3 MTH7_0D2_8 MTH6_0D2_3 [57]CLICK BOARD
D02 D02 Size Document Number Re v
C_GND C_GND C_GND C_GND C_GND C_GNDC_GND C_GND C_GND C_GND C_GND C_GND A3 6-71-N85H2-D02 D02

Date : Friday, March 02, 2018 Sheet 57 of 63

5 4 3 2 1

B - 58 Click Board
 Schematic Diagrams

LED Board
5 4 3 2 1

1LR *0_04 4LR *0_04

6-71-N8704-D01 2LR *0_04 5LR *0_04

LED 3LR *0_04 6LR *0_04

D
Ἕㆸ慵䔲 D

6-52-55001-021
GREEN YELLOW LD1
L_3.3VS
LR4 220_04 A C L_LED_HDD#
HDD LED WLAN LED

RY-SP190YG34-5M WLAN ON Ṗ
GREEN YELLOW LD2
Windows 7
L_AIRPLAN_LED#
L_3.3VS
LR3 220_04 A

RY-SP190YG34-5M
C
Airplane mode WLAN OFF ᶵṖ

Airplane ON Ṗ
6-52-55001-021 Windows 8
ᶵṖ

B.Schematic Diagrams
Airplane OFF
3

WLAN/BLUETOOTH LED
1

LD3 GREEN/YELLOW
LR8 220_04 1 2 L_GND
Y

L_LED_PWR
*DT1140-04LP-7
LR9 220_04 3
SG 4 L_GND
BAT LED LJ_LED1
Sheet 58 of 60
1 10 L_LED_HDD#
C L_LED_ACIN

L_GND
L_LED_BAT_FULL
L_LED_BAT_CHG
2
3
4
9
8
7
L_GND
LD4
RY-SP155HYYG4-1
6-52-55002-04E
L_AIRPLAN_LED#
L_LED_BAT_FULL
L_LED_BAT_CHG
1
2
3
C

LED Board
5 6
LR1 220_04 1 2
GREEN/YELLOW L_LED_PWR 4
L_GND L_LED_ACIN 5
Y
LD5

LR2 220_04 3
SG 4 L_GND
POWER ON LED 6
7
8
9
NC2

NC1
L_GND 10
RY-SP155HYYG4-1
11
L_3.3VS 12
FP225H-012S10M

Gary_for common design(ESD)

B B

LH1 LH2
LH3 LH4 2 4 2 4
C85D85N C85D85N
3 1 5 3 1 5

MTH6_0D2_3 MTH6_0D2_3

L_GND L_GND L_GND L_GND

A A

ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[58]N87Hx LED BOARD
Size Document Number Re v
A3 6-71-N8704-D04 D04

Date : Friday, March 02, 2018 Sheet 58 of 63

5 4 3 2 1

LED Board B - 59
 Schematic Diagrams

Finger Print Board

5 4 3 2 1

D NOTE: MODE D
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE

1 30
EGND MODE
2 29 FUSB_PP FJ1
F3.3V AVDD DP
3 28 FUSB_PN F2.5V 1 2
B.Schematic Diagrams

F2.5V DVDD DN 3 4
4 27 FMOSI 5 6
F3.3V VDDIO UVDD F3.3V
FMCLK 7 8 FLED1
FLED1 5 26 FMCS FMCS 9 10 FLED2
LED1 SPI_CS FMISO 11 12 FDISCON
Sheet 59 of 60 FMOSI 6
SPI_MOSI SPI_MISO
25 FMISO
F_XIN
F_XOUT
13
15
14
16
FMCLK 7 24 FLED2 17 18
FingePrint Board C

FDISCON 8
SPI_CLK LED2
23
F_RST_N 19
21
20
22 FUSB_PN
C

DISCON DVSS_1 F3.3V F3.3V 23 24 FUSB_PP

9 22
UVSS AVSS_1 SPNZ-24S1-B-017-1-R
F_XOUT 10 21 F_XIN P/N = 6-21-41700-212
XO XI FGND FGND
11 20
F2.5V DVDD_1 AVSS
12 19
F3.3V RVDD AVDD_1 F3.3V
F_RST_N 13 18
RESETN CLK_SEL
14 17
DVSS EGND_2
15 16
SGND EGND_1
B B

ES603-WB
FGND FGND

* * G U 1 㕩怲ᶵ⎗ ≈㷔溆,ẍ⃵ ᶲ ẞ ⼴ 䞕 嶗
FJ1
1 23 23 1
A

2 24 24 2
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A

Title
BOTTON VIEW TOP VIEW
[59] FINGER PRINT BOARD
Size Document Number Rev

A
6-71-N85JF-D01 D01
Date: Friday, March 02, 2018 Sheet 59 of 63
5 4 3 2 1

B - 60 Finger Print Board

 Schematic Diagrams

Power Sequence
5 4 3 2 1

N850EJ Timing for G3 to S0/M0 [Non-Deep Sx Platform]

BIOS 烉P 2 A F S P
E C 烉P 1 C

0 1 2 3 ..30 ...... 100

( tPCH01: VccRTC stable (@90% of full value) to assertion RTCRST# high and SRTCRST# high. >9ms )

VDD3
D D

SLP_SUS#

1.8VA 257.86us

1.05VA 1.207ms

PWR_BTN# 376.44ms

3.3VA 2.7145ms

RSMRST 50.606ms ( tPCH03: VccPrimary stable (@95% of full value) to RSMRST# high >10ms )

DD_ON 30.5215ms

883us
3.3V

VDD5 3.518ms

B.Schematic Diagrams
3.518ms
5V
226.525ms
SUSC#
1.57ms ( tCPU01: VDDQ ramped and stable to VccST_PWRGD assertion >1ms , 2.404ms )
VDDQ
( tCPU03 : VDDQ ramped and stable before VCCST stable < 25ms , 2.282ms )
2.5V 1.915ms ( tPLT16 : VPP stable to VDDQ stable on power up > 30ms , -0.335ms )
This value is a suggested timing.
1.05_VCCST 3.852ms ( tCPU00:VCCST ramped and stable to VccST_PWRGD assertion >1ms , 2.66506ms )

0 1 2 3 4 5 6 7
( tCPU04:VCCST must always ramp with or earlier then VCCSTG. VCCST >= VCCSTG at all times during ramp > 0ns , 14.082ms )

8 9 10 ........ 20 30 40 50 60 70 80 90 100 ........ 200

Sheet 60 of 60
C

35.564us ( tPCH28: SLP_S3# assertion to SLP_S4# assertion >30us , 35us )

C
Power Sequence
SUSB#
( tPCH29: SLP_S3# assertion to PCH_PWROK deassertion >0ms , 6.072ms )

DDR1.35V_PWRGD 2.766ms
VCCIO_EN 2.766ms

VCCIO 3.84ms

3.3VS 1.181ms

5VS 1.262ms ( tPCH34 : All PCH Primary Rails should ramp up within this window. >80ms )

VCCIO_PWRGD 4.04ms

ALL_SYS_PWRGD 3.966ms ( tPLT04 : ALL_SYS_PWRGD assertion to PCH_PWROK This timing must be controlled on the platform > 1ms , 2.107ms )

DDR_VTT_PG_CTRL ( tCPU18 : DDR_VTT_CNTL (was DDR_PG_CTL) assertion to DDR VTT

3.966ms supplied ramped and stable while PLTRST = H (de-asserted). 0us < t < 35us , 18.043us )
VTT_MEM 3.966ms
3.974ms ( tCPU16 : VCCST_PWRGD assertion to PCH_PWROK assertion > 0ns , 2.098ms )
VCCST_PWRGD
( tCPU19 : VccST_PWRGD assertion to DDR_VTT_CNTL (was DDR_PG_CTL) asserted. 0ns< t < 100ns , 66.2ns )
VCORE_PG 6.072ms

PM_PCH_PWROK 6.072ms ( tPCH33: PCH_PWROK high to PLTRST# de-assertion This timing is set by the PCH via Soft strap settings.
>99ms , 166ms )
VCCSA 6.162ms ( tCPU05 : VDDQ ramped and stable before VCCSA/VCCIO ramps > 100ns , 4.59ms/2.27ms )
( tCPU06 : VCCST ramped and stable before VCCSA/VCCIO ramps > 100ns , 6.148ms/3.826ms )
( tCPU07 : VCCSA ramped and stable before VCCIO stable Note: there is no timing requirement between )
B B
SUSB#_C10# 16.9ns ( tCPU26 : CPU_C10_GATE# de-assertion to VCCSTG stable 10us < t < 65us , 14us
Note: CPU_C10_GATE# de-assertion to VCCST also needs to meet max 65us on cold boot )
1.05DX_VCCSTG 14.096us

VCCSFR_OC 1.599ms

SYS_PWROK 171.316ms

PM_PWROK 171.316ms

172.415ms
PLT_RST#

H_PWRGD 106.876ms
( tCPU09 :VCCSA stable before PROCPWRGD > 1ms , 100.708ms )
( tCPU10 : VCCIO stable before PROCPWRGD > 1ms , 103.03ms )
( tCPU11 : VCCPLL stable before PROCPWRGD > 1ms , 106.856ms )
( tCPU12 : VCCPLL_OC stable before PROCPWRGD > 1ms , 105.277ms )
193.665ms
VCORE

A A

啵 ⣑ 暣 儎 CLEVO
Title
[60]Power Sequencing
Size Document Number Re v
Custom D02A
6-71-N85H0-D02B
Date: Friday, March 02, 2018 Sheet 60
61 of 63
5 4 3 2 1

Power Sequence B - 61
 Schematic Diagrams
B.Schematic Diagrams

B - 62 Power Sequence
 BIOS Update

Appendix C:Updating the FLASH ROM BIOS 

BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.

C:BIOS Update
V1.0X.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.0X.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.0X.04).

Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

C - 1
 BIOS Update

Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “EFI Shell”. You will then be prompted to give “Y” or “N” responses to the programs being
loaded by EFI Shell. Choose “N” for any memory management programs.
2. You should now see DISK fsX:\> (X is the designated drive number for the CD/DVD drive/USB flash drive).
3. Type the following command:
fsX:\> Flash.nsh
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
C:BIOS Update

Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.

Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.

C-2