19-2634; Rev 0; 10/02

2-Wire Interfaced, 3V to 5.5V, 4-Digit,

9-Segment LED Display Drivers with Keyscan
General Description Features

MAX6958/MAX6959
The MAX6958/MAX6959 compact multiplexed com- ♦ 400kbps 2-Wire Serial Interface
mon-cathode display drivers interface microprocessors ♦ 3V to 5.5V Operation
to seven-segment numeric LED digits, or discrete LEDs
♦ Drive 4 Digits plus 4 or 8 Discrete LEDs
through an SMBus™- and I2C-compatible 2-wire serial
interface. The 2-wire serial interface uses fixed ♦ Drive Common-Cathode LED Digits
0.8V/2.1V logic thresholds for compatibility with 2.5V ♦ 23mA Constant-Current LED Segment Drive
and 3.3V systems when the display driver is powered ♦ Hexadecimal Decode/No-Decode Digit Selection
from a 5V supply.
♦ 64-Step Digital Brightness Control
The MAX6958/MAX6959 drive up to four 7-segment
♦ Slew-Rate-Limited Segment Drivers Reduced EMI
digits, with decimal points, plus four discrete LEDs, or
four 7-segment digits and eight discrete LEDs if the ♦ Debounces Up to Eight Switches with n-Key
digits’ decimal points are not used, or up to 36 discrete Rollover (MAX6959 Only)
LEDs. The MAX6959 also includes two input ports, one ♦ IRQ Output When a Key Input Is Debounced
or both of which may be configured as a key-switch (MAX6959 Only)
reader, which automatically scans and debounces a ♦ 20µA Low-Power Shutdown (Data Retained)
matrix of up to eight switches. Key-switch status is
obtained by polling internal status registers or by con- ♦ Automotive Temperature Range (-40°C to +125°C)
figuring the MAX6959 interrupt output. ♦ Compact 16-Pin PDIP and QSOP Packages
Other on-chip features include a hexadecimal font for Ordering Information
seven-segment displays, multiplex scan circuitry,
anode and cathode drivers, and static RAM that stores TEMP SLAVE PIN-
PART
each digit. The peak segment current for the display RANGE ADDRESS PACKAGE
digits is set internally to 23mA. Display intensity is
MAX6958AAEE -40°C to +125°C 0111000 16 QSOP-EP*
adjusted using a 64-step internal digital brightness con-
trol. The MAX6958/MAX6959 include a low-power shut- MAX6958AAPE -40°C to +125°C 0111000 16 DIP
down mode, a scan-limit register that allows the user to Ordering Information continued at end of data sheet.
display from one to four digits, and a test mode, which *EP = Exposed pad.
forces all LEDs on. The LED drivers are slew-rate-limit-
ed to reduce EMI. Typical Operating Circuit
The MAX6958/MAX6959 are available in 16-pin PDIP
and QSOP packages and are fully specified over the
-40°C to +125°C automotive temperature range. 8 8 8 8

µC
DIG0–DIG3 8
SDA SDA
Applications SCL SCL
SEG0–SEG8
5V

IRQ IRQ/SEG9 V+
Set-Top Boxes Audio/Video Equipment
MAX6959
Panel Meters Vending Machines INPUT1
INPUT2 GND
White Goods Industrial Controls
Key0
DIG0/SEG0

Key1
DIG1/SEG1

Key2
DIG2/SEG2

Key3
DIG3/SEG3

Key4
Pin Configuration, Functional Diagram, and Typical DIG4/SEG4

Application Circuit appear at end of data sheet. Key5

DIG5/SEG5

Key6
DIG6/SEG6

Key7
DIG7/SEG7
SMBus is a trademark of Intel Corp.

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
ABSOLUTE MAXIMUM RATINGS
MAX6958/MAX6959

Voltage (with respect to GND) Continuous Power Dissipation (TA = +70°C)

V+, SCL, SDA .......................................................-0.3V to +6V 16-Pin DIP (derate at 10.5mW/°C above +70°C) .........842mW
All Other Pins............................................-0.3V to (V+ + 0.3V) 16-Pin QSOP (derate at 8.34mW/°C above +70°C).....667mW
Current Operating Temperature Range
DIG0/SEG0–DIG3/SEG3 Sink Current ..........................275mA MAX695_ (TMIN to TMAX) ...............................-40°C to +125°C
DIG0/SEG0–SEG9 Source Current .................................30mA Junction Temperature ......................................................+150°C
SCL, SDA, INPUT1, INPUT2 ...........................................20mA Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS
(V+ = 3V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Operating Supply Voltage V+ 3 5.5 V
Shutdown mode, all TA = +25°C 20 50
Shutdown Supply Current ISHDN µA
digital inputs at V+ TA = TMIN to +85°C 125
Intensity set to full, TA = +25°C 5.9 6.7
no display load
Operating Supply Current I+ connected, INPUT1 mA
and INPUT2 open TA = TMIN to TMAX 7.5
circuit
Display Scan Rate fSCAN 4 digits scanned TA = TMIN to TMAX 510 780 1050 Hz
Keyscan Debounce Time tDEBOUNCE TA = TMIN to TMAX 30.3 41 63 ms
VLED = 2.4V, TA = +25°C -19 -23 -29
V+ = 4.5V to 5.5V TA = TMIN to TMAX -18 -30
Segment Drive Source Current ISEG mA
VLED = 2V, TA = +25°C -16 -29.5
V+ = 3V to 5.5V TA = TMIN to TMAX -15.5 -30.5
Segment Current Slew Rate ∆ISEG/∆t 11 mA/µs
Segment Drive Current Matching ∆ISEG 4 %
LOGIC INPUTS AND OUTPUTS
Input Leakage Current SCL
IIH, IIL -1 +1 µA
and SDA
Logic High Input Voltage SCL,
VIH 2.1 V
SDA
Logic Low Input Voltage SCL,
VIL 0.8 V
SDA
Input Leakage Current INPUT1,
IINH, IINL INPUT_ = V+ -1 +1 µA
INPUT2
Logic High Input Voltage INPUT1, 0.7 ✕
VINH V
INPUT2 V+
Logic Low Input Voltage INPUT1, 0.3 ✕
VINL V
INPUT2 V+

2 _______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
DC ELECTRICAL CHARACTERISTICS (continued)

MAX6958/MAX6959
(V+ = 3V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 5V, TA = +25°C.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Pullup to V+ INPUT1, INPUT2 IPULLUP 26.5 µA
IRQ/SEG9, SDA Output Low ISINK = 6mA, TA = -40°C to +85°C 0.4
VOLBK V
Voltage ISINK = 4mA, TA = TMIN to TMAX 0.4
SDA Output Low Voltage VOL(SDA) ISINK = 6mA 0.4 V

TIMING CHARACTERISTICS
(V+ = 3V to 5.5V, TA = TMIN to TMAX, Figure 1, unless otherwise noted.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Serial Clock Frequency fSCL 400 kHz
Bus Free Time Between a STOP
tBUF 1.3 µs
and a START Condition
Hold Time (Repeated) START
tHD, STA 0.6 µs
Condition
Repeated START Setup Time tSU, STA 0.6 µs
STOP Condition Setup Time tSU, STO 0.6 µs
Data Hold Time tHD, DAT (Note 3) 0.9 µs
Data Setup Time tSU, DAT 100 ns
SCL Clock Low Period tLOW 1.3 µs
SCL Clock High Period tHIGH 0.6 µs
Rise Time of Both SDA and SCL 20 +
tR (Notes 2, 4) 300 ns
Signals, Receiving 0.1CB
Fall Time of Both SDA and SCL 20 +
tF (Notes 2, 4) 300 ns
Signals, Receiving 0.1CB
20 +
Fall Time of SDA Transmitting tF (Notes 2, 5) 250 ns
0.1CB
Pulse Width of Spike Suppressed tSP (Note 6) 50 ns
Capacitive Load for Each Bus
CB 400 pF
Line

Note 1: All parameters tested at TA =+25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.
Note 5: ISINK ≤ 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

_______________________________________________________________________________________ 3
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
MAX6958/MAX6959

Typical Operating Characteristics

(V+ = 5V, LED forward voltage = 2.4V, TA = +25°C, unless otherwise noted.)

SCAN RATE (fSCAN) KEYSCAN DEBOUNCE TIME (tDEBOUNCE) SCAN RATE (fSCAN)
vs. TEMPERATURE vs. TEMPERATURE vs. SUPPLY VOLTAGE
800 42.5 790
MAX6958/59 toc01

MAX6958/59 toc02

MAX6958/59 toc03
795 5.5V 3V
KEYSCAN DEBOUNCE TIME (ms) 785
790 5V 42.0

785 4.5V 780

SCAN RATE (Hz)

4.5V
SCAN RATE (Hz)

41.5 5V
780
3V 5.5V 775
775
41.0
770 770
765 40.5
765
760

755 40.0 760

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 3.0 3.5 4.0 4.5 5.0 5.5
TEMPERATURE (°C) TEMPERATURE (°C) SUPPLY VOLTAGE (V)

KEYSCAN DEBOUNCE TIME (tDEBOUNCE) SEGMENT SOURCE CURRENT SEGMENT SOURCE CURRENT
vs. SUPPLY VOLTAGE vs. SUPPLY VOLTAGE vs. SUPPLY VOLTAGE
42.2 25 25
MAX6958/59 toc04

MAX6958/59 toc05

MAX6958/59 toc06
42.0
SEGMENT SOURCE CURRENT (mA)

SEGMENT SOURCE CURRENT (mA)

KEYSCAN DEBOUNCE TIME (ms)

41.8 20 20

41.6
15 15
41.4

41.2
10 10
41.0
40.8 5 5
40.6
VLED = 2.4V VLED = 2V
40.4 0 0
3.0 3.5 4.0 4.5 5.0 5.5 4.50 4.75 5.00 5.25 5.50 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)

WAVEFORM AT DIG0/SEG0, INPUT PULLUP CURRENT

FULL INTENSITY vs. TEMPERATURE
45
MAX6958/59 toc08
MAX6958/59 toc07

40 5.5V
INPUT PULLUP CURRENT (µA)

35 5V
30 4.5V

25

20
15 3V
10
VDIG0/
SEG0 5
1V/div
0
200µs/div -40 -20 0 20 40 60 80 100 120
TEMPERATURE (°C)

4 _______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Pin Description

MAX6958/MAX6959
PIN
NAME FUNCTION
MAX6958 MAX6959
1 1 SDA Serial Data I/O
2 2 SCL Serial Clock Input
3 — SEG9 Segment Output. Segment driver sourcing current to a display anode.
Interrupt or Segment Output. May be segment driver sourcing current to a display
— 3 IRQ/SEG9
anode, or open-drain interrupt output, or open-drain logic output.
Digit and Segment Drivers. Digit X outputs sink current from the display common
4–7, 11–15 4–7, 11–15 DIGX, SEGX cathode when acting as digit drivers. Segment X drivers source current to the display
anodes. Segment/digit drivers are high impedance when turned off.
8 8 GND Ground
9, 10 — N.C. No Connect. Connect to V+ or leave open.
General-Purpose Input Port 1 with Internal Pullup. May be configured as general-
— 9 INPUT1
purpose logic input or keyscan input. Connect to V+ or leave open if unused.
General-Purpose Input Port 2 with Internal Pullup. May be configured as general-
— 10 INPUT2
purpose logic input or keyscan input. Connect to V+ or leave open if unused.
16 16 V+ Positive Supply Voltage

Detailed Description MAX6958/MAX6959 can also drive multidigit LED dis-

plays that have the segments individually pinned for
The MAX6958/MAX6959 serially interfaced display dri-
each digit.
vers drive up to: four 7-segment digits plus four dis-
crete LEDs if the decimal points are used, or four To connect four single-digit displays to the MAX6958/
7-segment digits plus eight discrete LEDs if the deci- MAX6959, connect cathode outputs DIG0/SEG0–
mal points are not used, or 36 discrete LEDs. Table 1 DIG3/SEG3 to the cathodes of the four display digits as
lists the display connection scheme. shown in Table 1 (CC0–CC3). Drive eight additional
LEDs with SEG0 to SEG7. Four of the eight LEDs can
The MAX6958/MAX6959 include the hexadecimal font
be the decimal point (DP) segments of the four dis-
map for seven-segment displays. The seven-segment
plays, and the other four can be discrete LED indica-
LED digits can be controlled directly or programmed to
tors.
use the hexadecimal font. Direct segment control
allows the MAX6958/MAX6959 to drive bar graphs and To connect two dual-digit displays to the MAX6958/
discrete LED indicators. MAX6959, connect cathode outputs DIG0/SEG0 and
DIG1/SEG1 to the cathodes of the first dual digit.
The MAX6958/MAX6959 use a multiplexing scheme that
Connect DIG2/SEG2 and DIG3/SEG3 to the cathodes
minimizes the connections between the driver and LED
of the second dual digit. SEG0 to SEG3 can only drive
display. The MAX6958/MAX6959 can drive monocolor
discrete LEDs, not digit DP segments. SEG4 to SEG7
and bicolor single-digit type displays, and monocolor
can drive the DP segments if required. Bicolor single-
dual-digit displays. Dual-digit displays internally
digit displays are connected and treated as dual-digit
wire together the equivalent segments for each digit,
displays, each digit being one of the two colors.
requiring only eight segment pins instead of 16. The

Table 1. Standard Driver Connection to LED Displays

DIG0/SEG0 DIG1/SEG1 DIG2/SEG2 DIG3/SEG3 SEG 4 SEG 5 SEG 6 SEG 7 SEG 8 SEG 9/IRQ
LED Digit 0 CC0 SEG 0 SEG g SEG f SEG e SEG d SEG c SEG b SEG a SEG 4
LED Digit 1 SEG 1 CC1 SEG g SEG f SEG e SEG d SEG c SEG b SEG a SEG 5
LED Digit 2 SEG g SEG f CC2 SEG 2 SEG e SEG d SEG c SEG b SEG a SEG 6
LED Digit 3 SEG g SEG f SEG 3 CC3 SEG e SEG d SEG c SEG b SEG a SEG 7

_______________________________________________________________________________________ 5
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
MAX6958/MAX6959

SDA
tBUF
tSU, DAT tSU, STA
tHD, DAT
tHD, STA tSU, STO
tLOW
SCL tHIGH

tHD, STA

tR tF
START REPEATED START STOP START
CONDITION CONDITION CONDITION CONDITION

Figure 1. 2-Wire Serial Interface Timing Details

Differences Between MAX6958 The MAX6958/MAX6959 SDA line operates as both an
and MAX6959 input and an open-drain output. A pullup resistor, typi-
The MAX6958/MAX6959 have the same LED drive cally 4.7kΩ, is required on the SDA bus. The MAX6958/
capability, four common-cathode digits of nine seg- MAX6959 SCL line operates only as an input. A pullup
ments per digit. The MAX6959 additionally contains two resistor, typically 4.7kΩ, is required on the SCL bus if
logic input ports, INPUT1 and INPUT2. Each input port there are multiple masters on the 2-wire interface, or if
can be individually configured as either a general-pur- the master in a single-master system has an open-drain
pose input port that is read through the serial interface, SCL output.
or as a keyscan input. In keyscan mode, the input is Each transmission consists of a START condition
used to read and automatically debounce four key (Figure 2) sent by a master, followed by the MAX6958/
switches. A maximum of eight key switches can be MAX6959 7-bit slave address plus R/W bit (Figure 3), 1
read if both INPUT1 and INPUT2 are assigned to or more data bytes, and finally a STOP condition
keyscanning. (Figure 2).
The MAX6958's SEG9 output is preconfigured as the
9th LED segment output. The IRQ/SEG9 output on the Start and Stop Conditions
MAX6959 can be configured as either an open-drain Both SCL and SDA remain high when the interface is
logic output or the 9th segment output. This logic out- not busy. A master signals the beginning of a transmis-
put serves as either a general-purpose logic output, set sion with a START (S) condition by transitioning SDA
through the serial interface, or an interrupt (IRQ) output from high to low while SCL is high. When the master
that alerts a microcontroller of debounced key-switch has finished communicating with the slave, it issues a
events. Key-switch status can also be obtained by STOP (P) condition by transitioning the SDA from low to
polling the internal status registers at any time. high while SCL is high. The bus is then free for another
transmission (Figure 2).
Use the Option bit in the configuration register to detect
whether a MAX6958 or MAX6959 is present. The option
bit allows host software to establish whether a high-end
SDA
front panel (using the MAX6959 for keyscan support) or
a low-end panel (using a MAX6958 and no key switch-
es) is fitted to a product.
SCL
Serial Interface S P

Serial Addressing START STOP

CONDITION CONDITION
The MAX6958/MAX6959 operate as a slave that sends
and receives data through a 2-wire interface. The inter- Figure 2. Start and Stop Conditions
face uses a serial data line (SDA) and a serial clock line
(SCL) to achieve bidirectional communication between
master(s) and slave(s). A master, typically a microcon-
troller, initiates all data transfers to and from the
MAX6958/MAX6959, and generates the SCL clock that
synchronizes the data transfer (Figure 1).

6 _______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan

MAX6958/MAX6959
SDA 0 1 1 1 0 0 A0 R/W ACK

MSB LSB
SCL

Figure 3. Slave Address

CLOCK PULSE FOR

ACKNOWLEDGMENT
SDA START
CONDITION

SCL 1 2 8 9

SCL NOT ACKNOWLEDGE

SDA
DATA STABLE, CHANGE OF
DATA VALID DATA ALLOWED
ACKNOWLEDGE
Figure 4. Bit Transfer
Figure 5. Acknowledge
Bit Transfer
One data bit is transferred during each clock pulse. The MAX6958/MAX6959 are available in one of two
The data on the SDA line must remain stable while SCL possible slave addresses (see Table 2 and Ordering
is high (Figure 4). Information). The first 6 bits (MSBs) of the MAX6958/
MAX6959 slave address are always 011100. Slave
Acknowledge address bit A0 is internally hardwired to either GND in
The acknowledge bit is a clocked 9th bit that the recipi- the MAX695_A_, or V+ in the MAX695_B_. A maximum
ent uses to handshake receipt of each byte of data of two MAX6958/MAX6959 devices can share a bus.
(Figure 5). Thus, each byte transferred effectively
requires 9 bits. The master generates the 9th clock Message Format for Writing
pulse, and the recipient pulls down SDA during the A write to the MAX6958/MAX6959 comprises the trans-
acknowledge clock pulse, such that the SDA line is sta- mission of the MAX6958/MAX6959s’ slave address with
ble low during the high period of the clock pulse. When the R/W bit set to zero, followed by at least 1 byte of
the master is transmitting to the MAX6958/MAX6959, information. The first byte of information is the com-
the MAX6958/MAX6959 generate the acknowledge bit mand byte, which determines the register that stores
because the MAX6958/MAX6959 are the recipients. the next byte written to the MAX6958/MAX6959. If a
When the MAX6958/MAX6959 are transmitting to the STOP condition is detected after the command byte is
master, the master generates the acknowledge bit received, the MAX6958/MAX6959 take no further action
because the master is the recipient. (Figure 6) beyond storing the command byte.

Slave Address Table 2. MAX6958/MAX6959 Address Map

The MAX6958/MAX6959 have a 7-bit-long slave MAX6958/MAX6959 DEVICE ADDRESS
SLAVE ADDRESS
address (Figure 3). The eighth bit following the 7-bit
BIT A0 A6 A5 A4 A3 A2 A1 A0
slave address is the R/W bit. Set the R/W bit low for a
write command and high for a read command. MAX695_A_ 0 1 1 1 0 0 0
MAX695_B_ 0 1 1 1 0 0 1

COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION D15 D14 D13 D12 D11 D10 D9 D8
ACKNOWLEDGE FROM
MAX6958/MAX6959

S SLAVE ADDRESS 0 A COMMAND BYTE A P

ACKNOWLEDGE FROM
R/W
MAX6958/MAX6959

Figure 6. Command Byte Received

_______________________________________________________________________________________ 7
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
MAX6958/MAX6959

ACKNOWLEDGE FROM MAX6958/MAX6959 ACKNOWLEDGE FROM MAX6958/MAX6959

HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX6958/MAX6959s' REGISTERS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ACKNOWLEDGE FROM
MAX6958/MAX6959

S SLAVE ADDRESS 0 A COMMAND BYTE A DATA BYTE A P

R/W 1 BYTE

AUTOINCREMENT MEMORY WORD ADDRESS

Figure 7. Command and Single Data Byte Received

ACKNOWLEDGE FROM MAX6958/MAX6959 ACKNOWLEDGE FROM MAX6958/MAX6959

HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX6958/MAX6959s' REGISTERS D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ACKNOWLEDGE FROM
MAX6958/MAX6959

S SLAVE ADDRESS 0 A COMMAND BYTE A DATA BYTE A P

R/W n BYTES

AUTOINCREMENT MEMORY WORD ADDRESS

Figure 8. n Data Bytes Received

ACKNOWLEDGE FROM THE MASTER NOT ACKNOWLEDGE FROM MASTER

HOW THE MAX6958/MAX6959 SENDS DATA
TO THE MASTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

ACKNOWLEDGE FROM MAX6958/MAX6959

S SLAVE ADDRESS 1 A FIRST DATA BYTE A DATA BYTE A P

R/W n BYTES

AUTOINCREMENT MEMORY WORD ADDRESS AUTOINCREMENT MEMORY WORD ADDRESS

Figure 9. Reading n Data Bytes from the MAX6958/MAX6959

Bytes received after the command byte are data bytes. each data byte read using the same rules as for a write
The first data byte goes into the internal register of the (Table 3). A read is initiated by first configuring the
MAX6958/MAX6959 as selected by the command byte MAX6958/MAX6959s’ command byte with a write com-
(Figure 7). mand (Figure 6). The master can now read n consecu-
The address pointer in the MAX6958/MAX6959 autoin- tive bytes from the MAX6958/MAX6959. The master
crements after each data byte. If multiple data bytes acknowledges receipt of each read byte during the
are transmitted before a STOP condition is detected, acknowledge clock pulse. The master must acknowl-
these bytes are stored in subsequent MAX6958/ edge all consecutive bytes received except the last
MAX6959 internal registers (Figure 8), unless the byte. The final read byte must be followed by a not
address pointer has reached address 01111111. The acknowledge from the master and then a stop condi-
address pointer does not autoincrement once address tion (Figure 9). The first data byte is read from the reg-
01111111 has been reached (Table 3). ister addressed by the initialized command byte
(Figure 8). Reset the address pointer when performing
Message Format for Reading read-after-write verification because the stored byte
The MAX6958/MAX6959 are read using the internally address is autoincremented after the write. The
stored command byte as an address pointer the same address pointer does not autoincrement if it points to
way the stored command byte is used as an address register 01111111 (Table 3).
pointer for a write. The pointer autoincrements after Table 4 is the register address map.

8 _______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Command Address Autoincrementing

MAX6958/MAX6959
Table 3. Command Address
Address autoincrementing allows the MAX6958/
Autoincrement Behavior MAX6959 to be configured with the shortest number of
COMMAND BYTE transmissions by minimizing the number of times the
AUTOINCREMENT BEHAVIOR
ADDRESS RANGE command byte needs to be sent. The address pointer
stored in the MAX6958/MAX6959 increments after each
00000000 to Command byte address autoincrements data byte is written or read, unless the address equals
01111110 after byte read or written
01111111 (Table 3).
Command byte address remains at
01111111 Digit Type Registers
01111111 after byte written or read
The MAX6958/MAX6959 store display data in five regis-
ters. The four digit registers each control the seven
Operation with Multiple Masters numeric segments of a seven-segment digit, but not
If the MAX6958/MAX6959 are operated on a 2-wire the DP segments. The segments register controls eight
interface with multiple masters, a master reading the individual LEDs, which can be any mix of discrete LEDs
MAX6958/MAX6959 should use a repeated start and any or all of the DP segments of the four 7-seg-
between the write, which sets the MAX6958/MAX6959s’ ment digits (Table 5) (Figure 10).
address pointer, and the read(s) that takes the data
from the location(s) set by the address pointer. It is
a
possible for master 2 to take over the bus after master
1 has set up the MAX6958/MAX6959s’ address pointer f b
but before master 1 has read the data. If master 2 sub- g
sequently changes the MAX6958/MAX6959s’ address
pointer, then master 1's delayed read may be from an e c
dp
unexpected location. d

Figure 10. Segment Labeling for 7-Segment Display

Table 4. Register Address Map

COMMAND ADDRESS HEX
REGISTER
D15 D14 D13 D12 D11 D10 D9 D8 CODE
No-op 0 0 0 0 0 0 0 0 0x00
Decode mode 0 0 0 0 0 0 0 1 0x01
Intensity 0 0 0 0 0 0 1 0 0x02
Scan limit 0 0 0 0 0 0 1 1 0x03
Configuration 0 0 0 0 0 1 0 0 0x04
Factory reserved. Do not write to this register. 0 0 0 0 0 1 0 1 0x05
GPIO (MAX6959 only) 0 0 0 0 0 1 1 0 0x06
Display test 0 0 0 0 0 1 1 1 0x07
Read key debounced (MAX6959 only)
0 0 0 0 1 0 0 0 0x08
A write to this register is ignored.
Read key pressed (MAX6959 only)
0 0 0 0 1 1 0 0 0x0C
A write to this register is ignored.
Digit 0 0 0 1 0 0 0 0 0 0x20
Digit 1 0 0 1 0 0 0 0 1 0x21
Digit 2 0 0 1 0 0 0 1 0 0x22
Digit 3 0 0 1 0 0 0 1 1 0x23
Segments 0 0 1 0 0 1 0 0 0x24

_______________________________________________________________________________________ 9
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
MAX6958/MAX6959

Table 5. No-Decode Mode Data Bits and Corresponding Segment Lines

ADDRESS REGISTER DATA
DIGIT/SEGMENT REGISTER
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Digit 0 0x20 X SEG a SEG b SEG c SEG d SEG e SEG f SEG g
Digit 1 0x21 X SEG a SEG b SEG c SEG d SEG e SEG f SEG g
Digit 2 0x22 X SEG a SEG b SEG c SEG d SEG e SEG f SEG g
Digit 3 0x23 X SEG a SEG b SEG c SEG d SEG e SEG f SEG g
Segments 0x24 SEG 7 SEG 6 SEG 5 SEG 4 SEG 3 SEG 2 SEG 1 SEG 0

The digit registers and segments register use 1 bit to In hexadecimal code-decode mode, the decoder looks
set the state of one segment. Each bit is high to turn a only at the lower nibble of the data in the digit register
segment on, or low to turn it off (Table 6). (D3–D0), disregarding bits D7–D4. Table 7 lists the hexa-
decimal code font. When no decode is selected, data
Table 6. No-Decode Mode Data Bits and bits D7–D0 correspond to the segment lines of the
Corresponding Segment Lines MAX6958/MAX6959. Table 8 shows the one-to-one pair-
ing of each data bit to the appropriate segment line.
REGISTER BIT SEGMENT BEHAVIOR
Initial Power-Up
0 Segment off
On initial power-up, all control registers are reset, the
1 Segment on display is blanked, and the MAX6958/MAX6959 enter
shutdown mode (Table 9). At power-up, the MAX6958/
MAX6959 are initially set to scan four digits, do not
Decode-Mode Register
decode data in the digit registers or scan key switches
The decode-mode register sets hexadecimal code
(0–9, A–F) or no-decode operation for each digit. Each (MAX6959 only), and the intensity register is set to a
low value (4/64 intensity).
bit in the register corresponds to one digit. Logic high
selects hexadecimal decoding while logic low bypass-
es the decoder. Digits can be set for decode or no
decode in any combination. Bit assignment and exam-
ples of the decode mode control register format are
shown in Table 7.

Table 7. Decode-Mode Register Examples

ADDRESS REGISTER DATA HEX
DECODE MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE

Bit assignment for each digit 0x01 X X X X Digit 3 Digit 2 Digit 1 Digit 0 —

No decode for digits 3–0 0x01 X X X X 0 0 0 0 0xX0

Hexadecimal decode for digit
0x01 X X X X 0 0 0 1 0xX1
0; no decode for digits 3–1
— — — — — — — — — — —
Hexadecimal decode for digits
0x01 X X X X 0 1 1 1 0xX7
2–0; no decode for digit 3
Hexadecimal decode for digit
0x01 X X X X 1 0 0 0 0xX8
3; no decode for digits 2–0
— — — — — — — — — — —
Hexadecimal decode for digits
0x01 X X X X 1 1 1 1 0xXF
3–0

10 ______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan

MAX6958/MAX6959
Table 8. Seven-Segment Mapping Decoder for Hexadecimal Font
7-SEGMENT REGISTER DATA ON SEGMENTS = 1
CHARACTER D7–D4 D3 D2 D1 D0 a b c d e f g
0 X 0 0 0 0 1 1 1 1 1 1 0
1 X 0 0 0 1 0 1 1 0 0 0 0
2 X 0 0 1 0 1 1 0 1 1 0 1
3 X 0 0 1 1 1 1 1 1 0 0 1
4 X 0 1 0 0 0 1 1 0 0 1 1
5 X 0 1 0 1 1 0 1 1 0 1 1
6 X 0 1 1 0 1 0 1 1 1 1 1
7 X 0 1 1 1 1 1 1 0 0 0 0
8 X 1 0 0 0 1 1 1 1 1 1 1
9 X 1 0 0 1 1 1 1 1 0 1 1
A X 1 0 1 0 1 1 1 0 1 1 1
B X 1 0 1 1 0 0 1 1 1 1 1
C X 1 1 0 0 1 0 0 1 1 1 0
D X 1 1 0 1 0 1 1 1 1 0 1
E X 1 1 1 0 1 0 0 1 1 1 1
F X 1 1 1 1 1 0 0 0 1 1 1

Table 9. Initial Power-Up Register Status

ADDRESS REGISTER DATA
REGISTER POWER-UP CONDITION
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Decode mode No decode for digits 3–0 0x01 X X X X 0 0 0 0
Intensity 4/64 intensity 0x02 X X 0 0 0 1 0 0
Scan limit Display 4 digits: 0 1 2 3 0x03 X X X X X X 1 1
Configuration Shutdown enabled 0x04 X X 0 X X X D bit 0
IRQ/SEG9 is a segment output
(not IRQ or logic output);
GPIO* 0x06 1 0 0 0 0 X X 0
INPUT2 and INPUT1 are logic
inputs; IRQ flag is clear
Display test Normal operation 0x07 X X X X X X X 0
Key debounced* No key detected as debounced 0x08 0 0 0 0 0 0 0 0
Key pressed* No key detected as pressed 0x0C 0 0 0 0 0 0 0 0
Digit 0 Blank digit (because not decoded) 0x20 X 0 0 0 0 0 0 0
Digit 1 Blank digit (because not decoded) 0x21 X 0 0 0 0 0 0 0
Digit 2 Blank digit (because not decoded) 0x22 X 0 0 0 0 0 0 0
Digit 3 Blank digit (because not decoded) 0x23 X 0 0 0 0 0 0 0
Segments Blank segments 0x24 0 0 0 0 0 0 0 0
*MAX6959 only.

______________________________________________________________________________________ 11
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Configuration Register scanned. Since the number of scanned digits affects
MAX6958/MAX6959

Use the configuration register to enter and exit shut- the display brightness, the scan-limit register should
down, check device type, and globally clear the digit not be used to blank portions of the display (such as
data (Tables 10–13). The S bit selects shutdown or nor- leading zero suppression).
mal operation (read/write). The D bit reports whether
the device is a MAX6958 or a MAX6959 (read only). Intensity Register
The R bit clears all the digit and segment data (data is An internal pulse-width modulator controlled by the
not stored-transient bit) intensity register provides digital control of display
brightness. The modulator scales the average segment
Scan-Limit Register current in 63 steps from a maximum of 63/64 down to
The scan-limit register sets the number of digits dis- 1/64 of the 23mA peak current. The minimum interdigit
played, from one to four (Table 14). A bicolor digit is blanking time is set to 1/64 of a cycle (Figure 11 and
connected as two monocolor digits. The scan-limit reg- Table 15).
ister also limits the number of keys that can be

Table 10. Configuration Register Format

ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Configuration register 0x04 X X R X X X D S

Table 11. Shutdown Control (S Data Bit D0) Format

ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Shutdown mode 0x04 X X R X X X D 0
Normal operation 0x04 X X R X X X D 1

Table 12. Device Readback (D Data Bit D1) Format

ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
MAX6958 0x04 X X R X X X 0 S
MAX6959 0x04 X X R X X X 1 S

Table 13. Global Clear Digit Data (R Data Bit D5) Format
ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Digit and segment data are unaffected 0x04 X X 0 X X X D S
Digit and segment data are cleared 0x04 X X 1 X X X D S

Table 14. Scan-Limit Register Format

ADDRESS REGISTER DATA HEX
SCAN LIMIT
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE
Display digit 0 and segments 0, 4 0x03 X X X X X X 0 0 0xX0
Display digits 0, 1 and segments 0, 1, 4, 5 0x03 X X X X X X 0 1 0xX1
Display digits 0, 1, 2 and segments 0, 1, 2, 4, 5, 6 0x03 X X X X X X 1 0 0xX2
Display digits 0, 1, 2, 3 and segments 0, 1, 2, 3, 4,
0x03 X X X X X X 1 1 0xX3
5, 6, 7

12 ______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan

MAX6958/MAX6959
Table 15. Global Intensity Register Format
TYPICAL SEGMENT ADDRESS
DUTY CYCLE D7 D6 D5 D4 D3 D2 D1 D0 HEX CODE
CURRENT (mA) CODE (HEX)
1/64 (min on) 0.36 0x02 X X 0 0 0 0 0 0 0x00
2/64 0.72 0x02 X X 0 0 0 0 0 1 0x01
3/64 1.08 0x02 X X 0 0 0 0 1 0 0x02
4/64 1.44 0x02 X X 0 0 0 0 1 1 0x03
5/64 1.80 0x02 X X 0 0 0 1 0 0 0x04
6/64 2.16 0x02 X X 0 0 0 1 0 1 0x05
— — 0x02 X X — — — — — — —
60/64 21.56 0x02 X X 1 1 1 0 1 1 0x3B
61/64 21.92 0x02 X X 1 1 1 1 0 0 0x3C
62/64 22.28 0x02 X X 1 1 1 1 0 1 0x3D
63/64 22.64 0x02 X X 1 1 1 1 1 0 0x3E
63/64 (max on) 22.64 0x02 X X 1 1 1 1 1 1 0x3F

START OF
NEXT CYCLE
ONE COMPLETE 1.28ms MULTIPLEX CYCLE AROUND 4 DIGITS

DIGIT 0 DIGIT 1 DIGIT 2 DIGIT 3 DIGIT 0

DIGIT 0 CATHODE
DRIVER INTENSITY
SETTINGS DIGIT 0's 320µs MULTIPLEX TIMESLOT
HIGH-Z
LOW
1/64th
(MIN ON)
HIGH-Z
2/64th LOW
HIGH-Z
3/64th LOW

HIGH-Z
61/64th LOW

HIGH-Z
62/16th LOW

HIGH-Z
63/64th LOW

HIGH-Z
63/64th LOW
(MAX ON)

MINIMUM 5µs INTERDIGIT BLANKING INTERVAL

ANODE (LIT) CURRENT SOURCE ENABLED

HIGH-Z
HIGH-Z
ANODE (UNLIT)

HIGH-Z
HIGH-Z

Figure 11. Multiplex Timing Diagram

______________________________________________________________________________________ 13
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Ports and Key Scanning The keyscanning circuit utilizes the LED’s common-
MAX6958/MAX6959

(MAX6959 Only) cathode driver outputs as the keyscan drivers. The out-
The MAX6959 features two input ports, INPUT1 and puts DIG0/SEG0 to DIG3/SEG3 pulse low for nominally
INPUT2. These two ports can be used as general-pur- 320µs sequentially as the displays are multiplexed. The
pose logic inputs, or configured to perform automatic actual low time varies from 5µs to 315µs due to pulse-
keyscanning. Both ports have internal pullup resistors width modulation from 1/64th to 63/64th for intensity
enabled in shutdown and normal operation for both control. The timing diagram (Figure 14) shows the typi-
general-purpose input mode and keyscanning mode. cal situation when all four LED cathode drivers are used.
The ports can be read using the 2-wire interface. The maximum eight keys can be scanned only if the
The keyscan logic uses one or both of the INPUT1 and scan-limit register is set to scan the maximum four dig-
INPUT2 logic inputs (Figure 12). An interrupt output that its. If fewer than four digits are driven, then only (2 x n)
flags key presses is optional. The interrupt flag can be switches can be scanned, where n is the number of dig-
read (polled) through the serial interface instead, allow- its (1, 2, 3, or 4) set in the scan-limit register (Table 14).
ing IRQ/SEG9 to be used as an open-drain general- The keyscan cycle loops continuously over time, with
purpose logic output or as a segment driver. all eight keys experiencing a full keyscanning
One small-signal diode is required per key switch when debounce over 41ms (Figure 14). A key press is
more than one key is connected to INPUT1 or INPUT2. debounced and an interrupt issued if at least one key
The diodes prevent two simultaneous key switch that was not pressed in a previous cycle is found
depressions from shorting digit drivers together. For pressed during both sampling periods. The keyscan
example, if KEY0 and KEY1 were pressed together circuit detects any combination of keys pressed during
(Figure 12) and the diodes were not fitted, DIG0/SEG0 each debounce cycle (n-key rollover).
and DIG1/SEG1 would be shorted together and the Port Configuration Register
LED multiplexing would be incorrect. These diodes can (MAX6959 Only)
be common-anode dual diodes in SOT23 like BAW56. The port configuration register configures INPUT1,
A diode is not required for a single key connection to INPUT2, and IRQ/SEG9 ports for the MAX6959 (Table 16).
INPUT1 or INPUT2. Therefore, up to two key switches
can be automatically debounced without adding IRQ/SEG9 can be set to either an LED segment output
diodes (Figure 13). (driving four multiplexed LED segments), or an open-
drain logic output. The open-drain logic output can be
Resistors R1 and R2 are required if the MAX6959 is configured as either an IRQ output controlled by the
operated with V+ greater than 4V. R1 and R2 are keyscan circuitry, or as a general-purpose logic output
optional if V+ is between 3V and 4V. controlled through the 2-wire interface. Connect a

DIG0/SEG0
Key0 Key4

DIG1/SEG1 Key4
DIG0/SEG0
Key1 Key5
Key0
DIG2/SEG2
Key2 Key6 V+ R1
39kΩ
DIG3/SEG3 INPUT1 V+
Key3 Key7 R2
39kΩ
V+ R1 INPUT2 4.7kΩ
39kΩ
INPUT1 V+
R2
IRQ/SEG9
39kΩ
INPUT2 4.7kΩ MICROCONTROLLER INTERRUPT

IRQ/SEG9
MICROCONTROLLER INTERRUPT

Figure 12. Maximum Keyscan Configuration Figure 13. Keyscanning Two Keys Without Diodes

14 ______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan

MAX6958/MAX6959
tDEBOUNCE

THE FIRST HALF OF A 41ms KEYSCAN CYCLE THE SECOND HALF OF A 41ms KEYSCAN CYCLE
1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX 1.28ms MULTIPLEX
CYCLE 1 CYCLE 2 CYCLE 3 CYCLE 4 CYCLE 15 CYCLE 16 CYCLE 1 CYCLE 2 CYCLE 15 CYCLE 16

5µs TO 315µs DIGIT PERIOD

DIG0/SEG0

DIG1/SEG1

DIG2/SEG2

DIG3/SEG3

INPUT1 Key0 Key1 Key2 Key3 Key0 Key1 Key2 Key3

INPUT2 Key4 Key5 Key6 Key7 Key4 Key5 Key6 Key7

A B C D E

A
FIRST TEST OF KEYS SECOND TEST OF KEYS INTERRUPT ASSERTED IF REQUIRED
KEY DEBOUNCED REGISTER UPDATED

START OF NEXT KEYSCAN CYCLE

Figure 14. Keyscan Timing Diagram

pullup resistor from IRQ/SEG9 to a voltage no greater pullups are always enabled, even in shutdown. Ensure
than 5.5V when configuring IRQ/SEG9 as an interrupt these inputs are either close to V+ or open circuit for
or logic output. minimum shutdown supply current. If both INPUT1 and
INPUT1 and INPUT2 can be individually configured as INPUT2 are assigned to keyscan, then eight keys can
either general-purpose logic inputs or as keyscan be debounced. If only INPUT1 or INPUT2 is assigned
inputs. In either mode, the input structure is the same— to keyscan, then only four keys can be debounced.
CMOS logic inputs with internal pullup resistors. The

Table 16. Port Configuration Register Format

ADDRESS REGISTER DATA
MODE CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0

This is the bit assignment:

Read back Read back Read back
INPUT2 INPUT1 IRQ status
Read GPIO register 0x06 IRQ/SEG9 INPUT 2 INPUT 1
logic level logic level (1 = interrupt)
configuration configuration configuration
Configure Configure
Configure
INPUT 2: INPUT 1:
Write GPIO register 0x06 IRQ/SEG9 X X X
0 = logic input 0 = logic input
output
1 = keyscan 1 = keyscan
Here are the IRQ/SEG9 allocation options, determined by the settings of D7, D6, D5:
IRQ/SEG9 is logic 0 output 0x06 0 0 0 X X X X X
IRQ/SEG9 is logic 1 output 0x06 0 0 1 X X X X X
IRQ/SEG9 is active-low
0x06 0 1 0 X X X X X
IRQ
IRQ/SEG9 is active-high
0x06 0 1 1 X X X X X
IRQ
IRQ/SEG9 is segment
0x06 1 X X X X X X X
driver

______________________________________________________________________________________ 15
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Key Debounced Register (MAX6959 Only) detected as pressed by the keyscanning circuit during
MAX6958/MAX6959

The key debounced register shows which keys have the last test. Reading the key pressed register does not
been detected as debounced by the keyscanning cir- clear either the key pressed register, or the key
cuit (Table 17). Each bit in the register corresponds to debounced register, and does not clear the IRQ output.
one key switch. The bit is set to 1 if the switch has been The key pressed register is read only. A write to
correctly debounced since the last key debounced reg- address 0x0C is ignored.
ister read operation.
Reading the key debounced register clears the register Display Test Register
(after the data has been read) so that future key presses The display test register operates in two modes: normal
can be identified. If the key debounced register is not and display test (Table 19). Display test mode turns on
read, the keyscan data accumulates. There is no FIFO all LEDs by overriding, but not altering, all control and
register in the MAX6959. Key-press order, or whether a digit registers (including the shutdown register) except
key has been pressed more than once, cannot be for the port configuration register. The duty cycle while
determined unless the key debounced register is read in display test mode is 28/64.
after each interrupt and before completion of the next Applications Information
keyscan cycle.
Reading the key debounced register clears the IRQ Driving Bicolor LEDs
output. If a key is pressed and held down, the key is Bicolor digits combine a red and a green die for each
reported as debounced (and an IRQ is issued) only display element, so that the element displays red or
once. The key must be detected as released by the green (or orange), depending on which die (or both) is
keyscanning circuit before it is debounced again. lit. The MAX6958/MAX6959 treat a bicolor digit as two
monocolor digits.
The key debounced register is read only. A write to
address 0x08 is ignored. Low-Voltage Operation
The MAX6958/MAX6959 are guaranteed to drive a 23mA
Key Pressed Register (MAX6959 Only) segment current into 2.4V (or lower) LEDs when operat-
The key pressed register shows which keys have been ed from a supply voltage of 4.5V to 5.5V. Operating the
detected as pressed by the keyscanning circuit during MAX6958/MAX6959 from a supply voltage lower than
the last test. Each bit in the register corresponds to one 4.5V reduces the LED drive current. The drivers drive at
key switch. The bit is set if the switch has been detect- least 15.5mA segment current into 2V (or lower) LEDs
ed as pressed by the keyscanning circuit during the when operated from a 3V supply voltage.
last test. The bit is cleared if the switch has not been

Table 17. Key Debounced Register Format

REGISTER DATA
ADDRESS WITH APPROPRIATE SWITCH NAMED BELOW
KEY DEBOUNCED REGISTER
CODE (HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Key debounced register 0x08 Key7 Key6 Key5 Key4 Key3 Key2 Key1 Key0

Table 18. Key Pressed Register Format

REGISTER DATA
ADDRESS WITH APPROPRIATE SWITCH NAMED BELOW
KEY PRESSED REGISTER
CODE (HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Key pressed register 0x0C Key7 Key6 Key5 Key4 Key3 Key2 Key1 Key0

Table 19. Display Test Register

ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Normal operation 0x07 X X X X X X X 0
Display test mode 0x07 X X X X X X X 1

16 ______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Computing Power Dissipation For a 16-pin DIP package (TJA = 1/0.0105 = +95.2°C/W

MAX6958/MAX6959
Determine the MAX6958/MAX6959 upper-limit power from Absolute Maximum Ratings), the maximum
dissipation (PD) with the following equation: allowed ambient temperature TA is given by:

PD = (V+ ✕ I+) + (V+ - VLED) (DUTY ✕ ISEG ✕ N) TJ(MAX) = TA + (PD ✕ TJA) = +150°C
= TA + (0.652 ✕ 95.2°C/W)
where:
V+ = supply voltage Therefore, TA = +87.9°C.
I+ = operating supply current Power Supplies
DUTY = duty cycle set by intensity register The MAX6958/MAX6959 operate from a single 3V to
5.5V power supply. Bypass V+ with a 0.1µF capacitor
N = number of segments driven (worst case is nine) to GND, as close to the device as possible. Bypass V+
VLED = LED forward voltage at ISEG with an additional 10µF capacitor if the MAX6958/
ISEG = peak segment current MAX6959 are not close to the board input’s bulk
decoupling capacitor.
PD = power dissipation, in mW if currents are in mA
Dissipation example:
Chip Information
ISEG = 23mA, N = 9, DUTY = 63/64, VLED = 2.2V, TRANSISTOR COUNT: 17,340
V+ = 5.25V PROCESS: CMOS
PD = 5.25V (5.9mA) + (5.25V - 2.2V)
(63/64 ✕ 23mA ✕ 9) = 0.652W

Ordering Information (continued) Functional Diagram

TEMP SLAVE PIN-
PART IRQ
RANGE ADDRESS PACKAGE
MULTIPLEX KEYSCAN AND PORTS AND
MAX6958BAEE -40°C to +125°C 0111001 16 QSOP OSCILLATOR PORT CONTROL KEYSCAN
MAX6958BAPE -40°C to +125°C 0111001 16 DIP
MAX6959AAEE -40°C to +125°C 0111000 16 QSOP CURRENT
MAX6959AAPE -40°C to +125°C 0111000 16 DIP REFERENCE

MAX6959BAEE -40°C to +125°C 0111001 16 QSOP

MAX6959BAPE -40°C to +125°C 0111001 16 DIP PWM INTENSITY LED
CONTROL DRIVER 4 LED DIGITS

MULTIPLEX
LOGIC

CONFIGURATION DISPLAY RAM

REGISTERS AND HEX ROM

SDA
2-WIRE SERIAL INTERFACE
SCL

______________________________________________________________________________________ 17
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Pin Configuration Typical Application Circuit
MAX6958/MAX6959

TOP VIEW

SDA 1 16 V+
9 9 9 9
SCL 2 15 SEG8
(IRQ/SEG9) SEG9 3 14 SEG7

DIG0/SEG0 4 MAX6958/ 13 SEG6 µC

MAX6959
DIG1/SEG1 5 12 SEG5 DIG0–DIG3 9
SDA SDA
SEG0–SEG9
DIG2/SEG2 6 11 SEG4 SCL SCL 5V
DIG3/SEG3 7 10 (INPUT2)/N.C.
MAX6959 V+
GND 8 9 (INPUT1)/N.C. 0.1µF

QSOP/DIP INPUT1 GND

( ) MAX6959 ONLY
INPUT2

39kΩ 39kΩ
Key0
DIG0/SEG0

Key1
DIG1/SEG1

Key2
DIG2/SEG2

Key3
DIG3/SEG3

Key4
DIG0/SEG0

Key5
DIG1/SEG1

Key6
DIG2/SEG2

Key7
DIG3/SEG3

18 ______________________________________________________________________________________
 2-Wire Interfaced, 3V to 5.5V, 4-Digit,
9-Segment LED Display Drivers with Keyscan
Package Information

MAX6958/MAX6959
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)

QSOP,EXP. PADS.EPS

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19

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