PD- 92004

SMPS MOSFET IRF740A

HEXFET® Power MOSFET
Applications
• Switch Mode Power Supply ( SMPS )
VDSS Rds(on) max ID
• Uninterruptable Power Supply 400V 0.55 10A
• High speed power switching

Benefits
• Low Gate Charge Qg results in Simple
Drive Requirement
• Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
• Fully Characterized Capacitance
and Avalanche Voltage and Current
• Effective Coss specified ( See AN 1001) TO-220AB GDS

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 10
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 6.3 A
IDM Pulsed Drain Current CD 40
PD @TC = 25°C Power Dissipation 125 W
Linear Derating Factor 1.0 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt ® 5.9 V/ns
TJ Operating Junction and -55 to + 150
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw 10 lbf•in (1.1N•m)

Typical SMPS Topologies:

• Single transistor Flyback Xfmr. Reset

• Single Transistor Forward Xfmr. Reset
( Both for US Line Input only )

Notes CD through � are on page 8

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IRF740
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 400 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/ Breakdown Voltage Temp. Coefficient ––– 0.48 ––– V/°C Reference to 25°C, ID = 1mA
TJ
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.55  VGS = 10V, ID = 6.0A ®
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
––– ––– 25 VDS = 400V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 320V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -30V

Dynamic @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 4.9 ––– ––– S VDS = 50V, ID = 6.0A
Qg Total Gate Charge ––– ––– 36 ID = 10A
Qgs Gate-to-Source Charge ––– ––– 9.9 nC VDS = 320V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 16 VGS = 10V, See Fig. 6 and 13 ®
td(on) Turn-On Delay Time ––– 10 ––– VDD = 200V
tr Rise Time ––– 35 ––– ID = 10A
ns
td(off) Turn-Off Delay Time ––– 24 ––– RG = 10
tf Fall Time ––– 22 ––– RD = 19.5,See Fig. 10 ®
Ciss Input Capacitance ––– 1030 ––– VGS = 0V
Coss Output Capacitance ––– 170 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 7.7 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 1490 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 52 ––– VGS = 0V, VDS = 320V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 61 ––– VGS = 0V, VDS = 0V to 320V �
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy� ––– 630 mJ
IAR Avalanche CurrentCD ––– 10 A
EAR Repetitive Avalanche EnergyCD ––– 12.5 mJ
Thermal Resistance
Parameter Typ. Max. Units
RJC Junction-to-Case ––– 1.0
RCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RJA Junction-to-Ambient ––– 62
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 10
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 40
(Body Diode) CD p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 2.0 V TJ = 25°C, IS = 10A, VGS = 0V ®
trr Reverse Recovery Time ––– 240 360 ns TJ = 25°C, IF = 10A
Qrr Reverse RecoveryCharge ––– 1.9 2.9 µC di/dt = 100A/µs ®
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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 IRF740
100 100 VGS
VGS TOP15V 10V
TOP15V 10V 8.0V
8.0V 7.0V
7.0V

I D, Drain-to-Source Current (A)

6.0V
I D, Drain-to-Source Current (A)

6.0V 5.5V
5.5V 5.0V BOTTOM 4.5V
10 5.0V BOTTOM 4.5V

10

1
4.5 V
0.1
4. 5 V

20µs PULSE WIDTH TJ = 25 °C 20µs PULSE WIDTH TJ = 150 °C

0.01 0.1
0.1 1 10 100 0. 1 10 100
1
VDS , Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100
3.0
ID = 10A
RDS(on) , Drain-to-Source On Resistance
I D, Drain-to-Source Current (A)

2.5

10
TJ = 150 ° C 2.0
(Normalized)

1.5

1
1.0

TJ = 25 ° C
0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
0.1 0.0
4.05.06.07.08.09.010.0 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V) TJ, Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

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IRF740
Vs.
Tempe
rature

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 IRF740
20
100000
ID = 10A
VGS = 0V,f = 1 MHZ VDS = 320V VDS = 200V VDS = 80V
Ciss = gsC+ gd,
C ds Crss
C = SHORTED
gd

VGS , Gate-to-Source Voltage (V)

Coss = ds
C + gd 16
10000
C C
C, Capacitance(pF)

1000 Ciss 12

100 Coss 8

10
Crss 4

1 FOR TEST CIRCUIT SEE FIGURE 13

1 10 100 1000 0
0 10 20 30 40
VDS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

100 100
OPERATION IN THIS AREA LIMITED BY RDS(on)
10us
ISD , Reverse Drain Current

10 (A
ID , Drain Current

)
TJ = 150 °
100us
C 10
Current
TJ = 25 °
C
1 Drain
(A)

, 1ms
(A)

TC = 25 °C TJ = 150 ° C
Single Pulse
VGS = 0 V 10ms
0.1 1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 10 100 1000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

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 IRF740
10.0 RD
VDS

VGS
8.0 D.U.T.
RG +
-V
DD
ID , Drain Current

6.0 10V
Pulse Width   µs Duty Factor   

4.0
Fig 10a. Switching Time Test Circuit
(A)

2.0 VDS
90%

0.0
25 50 75 100 125 150
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr td(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

1
D = 0.50

0.20
0.10
0.1 0.05
0.02
0.01 PDM

SINGLE PULSEt1
0.01 (THERMAL RESPONSE)
t2
Notes:
Duty factor D = t1 / t 2
Peak T J = P DM x Z thJC + TC
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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 IRF740
1400
15 V ID 4.5A
TOP 6.3A

EAS , Single Pulse Avalanche Energy (mJ)

1200
L DRIV E R BOTTOM10A
V DS
1000

RG D.U.T +
800
- VDD
IAS
20V
tp 0.01  600

Fig 12a. Unclamped Inductive Test Circuit

400
V (B R)DS S
tp
200

0
25 50 75 100 125 150
Starting TJ , Junction Temperature ( °C)

I AS

Fig 12b. Fig 12c. Maximum Avalanche Energy

Unclamped Inductive Waveforms Vs. Drain Current
QG

10 V
QGS QGD 580

VG
V DSav , Avalanche Voltage ( V

560

Charge 540

Fig 13a. Basic Gate Charge Waveform

520
Current Regulator Same Type as D.U.T.
)

500
50K
12V .2F
.3F

+ 480
D.U.T.- VDS
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0

VGS
IAV , Avalanche Current ( A)

3mA

IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit

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IRF740
Fig 12d.
Typic
al
Drain-
to-
Sourc
e
Volta
ge
Vs.
Avala
nche
Curre
nt

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 IRF740
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
Low Stray Inductance
® Ground Plane
Low Leakage Inductance Current Transformer

+
�
- ®
- +

CD
RG dv/dt controlled by RG +
Driver same type as D.U.T. - VDD
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D = Period
P.W.

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

ISD
Ripple  5%

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

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 IRF740
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
10 .54 (.41 3.78 (.14 -B-
2.87 (.113) 5) 9) 4.69 (.185)
2.62 (.103) 10 .29 (.40 3.54 (.13 4.20 (.165)
5) 1.32 (.05 2 )
9) 1.22 (.04 8 )
-A-

6.47 (.2 55)

15.24 (.600) 6.10 (.2 40)
14.84 (.584) 4

L E AD ASSIG NM ENT
S 1 - GA TE
1.15 (.04 5) 2 - DR A IN
M IN
3 - S OU RCE
123
4 - DR A IN
14 .09 (.55 5)
13 .47 (.53 0)

4.06 (.160)
3.55 (.140)

0.93 (.0 37 ) 0.55 (.022)

3X 3X 0.46 (.018)
0.69 (.0 27 )
1.40 (.05 5
3X )
1.15 (.04 5 0.36 (.0 1 4) M B A M 2.92 (.115)
) 2.64 (.104)

2.54 (.100)
NOT ES : 2X
1 DIM EN S IONING & T OLE R AN CIN G PE R A NS I Y1 4.5M , 19 82 . 3 OUT LINE C ONF O RM S T O J ED EC O UT LIN E TO -2 2 0A B.
2 CO NT RO LLING D IM EN S ION : IN CH 4 HE A TS IN K & LE A D M E AS UR E M EN TS D O NO T INCLUDE B U RRS .

Part Marking Information

TO-220AB
E X A M P L E : T H IS IS A N IR F 1 010
W IT H ASSE M B L
YL O T C O D E 9 B IN TE R N A TIO N A L P A RT NU M B E R
1M R E C T IF IE R
IR F 1010
LOGO
9246
9B 1M DA T E C O DE
ASS EM BL Y
(Y Y WW)
LOTCODE
YY = Y E AR
WW = WE E K
Notes:
CD Repetitive rating; pulse width limited by ® Pulse width  300µs; duty cycle  2%.
max. junction temperature. ( See fig. 11 )
� Starting TJ = 25°C, L = 12.6mH � Coss eff. is a fixed capacitance that gives the same charging time
RG = 25, IAS = 10A. (See Figure 12) as Coss while VDS is rising from 0 to 80% VDSS
® ISD  10A, di/dt  330A/µs, VDD  V(BR)DSS,
TJ  150°C

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936

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 IRF740
http://www.irf.com/ Data and specifications subject to change without notice. 9/99

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