DMX512 Decoding and Drive IC UCS512C1 Series

Functional Description:
UCS512C1 series is DMX512 parallel protocol LED driver chip at the grayscale level 65536 with
optional channel 1/2/3/4high precision constant current output. UCS512C1 series decoding technology
accurately decodes DMX512 signals, is compatible with and expands 512 protocol signals. UCS512C1 series
fully adaptively decodes DMX512 signals with the transmission frequency within 200K-750K, without any
speed setting, and can address up to 4096 channels. UCS512C1 series has a built-in E2PROM, and various
parameters can be set in E2 without external connection. The chip provides 4 high-precision constant current
output channels, and the current of each channel can be independently adjusted in 16 levels through the
software. With the 16K high port refresh rate, it greatly improves the screen refresh rate. The UCS512C1
series can expand the current driving capability by short-circuiting multiple sets of constant current output
interfaces. It is mainly designed for LED lighting systems for building decoration and stage lighting effects, and is
suitable for LED lighting systems that need to be connected in parallel. The abnormality of one chip does not affect
the normal operation of other chips, so the maintenance is simple and convenient.

Features:
 Compatible with and expands DMX512(1990) signal protocol;
 Control mode: UCS512C1/C1L/C2/C2L are differential parallel connection, and UCS512CBL is single
bus parallel connection
 Supports 4096 channels addressing
 Up to 12-bit precision self-adaptive decoding technology, accurately self-adaptively decodes DMX512
signals with a signal transmission rate of 200K ~ 750kbps
 The built-in 485 module has the advantages of high differential signal resolution and high differential
input impedance, which can greatly enhance the load capacity
 Write parameter mode: Cascade write parameter, parallel write parameter
 Parameters set for UCS512C1 series: 1. Power-on lighting status + field selection + no signal lighting
status 2. Current tap position
 Power-on lighting status selection parameters: You can choose any grayscale combination of the 4 output
ports of RGBW after power-on
 Field selection parameters: 1, 2, 3, and 4 fields can be selected, and selecting the appropriate field can
reduce the amount of data transmission while expanding the current
 No signal lighting parameters: Set whether the screen will keep the last frame or return to the color of the
power-on lighting when there is no signal in1.5S
 Current: 2.4mA-20.4mA;16 tap positions settable
 UCS512C1/C1L and 512CBL are gray scale level 65536, gamma correction 2.2
 UCS512C2/C2L is gray scale level 256
 R/G/B/W four-bit constant current output channel, ±5% high-precision current difference between chips
 Port refresh rate up to 16K, no streaks for mobile phone/camera shooting
 A built-in 5V voltage regulator, RGBW output port withstand voltage 30V
 A built-in patented S-AI anti-jamming module, greatly enhancing the anti-jamming capability
 Output channel hysteresis to reduce inrush current interference
 Industrial grade design, stable performance

Shenzhen Lianxinke Micro-Electronic Co., Ltd. Address: Room 301, Building 6, Anhua Industrial Zone,
Chegongmiao, Futian District, Shenzhen
Tel: +86-755-25866271 Fax: +86-755-25866242
 DMX512 Decoding and Drive IC UCS512C1 Series
Application Scope:
Point light sources, strip lights, wall washer lights, stage lighting systems, indoor and outdoor video walls and
decorative lighting systems

Pin Diagrams:

1. UCS512C1L/C2L(SOP10) 2.UCS512CBL(SOP10) 3.UCS512C1/C2(SOP16)

Description of Pins
UCS512C1L/UCS512C2L

SN Symbol Functional description

1 VSS Ground
2~5 RGBW PWM output port
6 PO Coding control line output
7 PI Coding control line input, built-in pull-up
8 AI Differential signal, positive
9 BI Differential signal, negative
10 VDD Power terminal, built-in 5V voltage regulator

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 DMX512 Decoding and Drive IC UCS512C1 Series
UCS512CBL

SN Symbol Functional description

1 VSS Ground
2~5 RGBW PWM output port
6 NC Null pin
7 PO Coding control line output
8 PI Coding control line input, built-in pull-up
9 DAI DMX512 data input
10 VDD Power terminal, built-in 5V voltage regulator

UCS512C1/UCS512C2

SN Symbol Functional description

1 VSS Ground
2~5 RGBW PWM output port
6 NC Null pin
7 PO Coding control line output
8 NC Null pin
9 NC Null pin
10 PI Coding control line input, built-in pull-up
11 AI Differential signal, positive
12 BI Differential signal, negative
13 NC Null pin
14 NC Null pin
15 NC Null pin
16 VDD Power terminal, built-in 5V voltage regulator

Maximum Rating (Unless otherwise specified, Ta=25℃, Vdd=5V)

Parameter Symbol Range Unit

Logic supply voltage Vdd -0.5～ ＋ 6 V
Logic input voltage Vi − 0.5 ～ Vdd＋ 0.5 V
Output port withstand voltage Vout 30 V
RGBW output maximum current Iout 20.4 mA

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 DMX512 Decoding and Drive IC UCS512C1 Series
VDD maximum clamp current Idamp 25 mA
Operating junction temperature Tj − 45～ ＋ 1 5 0 ℃
Storage temperature Tstg − 55 ～ ＋ 150 ℃
Thermal resistance from PN
junction to environment RθJA 90 ℃/W
(SOP16)
Thermal resistance from PN
junction to environment RθJA 125 ℃/W
(SOP10)
Maximum power consumption
Pd 900 mW
(SOP16)
Maximum power consumption
Pd 600 mW
(SOP10)
anti-static electricity (HBM) ESD 6000 V
Note 1: The maximum limit value means that the chip may be damaged beyond the operating range. When operating within the
extreme parameters, the device will function properly, but individual performance indicators cannot be fully guaranteed.
Note 2: RθJA is measured on a single-layer thermally conductive test board according to JEDEC JESD51 thermal measurement
standard under the TA=25°C natural convection.
Note 3: The maximum power consumption is limited by the chip junction temperature, and the maximum output power will
decrease when the ambient temperature increases, which is also determined by the junction temperature TJMAX, ambient
temperature TA and RθJA. The maximum allowable power dissipation is PD = (TJMAX-TA)/ RθJA or the lower value of the
values given in the limits

Recommended Operating Range (unless otherwise specified, Ta=−40～+85℃, Vdd=5V)

Test
Parameter Symbol Minimum Typical Maximum Unit
condition
Logic supply voltage Vdd 3 5 5.7 V -

Electrical Parameters (unless otherwise specified, Ta=−40～+85℃, Vss=0V, Vdd=4.5～5.5V)

Minimu Typica Maximu
Parameter Symbol Unit Test condition
m l m
Vin=12V, dropping
Clamp voltage Vdd 4.8 5.5 V
resistor 1K
Dynamic current consumption IDDdyn 3 mA PO off
High level output current Ipoh 17 mA Vpo ＝ 4 . 6 V
Low level output current Ipol 25 mA Vpo ＝ 0.4 V
High level input voltage Vih 0.7 Vdd V DPI/DAI high level
Low level input voltage Vil 0.3 Vdd V DPI/DAI low level
Differential input common
Vcm -7 12 V Vdd=5V
mode voltage

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 DMX512 Decoding and Drive IC UCS512C1 Series
Differential input current IAB 28 uA Vdd=5V
Differential input threshold
Vth -0.2 0.2 V Vdd=5V
voltage
Differential input hysteresis
△VTH 70 mV Vdd=5V
voltage
A/B port pull-down resistance RdownAB 190 KΩ Vdd=5V
A port pull-up resistance RupA 800 KΩ Vdd=5V
Output port knee point voltage Vds-s 0.8 V R/G/B/W=20.4mA
Current offset (between chips) DIout ±5.0 % Vds=1V，Iout=20.4mA
%dVds ±0.5 %/V 1V<Vds<3V
OUT output current change %dVdd ±1.0 %/V 4.5V<Vdd<5.5V
%dTA ±3.0 %/℃ TA =-40~+85℃

Switching Characteristics (Unless otherwise specified, Ta=−40～+85℃, Vss=0V, Vdd=4.5～5.5V)

Mini Typic Maxi
Parameter Symbol Unit Test condition
mum al mum
Port refresh rate Fpwm 16 KHz IOUT=20mA
Data transfer rate F 200 750 Kbps
Input capacitance Ci - - 15 pF

Communication Data Protocol:

UCS512C1 series data reception is compatible with the standard DMX512 (1990) protocol and extended
DMX512 protocol. It self-adapts to the decoding with the data transmission rate of 200kbps to 750K. The
protocol waveform is as follows: The chip is inputted by AB differentially, the timing waveform of A is drawn
in the figure, and B is opposite to A.

Field S D0 D1 D2 D3 D4 D5 D6 D7 T

4 5
1 3
A
2 2

No. Description Minimum Typical Maximu Unit

value m

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 DMX512 Decoding and Drive IC UCS512C1 Series
Bit rate 200 250 500 Kbps
Bit time 5 4 2 us
S Start bit 5 4 2 us
D0~D7 Data bit 5 4 2 us
T 2-digit stop bit 10 8 4 us
1 Mark before reset 0 1000000 us
2 Reset signal 88 1000000 us
3 Mark after mark 8 1000000 us
4 Field (note 1) 55 44 22 us
5 Idle time between 0 1000000 us
fields
6 Length of data packet 1024 1000000 us
7 Reset signal interval 4096 1000000 us

Note1: The field has 11 bits in total, including 0 start bits, 8 data bits and 2 stop bits. The 0 start bit is at the
low level, and the stop bit is at the high level. When the data in the data bit is 0, the corresponding time period
is at the low level; if it is 1, the corresponding time period is at the high level. 0 start bit, stop bit and data bit
must have the same bit duration.

Instructions for IC Receiving:

1. When the reset signal appears on the AB line, the IC will enter the receiving ready state. Clear the address
counter.
2. The first field in the data packet is the start field, and its 8-bit data must be "0000_0000". This field is not
used as the display data. The valid field for display starts from the second field, and the second field of the 512
data packet is the first field of valid data. The data transmission frequency that the IC can self-adapt to is
200K-750K. The field durations corresponding to different frequencies are different. However, for the
transmission frequency of 200K or 750K, it is only necessary to ensure that the duration of all valid fields is
the same as that of the initial field. It shall be noted that, the higher the sending rate, the shorter the bus length
must be, so it is recommended that the sending frequency should not exceed 500K.
3. The IC determines and intercepts the corresponding field in the 512 data packet according to its E2 address.
If the chip address is 0000_0000_0000, it will intercept from the first valid field of the data packet; if the chip
address is 0000_0000_0001, it will intercept from the second valid field of the data packet. The number of
fields used by the chip is set by the control system.

Functional Description:

Coding Method
Cascaded coding: For the conventional coding method, different addresses can be written into each IC,
but ensure that the coding line is normal.
Parallel coding: All ICs on a bus are written to the same address, and the coding line fault does not
affect the address writing.

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 DMX512 Decoding and Drive IC UCS512C1 Series
Parameter Writing Method
Cascaded parameter writing: You can write different parameter values into each IC, but ensure that
the coding line is normal
Parallel parameter writing: Only the same parameter values can be written into all ICs on one bus,
and the failure of the coding line does not affect the parameter writing.

Parameters Description
Power-on lighting: RGBW grayscale of each channel can be self-defined
1.5S no signal status: You can choose to restore the power-on lighting status or keep the last frame
Current range: The current of each channel of RGBW can be independently set from 2.4mA to 20.4mA,
with 16 levels
SN Output current (mA)
0 2.4
1 3.6
2 4.8
3 6
4 7.2
5 8.4
6 9.6
7 10.8
8 12
9 13.2
10 14.4
11 15.6
12 16.8
13 18 (default value)
14 19.2
15 20.4

Fields Selection:
Mode Effect
4-field mode 4 fields are intercepted to correspond to R, G, B and W, respectively
3-field mode 3 fields are intercepted to correspond to R, G and B. W is closed
2-field mode 2 fields are intercepted to correspond to RG and BW
1-field mode 1 field is intercepted to correspond to RGBW
In the above table, the 1-field mode and 2-field mode can realize the function of expanding the current with the
minimum amount of data transmission. For example, in the 1-field mode (generally the single color
application), 4 output pins of RGBW can be connected in parallel for using. At this time, the maximum output
current can reach 4 times the single-channel current. The above fields are only required when the current
expansion is required. When the current expansion is not required, the 4-field mode can be directly selected.

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 DMX512 Decoding and Drive IC UCS512C1 Series

Lighting after Coding and Parameters Writing

EEPROM writing operation Lighting description
Overall
RGBW
writing
Address writing
Cascaded
First light: RG; non-first light: RGBW
writing
Writing power-on Overall
Write-in grayscale
self-defining writing
Successful
grayscale, 1.5S no
write-in Cascaded
signal status, Write-in grayscale
writing
number of fields
Overall
RGBW
writing
Current writing
Cascaded
First light: RG; non-first light: RGBW
writing
Unsuccessful write-in Black

S-AI anti-interference patented technology: One of our patented technologies used in high-speed
communication interface IC; through an embedded algorithm module, a certain range of differential mode
interference signals was filtered. It forms complementarity with the common mode anti-interference capability
of the differential bus to some extent and applies to the engineering environment with large interference

Factory Default Values

Model UCS512C1/C1L UCS512C2/C2L UCS512CBL
Power-on self-defined B（22%） B（22%） B（22%）
grayscale
1.5S no signal status The last frame is kept The last frame is kept The last frame is kept
Number of fields 4 4 4
Current 18mA 18mA 18mA

Notes for Differential Bus Connection:

1. There must be a common ground between the controller and the IC and between the ICs to prevent the IC
from being broken down by excessive common-mode voltage. When a shielded wire is used, the shielding
layer can be used as a common ground wire to reliably connect multiple IC nodes, and reliably connect to the
ground at one point. Both ends or multiple ends cannot be connected to the ground at the same time.
2. The protection resistors connected in series between the A and B lines on the board and the IC must be the
same, and the AB lines on the board shall be wired side by side. There shall be no other wiring or components
between the AB lines.

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 DMX512 Decoding and Drive IC UCS512C1 Series
3.The twisted pair wires are generally used for the AB bus and ordinary sheathed wires can also be used, but
copper wires shall be purchased. Shielded twisted pair wires can be used in the shared project of strong and
weak current wiring ducts, near the launch tower or in areas where lightning is frequent to reduce interference
and lightning impact.
4. In the 485 bus, the distance between the 485 nodes and the trunk should be minimized. Generally, it is
recommended that the 485 bus should be in the hand-in-hand bus topology. Structures with main lines and
branch lines, such as star structure or tree structure, will generate reflected signals and affect the quality of 485
communication. If the wiring structure of the main line and branch line has been adopted during the
construction and the length of the branch line exceeds 1 meter, it is recommended to use a 485 repeater to
make a 485 bus fork at the position where each branch line exceeds 1 meter. The repeater shall be close to the
main line. Multiple branches can also be connected separately using a multi-outlet 485 repeater.
5. With the extension of the transmission distance, the 485 bus will generate echo reflection signal. If the
transmission distance of the 485 bus is long, it is recommended to connect a 120 ohm terminal matching
resistor on the AB line at the end of the 485 communication during construction

Constant Current Curve:

UCS512C1 series has excellent constant current characteristics, and the current difference between channels
and even between chips is very small.
(1): The maximum current error between channels is ±3℅, and the maximum current error between chips is
±5℅.
(2): When the load terminal voltage changes, the output current will not be affected, as shown in the figure
below
(3): The following figure shows the curve relationship between the current I of the output port and the voltage
Vds applied to the port. It can be concluded that, the smaller the I current is, the smaller the Vds is required in
the constant current status.

Series

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 DMX512 Decoding and Drive IC UCS512C1 Series

Voltage Divider Resistor Selection:

Power consumption calculation: P=PRGB+PVDD

Take 4 channels of 20.4mA per channel as an example. When the output pin voltage drop (Vds) is 3V, then the
power consumption at the highest grayscale on the IC:
P=PRGB+PVDD=4*3V*20.4mA+5V*10mA=0.25+0.05=0.3W
Note: The actual power consumption shall not exceed the maximum allowable power consumption, and the
maximum allowable power consumption PD is determined by the power consumption rating and ambient
temperature and heat dissipation conditions

Calculation of Voltage Divider Resistance:

VCC—N*Vled-min—VR﹤Vds-max
VR=I*R R refers to the voltage divider resistance
R﹥（VCC—-N*Vled-min—Vds-max)/I
VCC refers to the power supply voltage, Vled-min refers to the minimum turn-on voltage of the lamp beads, N
refers to the number of lamp beads in series, Vds-max refers to the maximum voltage of each output pin, and I
refers to the set constant current value.
Note: Resistor power dissipation shall be considered when a voltage divider resistor is selected.

Application Diagram 1: UCS512C1, 512C1L, UC S512C2 and UCS512C2L

Values Selection of Components:

Component 24V 12V 5V
RVDD 2K 750 80
RPI 500-1K 500-1K 500-1K
RPO 500-1K 500-1K 500-1K
RA 5K-10K 5K-10K 5K-10K
RB 5K-10K 5K-10K 5K-10K

Application Diagram 2: UCS512CBL

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 DMX512 Decoding and Drive IC UCS512C1 Series
Controller

Values Selection of Components

Component 24V 12V 5V

RVDD 2K 750 82
RPI 500-1K 500-1K 500-1K
RPO 500-1K 500-1K 500-1K
RA 10K 10K 10K

Application of DMX512 and Expansion Protocol on Lamps

Component Transmission frequency Number of channles on Frame frequency

the bus
Standard protocol 250K 512 44
Channel expansion 250K 1024 22
Channel expansion 250K 1536 15
Transmission frequency 500K 1024 44
and channel expansion
Transmission frequency 500K 1536 30
and channel expansion
Transmission frequency 500K 2048 22
and channel expansion

Encapsulation Outline Drawing and Dimensions

SOP16

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 DMX512 Decoding and Drive IC UCS512C1 Series

SOP10

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 DMX512 Decoding and Drive IC UCS512C1 Series

Version No.
Version Date of issue Revision description
VER1.0 2022-5-25 Issue of the first version
VER1.5 2022-8-27 Contents correction

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