An Update On Power Quality: ISBN 978-953-51-1079-8
An Update On Power Quality: ISBN 978-953-51-1079-8
Contributors
Sharad W. Mohod, Mohan Aware, Md. Raju Ahmed, Dylan Lu, Hadeed Ahmed Sher, Khaled E Addoweesh, Yasin
Khan, Ahad Mokhtarpour, Heidarali Shayanfar, Seiied Mohammad Taghi Bathaee, Mohamed Zellagui, Abdelaziz
Chaghi, Mitra Sarhangzadeh
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Preface XI
There is an upward trend that human activities involve more electric power nowadays
and for years to come. And we will soon be facing shortage of electricity supply if we
rely solely on non-renewable power generation from fossil fuels such as coals.
Renewable energy generation has proven effective in meeting the demand. At the
same time it has brought about a few issues to existing electricity infrastructure such
as complex power flow due to distributed generations and unstable grid voltage
and/or frequency profiles due to local generation and intermittent nature of renewable
energy sources such as solar photovoltaic and wind power. Also the increasing
penetration of power electronics converters associated with the adoption of renewable
energies into the electricity networks has improved the functionality and flexibility in
terms of control but meanwhile due to their switching nature the harmonics issue has
to be dealt with. It is therefore important to investigate the causes of these power
quality issues and explore feasible and cost-effective solutions to assist with the
development of present and future electricity networks.
In the following chapters the reader will be introduced to power quality issues and
solutions at different sections of the electricity networks, namely, power generation,
transmission, distribution and end user stages. The book is divided into three sections:
Power Quality Issues and Standards in Electricity Networks; Power Quality
Improvements in Transmission and Distribution Systems; and Power Quality
Improvement in End Users Stage. A brief discussion of each chapter is as follows.
Flexible Alternating Current Transmission System (FACTS) controllers have been used
in transmission and distribution systems to deal with power quality issues. Chapter 3
VIII Preface
     identifies the limitations in the transmission systems, i.e., angular stability, voltage
     magnitude, thermal limits, transient stability, and dynamic stability and presents a
     comparative study of three different series FACTS for power quality compensation of
     a single transmission line in Eastern Algerian transmissions networks. Chapter 4
     applies particle swarm optimization technique to designing a shunt static var
     compensator (SVC) for a radial distribution feeder. The objective function of SVC
     placement is to reduce the power loss and keep bus voltages and total harmonic
     distortion within prescribed limits with minimum cost.
     I hope this book will have been to you an enjoyable reading and a timely update of
     recent research and development in the field of Power Quality.
     Lastly, I would like to thank all the researchers for their excellent works and studies in
     the different areas of Power Quality.
                                                                       Dylan Dah-Chuan Lu
                                                                        University of Sydney
                                                                                    Australia
                                     Section 1
http://dx.doi.org/10.5772/53422
1. Introduction
Industrial revolution has transformed the whole life with advanced technological
improvements. The major contribution in the industrial revolution is due to the availability
of electrical power that is distributed through electrical utilities around the world. The
concept of power quality in this context is emerging as a “Basic Right” of user for safety as
well as for uninterrupted working of their equipment. The electricity users whether
domestic or industrial, need power, free from glitches, distortions, flicker, noise and
outages. The utility desires that the users use good quality equipment so that they do not
produce power quality threats for the system. The use of power electronic based devices in
this industrial world has saved bounties in term of fuel and power savings, but on the other
hand has created problems due to the generation of harmonics. Both commercial and
domestic users use the devices with power electronics based switching that draw harmonic
current. This current is a dominant factor in producing the harmonically polluted voltages.
The “Basic Right” of the user is to have a clean power supply, whereas the demand of utility
is to have good quality instrument/equipment. This makes power quality a point of
common interest for both the users as well as the utility. Harmonics being a hot topic within
power quality domain has been an area of discussion since decades and several design
standards have been devised and published by various international organizations and
institutions for maintaining a harmonically free power supply. In a wider scenario, the
harmonically free environment means that the harmonics generated by the devices and its
presence in the system is confined in the allowable limits so that they do not cause
any damage to the power system components including the transformers, insulators,
switch-gears etc. The deregulation of power systems is forcing the utilities to purge the
harmonics at the very end of their generation before it comes to the main streamline and
becomes a possible cause of system un-stability. The possible three stage scheme for
harmonics control is
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4 An Update on Power Quality
  To follow the above scheme the power utilities have R&D sections that are involved in
  continuous research to keep the harmonics levels within the allowed limits. Power
  frequency harmonics problems that have been a constant area of research are:
  The above mentioned research challenges are coped with the help of regulatory bodies that
  are focused much on designing and implementing the standards for harmonics control.
  Engineering consortiums like IEEE, IET, and IEC have designed standards that describe the
  allowable limits for harmonics. The estimation, measurement, analysis and purging
  techniques of harmonics are an important stress area that needs a firm grip of power quality
  engineers. Nowadays, apart from the traditional methods like Y-∆ connection for 3rd
  harmonic suppression, modern methods based on artificial intelligence techniques aids the
  utility engineers to suppress and purge the harmonics in a better fashion. The modern
  approaches include:
  The focus of this chapter is to explain all the possible sources of harmonics generation,
  identification of harmonics, their measurement level as well as their purging/suppression
  techniques. This chapter will be helpful to all electrical engineers in general and the utility
  engineers in particular.
fh  hfac (1)
Where fh is the hth harmonic and fac is the fundamental frequency of system.
  Harmonics follow an inverse law in the sense that greater the harmonic level of a particular
  harmonic frequency, the lower is its amplitude as shown in Fig.1. Therefore, usually in
  power line harmonics higher order harmonics are not given much importance. The vital and
                          Harmonics Generation, Propagation and Purging Techniques in Non-Linear Loads 5
the most troublesome harmonics are thus 3rd, 5th, 7th, 9th, 11th and 13th. The general expression
of harmonics waveforms is given in eq. 2
Where, Vrn is the rms voltage of any particular frequency (harmonic or power line).
The harmonics that are odd multiples of fundamental frequency are known as Odd
harmonics and those that are even multiples of fundamental frequency are termed as Even
harmonics. The frequencies that are in between the odd and even harmonics are called inter-
harmonics.
Although, the ideal demand for any power utility is to have sinusoidal currents and
voltages in AC system, this is not for all time promising, the currents and voltages with
complex waveforms do occur in practice. Thus any complex waveform generated by such
devices is a mixture of fundamental and the harmonics. Therefore, the voltage across a
harmonically polluted system can be expressed numerically in eq. 3,
Where,
Similarly, the expression for current through a given circuit in a harmonically polluted
system is given by the expression given in eq. 4
Harmonic components are also termed as positive, negative and zero sequence. In this case
the harmonics that changes with the fundamental are called positive and those that have
phasor direction opposite with the fundamental are called negative sequence components.
The zero components do not take any affect from the fundamental and is considered neutral
in its behavior. Phasor direction is pretty much important in case of motors. Positive
sequence component tends to drive the motor in proper direction. Whereas the negative
6 An Update on Power Quality
  sequence component decreases the useful torque. The 7th, 13th, 19th etc. are positive sequence
  components. The negative sequence components are 5th, 11th, 17th and so on. The zero
  component harmonics are 3rd, 9th, 15th etc. As the amplitude of harmonics decreases with the
  increase in harmonic order therefore, in power systems the utilities are more concerned
  about the harmonics up to 11th order only.
  3. Harmonics generation
  In most of the cases the harmonics in voltage is a direct product of current harmonics.
  Therefore, the current harmonics is the actual cause of harmonics generation. Power line
  harmonics are generated when a load draws a non-linear current from a sinusoidal voltage.
  Nowadays all computers use Switch Mode Power Supplies (SMPS) that convert utility AC
  voltage to regulate low voltage DC for internal electronics. These power supplies have
  higher efficiency as compared to linear power supplies and have some other advantages too.
  But being based on switching principle, these non-linear power supplies draw current in
  high amplitude short pulses. These pulses are rich in harmonics and produce voltage drop
  across system impedance. Thus, it creates many small voltage sources in series with the
  main AC source as shown in Fig.2. Here in Fig.2 I3 refers to the third harmonic component
  of the current drawn by the non-linear load, I5 is the fifth harmonic component of the load
  current and so on. R shows the distributed resistance of the line and the voltage sources are
  shown to elaborate the factor explained above. Therefore, these short current pulses create
  significant distortion in the electrical current and voltage wave shape. This distortion in
  shape is referred as a harmonic distortion and its measurement is carried out in term of
  Total Harmonic Distortion (THD). This distortion travels back into the power source and
  can affect other equipment connected to the same source. Any SMPS equipment installed
  anywhere in the system have an inherent property to generate continuous distortion of the
  power source that puts an extra load on the utility system and the components installed in
  it. Harmonics are also produced by electric drives and DC-DC converters installed in
  industrial setups. Uninterrupted Power Supply (UPS) and Compact Fluorescent Lamp (CFL)
  are also a prominent source of harmonics in a system. Usually high odd harmonics results
  from a power electronics converter. In summary, the harmonics are produced in an electrical
  network by [2, 16, 26, 42]
      Rectifiers
      Use of iron core in power transformers
      Welding equipment
      Variable speed drives
      Periodic switching of voltage and currents
      AC generators by non-sinusoidal air gap, flux distribution or tooth ripple
      Switching devices like SMPS, UPS and CFL
  It is worth mentioning here that voltage harmonics can emerge directly due to an AC
  generator, due to a non-sinusoidal air gap, flux distribution, or to tooth ripple, which is
  caused by the effect of the slots, which house the windings. In large supply systems, the
  greatest care is taken to ensure a sinusoidal output from the generator, but even in this case
                           Harmonics Generation, Propagation and Purging Techniques in Non-Linear Loads 7
any non-linearity in the circuit will give rise to harmonics in the current waveform.
Harmonics can also be generated due to the iron cores in the transformers. Such transformer
cores have a non-linear B-H curve [37].
    Harmonic frequencies can cause resonant condition when combined with power factor
     correction capacitors
    Increased losses in system elements including transformers and generating plants
    Ageing of insulation
    Interruption in communication system
    False tripping of circuit breakers
    Large currents in neutral wires
The distribution transformers have a ∆-Y connection. In case of a highly third harmonic
current the current that is trapped in the neutral conductor creates heat that increases the
heat inside the transformer. This may lead to the reduced life and de-rating of transformer.
The different types of harmonic have their own impact on power system. For instance let us
8 An Update on Power Quality
  consider the 3rd harmonic. Contrary to the balanced three phase system where the sum of all
  the three phases is zero in a neutral system, the third harmonic of all the three phases is
  identical. So it adds up in the neutral wire. The same is applicable on triple-n harmonics
  (odd multiples of 3 times the fundamental like 9th, 15th etc.). These harmonic currents are the
  main cause of false tripping and failure of earth fault protection relay. They also produce
  heat in the neutral wire thus a system needs a thicker neutral wire if it has third harmonic
  pollution in it. If a motor is supplied a voltage waveform with third harmonic content in it,
  it will only develop additional losses, as the useful power comes only from the fundamental
  component.
utilities use IEC standard number 61000-2-2 .The IEC also defines the categories for different
electronic devices in standard number 61000-3-2. These devices are then subjected to
different allowable limits of THD. For example, class A has all three phase balanced
equipment, non-portable tools, audio equipment, dimmers for only incandescent lamp. The
limit for class A is varied according to the harmonic order. So for devices of class A the
maximum allowable harmonic current is 1.08 A for 2nd, 2.3A for 3rd, 0.43A for 4th, 1.14A for
5th harmonics. The beauty of this IEC standard is that it also caters for power factor. For
example all devices of class C (lighting equipment other than the incandescent lamp
dimmer) have 3rd harmonic current limit as a function of circuit power factor.
The modern systems based on artificial intelligent techniques like Fuzzy logic, ANFIS and
CI based computations are reducing the difficulty of data mining that helps in redesigning
the standards for power quality harmonics [24, 25]. In developed countries like Australia,
Canada, USA the power distribution companies are already partially shifted to smart grid
and they are using sophisticated sensors and measuring instruments.
In terms of smart grid environment these sensors will help in mitigating the problems by
predicting them in advance. Smart grid, by taking intelligent measurements and by the aid
of sophisticated algorithms will be able to predict the PQ problems like harmonics, fault
current in advance. It is pertinent to mention that the power quality monitoring using the
on-going 3G technologies has been implemented by Chinese researchers. They used module
of GPRS that is capable of analyzing the real time data and its algorithm makes it intelligent
enough to get the desired PQ information [22].
6. Harmonics measurement
The real challenge in a harmonically polluted environment is to understand and designate
the best point for measuring the harmonics. Nowadays the revolution in electronics has
messed up the AC system so much that almost every user in a utility is a contributor to the
harmonics current. Furthermore, the load profile in any domestic area varies from hour to
hour within a day. So in order to cope with the energy demand and to improve the power
factor, utilities need to switch on and off the power factor correction capacitors. This
periodic and non-uniform switching also creates harmonics in the system. The load
information in an area although, provide some basic information about the order of
harmonic present in a system. Such information is very useful as it gives a bird eye view of
10 An Update on Power Quality
    harmonic content. But for the exact identification of the harmonics it is necessary to
    synthesize the distorted waveform using the power quality analyzer or using some digital
    oscilloscope for Fast Fourier Transform (FFT). For example Fig.3 shows a general synthesis
    of the current drawn by a controlled rectifier. Once identified, the level and type of
    harmonics (3rd, 5th etc.) the steps to mitigation can be devised. It should be kept in mind that
    proper measurement is the key for the proper designing of harmonic filters. But the
    harmonics level may differ at different points of measurement in a system. Therefore,
    utilities need to be very precise in identifying the correct point for harmonic measurement in
    a system. Among the standards, it is IEEE standard 519-1992 that outlines the operational
    procedures for carrying out the harmonic measurements. This standard however does not
    state any restriction regarding the integration duration of the measurement equipment with
    the system. It however, restricts the utility to maintain a log for monthly records of
    maximum demand [5]. Various devices are used in support with each other to carry out the
    harmonic measurements in a system. These include the following
    Various renowned companies are designing and producing excellent PQ analyzers. These
    include FLUKE, AEMC, HIOKI, DRANETZ and ELSPEC. These companies design single
    phase and three phase PQ analyzers that are capable of measuring all the dominant
    harmonic frequencies. The equipment that is used for harmonic measurement is also bound
    to some limitations for proper harmonic measurement. This limitation is technical in nature
    as for accurate measurement of all harmonic currents below the 65th harmonic, the sampling
    frequency should be at least twice the desired input bandwidth or 8k samples per second in
    this case, to cover 50Hz and 60Hz systems [5]. Mostly, the PQ analyzers are supplied along
    with the CT based probes but depending on the voltage and current ratings a designer can
    choose the CT and PT with wide operating frequency range and low distortion. The distance
    of equipment with the transducer is also very important in measuring harmonics. If the
    distance is long then noise can affect the measurement therefore properly shielded cables
    like coaxial cable or fiber optic cables are highly recommended by the experts [5]. In short,
                            Harmonics Generation, Propagation and Purging Techniques in Non-Linear Loads 11
    power values up to MVARs [4]. Comparing to the solutions that employ rotating parts like
    synchronous condensers they need lesser maintenance.
threats to the system by creating resonant conditions. They improve power factor but they
must be designed such that they are capable of carrying full load current. Some researchers
have referred them as line LC trap filters [19]. These filters block the unwanted harmonics
and allow a certain range of frequencies to pass. However, very fine designing is required as
far as the cut off frequency is concerned.
They are used even in aircraft power system for harmonic elimination [6]. Same like passive
filters they are classified with respect to the connection method and are given below [40].
Since, it uses power electronic based components therefore in literature a lot of work has
been done on the control of active filters.
14 An Update on Power Quality
produce the resonance with system impedance [29]. The control techniques used for these
types of filters are based on instantaneous control, on p-q theory and id-iq. K.N.M.Hasan
et.al. presented a comparative study among the p-q and id-iq techniques and concluded that
in case of voltage distortions the id-iq method provides slightly better results [12]. They are
usually combined in the following ways [21]
                                                       th              th
                                                   5                  7               High pass
                           ZL
                                                                                                                                  L
                                                                                                                                  o
                                                                                                                                  a
                                                                                                                                  d
Q3 Q5
Cd
Q6 Q2
                                                                                      Mains Impedance
                                                                            Vs                                iL
                                                                                                                           Nonlinear
                                                                                 is                                          load
                                                                                                                   ih
                                                                                                  Zs                    Passive
                                       T1          T3
                                                                                                                         filter
                                Vdc
                                                                                        L                     Vo
                                                                                              C
T2 T4
Active filter
Modulation (PWM). The most widely used sine triangle PWM was proposed in 1964. Later
in 1982 Space Vector PWM (SVPWM) was proposed [20]. PWM is a magical technique of
switching that gives unique results by varying the associated parameters like modulation
index, switching frequency and the modulation ratio. The frequency modulation ratio ‘m’ if
taken as odd automatically removes even harmonics [17, 26]. Here the increase in switching
frequency reduces the current harmonics but this makes the switching losses too much.
Furthermore, we cannot keep on increasing switching frequency because this imposes the
EMC problems [15]. D.G.Holmes et al. presented an analysis for carrier based PWM and
claimed that it is possible to use some analytical solutions to pin point the harmonic
cancelation using different modulation techniques. Sideband harmonics can be eliminated if
the designer uses natural or asymmetric regular sampled PWM [14]. The output can be
improved by playing with the modulation index. One specialized type of PWM is called
Selective Harmonic Elimination (SHE) PWM or the programmed harmonic elimination
scheme. This technique is based on Fourier analysis of phase to ground voltage. It is
basically a combination of square wave switching and the PWM. Here proper switching
angles selection makes the target harmonic component zero [26, 30]. In SHE technique a
minimum of 0.5 modulation index is possible [41]. But even the best SHE left the system
with some unfiltered harmonics. J. Pontt et al. presented a technique of treating the
unfiltered harmonics due to the SHE PWM. They stated that if we use SHE PWM for
elimination of 11th and 13th harmonics for 12 pulse configuration then the harmonics of order
23th, 25th, 35th and 37th are one that play vital role in defining the voltage distortions. They
proposed the use of three level active front end converters. They suggested a modulation
index of 0.8-0.98 to mitigate the harmonics of order 23rd, 25th and 35th, 37th [30]. With some
modifications researchers have shown that SHE PWM can be used at very low switching
frequency of 350 Hz. Javier Napoles et al. presented this technique and give it a new name
of Selective Harmonic Mitigation (SHM) PWM. They used seven switching states and
results makes the selective harmonics equal to zero [8]. This is excellent since in SHE PWM
the selective harmonic need not to be zero. It is sufficient in conventional PWM to bring it
under the allowable limit. Siriroj Sirisukprasert et al. presented an optimal harmonic
reduction technique by varying the nature of output stepped waveforms and varied the
modulation indexes. They tested their proposed technique on multilevel inverters that are
better than the two level conventional inverters. They excluded the very narrow and very
wide pulses from the switching waveform. Unlike SHE PWM as discussed above they
ensured the minimum turn on and turn off by switching their power switches only once a
cycle. Contrary to traditional SHE PWM, in this case the modulation index can vary till 0.1.
The output is a stepped waveform for different stages they classify the production of
modulation index as high, low and medium and the real point of interest is that for all these
three classes of modulation indexes the switching is once per cycle per switch [41]. Some
researchers used trapezoidal PWM method for harmonic control. This kind of PWM is based
on unipolar PWM switching. Here a trapezoidal waveform is compared with a triangular
waveform and the resulting PWM is supplied to the power switches. Like other harmonic
elimination techniques in PWM based techniques researchers have proposed the use of AI
based techniques including FL and ANN.
18 An Update on Power Quality
    8. Conclusion
    This chapter summarizes one of the major power quality problems that is the reason of
    many power system disturbances in an electrical network. The possible sources of
    harmonics are discussed along with their effects on distribution system components
    including the transformers, switch gears and the protection system. The regulatory
    standards for the limitation of harmonics and their measurement techniques are also
    presented here. The purging techniques of harmonics are also presented and various kind of
    harmonic filters are briefly presented. To strengthen the knowledge base, this chapter has
    also discussed the control of harmonics using PWM techniques. By this chapter we have
    attempted to gather the technical information in this field. A thorough understanding of
    harmonics will provide the utility engineers a framework that is often required in the
    solution of research work related to harmonics.
    Author details
    Hadeed Ahmed Sher* and Khaled E Addoweesh
    Department of Electrical Engineering, King Saud University, Riyadh, Saudi Arabia
    Yasin Khan
    Department of Electrical Engineering, King Saud University, Riyadh, Saudi Arabia
    Saudi Aramco Chair in Electrical Power, Department of Electrical Engineering, King Saud
    University, Riyadh
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                                                                                                                           Chapter 2
http://dx.doi.org/10.5772/54704
1. Introduction
The aim of the electric power system is to produce and deliver to the consumer’s electric
energy of defined parameters, where the main quantities describing the electric energy are
the voltage and frequency. During normal operation of system the frequency varies as a
result of the variation of the real power generated and consumed. At the same time, because
of voltage drops in the transmission lines and transformers it is impossible to keep the
voltage at the nominal level in all the nodes of the power system. It is also impossible to
keep an ideal sinusoidal shape of the voltage or current waveform due to the nonlinearities
in many devices use for electric energy generation, transmission and at end users. That is
why the electric power system require to keep the quantities near the nominal value[1]-[5].
Recently, the deregulated electricity market has also opened the door for customers own
distributed generation due to economical and technical benefit. The liberalization of the grid
leads to new management structures, in which the trading of energy is important. The need
to integrate the renewable energy like wind energy into power system is to minimize the
environmental impact on conventional plant of generation. The conventional plant uses
fossil fuels such as coal & petroleum products to run the steam turbines and generate the
thermal power. The fossil fuel consumption has an adverse effect on the environment and it
is necessary to minimize the polluting and exhausting fuel. The penetration of renewable
energy especially wind has been increasing fast during the past few years and it is expected
to rise more in near future. Many countries around the world are likely to experience similar
penetration level. During the last decade of the twentieth century, worldwide wind energy
capacity is doubled approximately every three years.
Today’s trends are to connect all size of generating units like wind farm,solar farm,biogas
generation and conventional source like coal,hydro,nuclear power plant in to the grid
system shown in Fig.1.0
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22 An Update on Power Quality
The critical power quality issues related to integration of wind farms have been identified
by team of Riso National Laboratory and Danish Utility Research Institute, Denmark and
Electronic Research and Development Centre, India in Nov.1998 .The power quality in
relation to a wind turbine describe the electrical performance of wind energy generating
system. It reflects the generation of grid interference and the influence of a wind turbine on
power and voltage quality of grid. The issue of power quality is of great importance to the
wind turbines. There has been an extensive growth and quick development in the
exploitation of wind energy in recent years [6]-[7]. The individual units can be of large
capacity up to 5 MW, feeding into distribution network, particularly with customers
connected in close proximity. However with rapidly varying voltage fluctuations due to the
nature of wind, it is difficult to improve the power quality with simple compensator.
Advance reactive power compensators with fast control and power electronic have emerged
to supersede the conventional reactive compensator [8]-[9].
It has been suggested that today’s industrial development are related with generalized use
of computers, adjustable speed drives and other microelectronic loads. It also becomes an
increasing concern with power quality to the end customer. The presence of harmonic and
reactive power in the grid is harmful, because it will cause additional power losses and
malfunction of grid component. The massive penetration of electronically controlled devices
and equipments in low voltage distribution network is responsible for further worsening of
power-quality problem [10]-[13].
The problems are related to the load equipment and devices used in electric energy
generation. Now a days the transmission and distribution system become more sensitive to
power quality variation than those used in the past. Many new devices contain
microprocessor based controls and electronics power elements that are sensitive to many
types of disturbances. The wind turbine generating systems are the highly variable sources
of energy and wind turbine are belonging to the source of such problem.
The wind power in the electric grid system affects the voltage quality. To assess this effect,
the knowledge of about the electrical characteristic of wind turbine is needed. The electrical
characteristics of wind turbine are manufacturer’s specification and not site specification.
This means that by having the actual parameter values for a specific wind turbine the
expected impact of the wind turbine on voltage quality is important. The need for consistent
and replicable documentation of the power quality characteristics of wind turbines, the
International Electro-technical Commission (IEC) started work to facilitate for power quality
in 1996. As a result, IEC 61400-21 was developed and today most wind turbines
manufacturers provide power quality characteristic data accordingly. Wind turbines and
their power quality will be certified on the basis of measurements according to national or
international guidelines. These certifications are an important basis for utilities to evaluate
the grid connection of wind turbines and wind farms.
The power quality is defined as set of parameters defining the properties of the power
supply as delivered to user in normal operating condition in terms of continuity of supply
and characteristics of voltage, frequency.
24 An Update on Power Quality
    Today the measurement and assessment of the power quality characteristics of the grid-
    connected wind turbines is defined by IEC Standard 61400-21 (wind turbine system)
    prepared by IEC- Technical Committee 88.
    The need of power quality in wind integration system and its issues are highlighted in
    further section.
    Distortion power factor “DF” or harmonic factor is defined as the ratio of the RMS harmonic
    content to the RMS value of fundamental component expressed as percentage of the
    fundamental.
                                      Power Quality and Grid Code Issues in Wind Energy Conversion System 25
                                                                 
                                                                    2
                                                                  Ih
                                                             h2
                                      DF( for current) =                                            (2)
                                                                 I1
                                                           Sn
                                      d 100 Ku (  k )                                             (3)
                                                           Sk*
Sn - Rated apparent power of wind turbine and Sk* short circuit apparent power of grid.
The voltage dips of 3% in most of the cases are acceptable. When evaluating flicker and
power variation within 95% of maximum variation band corresponding to a standard
deviation are evaluated.
    occur. The maximum number of above specified switching operation within 10-minute
    period and 2-hr period are defined in IEC 61400-3-7 Standard.
    Voltage sag is a phenomenon in which grid voltage amplitude goes below and then returns
    to the normal level after a very short time period. Generally, the characteristic quantity of
    voltage sag is described by the amplitude and the duration of the sags. The IEEE power
    quality standards define the voltage sag when the amplitude of voltage is 0.1–0.9 p.u. value
    and its duration is between 10 ms and 1 min. A voltage sag is normally caused by short-
    circuit faults in the power network or by the starting up of Induction Generator/Motors.
    The bad weather conditions, such as thunderstorm, single-phase earthed faults are the causes
    of voltage sags. In addition, large electric loads such as large electrical motors or arc furnaces
    can also cause voltage sags during the startup phase with serious current distortion.
    The adverse consequences are the reduction in the energy transfer of electric motors. The
    disconnection of sensitive equipments and thus the industrial process may bring to a
    standstill.
    2.4. Harmonics
    The harmonics distortion caused by non-linear load such as electric arc furnaces, variable
    speed drives, large concentrations of arc discharge lamps, saturation of magnetization of
    transformer and a distorted line current. The current generated by such load interact with
    power system impedance and gives rise to harmonics. The effect of harmonics in the power
    system can lead to degradation of power quality at the consumer’s terminal, increase of
    power losses, and malfunction in communication system. The degree of variation is assessed
    at the point of common connection, where consumer and supplier area of responsibility
    meet. The harmonics voltage and current should be limited to acceptable level at the point
    of wind turbine connection in the system. This fact has lead to more stringent requirements
    regarding power quality, such as Standard IEC 61000-3-2 or IEEE-519. Conventionally,
    passive LC resonant filters have been used to solve power quality problems. However, these
    filters have the demerits of fixed compensation, large size, and the resonance itself. To
    overcome these drawbacks, active filters appear as the dynamic solution.
    The IEC 61000-3-6 gives a guideline and harmonic current limits. According to standard IEC
    61400-21 guideline, harmonic measurements are not required for fixed speed wind turbines
    where the induction generator is directly connected to grid. Harmonic measurements are
    required only for variable speed turbines equipped with electronic power converters. In
    general the power converters of wind turbines are pulse-width modulated inverters, which
    have carrier frequencies in the range of 2-3 kHz and produce mainly inter harmonic
    currents.
    The harmonic measurement at the wind turbine is problem due to the influence of the
    already existing harmonic voltage in the grid. The wave shape of the grid voltage is not
    sinusoidal. There are always harmonics voltages in the grid such as integer harmonic of 5th
    and 7th order which affect the measurements.
                                   Power Quality and Grid Code Issues in Wind Energy Conversion System 27
Today’s variable speed turbines are equipped with self commutated PWM inverter system.
This type of inverter system has advantage that both the active and reactive power can be
controlled, but it also produced a harmonic current. Therefore filters are necessary to reduce
the harmonics.
The harmonic distortion is assessed for variable speed turbine with a electronic power
converter at the point of common connection. The total harmonic voltage distortion of
voltage is given as in (4).
                                                 40 Vh2
                                    VTHD              100                                      (4)
                                                h2 V1
Vh- hth harmonic voltage and V1 –fundamental frequency 50 Hz. The THD limit for various
level of system voltages are given in the table 1.0
                                             40 I h2
                                     ITHD          100                                         (5)
                                            h2 I1
Where Ih - hth harmonic current and I1 –fundamental frequency (50) Hz. The acceptable level
of THD in the current is given in table 2.
Various standards are also recommended for individual consumer and utility system for
helping to design the system to improve the power quality. The characteristics of the load
and level of power system significantly decides the effects of harmonics. IEEE standards are
adapted in most of the countries. The recommended practice helps designer to limit current
and voltage distortion to acceptable limits at point of common coupling (PCC) between
supply and the consumer.
1.   IEEE standard 519 issued in 1981, recommends voltage distortion less than 5% on
     power lines below 69 kV. Lower voltage harmonic levels are recommended on higher
     supply voltage lines.
28 An Update on Power Quality
    2.   IEEE standard 519 was revised in 1992, and impose 5% voltage distortion limit. The
         standards also give guidelines on notch depth and telephone interface considerations.
    3.   ANSI/IEEE Standard C57.12.00 and C57.12.01 limits the current distortion to 5% at full
         load in supply transformer.
    In order to keep power quality under limit to a standards it is necessary to include some of
    the compensator. Modern solutions for active power factor correction can be found in the
    forms of active rectification (active wave shaping) or active filtering.
    2.5. Flickers
    Flicker is the one of the important power quality aspects in wind turbine generating system.
    Flicker has widely been considered as a serious drawback and may limit for the maximum
    amount of wind power generation that can be connected to the grid. Flicker is induced by
    voltage fluctuations, which are caused by load flow changes in the grid. The flicker emission
    produced by grid-connected variable-speed wind turbines with full-scale back-to-back
    converters during continuous operation and mainly caused by fluctuations in the output
    power due to wind speed variations, the wind shear, and the tower shadow effects. The
    wind shear and the tower shadow effects are normally referred to as the 3p oscillations. As a
    consequence, an output power drop will appear three times per revolution for a three-
    bladed wind turbine. There are many factors that affect flicker emission of grid connected
    wind turbines during continuous operation, such as wind characteristics and grid
    conditions. Variable-speed wind turbines have shown better performance related to flicker
    emission in comparison with fixed-speed wind turbines.
    The flicker study becomes necessary and important as the wind power penetration level
    increases quickly. The main reason for the flicker in fixed speed turbines is to wake of the
    tower. Each time a rotor blade passes the tower, the power output of the turbine is reduced.
    This effect cause periodical power fluctuations with a frequency of about ~1 Hz. The power
    fluctuation due to the wind speed fluctuation has lower frequencies and thus is less critical
    for flicker. In general, the flicker of fixed speed turbines reaches its maximum at high wind
    speed. Owing to smoothing effect, large wind turbine produced lower flicker than small
    wind turbines, in relation to their size.
    Several solutions have been proposed to mitigate the flicker caused by grid-connected wind
    turbines. The mostly adopted technique is the reactive power compensation. It can be
    realized by the grid-side converter of variable-speed wind turbines or the Static
    synchronous compensator connected at the point of common coupling (PCC). Also, some
    papers focus on the use of active power curtailment to mitigate the flicker [5].
    The flicker level depends on the amplitude, shape and repetition frequency of the fluctuated
    voltage waveform. Evaluating the flicker level is based on the flicker meter described in IEC
    61000-4-15. Two indices are typically used as a scale for flicker emission, short-term flicker
    index, Pst and long-term flicker index, Plt. Plt is estimated by certain process of the Pst values.
                                     Power Quality and Grid Code Issues in Wind Energy Conversion System 29
It is assumed that wind turbines under study is running at normal operation; hence, the
long-term flicker index (Plt), which is based on a 120-min time interval, is equal to Pst and,
therefore, Pst is only considered in this work. The normalized response of the flicker meter
described in Figure 2.0.
10
                        Voltage
                      fluctuation
                           %
                              1
0.1
1 2 10 100
Hz
A quite small voltage fluctuation at certain frequency (8.8 Hz) can be irritable. The flicker
level (Pst ≤ 1) is a threshold level for connecting wind turbines to low voltage. The
measurements are made for maximum number of specified switching operation of wind
turbine with 10-minutes period and 2-hour period are specified, as given in (6)
                                                        S
                                           Plt C(  K ) n                                         (6)
                                                        SK
Where plt - Long term flicker. C(  K ) - Flicker coefficient calculated from Rayleigh
distribution of the wind speed. The Limiting Value for flicker coefficient is about  0.4, for
average time of 2 hours.
    during off grid operation. Thus the sensitive equipments may be subjected to over/under
    voltage, over/under frequency operation and other disadvantage of safety aspect. According
    to IEC Standard, reactive power of wind turbine is to be specified as 10 min average value as
    a function of 10-min. output power for 10%, 20% … 100% of rated power. The effective
    control of reactive power can improve the power quality and stabilize the grid. Although
    reactive power is unable to provide actual working benefit, it is often used to adjust voltage,
    so it is a useful tool for maintaining desired voltage level. Every transmission system always
    has a reactive component, which can be expressed as power factor. Thus the some method is
    needed to manage the reactive power by injecting or absorbing VAr as necessary in order to
    maintain optimum voltage level and enable real power flow. Until recently, this has been
    especially difficult to effectively accomplish at a wind farms due to the variable nature of
    wind. The suggested control technique in the thesis is capable of controlling reactive power
    to zero value at point of common connection (PCC).The mode of operation is referred as
    unity power factor.
    Wind turbine generator systems (WTGS) are often located in the regions that have favorable
    wind conditions and where their location is not burdensome. These regions are low
    urbanized, which means that the distribution network in these regions is usually weak
    developed. Such situation is typical for all countries developing a wind power industry.
    The point of common coupling (PCC) of the WTGS and the power network parameter and
    structure of grid is of essential significance in the operation of WTGS and its influence on
    the system. WTGS can be connected to MV transmission line and to HV networks.
    The WTGS connected to the existing MV transmission line, which feeds the existing
    customers is presented in Figure 3.
    The distance between WTGS and PCC is usually small up to a few kilometers. Such
    connections are cheap as compare to other types of connection but greatly affected on
    consumers load (power quality).
    The location of WTGS connected to HV bus through a separate transmission line, when a
    relatively large rated WTGS has to be connected in the power network, where the MV
    network is weak. This type of connection are most expensive than other presented.
                                       Power Quality and Grid Code Issues in Wind Energy Conversion System 31
                                       MV             1
                  HV                                        PCC
Loads
LV LV
        Line-to-
          Line 100
        Voltage                                                                         Lower
                 90
           %                                                                             value
                                                                                      of voltage
                75                                                                       band
60
45
30
15
    of the wind and the risk of instability due to lower degree of controllability. Many countries
    in Europe and other parts of the world are developing or modifying interconnection rules
    and processes for wind power through a grid code. The grid codes have identified many
    potential adverse impacts of large scale integration of wind resources. The risk of voltage
    collapse for lack of reactive power support is one of the critical issues when it comes to
    contingencies in the power system. The low voltage ride through (LVRT) capability, which
    is one of the most demanding requirement that have been included in the grid codes and
    shown in Fig. 4.
    It defines the operational boundary of a wind turbine connected to the network in terms of
    frequency, voltage tolerance, power factor, fault ride through is regarded as the main
    challenges to the wind turbine manufactures. The wind turbine should remain stable and
    connected during the fault while voltage at the PCC drop to 15% of the nominal value i.e.
    drops of 85% for the part of 150 msec. Only when the grid voltage fall below the curve, the
    turbine is allowed to disconnected from the grid.
    Significant barriers to interconnection are being perceived already with the requirements
    of the new grid codes and there it is a need for a better understanding of the factors
    affecting the behavior of the wind farm under severe contingencies such as voltage sags.
    Wind farms using squirrel cage induction generators directly connected to the network
    will suffer from the new demands, since they have no direct electrical control of torque or
    speed, and would usually disconnect from the power system when the voltage drops
    more than 10–20% below the rated value. In general, fulfillment of LVRT by reactive
    compensation will require fast control strategies for reactive power in wind
    turbines/farms with cage induction generators. The LVRT requirement, although details
    are differing from country to country, basically demands that the wind farm remains
    connected to the grid for voltage dips as low as 5%.
inter harmonic in the IEC 61000-3-6 are applicable to wind turbines. The inter harmonics
that are not a multiple of 50 Hz, since the switching frequency of the inverter is not constant
but varies, the harmonic will also vary. Consequently, the grid codes has been define to
specify the requirements that the wind turbines must meet in order to be connected to the
grid, including the capabilities of contributing to frequency and voltage control by adjusting
the active and reactive power supplied to the transmission system.
The first grid code was focused on the distribution level, after the blackout in the United
State in August 2003. The United State wind energy industry took a stand in developing
its own grid code for contributing to a stable grid operation. The rules for realization of
grid operation of wind generating system at the distribution network is defined as - per
IEC-61400-21.The grid quality characteristics and limits are given for references that the
customer and the utility grid may expect. According to Energy-Economic Law, the
operator of transmission grid is responsible for the organization and operation of
interconnected system. The grid code also covers some of the technical standards for
connection to the grid.
To ensure the safe operation, integrity and reliability of the grid is utmost important. It is
mentioned that reactive power compensation should ideally be provided locally by
generating reactive power as close to the reactive power consumption as possible. The
regional entity except generating stations, expected to provide local VAr
compensation/generation such that they do not draw VArs from the grid, particularly under
low-voltage condition. Indian grid code commission mentions that the charge for VArh shall
be at the rate of 25 paise/kVArh w.e.f.1.4.2010, for VAr interchanges.
The wind farms must be able to run at rated voltage at a specified voltage range. The
voltage range depends on the level of the voltage on the transmission system, which varies
from country to country.
The wind farms shall have a closed loop voltage regulation system. The voltage regulation
system shall act to regulate the voltage at the point by continuous modulation of the reactive
power output within its reactive power range, and without violating the voltage step
emissions.
    The wind turbine generator (WTG) shall be equipped with voltage and frequency relays for
    disconnection of the wind farm at abnormal voltages and frequencies. The relays shall be set
    according to agreements with the regional grid company and the system operator. Following
    are the technical requirements to be fulfilled to integrate the wind generation system.
    Voltage Rise (u) -The voltage rise at the point of common coupling can be approximated as a
    function of maximum apparent power Smax of the turbine, the grid impedances R and X at the
    point of common coupling and the phase angle  . The Limiting voltage rise value is < 2%
    Voltage dips (d) - The voltage dips is due to start up of wind turbine and it causes a sudden
    reduction of voltage. The acceptable voltage dips limiting value is  3 %.
    Flicker-The measurements are made for maximum number of specified switching operation
    of wind turbine with 10-minutes period and 2-hour period are specified. The Limiting Value
    for flicker coefficient is about  0.4, for average time of 2 hours
    Grid frequency- The grid frequency in India is specified in the range of 47.5-51.5 Hz, for
    wind farm connection. The wind farm shall able to withstand change in frequency up to
    0.5Hz/sec. Thus the requirements in the Grid Code can be fulfill the technical limits of the
    network.
    4. Conclusion
    The chapter provides the challenges regarding the integration of wind energy in to the
    power systems. Today the worldwide trend of wind power penetration is increased. The
    integration of high penetration level of wind power into existing power system has
    significant impact on the power system operation.
    The wind turbines connected to weak grids have an important influence on power system.
    The weak grid is characterized by large voltage and frequency variations, which affects
    wind turbines regarding their power performance, safety and allied electrical components.
    The strength of the distribution system is important from the point of power quality. The
    needs for consistent qualification of power quality characteristics of wind turbines, the
    International Electro-Technical Commission to facilitate for power quality parameters for
    various issues are presented. The latest grid code requirements are to ensure that wind
    farms do not adversely affect the power system operation with respect to security of supply,
    reliability and for power quality.
    Author details
    Sharad W. Mohod
    Ram Meghe Institute of Technology & Research,Badnera-Amravart, India
    Mohan V. Aware
    Visvesvaraya National Institute of Technology, Nagpur, India
                                 Power Quality and Grid Code Issues in Wind Energy Conversion System 35
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36 An Update on Power Quality
http://dx.doi.org/10.5772/54257
1. Introduction
The electricity supply industry is undergoing a profound transformation worldwide.
Market forces, scarcer natural resources, and an ever-increasing demand for electricity are
some of the drivers responsible for such unprecedented change. Against this background of
rapid evolution, the expansion programs of many utilities are being thwarted by a variety of
well-founded, environment, land-use, and regulatory pressures that prevent the licensing
and building of new transmission lines and electricity generating plants.
The ability of the transmission system to transmit power becomes impaired by one or more
of the following steady state and dynamic limitations:
-    Angular stability,
-    Voltage magnitude,
-    Thermal limits,
-    Transient stability,
-    Dynamic stability.
These limits define the maximum electrical power to be transmitted without causing
damage to transmission lines and electrical equipment. In principle, limitations on power
transfer can always be relieved by the addition of new transmission lines and generation
facilities.
                           © 2013 The
                           ©             Author(s).
                                    Zellagui        Licensee
                                             and Chaghi,      InTech.InTech.
                                                           licensee   This chapter
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                           unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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40 An Update on Power Quality
    The FACTS concept is based on the substantial incorporation of power electronic devices
    and methods into the high-voltage side of the network, to make it electronically controllable.
    FACTS controllers aim at increasing the control of power flows in the high-voltage side of
    the network during both steady state and transient conditions. Owing to many economical
    and technical benefits it promised, FACTS received the support of electrical equipment
    manufacturers, utilities, and research organizations around the world. This interest has led
    to significant technological developments of FACTS controllers (Sen, K.K.; Sen, M.L., 2009),
    (Zhang, X.P. et al., 2006). Several kinds of FACTS controllers have been commissioned in
    various parts of the world.
    Popular are: load tap changers, phase-angle regulators, static VAR compensators, thyristors
    controlled series compensators, interphase power controllers, static compensators, and
    unified power flow controllers.
    The main objectives of FACTS controllers are the following (Mathur, R.M.; Basati, R.S., 2002):
    -   Regulation of power flows in prescribed transmission routes,
    -   Secure loading of transmission lines nearer to their thermal limits,
    -   Prevention of cascading outages by contributing to emergency control,
    -   Damping of oscillations that can threaten security or limit the usable line capacity.
    The most Utility engineers and consultants use relay models to select the relay types suited
    for a particular application, and to analyze the performance of relays that appear to either
    operate incorrectly or fail to operate on the occurrence of a fault. Instead of using actual
    prototypes, manufacturers use relay model designing to expedite and economize the
    process of developing new relays. Electric power utilities use computer-based relay models
    to confirm how the relay would perform during systems disturbances and normal operating
    conditions and to make the necessary corrective adjustment on the relay settings. The
    software models could be used for training young and inexperienced engineers and
    technicians. Researchers use relay model to investigate and improve protection design and
    algorithms. However, simulating numerical relays to choose appropriate settings for the
    steady state operation of over current relays and distance relays is presently the most
    familiar use of relay models (McLaren et al., 2001).
    1.2. Objectives
    This chapter presents a comparative study of the performance of MHO (admittance)
    distance relays for transmission line 400 kV in Eastern Algerian transmission networks
                                                   Impact of Series FACTS Devices (GCSC, TCSC and TCSR)
                                         on Distance Protection Setting Zones in 400 kV Transmission Line 41
compensated by three different series FACTS i.e. GCSC, TCSC and TCSR connected at
midpoint of a single electrical transmission line. The facts are used for controlling
transmission voltage in the range of ±40kV as well as reactive power injected between -50
MVar/+15 MVar on the power system. This chapter studies the effects of GCSC, TCSC and
TCSR insertion on the total impedance of a transmission line protected by MHO
(admittance) distance relay.
The modified setting zone protection in capacitive and inductive boost mode for three
forward zones (Z1, Z2 and Z3) and reverse zone (Z4) have been investigated in order to
prevent circuit breaker nuisance tripping to improve the performances of distance relay
protection. The simulation results are performed in MATLAB software.
2.1. GCSC
The compensator GCSC mounted on figure 1.a is the first that appears in the family of series
compensators. It consists of a capacitance (C) connected in series with the transmission line
and controlled by a valve-type GTO thyristors mounted in anti-parallel and controlled by an
angle of extinction (γ) varied between 0° and 180°. If the GTOs are kept turned-on all the
time, the capacitor C is bypassed and it does not realize any compensation effect. On the
other hand, if the positive-GTO (GTO1) and the negative-GTO (GTO2) turn off once per
cycle, at a given angle γ counted from the zero-crossing of the line current, the main
capacitor C charges and discharges with alternate polarity (Zhang, X.P. et al., 2006), (De
Jesus F. D. et al., 2007).
Hence, a voltage VC appears in series with the transmission line, which has a controllable
fundamental component that is orthogonal (lagging) to the line current.
42 An Update on Power Quality
    The compensator GCSC injects in the transmission line a variable capacitive reactance
    (XGCSC). From figure 1.b the expression of XGCSC is directly related to the controlled GTO
    angle (γ) which is varied between 0° and 180° as expressed by following equation (De
    Souza, L. F. W. et al., 2008), (Ray, S. et al., 2008) :
                                                    2     1        
                                       ( ) XC max 1    sin(2 )
                                  XGCSC                                                      (1)
                                                                 
Where,
                                                XC max  1                                    (2)
                                                             C.
    2.2. TCSC
    The compensator TCSC mounted on Figure 2.a is a type of series FACTS compensators. It
    consists of a capacitance (C) connected in parallel with an inductance (L) controlled by a
    valve mounted in anti-parallel conventional thyristors (T1 and T2) and controlled by an angle
    of extinction (α) varied between 90° and 180°.
    From figure 2.b, the compensator TCSC injected in the transmission line a variable
    capacitive reactance (XTCSC). The expression of XTCSC is directly related to the controlled
    thyristors, angle (α) which is varied between 90° and 180° and expressed by following
    equation (Acha, E. al., 2004), (Sen, K.K.; Sen, M.L., 2009):
                                                                    XC .X L ( )
                                  XTCSC ( )  XC / / X L ( )                               (3)
                                                                   XC  X L ( )
                                                                         
                                                                                              (4)
                                    X L ( )  X L max                    
                                                          2  sin(2 ) 
    Where,
And,
                                                  XC  1                                                   (6)
                                                            j.C.
From the equations (4), (5) and (6), the equation (3) becomes:
                                                                             
                                              XC .X L.max                     
                                                             2   sin(2 ) 
                                XTCSC ( )                                                                 (7)
                                                                               
                                             XC  X L.max                       
                                                              2   sin(2  ) 
2.3. TCSR
The compensator TCSR is an inductive reactance compensator at which its inductive
reactance is continually adjusted through the firing delay angle (α) of the thyristors as
shown in figure 3.a. It consists of a series reactor shunted by a thyristors controlled reactor
(TCR).
If the firing delay angle is 180°, the TCSR operates as an uncontrolled reactor (L1). When the
angle decreases below 180°, the inductive reactance of TCSR decreases and at 90° it is given
by the parallel connection of the reactors (L1//L2).
From figure 3.b, the compensator TCSR injected in the transmission line a variable
capacitive reactance (XTCSR). The expression of XTCSR is directly related to the controlled
thyristors angle (α) expressed by the following equation (Acha, E. al., 2004), (Zhang, X.P. et
al., 2006):
                                                                                                     
                                                                  X L 2 .X L1 max                    
                                              X .X ( )                               2  sin(2 ) 
          XTCSR ( )  X L 2   / / X L1( )  L 2 L1                                                       (8)
                                             X L 2  X L1 ( )                                        
                                                                 X L 2  X L1 max                     
                                                                                       2  sin(2 ) 
44 An Update on Power Quality
Where,
And,
X L 2  j.L2 . (10)
    Power system protection is the art and science of the application of devices that monitor the
    power line currents and voltages (relays) and generate signals to deenergize faulted sections
    of the power network by circuit breakers. Goal is to minimize damage to equipment that
    would be caused by system faults, if residues, and maintain the delivery of electrical energy
    to the consumers (Horowitz, S.H.; Phadke A.G. 2008), (Blackburn, J.L.; Domin, T.J. 2006).
    Many types of protective relays are used to protect power system equipments. They are
    classified according to their operating principles; over current relay senses the extra (more
    than set) current considered dangerous to a given equipment, differential relays compare in
    and out currents of a protected equipment, while impedance relays measure the impedance
    of the protected piece of plant.
       Reliability: assurance that the protection will perform correctly in presence of faults on
        electrical transmission and distribution line,
       Selectivity: maximum continuity of service with minimum system disconnection,
       Speed of operation: minimum fault duration and consequent equipment damage and
        system instability,
       Simplicity: minimum protective equipment and associated circuitry to achieve the
        protection objectives,
       Economics: maximum protection at minimal total cost.
                                                  Impact of Series FACTS Devices (GCSC, TCSC and TCSR)
                                        on Distance Protection Setting Zones in 400 kV Transmission Line 45
    This unit is not set to protect the entire line to avoid undesired tripping due to over reach.
    Over reach may occur due to transients during the fault condition.
Under reach is also caused by intermediate current sources, errors in CT, and VT and
measurement performed by the relay. To take into account the under reaching tendency
caused by these factors, the normal practice is to set the second zone reach up to 20% of the
shortest adjoining line section. The protective zone of the second unit is known as the
second zone of protection. The second zone unit operates after a certain time delay. Its
operating time is 0,3 sec.
The characteristic curve on MHO (admittance) relay for setting zones is shown in figure 6.
Figure 6. Characteristic curve X (R) for setting zones for distance protection.
Figure 7 represents the tripping time T1, T2 and T3 correspond to these three zones of
operation for circuit breaker installed at busbar A and MHO distance relay (RA).
The fourth setting zones for protected transmission line (forward and reverse) without
series FACTS are given by (Zellagui, M.; Chaghi, A. 2012.c), (Gérin-Lajoie, L. 2009):
                                Z4 
                                   R4  jX4 
                                            60%ZAB 
                                                    0,6.( RAB  jX AB )                        (14)
The total impedance of transmission line AB measured by MHO distance relay is:
                                                                  KVT                           (15)
                                         Z AB  KZ .ZL ,   KZ 
                                                                        KCT
    Where, ZAB is real total impedance of line AB, and KVT and KCT is ratio of voltage to
    current respectively.
    The presence of series FACTS systems in a reactor (XFACTS) has a direct influence on the total
    impedance of the protected line (ZAB), especially on the reactance XAB and no influence on
    the resistance RAB.
    This principle is primarily used for protection of high voltage transmission lines. In this case
    the over current principle cannot easily cope with the change in the direction of the current
    flow, which is common in the transmission but no so common in radial distribution lines.
    Computing the impedance in the three-phase system is a bit involved in each type of the
    fault produces a different impedance expression. Because of these differences the settings of
    the distance relay are needed to be selected to distinguish between the ground and phase
    faults.
                                                 Impact of Series FACTS Devices (GCSC, TCSC and TCSR)
                                       on Distance Protection Setting Zones in 400 kV Transmission Line 49
In addition fault resistance may create problem for distance measurement because of the
fault resistance may be difficult for predict. It is particularly challenging for distance relays
to measure correct fault impedance when the current in feed from the other end of the line
create an unknown voltage drop on the fault resistance (Kazemi, A. et al., 2009), (Kulkami,
P.A. et al., 2010).
The principle behind the standard distance protection function is based on measured
apparent impedance (Zseen) at the transmission line terminals. The apparent impedance is
computed from fundamental power frequency components of measured instantaneous
voltage and current signals (Liu, Q.; Wang, Z., 2008), (Khederzadeh, M.; Sidhu, T. S., 2006),
(Jamali, S.; Shateri, H. 2011), the apparent impedance is given by:
                                             V             
                                     Zseen   seen           .K                                 (16)
                                                   I seen  Z
The figure below represents a 400 kV transmission line in the presence of a series FACTS
type GCSC, TCSC and TCSR installed in the midpoint of the transmission line protected by
a MHO distance relay between busbar A and B.
    The impact of the angle variation α and XTCSC injected reactance by compensator TCSC on
    reactance and resistance of the total impedance for transmission line (XAB and RAB) and on
    the parameters of measured impedance by MHO distance relay (XRelay and RRelay) in the
    inductive and capacitive mode is summarized in table 2.
    The impact of the angle variation α and injected reactance XTCSR by compensator TCSR on
    reactance and resistance of the total impedance for transmission line (XAB and RAB) and on
    the parameters of measured impedance by MHO distance relay (XRelay and RRelay)in the
    inductive and capacitive mode is summarized in table 3.
Mode Inductive
    6. Conclusions
    The results are presented in relation to a typical 400 kV transmission system employing
    GCSC, TCSC and TCSR series FACTS devices. The effects of the extinction angle γ for
    controlled GTO installed on GCSC as well as extinction angle α for controlled thyristors on
    TCSC and TCSR are investigated. These devices are connected at the midpoint of a
    transmission line protected by distance relay. However as demonstrated these angles
    injected variable reactance (XGCSC, XTCSC or XTCSR) in the protected line which lead to direct
    impact on the total impedance of the protected line and setting zones.
                                                  Impact of Series FACTS Devices (GCSC, TCSC and TCSR)
                                        on Distance Protection Setting Zones in 400 kV Transmission Line 59
Therefore settings zones of the total system protection must be adjusted in order to avoid
unwanted circuit breaker tripping in the presence of series FACTS compensator.
Author details
Mohamed Zellagui and Abdelaziz Chaghi
LSP-IE Research Laboratory, Department of Electrical Engineering, Faculty of Technology,
University of Batna, Algeria
7. References
Acha, E.; Fuerte-Esquivel, C.R.; Ambriz-Pérez, H.; & Angeles-Camacho, C., (2004). FACTS
    Modelling and Simulation in Power Networks, John Wiley & Sons Ltd Publication, ISBN:
    978-0470852712, London, England.
Blackburn, J.L.; Domin, T.J. (2006). Protective Relaying: Principles and Applications, 3rd Edition,
    Published by CRC Press, ISBN: 978-1574447163, USA.
De Jesus F. D.; De Souza L. F. W.; Wantanabe E.; Alves J. E. R. (2007). SSR and Power
    Oscillation Damping using Gate-Controlled Series Capacitors (GCSC), IEEE Transaction
    on Power Delivery, Vol. 22, N°3, (Mars 2007), pp. 1806-1812.
De Souza, L. F. W.; Wantanabe, E. H.; Alves, J. E. R. (2008). Thyristor and Gate-Controlled
    Series Capacitors: A Comparison of Component Ratings, IEEE Transaction on Power
    Delivery, Vol. 23, No.2, (May 2008), pp. 899-906.
Dechphung, S.; Saengsuwan, T. (2008). Adaptive Characteristic of MHO Distance Relay for
    Compensation of the Phase to Phase Fault Resistance, IEEE International Conference on
    Sustainable Energy Technologies (ICSET’ 2008), Singapore, Thailand, 24-27 November
    2008.
Gérin-Lajoie, L. (2009), A MHO Distance Relay Device in EMTP Works, Electric Power
    Systems Research, 79(3), March 2009, pp. 484-49.
Horowitz, S.H.; Phadke A.G. (2008). Power System Relaying, 3rd Edition, Published by John
    Wiley & Sons Ltd, ISBN: 978-0470057124, England, UK.
Jamali, S.; Shateri, H. (2011). Impedance based Fault Location Method for Single Phase to
    Earth Faults in Transmission Systems, 10th IET International Conference on Developments
    in Power System Protection (DPSP), United Kingdom, 29 March - 1 April, 2010.
Kazemi, A.; Jamali, S.; Shateri, H. (2009). Measured Impedance by Distance Relay with
    Positive Sequence Voltage Memory in Presence of TCSC, IEEE/PES Power Systems
    Conference and Exposition (PSCE’ 09), Seattle, USA, 15-18 March 2009.
Khederzadeh, M.; Sidhu, T. S. (2006). Impact of TCSC on the Protection of Transmission
    Lines, IEEE Transactions on Power Delivery, Vol. 21, No. 1, (January 2006), pp. 80-87.
Kulkami, P. A.; Holmukhe, R. M.; Deshpande, K. D.; Chaudhari, P. S. (2010). Impact of
    TCSC on Protection of Transmission Line, International Conference on Energy Optimization
    and Control (ICEOC’ 10), Maharashtra, India, 28-30 December 2010.
60 An Update on Power Quality
    Liu, Q.; Wang, Z. (2008). Research on the Influence of TCSC to EHV Transmission Line
         Protection, International Conference on Deregulation and Restructuring and Power
         Technology (DRPT’ 08), Nanjing, China, 6-9 April 2008.
    Mathur, R.M.; Basati, R.S., (2002). Thyristor-Based FACTS Controllers for Electrical Transmission
         Systems, Published by Wiley and IEEE Press Series in Power Engineering, ISBN: 978-
         0471206439, New Jersey, USA.
    McLaren, P. G.; Mustaphi, K.; Benmouyal, G.; Chano, S.; Girgis, A.; Henville, C.; Kezunovic,
         M.; Kojovic, L.; Marttila, R.; Meisinger, M.; Michel, G.; Sachdev, M. S.; Skendzic, V.;
         Sidhu, T. S.; Tziouvaras, D., (2001). Software Models for Relays, IEEE Transactions on
         Power Delivery, Vol. 16, No. 12, (April 2001), pp. 238-45.
    Ray, S.; Venayagamoorthy, G. K.; Watanabe, E. H. (2008). A Computational Approach to
         Optimal Damping Controller Design for a GCSC, IEEE Transaction on Power Delivery,
         Vol. 23, No.3, (July 2008), pp. 1673-1681.
    Sen, K.K.; Sen, M.L., (2009). Introduction to FACTS Controllers: Theory, Modeling and
         Applications", Published by John Wiley & Sons, Inc., and IEEE Press, ISBN: 978-
         0470478752, New Jersey, USA.
    Sonelgaz Group/GRTE, (2011). Topologies of Electrical Networks High Voltage 400 kV, Technical
         rapport published by Algerian Company of Electrical Transmission Network, 30
         December 2011, Sétif, Algeria.
    Zellagui, M.; Chaghi, A. (2012.a). Distance Protection for Electrical Transmission Line:
         Equipments, Settings Zones and Tele-Protection, published by LAP Lambert Academic
         Publishing, ISSN: 978-3-659-15790-5, Saarbrücken - Germany.
    Zellagui, M.; Chaghi, A. (2012.b). Measured Impedance by MHO Distance Protection for
         Phase to Earth Fault in Presence GCSC, ACTA Technica Corviniensis : Bulletin of
         Engineering, Tome 5, Fascicule 3, (July-September 2012), pp. 81-86.
    Zellagui, M.; Chaghi, A. (2012.c). A Comparative Study of FSC and GCSC Impact on MHO
         Distance Relay Setting in 400 kV Algeria Transmission Line, Journal ACTA
         Electrotehnica, Vol. 53, No. 2, (July 2012), pp. 134-143.
    Zhang, X.P.; Rehtanz, C.; Pal, B., (2006). Flexible AC Transmission Systems: Modelling and
         Control, Springer Publishers, ISBN: 978-3642067860, Heidelberg, Germany.
    Zigler, G. (2008). Numerical Distance Protection: Principles and Applications, 3rd Edition, Publics
         Corporate Publishing, Wiley-VCH, ISBN: 978-3895783180, Berlin, Germany.
                                                                                                                          Chapter 4
http://dx.doi.org/10.5772/54555
1. Introduction
Static Var Compensator (SVC) has been commonly used to provide reactive power
compensation in distribution systems [1]. The SVC placement problem is a well-researched
topic. Earlier approaches differ in problem formulation and the solution methods. In some
approaches, the objective function is considered as an unconstrained maximization of
savings due to energy loss reduction and peak power loss reduction against the SVC cost.
Others formulated the problem with some variations of the above objective function. Some
have also formulated the problem as constrained optimization and included voltage
constraints into consideration.
In today’s power system, there is trend to use nonlinear loads such as energy-efficient
fluorescent lamps and solid-state devices. The SVCs sizing and allocation [2-4] should be
properly considered, if else they can amplify harmonic currents and voltages due to possible
resonance at one or several harmonic frequencies and switching actions of the power
electronics converters connected. This condition could lead to potentially dangerous
magnitudes of harmonic signals, additional stress on equipment insulation, increased SVC
failure and interference with communication system.
SVC values are often assumed as continuous variables whose costs are considered as
proportional to SVC size in past researches. Moreover, the cost of SVC is not linearly
proportional to the size (MVAr). Hence, if the continuous variable approach is used to
choose integral SVC size, the method may not result in an optimum solution and may even
lead to undesirable harmonic resonance conditions.
Current harmonics are inevitable during the operation of thyristor controlled rectifiers, thus
it is essential to have filters in a SVC system to eliminate the harmonics. The filter banks can
not only absorb the risk harmonics, but also produce the capacitive reactive power. The SVC
                           © 2013 The
                           ©            Author(s).
                                    Leung  and Lu, Licensee
                                                    licensee InTech.
                                                             InTech.This
                                                                     Thischapter  is distributed
                                                                          is an open             underdistributed
                                                                                       access chapter  the terms of the Creative
                                                                                                                  under          Commons
                                                                                                                         the terms  of the
                           Creative Commons
                           Attribution          Attribution License (http://creativecommons.org/licenses/by/3.0),
                                       License http://creativecommons.org/licenses/by/3.0),                          which permits
                                                                                                 which permits unrestricted  use, distribution,
                           unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
                           and reproduction in any medium, provided the original work is properly cited.
62 An Update on Power Quality
    uses close loop control system to regulate busbar voltage, reactive power exchange, power
    factor and three phase voltage balance.
    This chapter describes a method based on Particle Swarm Optimisation (PSO) [5] to solve
    the optimal SVC allocation successfully. Particle Swarm Optimisation (PSO) method is a
    powerful optimization technique analogous to the natural genetic process in biology.
    Theoretically, this technique is a stochastic approach and it converges to the global optimum
    solution, provided that certain conditions are satisfied. This chapter considers a distribution
    system with 9 possible locations for SVCs and 27 different sizes of SVCs. A critical
    discussion using the example with result is discussed in this chapter.
    2. Problem formulation
    2.1. Operation principal of SVC
    The Static Var Compensator (SVC) are composed of the capacitor banks/filter banks and air-
    core reactors connected in parallel. The air-core reactors are series connected to thyristors.
    The current of air-core reactors can be controlled by adjusting the fire angle of thyristors.
    The SVC can be considered as a dynamic reactive power source. It can supply capacitive
    reactive power to the grid or consume the spare inductive reactive power from the grid.
    Normally, the system can receive the reactive power from a capacitor bank, and the spare
    part can be consumed by an air-core shunt reactor. As mentioned, the current in the air-core
    reactor is controlled by a thyristor valve. The valve controls the fundamental current by
    changing the fire angle, ensuring the voltage can be limited to an acceptable range at the
    injected node(for power system var compensation), or the sum of reactive power at the
    injected node is zero which means the power factor is equal to 1 (for load var
    compensation).
    2.2. Assumptions
    The optimal SVC placement problem [6] has many variables including the SVC size, SVC
    cost, locations and voltage constraints on the system. There are switchable SVCs and fixed-
    type SVCs in practice. However, considering all variables in a nonlinear fashion will make
    the placement problem very complicated. In order to simplify the analysis, the assumptions
    are as follows: 1) balanced conditions, 2) negligible line capacitance, 3) time-invariant loads
    and 4) harmonic generation is solely from the substation voltage supply.
    At the power frequency, the bus voltages are found by solving the following mismatch
    equations:
                          A PSO Approach in Optimal FACTS Selection with Harmonic Distortion Considerations 63
0 1 2 i m-1 m
                                                                                                                                 y m  1 ,m
                                                                                                                                   1
                          y 01                         y 12
                            1                                 1
...... ......
                                                                                       y ci                P ni ,Q ni
                                         P ,Q  1          1            P ,Q2       2          P   li
                                                                                                       ,   Q li     P     m 1
                                                                                                                                 ,Q
                                                                                                                                       m 1   P   m
                                                                                                                                                      ,Q
                                                                                                                                                           m
                                                                                                      
                                 2                 m
                       1            1 1 1           1      1     1
                P i V i G ii   V i V jY ij cos  ij   j   i                                              i 
                                                                                                                  1,2,3 m                                     (1)
                                                   j 1
                                                   j i
                                                                                                          
                                     2               m
                         V 1i Bii   V 1i V 1jY 1ij sin  1ij   1j   1i
                     Qi                                                                                            i  1,2,3 m                               (2)
                                                    j 1
                                                    ji
where
                                                                      P
                                                                       i P li  P ni                                                                           (3)
                                                                     Q
                                                                      i Qli  Qni                                                                              (4)
                                                                                      1
                                                                                   y ij                       if i  j
                                                                      
                                   1
                                 Y ij           1
                                               Y ij        1ij                                                                                             (5)
                                                                          1          1          1
                                                                      y i 1,i  y i 1,i  y ci             if i  j
                                                                      ii G ii  j B ii
                                                                     Y                                                                                        (6)
                                                                                                               
                                                                                                                    2
                                               1                         1        1   1
                                             
                                             P loss i ,i 1 Ri ,i 1 V i 1  V i Y i ,i 1                                                                  (7)
                                                                        N  m1               
                                                                                n
                                                              P loss     P loss i ,i 1                                                                 (8)
                                                                         i 0
                                                                       n 1                   
    taken into account. Following the above notation, the total annual cost function due to SVC
    placement and power loss is written as :
Minimize
                                                                     m
                                        f  Kl K p Ploss   Qcj Kcj                          (9)
                                                                     j 1
Qcj  j * Ks (10)
and
    According to IEEE Standard 519 [7] utility distribution buses should provide a voltage
    harmonic distortion level of less than 5% provided customers on the distribution feeder
    limit their load harmonic current injections to a prescribed level.
    3. Proposed algorithm
    3.1. Harmonic power flow [8]
    At the higher frequencies, the entire power system is modelled as the combination of
    harmonic current sources and passive elements. Since the admittance of system components
    will vary with the harmonic order, the admittance matrix is modified for each harmonic
    order studied. If the skin effect is ignored, the resulting n-th harmonic frequency load
    admittance, shunt SVC admittance and feeder admittance are respectively given by:
                                         n            Pli                Qli
                                       
                                       Y li                 2
                                                                j             2
                                                                                             (13)
                                                  Vi1                n Vi1
                                                      n              1
                                                  Y ci  nY ci                               (14)
                                          n                      1
                                        Y i ,i 1                                           (15)
                                                      Ri ,i 1  jnX i ,i 1
    The linear loads are composed of a resistance in parallel with a reactance [9]. The nonlinear
    loads are treated as harmonic current sources, so the injection harmonic current source
    introduced by the nonlinear load at bus i is derived as follows:
                     A PSO Approach in Optimal FACTS Selection with Harmonic Distortion Considerations 65
                                                                   *
                                         1
                                                P  jQ 
                                        Ii     ni 1 ni                                       (16)
                                                Vi     
                                                           1
                                           I i  C  n I i
                                             n
                                                                                                (17)
In this study, C(n) is obtained by field test and Fourier analysis for all the customers along
the distribution feeder. The harmonic voltages are found by solving the load flow equation
(18), which is derived from the node equations.
                                            n n   n
                                           Y V I                                               (18)
                                                   N           2
                                         Vi        Vni                                        (19)
                                                   n1
where N is an upper limit of the harmonic orders being considered and is required to be
within an acceptable range. After solving the load flow for different harmonic orders, the
harmonic distortion factor (HDF) [8] that is used to describe harmonic pollution is
calculated as follows:
                                                   N           2
                                                    Vni
                                     i %
                                                  n 2
                                  
                                 HDF                   1
                                                                    100%                       (20)
                                                    Vi
    4. Implementation of PSO
    This section provides a brief introductory concept of PSO. If Xi = (xi1, xi2 ,…, xid) and Vi =(vi1, vi2
    ,…, vid) are the position vector and the velocity vector respectively in d dimensions search
    space, then according to a fitness function, where Pi=(pi1, pi2,…, pid) is the pbest vector and
    Pg=(pg1, pg2,…, pgd) is the gbest vector, i.e. the fittest particle of Pi, updating new positions
    and velocities for the next generation can be determined.
                                 Do
                                    For each particle
                                       Calculate fitness value
                                       If the fitness value is better than the best fitness
                                 value (pbest), set current value as the new pbest
                                    End
                                                                                             
         Vid  t   Vid  t  1  C1 * rand1* Pid  Xid  t  1  C2 * rand2 * Pgd  Xid  t  1         (21)
                                        Xid  t
                                                Xid  t  1  Vid t                                        (22)
where Vid is the particle velocity, Xid is the current particle (solution). Pid and Pgd are defined
as above. rand1 and rand2 are random numbers which is uniformly distributed between
[0,1]. C1, C2 are constant values which is usually set to C1 = C2 = 2.0. These constants
represent the weighting of the stochastic acceleration which pulls each particle towards the
pbest and gbest position. ω is the inertia weight and it can be expressed as follows:
                                                         itermax  iter
                                          
                                     ω  i   f *         itermax
                                                                        ωf                                    (23)
where i and f are the initial and final values of the inertia weight respectively. iter and
itermax are the current iterations number and maximum allowed iterations number
respectively.
The velocities of particles on each dimension are limited to a maximum velocity Vmax. If the
sum of accelerations causes the velocity on that dimension to exceed the user-specified Vmax,
the velocity on that dimension is limited to Vmax.
In this chapter, the parameters used for PSO are as follows:
   Number of particles in the swarm, N = 30 (the typical range is 20 – 40)
   Inertia weight, wi = 0.9, wf = 0.4
   Acceleration factor, C1 and C2 = 2.0
   Maximum allowed generation, itermax = 100
   The maximum velocity of particles, Vmax =10% of search space
There are two stopping criteria in this chapter. Firstly, i(t is the number of iterations since
the last change of the best solution is greater than a preset number. The PSO is terminated
while maximum iteration is reached.
For the PSO, the constriction and inertia weight factors are introduced and (21) is improved
as follows.
       V                                                                                   
        id  t  k  Vid  t  1  1 * rand1 * Pid  Xid  t  1   2 * rand 2 * Pgd  Xid  t  1      (24)
                                                            2
                              k                                                                               (25)
                                   2   1   2       1   2         4  1   2 
                                                                        2
where k is a constriction factor from the stability analysis which can ensure the convergence
(i.e. avoid premature convergence) where ߮ଵ  ߮ଶ > 4 and kmax < 1 and  is dynamically set
as follows:
68 An Update on Power Quality
                                                              max  min
                                              ω  ω max                    t                      (26)
                                                                  tTotal
    where t and tTotal is the current iteration and total number of iteration respectively and ߱
    and ߱௫ is the upper and lower limit which are set 1.3 and 0.1 respectively.
    The advantage of the integration of mutation from GAs is to prevent stagnation as the
    mutation operation choose the particles in the swarm randomly and the particles can move
    to difference position. The particles will update the velocities and positions after mutation.
    where xid is a randomly chosen element of the particle from the swarm, ω is randomly
                                    ଵ
    generated within the range [0, ଵ × (particle max – particle min)] (particle max and particle min are
    the upper and lower boundaries of each particle element respectively) and r is the random
    number in between 1 and -1
                                                              fmax  fa
                                                       fi                                          (29)
                                                                fmax
                              m
    where fa  Kl K p Ploss   Qcj Kcj
                             j 1
    5. Software design
    Figure 3 depicts the main steps in the process of this chapter. The predefined processes of
    optimal SVC location and Particle Swarm Optimisation calculation are illustrated in Figure 4
    and Figure 5.
                              A PSO Approach in Optimal FACTS Selection with Harmonic Distortion Considerations 69
Start
Setup a Y-matrix
                                                                                  No   No solution found
                                                Any feasible solution found ?              within the
                                                                                          constraints
                                                                Yes
                                                  Record the best result and
                                                     set as old solution
Yes No
End
Enter
                                           Is harmonic
                                          considered ?           No
                                                   Yes
                                     Harmonic distortion
                                   calculation subprogram
Exit
Enter
Adjust Y-matrix
Solve V*Y=I
                                 Is the highest              No
                                harmonic order
                                  considered?
                                           Yes
                          Calculate the harmonic
                             distortion factor
Exit
Figure 6. Flow chart of ‘Harmonic distortion calculation subprogram’ in Figure 4 and Figure 5
                          Supply
                          source
                                       1      2   3      4   5    6     7    8     9
    Figure 7. Testing distribution system with 9 buses
                       A PSO Approach in Optimal FACTS Selection with Harmonic Distortion Considerations 73
        Bus              1          2            3        4            5            6           7     8      9
     P(kW)             1840        980          1790     1598      1610           780          1150   980   1640
    Q(MVAr)            460         340          446      1840      600            110           60    130   200
  Non-linear (%)        0          55.7         18.9     92.1       4.7           1.9          38.2   4.5    4.0
Table 1. Load data of the test system
                                                From
                         From Bus i                       R i,i 1            Xi,i1  
                                                Bus j
                               0                     1        0.1233              0.4127
                               1                     2        0.0140              0.6051
                               2                     3        0.7463              1.2050
                               3                     4        0.6984              0.6084
                               4                     5        1.9831              1.7276
                               5                     6        0.9053              0.7886
                               6                     7        2.0552              1.1640
                               7                     8        4.7953              2.7160
                               8                     9        5.3434              3.0264
Table 2. Feeder data of the test system
Kp is selected to be US $168/MW in equation (9). The minimum and maximum voltages are
0.9 p.u. and 1.0 p.u. respectively. All voltage and power quantities are per-unit values. The
base value of voltage and power is 23kV and 100MW respectively. Commercially available
SVC sizes are analyzed. Table 4 shows an example of such data provided by a supplier for
23kV distribution feeders. For reactive power compensation, the maximum SVC size Qc(max)
should not exceed the reactive load, i.e. 4186 MVAr. SVC sizes and costs are shown in Table
5 by assuming a life expectancy of ten years (the placement, maintenance, and running costs
are assumed to be grouped as total cost.)
74 An Update on Power Quality
             j            1        2         3          4          5        6          7       8       9
      Qcj (MVAr)         150      300       450        600        750      900       1050    1200    1350
     Kcj ($ / MVAr)     0.500    0.350     0.253      0.220      0.276    0.183      0.228   0.170   0.207
             j            10      11        12         13         14       15         16      17      18
      Qcj (MVAr)        1500     1650      1800       1950       2100     2250       2400    2550    2700
     Kcj ($ / MVAr)     0.201    0.193     0.187      0.211      0.176    0.197      0.170   0.189   0.187
             j            19      20        21         22         23       24         25      26      27
      Qcj (MVAr)        2850     3000      3150       3300       3450     3600       3750    3900    4050
     Kcj ($ / MVAr)     0.183    0.180     0.195      0.174      0.188    0.170      0.183   0.182   0.179
    Table 5. Possible choice of SVC sizes and costs
    The effectiveness of the method is illustrated by a comparative study of the following three
    cases. Case 1 is without SVC installation and neglected the harmonic. Both Case 2 and 3 use
    PSO approach for optimizing the size and the placement of the SVC in the radial
    distribution system. However, Case 2 does not take harmonic into consideration and Case 3
    takes harmonic into consideration. The optimal locations of SVCs are selected at bus 4, bus 5
    and bus 9.
    Before optimization (Case 1), the voltages of bus 7, 8, 9 are violated. The cost function and
    the maximum HDF are $132138 and 6.15% respectively. The harmonic distortion level on all
    buses is higher than 5%.
    After optimization (Case 2 and 3), the power losses become 0.007065 p.u. in Case 2 and
    0.007036 p.u. in Case 3. Therefore, the power savings will be 0.000747 p.u. in Case 2 and
    0.000776 p.u. in Case 3. It can also be seen that Case 3 has more power saving than Case 2.
    The voltage profile of Case 2 and 3 are shown in Table 6 and Table 7 respectively. In both
    cases, all bus voltages are within the limit. The cost savings of Case 2 and Case 3 are $2,744
    (2.091%) and $1,904 (1.451%) respectively with respect to Case 1. Since harmonic distortion
    is considered in Case 3, the sizes of SVCs are larger than Case 2 so that the total cost of Case
    3 is higher than Case 2.
    The maximum HDF of Case 2 of Case 3 are 1.35% and 1.2% respectively. The HDF
    improvement of Case 3 with respects to Case 1 is
                                                        6.15  1.20
                             HDF improvement
                                            %                       100 80.49%
                                                                    
                                                           6.15
    The HDF improvement of Case 3 with respects to Case 2 is
                                                              1.40  1.20
                                HDF improvement %                         14.29%
                                                                 1.40
                       A PSO Approach in Optimal FACTS Selection with Harmonic Distortion Considerations 75
The improvement of the harmonic distortion is quite attractive and it is clearly shown in
Figure 7. The reductions in HDF are 80.49% and 14.29% with respect to Case 1 and Case 2.
The optimal cost and the corresponding SVC sizes, power loss, minimum / maximum
voltages, the average CPU time and harmonic distortion factor are also shown in Figure 8.
7. Conclusion
This chapter presents a Particle Swarm Optimisation (PSO) approach to searching for
optimal shunt SVC location and size with harmonic consideration. The cost or fitness
function is constrained by voltage and Harmonic Distortion Factor (HDF). Since PSO is a
stochastic approach, performances should be evaluated using statistical value. The
performance will be affected by initial condition but PSO can give the optimal solution by
increasing the population size. PSO offers robustness by searching for the best solution from
a population point of view and avoiding derivatives and using payoff information (objective
function). The result shows that PSO method is suitable for discrete value optimization
problem such as SVC allocation and the consideration of harmonic distortion limit may be
included with an integrated approach in the PSO.
Nomenclature
fmax       the maximum fitness of each generation in the population
N          the number of harmonic order is being considered
Qc         the size of SVC (MVAr)
Kc         the equivalent SVC cost ($/MVAr)
Kl         the duration of the load period
Kp         the equivalent annual cost per unit of power losses ($/kW)
Ks         the SVC bank size (MVAr)
yci        frequency admittance of the SVC at bus i (pu)
Vi         voltage magnitude at bus i (pu)
Pi, Qi     active and reactive powers injected into network at bus i (pu)
Pli, Qli   linear active and reactive load at bus i (pu)
Pni Qni    nonlinear active and reactive load at bus i (pu)
ij        voltage angle different between bus i and bus j (rad)
Gii, Bii   self conductance and susceptance of bus i (pu)
Gij, Bij   mutual conductance and susceptance between bus i and bus j (pu)
Superscript
1          corresponds to the fundamental frequency value
n          corresponds to the nth harmonic order value
Author details
H.C. Leung and Dylan D.C. Lu
Department of Electrical and Information Engineering,
The University of Sydney, NSW 2006,
Australia
78 An Update on Power Quality
    8. References
    [1] Ewald Fuchs and Mohammad A. S. Masoum (2008). “Power Quality in Power Systems
         and Electrical Machines“: pp 398-399
    [2] Zhang, Wenjuan, Fangxing Li, and Leon M. Tolbert. "Optimal allocation of shunt
         dynamic Var source SVC and STATCOM: A Survey." 7th IEEE International Conference
         on Advances in Power System Control, Operation and Management (APSCOM). Hong
         Kong. 30th Oct.-2nd Nov. 2006.
    [3] Verma, M. K., and S. C. Srivastava. "Optimal placement of SVC for static and dynamic
         voltage security enhancement." International Journal of Emerging Electric Power
         Systems 2.2 (2005).
    [4] Garbex, S., R. Cherkaoui, and A. J. Germond. "Optimal location of multi-type FACTS
         devices in power system by means of genetic algorithm." IEEE Trans. on Power System
         16 (2001): pp 537-544.
    [5] Kennedy, J.; Eberhart, R. (1995). "Particle Swarm Optimization". Proceedings of IEEE
         International Conference on Neural Networks. IV. pp. 1942–1948.
         http://dx.doi.org/10.1109%2FICNN.1995.488968
    [6] Mínguez, Roberto, et al. "Optimal network placement of SVC devices.", IEEE
         Transactions on Power Systems 22.4 (2007): pp. 1851-1860.
    [7] IEEE std. 519-1981, “IEEE Guide for harmonic control and reactive power compensation
         of static power converters”, IEEE, New York, (1981).
    [8] J. Arrillaga, D.A. Bradley and P.S. Boodger, “Power system harmonics”, John Willey &
         Sons, (1985), ISBN 0-471-90640-9.
    [9] Y. Baghzouz, “Effects of nonlinear loads on optimal capacitor placement in radial
         feeders”, IEEE Trans. Power Delivery, (1991), pp.245-251.
    [10] Hamada, Mohamed M., et al. "A New Approach for Capacitor Allocation in Radial
         Distribution Feeders." The Online Journal on Electronics and Electrical Engineering
         (OJEEE) Vol. (1) – No. (1), pp 24-29
                                                                                                                             Chapter 5
http://dx.doi.org/10.5772/55009
1. Introduction
One of the serious problems in electrical power systems is the increase of electronic devices
which are used by the industry as well as residences. These devices, which need high-
quality energy to work properly, at the same time, are the most responsible ones for
decreasing of power quality by themselves.
In the last decade, Distributed Generation systems (DGs) which use Clean Energy Sources
(CESs) such as wind power, photo voltaic, fuel cells, and acid batteries have integrated at
distribution networks increasingly. They can affect in stability, voltage regulation and
power quality of the network as an electric device connected to the power system.
One of the most efficient systems to solve power quality problems is Unified Power Quality
Conditioner (UPQC). It consists of a Parallel-Active Filter (PAF) and a Series-Active Filter
(SAF) together with a common dc link [1-3]. This combination allows a simultaneous
compensation for source side currents and delivered voltage to the load. In this way,
operation of the UPQC isolates the utility from current quality problems of load and at the
same time isolates the load from the voltage quality problems of utility. Nowadays, small
synchronous generators, as DG source, which are installed near the load can be used for
increase reliability and decrease losses.
Scope of this research is integration of UPQC and mentioned synchronous generators for
power quality compensation and reliability increase. In this research small synchronous
generator, which will be treated as an electromechanical active filter, not only can be used as
another power source for load supply but also, can be used for the power quality
compensation. Algorithm and mathematical relations for the control of small synchronous
generator as an electromechanical active filter have been presented, too. Power quality
compensation in sag, swell, unbalance, and harmonized conditions have been done by use
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80 An Update on Power Quality
    of introduced active filter with integration of Unified Power Quality Conditioner (UPQC). In
    this research, voltage problems are compensated by the Series Active Filter (SAF) of the
    UPQC. On the other hand, issues related to the compensation of current problems are done
    by the electromechanical active filter and PAF of UPQC. For validation of the proposed
    theory in power quality compensation, a simulation has been done in MATLAB/SIMULINK
    and a number of selected simulation results have been shown.
    A T-type active power filter for power factor correction is proposed in [4]. In [5], neutral
    current in three phase four wire systems is compensated by using a four leg PAF for the
    UPQC. In [6], UPQC is controlled by H∞ approach which needs high calculation demand. In
    [7], UPQC can be controlled based on phase angle control for share load reactive power
    between SAF and PAF. In [8] minimum active power injection has been used for SAF in a
    UPQC-Q, based on its voltage magnitude and phase angle ratings in sag conditions. In [9],
    UPQC control has been done in parallel and islanding modes in dqo frame use of a high
    pass filter. In [10-12] two new combinations of SAF and PAF for two independent
    distribution feeders power quality compensation have been proposed. Section 2 generally
    introduces UPQC. Section 3 explains connection of the proposed active filter. Section 4
    introduces electromechanical active filter. Section 5 explains used algorithm for reference
    generation of the electromechanical filter in detail. Section 6 simulates the paper. Finally,
    section 7 concludes the results.
    A simple circuit model of the UPQC is shown in Figure 2. Series active filter has been
    modeled as the voltage source and parallel active filter has been modeled as the current
    source.
                                    Electromechanical Active Filter as a Novel Custom Power Device (CP) 81
                                        Nfif        N f N si f
                    fif , f
                 Ff N                    
                                             R
                                               , f  Mi f
                                                               R
                                                                                                  (1)
As in [13] N f and N s are effective turns of the field windings and the stator windings,
respectively; Ff is the magnetomotive force; R is the reluctance of the flux line direction and
M is the mutual induction between rotor and stator windings. Speed of rotor is equal to the
synchronous speed ( ns  120 f ). Thus, the flux rotates with the angular speed of
                                p
82 An Update on Power Quality
           2 ns
    s        . So, stator windings passing flux has been changed as equation (2). It is
            60
    assumed that in t  0 , direct axis of field and stator first phase windings conform each
    other.
 s  i f M cos(t ) (2)
    Equation (3) shows the relation between magnetic flux and voltage behind synchronous
    reactance of the generator.
Based on equation (3), if the field current be a DC current, the stator induction voltage will
be a sinusoidal voltage by the amplitude of Mi f . But, if the field current be harmonized as
equation (4) then, the flux and internal induction voltage will be as equations (5) and (6),
respectively.
                                         I dc   I fn sin(nt   fn )
                                      if                                                               (4)
                                                   n
                                            1
                    eo 
                        [ MI dc sin(t )   MI f 2 cos(t   f 2 )] 
                                            2
                                                                                                        (6)
                         1                                     1
                     [ 2 MI f (n1)n cos(nt   f (n1) )  2 MI f (n1)n cos(nt   f (n1) )]
                    n 2
Equation (6) shows that each component of the generator output voltage has composed of
two components of the field current. This problem has been shown in Figure 6.
Figure 6. Relation of the field current components by the stator voltage components
It seems that a synchronous generator can be assumed as the Current Controlled System
(CCS). Thus it can be used for the current harmonic compensation of a nonlinear load ( I hn )
as parallel active filter.
    Where, n is the harmonic order; Zn R  jnX is the harmonic impedance of the synchronous
    generator and connector transformer which are known, VPCC is the point of common
    coupling voltage and I hn is the compensator current that has been extracted from the
    control circuit.
    If similar frequency components of voltage signal eo in equation (6) and eo in equation (7)
    set equal, the magnitude and phase angle of the related field current components will be
    extracted as:
For n=1:
                                           1
                         MI dc sin(t )  MI f 2 cos(t   
                                                               f 2 ) V1 sin(t  1 )        (8)
                                           2
                                     1                        1
                          [ MI dc  MI f 2 sin  f 2 ]2  [ MI f 2 cos  f 2 ]2 
                                                                                    V1 (9)
                                     2                        2
                                              1
                                                MI f 2 cos  f 2
                                     1
                                  tan [       2                      ]  1                 (10)
                                                   1
                                         MI dc  MI f 2 sin  f 2
                                                   2
                                                 1
                                        MI dc  MI f 2 sin  f 2
                                      X                                                    (11)
                                                 2
                                                1
                                           Y     MI f 2 cos  f 2                         (12)
                                                2
                                               X2  Y 2 
                                                        V12                                 (13)
                                                  X        1                              (14)
                                                      Y
    From the above equations, magnitude and phase of the second component of filed current
    can result in:
                                                          V1
                                             X                                             (15)
                                                    1  tan 2 1
                                                         X  MI dc
                                           tan  f 2                                       (16)
                                                          X tan 1
                                               Electromechanical Active Filter as a Novel Custom Power Device (CP) 85
                                                         2( X  MI dc )
                                                 If2                                                       (17)
                                                          M sin  f 2
For n≥2:
                             1                                 1
                        X     MI f ( n 1)n sin  f ( n 1)  MI f ( n 1)n sin  f ( n 1)              (18)
                             2                                 2
                             1                                 1
                        Y     MI f ( n 1)n cos  f ( n 1)  MI f ( n 1)n cos  f ( n 1)              (19)
                             2                                 2
                                                                Vn
                                                   X                                                       (20)
                                                           1  tan 2 n
Where, M and  are the mutual inductance and angular frequency, respectively.
Obviously for the extraction of required components of filed current from the above
equations, first suggestion for DC and first order component of the field current are need.
Resulted field current can be injected via a PWM and current inverter to the field windings
of the synchronous generator. Figure 7, shows the control circuit of the electromechanical
    active filter. I h and I f are desired compensator current and calculated field current signal.
    Detail of the proposed control circuit can be found in the equations (11) to (22). In the
    present research controlled voltage source of MATLAB has been used instead of required
    PWM and inverter. Constant and integrator coefficients in the PI controller have been
    chosen 1000 and 200, respectively. As mentioned earlier first order load active and reactive
    powers can be easily attended in the electromechanically compensated share of load current
    for decrease of SAF and PAF power range of UPQC. This problem can control power flow as
    well as power quality. In other word it can be possible to use a synchronous generator not
    only for first order voltage generation but, also for the harmonic compensation too.
    6. Results
    For the investigation of the validity of the mentioned control strategy for power quality
    compensation of a distribution system, simulation of the test circuit of Figure 8, has been
    done in MATLAB software. Source current and load voltage, have been measured and
    analyzed in the proposed control system for the determination of the compensator signals of
    SAF, PAF and filed current of the electromechanical active filter. Related equations of the
    controlled system and proposed model of the electromechanical active filter as a current
    controlled source have been compiled in MATLAB software via M-file. In mentioned control
    strategy, voltage harmonics have been compensated by SAF of the UPQC and current
    harmonics with higher order than 7, have been compensated by PAF of UPQC. But, the total
    of load reactive power, 25 percent of load active power and load current harmonics with lower
    order than 7 have been compensated by the proposed CCS. This power system consists of a
    harmonized and unbalanced three phase 380V (RMS, L-L), 50 Hz utility, a three phase
    balanced R-L load and a three phase rectifier as a nonlinear load. For the investigation of the
voltage harmonic condition, utility voltages have harmonic and negative sequence
components between 0.05 s and 0.2 s. Also, for the investigation of the proposed control
strategy in unbalance condition, magnitude of the first phase voltage is increased to the 1.25
pu between 0.05 s and 0.1 s and decreased to the 0.75 pu between 0.15 s to 0.2 s. Table 1, shows
the utility voltage harmonic and sequence parameters data and Table 2, shows the load power
and voltage parameters. A number of selected simulation results will be showed further.
Figure 9, shows the source side voltage of phase 1. Figure 10, shows the compensator
voltage of phase 1. Figure 11, shows load side voltage of phase 1. Figure 12, shows the load
side current of phase 1. Figure 13, shows the CCS current of phase 1 that has been supplied
by the proposed active filter. Figure 14, shows the PAF of UPQC current of phase 1. Figure
15, shows the source side current of phase 1. Figure 16, shows the field current of the
proposed harmonic filter. Figure 17 and 18 show source voltage and load voltage frequency
spectrum, respectively. Figure 19 and 20 show load current and source current frequency
spectrum, respectively. Figure 21 and 22 show CCS and PAF frequency spectrum,
respectively. Table 3 shows THDs of source and load voltages and currents. Load voltage
and source current harmonics have been compensated satisfactory.
                                  400
300
200
                                  100
                    Voltage (V)
-100
-200
-300
                                  -400
                                      0    0.02    0.04    0.06   0.08   0.1     0.12   0.14   0.16   0.18    0.2
                                                                     Time (Sec)
Figure 9. Source side voltage of phase 1 (swell has been occurred between 0.05 and 0.1 sec and sag has
been occurred between 0.15 and 0.2 sec. Also, harmonics of positive and negative sequences have been
concluded between 0.05 to 0.2 sec)
88 An Update on Power Quality
150
100
50
                         Voltage (V)
                                           0
-50
-100
                                       -150
                                           0     0.02   0.04   0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                         Time (Sec)
    Figure 10. Compensator voltage of phase 1 (compensator voltage has been determined for the sag,
    swell, negative sequence and harmonics improvement)
400
300
200
                                          100
                         Voltage (V)
-100
-200
-300
                                       -400
                                           0     0.02   0.04   0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                         Time (Sec)
    Figure 11. Load side voltage of phase 1 (sag, swell, harmonics, positive and negative sequences have
    been canceled)
40
30
20
                                           10
                            Current (A)
-10
-20
-30
                                          -40
                                             0   0.02   0.04   0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                         Time (Sec)
    Figure 12. Load side current of phase 1 (it is harmonized. It should be noticed that this current has been
    calculated after the voltage compensation and thus voltage unbalance has not been transmitted to the
    current)
                                                           Electromechanical Active Filter as a Novel Custom Power Device (CP) 89
20
15
10
Current (A) 0
-5
-10
-15
                                      -20
                                         0   0.02   0.04    0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                      Time (Sec)
Figure 13. Proposed CCS current of phase 1 (this current has been injected to the grid by the
electromechanical active filter. The solid line shows output current of filter and dotted line shows
desired current of filter)
40
30
                                      20
                     Current (A)
10
-10
-20
                                    -30
                                       0     0.02   0.04    0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                      Time (Sec)
Figure 14. PAF of UPQC current of phase 1 (this current has been injected to the grid by the parallel
active filter of UPQC)
                                       40
30
20
                                       10
                        Current (A)
-10
-20
-30
                                      -40
                                         0   0.02   0.04    0.06   0.08   0.1   0.12      0.14   0.16   0.18   0.2
                                                                      Time (Sec)
Figure 15. Source side current of phase 1 (harmonics and reactive components of load current have
been canceled)
90 An Update on Power Quality
1400
1200
                                      1000
                        Current (A)
800
600
400
                                           200
                                              0            0.02   0.04   0.06   0.08   0.1      0.12   0.14   0.16   0.18   0.2
                                                                                   Time (Sec)
    Figure 16. Field current of proposed harmonic filter (field current is controlled for the load active,
    reactive and harmonic current compensation)
350
300
                                                250
                                Amplitude (V)
200
150
100
50
                                                     0
                                                      0   100 200 300 400 500 600 700 800 900 1,0001,100 1,200 1,300 1,400
                                                                                 Frequency (Hz)
350
300
                                           250
                           Amplitude (V)
200
150
100
50
                                                 0
                                                  0       100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
                                                                                 Frequency (Hz)
45
40
35
Amplitude (A) 30
25
20
15
10
                                         0
                                          0       100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
                                                                      Frequency (Hz)
35
30
                                    25
                    Amplitude (A)
20
15
10
                                         0
                                          0       100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
                                                                      Frequency (Hz)
12
10
                                             8
                         Amplitude (A)
                                             0
                                              0   100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
                                                                       Frequency (Hz)
1.4
1.2
                                          1
                         Amplitude (A)
0.8
0.6
0.4
0.2
                                          0
                                           0   100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400
                                                                    Frequency (Hz)
    7. Conclusions
    It is known that use of small synchronous generators in distributed generated networks can
    reduce transmitted active and reactive powers from the main source and consequently line
    losses. In this research power quality compensation was done by composition of UPQC and
    synchronous generators as electromechanical active filter. In other word, by proper
    determination and control of synchronous generator field current it could be used as
    controlled current source for power quality compensation. This was for reduction of UPQC
    power rating in the distributed generated networks. Also, an algorithm was investigated for
    the determination of the reference field current. Proposed CCS modeling was implemented
    based on the mentioned related algorithm in MATLAB software. Control strategy had three
    instantaneously stages. Voltage harmonics were compensated by SAF of the UPQC. Current
    harmonics with higher order than 7 were compensated by PAF of the UPQC. Lower order
    current harmonics, load reactive power and a part of load active power were compensated
    by the proposed controlled current source. Total harmonic distortion of load voltage before
    compensation was 0.15 which was reduced to almost zero after compensation. Also, total
    harmonic distortion of the source current before compensation was 0.12 which was reduced
    to almost zero after compensation.
                                     Electromechanical Active Filter as a Novel Custom Power Device (CP) 93
Author details
Ahad Mokhtarpour, Heidarali Shayanfar and Mitra Sarhangzadeh
Department of Electrical Engineering, Tabriz Branch, Islamic Azad University, Tabriz,
Iran
8. References
[1] Fujita H., Akagi H. The Unified Power Quality Conditioner: The Integration of
     Series and Shunt Active Filters. IEEE Transaction on Power Electronics 1998; 13(2)
     315-322.
[2] Shayanfar H. A., Mokhtarpour A. Management, Control and Automation of Power
     Quality Improvement. In: Eberhard A. (ed.) Power Quality. Austria: InTech; 2010. p127-
     152.
[3] Hannan M. A., Mohamed A. PSCAD/EMTDC Simulation of Unified Series-Shunt
     Compensator for Power Quality Improvement. IEEE Transaction on Power Delivery
     2005; 20(2) 1650-1656.
[4] Han Y., Khan M.M., Yao G., Zhou L.D., Chen C. A novel harmonic-free power
     factor corrector based on T-type APF with adaptive linear neural network
     (ADALINE) control. Simulation Modeling Practice and Theory 2008; 16 (9) 1215–
     1238.
[5] Khadkikar V., Chandra A. A Novel Structure for Three Phase Four Wire Distribution
     System Utilizing Unified Power Quality Conditioner (UPQC). IEEE Transactions on
     Industry Applications 2009; 45(5) 1897-1902.
[6] Kwan K. H., Chu Y.C., So P.L. Model-Based H∞ Control of a Unied Power Quality
     Conditioner. IEEE Transactions on Industrial Electronics 2009; 56 (7) 2493-2504.
[7] Khadkikar V., Chandra A. A New Control Philosophy for a Unified Power Quality
     Conditioner (UPQC) to Coordinate Load-Reactive Power Demand between Shunt and
     Series Inverters. IEEE Transactions on Power Delivery 2008; 23 (4) 2522-2534.
[8] Lee W.C., Lee D.M., Lee T.K. New Control Scheme for a Unified Power Quality
     Compensator-Q with Minimum Active Power Injection. IEEE Transactions on Power
     Delivery 2010; 25(2) 1068-1076.
[9] Han B., Bae B., Kim H., Baek S. Combined Operation of Unified Power-Quality
     Conditioner with Distributed Generation. IEEE Transaction on Power Delivery 2006;
     21(1) 330-338.
[10] Mohammadi H.R., Varjani A.Y., Mokhtari H. Multiconverter Unified Power-Quality
     Conditioning System: MC-UPQC. IEEE Transactions on Power Delivery 2009; 24(3)
     1679-1686.
[11] Jindal A.K., Ghosh A., Joshi A. Interline Unified Power Quality Conditioner. IEEE
     Transactions on Power Delivery 2007; 22(1) 364-372.
94 An Update on Power Quality
    [12] Mokhtarpour A., Shayanfar H.A., Tabatabaei N.M. Power Quality Compensation in two
         Independent Distribution Feeders. International Journal for Knowledge, Science and
         Technology 2009; 1 (1) 98-105.
    [13] Machowski J., Bialek J., Bumby J.R. Power System Dynamics and Stability, United
         Kingdom: John Wiley and Sons; 1997.
                                                                                                                           Chapter 6
Reference Generation
of Custom Power Devices (CPs)
http://dx.doi.org/10.5772/54680
1. Introduction
One of the serious problems in electrical power systems is the increase of electronic devices
which are used by the industry. These devices, which need high-quality energy to work
properly, at the same time, are the most responsible ones for decreasing of power quality by
themselves.
Custom power devices (CP) used in distribution systems can control power quality. One of
the most efficient CPs is Unified Power Quality Conditioner (UPQC). It consists of a
Parallel-Active Filter (PAF) and a Series-Active Filter (SAF) together with a common dc link
[1-3]. This combination allows a simultaneous compensation for source side currents and
delivered voltage to the load. In this way, operation of the UPQC isolates the utility from
current quality problems of the load and at the same time isolates the load from the voltage
quality problems of utility.
Reference generation of UPQC is an important problem. One of the scopes of this research is
extending of Fourier transform for increasing of its responsibility speed twelve times as the
main control part of reference generation of the UPQC. Proposed approach named Very Fast
Fourier Transform (VFFT) can be used in balanced three phase systems for extraction of
reference voltage and current signals. Proposed approach has fast responsibility as well as
good steady state response. As it is known, Fourier transform response needs at least one
cycle data for the settling down which results in slow responsibility and week capability in
dynamic condition. In the proposed approach there are two different data window lengths.
In the sag or swell condition, control system switches to T/12 data window length but, in the
steady state condition it is switched to T/2 data window length. It causes fast responsibility
as well as good steady state response. This approach will be used for the UPQC control
circuit for extraction of the reference signals.
                           © 2013 The
                           ©            Author(s).
                                    Shayanfar       Licensee
                                               et al.,        InTech.
                                                       licensee       This
                                                                InTech.    chapter
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                                                                             is an open           under the
                                                                                          access chapter    terms of the
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                                                                                                                     under        Commons
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                           Attribution          Attribution License (http://creativecommons.org/licenses/by/3.0),
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                                                                                                  which permits unrestricted  use, distribution,
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96 An Update on Power Quality
    Second scope of this research is to use Multy Output ADAptive LINEar (MOADALINE)
    approach for the reference generation of UPQC. Simplicity and flexibility in extraction of
    different reference signals can be advantage of the proposed algorithm. Third scope of this
    research is reference generation of UPQC with the scope of power flow control as well as
    power quality compensation. In this stage, SAF is controlled by dqo approach for voltage
    sag, swell, unbalance, interruption, harmonic compensation and power flow control. Also,
    PAF is controlled by composition of dqo and Fourier theories for current harmonic and
    reactive power compensation.
    Also for the validity of the proposed approaches, power quality compensation has been
    done in a test circuit via simulation. Voltage sag, swell and harmonics will be compensated
    by SAF of UPQC. Also, current harmonics and reactive power will be compensated by PAF
    of UPQC. Section 2 generally introduces UPQC and its equivalent circuit. Section 3 explains
    the proposed VFFT and related equations. Section 4 introduces UPQC reference generation
    system based on the proposed VFFT approach. Section 5 explains proposed MOADALINE
    algorithm for reference generation. Section 6 explains reference generation based on power
    flow control. Section 7 simulates the research. Finally, section 8 concludes the results.
    A simple circuit model of the UPQC is shown in Figure 2. Series active filter has been
    modeled as the voltage source and parallel active filter has been modeled as the current
    source.
                                        2    2                           4        
                             a1 
                                       2   0    v(t )cos(t )dt 
                                                                         2       0 v(t )cos(t)dt            (1)
                                        2    2                           4        
                                b1 
                                       2   0    v(t )sin(t )dt 
                                                                         2       0 v(t )sin(t)dt            (2)
Based on equations (1) and (2) it is possible to reduce settling time of the Fourier transform
responsibility to T/2; where, T is the main period of the signal. In this condition the
responsibility speed will be increased twice but, it is not reasonable speed in dynamic
condition yet. Equation (5) can be resulted from equations (3) and (4), for a sinusoidal signal
with phase angle Φ. Equation (6) can be resulted similarly.
4 
                                             2    0 sin(t   )cos(t)dt 
                                                                             sin                                (3)
                                                                            3
                     8                                              8
                    2      0
                              6     sin(t   )cos(t )dt 
                                                                   2        6
                                                                             2
                                                                                  sin(t   )cos(t )dt 
                                                                              6
                                5
                                                                                                                 (4)
                     8
                    2          6
                                4
                                     sin(t   )cos(t )dt 
                                                             sin
                                 6
                                                                    
               4                                              8
              2    0 sin(t   )cos(t )dt  2 06 sin(t   )cos(t)dt 
                        3                                              5                                       (5)
               8                                        8
              2        6
                        2
                             sin(t   )cos(t )dt 
                                                       2               6
                                                                        4
                                                                             sin(t   )cos(t )dt 
                                                                                                     sin
                         6                                               6
                                                                    
                4                                             8
               2   0      sin(t   )sin(t )dt 
                                                              2   06 sin(t   )sin(t)dt 
                        3                                              5                                       (6)
                8                                               8
               2       6
                        2
                             sin(t   )sin(t )dt 
                                                               2       6
                                                                        4
                                                                             sin(t   )sin(t )dt 
                                                                                                     cos
                         6                                               6
Equations (7) and (8) can be rewritten from equations (5) and (6) respectively.
98 An Update on Power Quality
                                                               
                 8                                         8
         a1 
                2   
                     0
                      6       sin(t   )cos(t )dt 
                                                          2   06 (  sin(t    2 3 ))(  cos(t  2 3 ))dt 
                                                                         
          8                                  2 )dt 8 6 sin(t   )cos(t )dt 
         2     sin(t    2 3 )cos(t  
                0
                 6
                                               3       2 0
                                                                                                                       (7)
                                                           
          8      6 sin(t    2 )cos(t  2 )dt 
                                                        8 6
               0                                             sin(t    2 )cos(t  2 )dt
         2                       3            3       2 0                 3            3
                                                               
                 8                                         8
       b1
                2      0
                          6   sin(t   )sin(t )dt 
                                                          2   06 (  sin(t    2 3 ))( sin(t  2 3 ))dt 
                                                                         
           8                                   2 )dt 8 6 sin(t   )sin(t )dt 
                            2 )sin(t  
                                                           2 0
                 6 sin(t                                                                                              (8)
          2    0                  3              3
                                                               
           8                                                8
          2   06 sin(t    2 3 )sin(t  2 3 )dt  2 06 sin(t    2 3 )sin(t  2 3 )dt
    This solution has advantage of reducing the data window length to T/12. In this condition,
    settling time of the Fourier transform responsibility will be decreased to T/12. In other
    words, the responsibility speed will be increased twelve times. It should be noticed that
    this approach can be used only in balanced three phase systems. In this condition reach to
    the same accuracy in response is possible as compared to that of one cycle but very faster
    than one cycle. When data window length is chosen T sec, all of even components of
    distorted voltage and current in the related integral of Fourier transform can be filtered
    completely. But this is not possible in T/12 data window length condition. So, the problem
    of this approach is the unfiltered steady state oscillations in the response. This is because
    of small data window length. Thus, to complete the proposed approach for accessing the
    fast response, as well as good steady state response, proper composition of T/12 and T/2
    data window lengths have been used. Completed proposed approach uses T/12 data
    window length in signal magnitude change instances, for accessing the fast response, and
    T/2 data window length in other times, for accessing the good response without
    oscillation [10].
                                                                                  a1
                    v1 (t )                           a12 b12 sin(t  arctan
                            a1 cos(t )  b1 sin(t )                              )
                                                                                  b1
                                                                                                    (9)
                                                    a
                    vref (t )  vnom sin(t  arctan 1 )  vnom sin(t  vl1 )
                                                    b1
     Where, Il1 and Φil1 are the first order component magnitude and phase angle of the load
     current, respectively and Φvl1 is the first order component phase angle of the load voltage.
     Figure 6, shows the block diagram of the PAF control circuit.
                                   y  SW
                                                                                              (11)
                                   W (t  dt ) W (t )  kST (t )[S(t )ST (t )]1 e(t )
     Where, e(t) is the error between desired and actual signal of y, and K is the convergence
     factor. It is possible to extract the reference voltage and current from uncompensated source
     voltage and load current. Fourier coefficients can be determined as vector of y. Reference
     signal can be determined as W. Matrix of S is constant. After determination of
     uncompensated signal Fourier coefficients, they can be compared with the desired values.
     Error signal can be used in adaptation rule for updating the vector of W. Therefore reference
     voltage and current can be determined. Figure 7, shows block diagram of the proposed
     MOADALINE approach [11].
                                                             an 
                                                             
                                                        y  b n                             (12)
                                                             a0 
                                                             
                                                     Reference Generation of Custom Power Devices (CPs) 101
                                                                          
                                cos(nt0 ) cos(nt1 ) ... cos(ntm 1 )
                              2                                           
                                                                                                 (13)
                     S(t )      sin( nt0 ) sin(nt1 ) ... sin(ntm 1 ) 
                             m1                                          
                                       1          1      ...      1
                                                                          
                                      2          2               2        
                                              w(t0 ) 
                                                         
                                                w(t1 ) 
                                          W                                                     (14)
                                              ... 
                                                         
                                              w(tm 1 )
                                                                       w(t ) 
                                  cos(nt0 )                                  0
                    an                            ... cos(ntm 1 )              
                           2                                         w(t1 ) 
                                                                                                 (15)
                    bn   m  1  sin(nt0 )      ... sin(ntm 1 ) 
                                                                                    
                   a                 1           ...      1          ... 
                    0                                                w(tm 1 )
                                       2                    2        
                    cos(wt0)
                                  W0
                                                                              a1
                    sin(wt0)
                                  W0
                    cos(wt1)                                    +   2/(m-1)   -
                                  W1
                    sin(wt1)
                                  W1
                                                                +   2/(m-1)   -
coswt(m-1) b1
                                W(m-1)
                   sinwt(m-1)
                                W(m-1)
                                                   Weighted
                                                   Factors
                                                  Calculation
                                                  2              2 
                           2sin(t ) 2sin(t  3 ) 2 sin(t  3 ) 
              v                                                        va     va 
               d 1                              2              2            
                v                 t          t              t             v   T               (16)
               q   
                       3   2cos(    ) 2 cos(    
                                                    3
                                                      ) 2cos(    
                                                                    3
                                                                      )  b      vb 
                                                                           
                                                                          vc     vc 
               vo           1              1               1         
                                                                                    
                                                                      
102 An Update on Power Quality
                                                   va           v 
                                                           1    d
                                                   vb   T       vq                       (17)
                                                   vc            
                                                                 vo 
     Instantaneous active and reactive powers in dqo axis can be written as Equations (18) and
     (19).
                                                  3
                                            P      ( v i  vq iq  2 v0i0 )                  (18)
                                                  2 dd
                                                       3
                                           Q            ( v i  vd iq )                      (19)
                                                       2 qd
     Equations (20) and (21) show direct and quadratic axis voltages based on P and Q that have
     been determined from equations (18) and (19). It should be noticed that the active and
     reactive powers in equations (20) and (21) are transmitted powers after series active filter
     toward the load. These equations show that in constant impedance loads there is a relation
     between voltage and transmitted power. In other words, a particular load voltage is needed
     for a particular load power and vice versa. In equations (20) and (21) it have been assumed
     that the voltages are balanced and v0  0 .
                                                     2 Pid  Qiq
                                                 vd  ( 2 2 )                                 (20)
                                                     3 id  iq
                                                     2 Piq  Qid
                                                 vq  ( 2 2 )                                 (21)
                                                     3 id  iq
     Therefore, setup transmission active and reactive powers in equations (20) and (21) in
     considered amounts will result the related load voltage magnitude and phase angle. In
     reactive power compensated condition, Q=0 and the amount of active power will be
     extracted from the above equations as equation (22).
                                                 3
                                           P      ( vd 2  vq 2 )(id 2  iq2 )               (22)
                                                 2
     Generally, in this approach nominal active and reactive powers of load will be substituted in
     equation (20) and (21) for reference voltage extraction. But, there is a problem. If we don’t
     have load nominal power data, extracted reference voltage will not have nominal
     magnitude. For correct arrangement of the voltage magnitude, a PI controller is used for
     minimum error between magnitudes of extracted reference voltage and the nominal
     voltage.
Where, Vref     and Vsetup are the nominal voltage magnitude and extracted voltage
magnitude, respectively.
7. Results
7.1. Results of VFFT approach
For the investigation of the validity of the proposed VFFT reference generation strategy in
power quality compensation of a distribution system, simulation of the test circuit of Figure
9, has been done in MATLAB/SIMULINK software. Source voltage and load current, have
been measured and analyzed in the proposed control system for the determination of the
compensator signals of SAF and PAF.
 This power system consists of a three phase 380V (RMS, L-L), 50 Hz utility, two three phase
linear R-L load and a three phase rectifier as a nonlinear load which can be connected to the
circuit at different times. This is for the investigation of the proposed control system
capability in dynamic conditions. For the investigation of the voltage sag and swell
conditions, utility voltages have 0.25 percent sag between 0.04 sec and 0.08 sec and 0.25
percent swell between 0.08 sec and 0.12 sec. Also, for the investigation of the proposed
control strategy in the harmonic conditions, source voltage has been harmonized between
104 An Update on Power Quality
     0.17 sec and 0.4 sec. Table 1, shows the utility voltage data and Table 2, shows the load
     powers and related switching times. In this study series active filter has been connected to
     the circuit at time zero. But parallel active filter has been connected to the circuit at time 0.25
     sec. A number of selected simulation results will be shown later.
     Figure 10, shows the source side voltage of phase 1. Figure 11 shows the compensated load
     side voltage of phase 1. Figure 12 shows SAF voltage of phase 1. Figure 13 and 14 shows
     first order component magnitude of the source voltage extracted by T and T/2 data windows
     respectively. Figure 15 shows first order component magnitude of the source voltage
     extracted by T/12 data window. Figure 16 shows the first order component magnitude of the
     source voltage extracted by the proposed composition of T/2 and T/12 data windows. Figure
     17 shows the load side current of phase 1. Figure 18 shows the source side current of phase
                                                           400
300
200
                                                           100
                                             Voltage (V)
-100
-200
-300
                                                           -400
                                                                  0   0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                           Time (Sec)
     Figure 10. Source side voltage of phase 1 (sag has been occurred between 0.04 sec and 0.08 sec and
     swell has been occurred between 0.08 sec and 0.12 sec. Also, harmonics have been concluded between
     0.17 sec to 0.4 sec)
     1. Figure 19 shows the PAF current of phase 1. Figure 20 and 21 show first order component
     magnitude of the load current extracted by T and T/2 data windows respectively. Figure 22
     shows the first order component magnitude of the load current extracted by T/12 data
     window. Figure 23 shows the first order component magnitude of the load current extracted
                                                                                                                                              Reference Generation of Custom Power Devices (CPs) 105
by the proposed composition of T/2 and T/12 data windows. Figure 24 and 25 show the
source side and load side voltages frequency spectrum, respectively. Finally Figures 26 and
27 show the load side and source side currents frequency spectrum, respectively. Table 3
shows THDs of the source and load voltages and currents. Load voltage and source current
harmonics have been compensated satisfactory.
                                                         400
300
200
100
                                      Voltage (V)
                                                               0
-100
-200
-300
                                                        -400
                                                                    0       0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                 Time (Sec)
Figure 11. Load side voltage (sag and swell as well as harmonics have been compensated)
                                                         150
100
                                                               50
                                      Voltage (V)
-50
-100
                                                        -150
                                                                    0       0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                 Time (Sec)
Figure 12. Compensator voltage (this is only between sag, swell, and harmonic times)
                                                         400
350
300
                                                         250
                                        Amplitude (V)
200
150
100
50
                                                               0
                                                                    0       0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                 Time (Sec)
Figure 13. Extracted source side voltage magnitude (in this state data window length is T and settling
time is 0.02 sec)
                                                         400
350
300
                                                         250
                                        Amplitude (A)
200
150
100
50
                                                               0
                                                                    0       0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                 Time (Sec)
Figure 14. Extracted source side voltage magnitude (in this state data window length is T/2 and settling
time is 0.01 sec)
                                                               400
350
300
                                                               250
                                               Amplitude (A)
200
150
100
50
                                                                    0
                                                                        0    0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                  Time (Sec)
Figure 15. Extracted source side voltage magnitude by T/12 data window (in this state settling time is
0.00166 sec but, there are unfiltered oscillations in the response)
106 An Update on Power Quality
400
350
300
250
                                              Amplitude (V)
                                                                200
150
100
50
                                                                          0
                                                                                  0     0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0.11 0.12 0.13 0.14 0.15 0.16 0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25
                                                                                                                                             Time (Sec)
     Figure 16. Extracted source side voltage magnitude by the proposed approach (in this state
     composition of T/2 and T/12 data windows have been used, settling time is 0.00166 sec and there is no
     oscillation in the response)
                                                               80
60
40
                                                               20
                                           Current (A)
-20
-40
-60
                                                              -80
                                                                0.25                         0.26      0.27      0.28     0.29    0.3    0.31   0.32    0.33   0.34    0.35     0.36     0.37      0.38          0.39          0.4
                                                                                                                                                 Time (Sec)
     Figure 17. Load side current (there is a linear three phase load until 0.29 sec, another linear three phase
     load has been connected to the circuit at time 0.29 sec and finally a nonlinear rectifier load has been
     connected to the circuit at time 0.33 sec)
                                                                            80
60
40
                                                                            20
                                                         Current (A)
-20
-40
-60
                                                                         -80
                                                                           0.25                0.26      0.27     0.28     0.29   0.3    0.31   0.32    0.33   0.34   0.35    0.36     0.37      0.38      0.39          0.4
                                                                                                                                                 Time (Sec)
     Figure 18. Source side current (load current harmonics as well as reactive power have been
     compensated)
                                                               15
10
                                                                    0
                                           Current (A)
-5
-10
-15
                                                              -20
                                                                0.25                         0.26      0.27      0.28     0.29    0.3    0.31   0.32    0.33   0.34    0.35     0.36     0.37      0.38          0.39          0.4
                                                                                                                                                 Time (Sec)
     Figure 19. Compensator current (it is for reactive power compensation as well as current harmonics)
                                                                                  70
60
50
                                                                                  40
                                                                  Amplitude (A)
30
20
10
                                                                                      0
                                                                                      0.25      0.26      0.27     0.28    0.29    0.3   0.31   0.32    0.33   0.34   0.35    0.36     0.37     0.38      0.39          0.4
                                                                                                                                                 Time (Sec)
     Figure 20. Extracted load side current magnitude (in this state data window length is T and settling
     time is 0.02 sec)
                                                                                                                                                  Reference Generation of Custom Power Devices (CPs) 107
70
60
50
40
                                                     Amplitude (A)
                                                                     30
20
10
                                                                       0
                                                                       0.25        0.26        0.27    0.28    0.29   0.3    0.31      0.32    0.33      0.34   0.35    0.36    0.37    0.38         0.39     0.4
                                                                                                                                        Time (Sec)
Figure 21. Extracted load side current magnitude (in this state data window length is T/2 and settling
time is 0.01 sec)
                                                                     90
80
70
60
                                                                     50
                                                     Amplitude (A)
40
30
20
10
                                                                       0
                                                                       0.25        0.26        0.27    0.28    0.29   0.3    0.31      0.32    0.33      0.34   0.35    0.36    0.37    0.38         0.39     0.4
                                                                                                                                        Time (Sec)
Figure 22. Extracted load side current magnitude by T/12 data window (in this state settling time is
0.00166 sec but there are unfiltered oscillations in the response)
                                                         90
80
70
                                                         60
                                     Amplitude (A)
50
40
30
20
10
                                                              0
                                                              0.25               0.26      0.27       0.28    0.29    0.3    0.31      0.32    0.33      0.34    0.35    0.36    0.37    0.38          0.39     0.4
                                                                                                                                        Time (Sec)
Figure 23. Extracted load side current magnitude by the proposed approach (in this state composition
of T/2 and T/12 data windows have been used, settling time is 0.00166 sec and there is no oscillation in
the response)
350
300
                                                                           250
                                                           Amplitude (V)
200
150
100
50
                                                                            0
                                                                                          50          100     150      200      250        300         350      400     450       500          550
                                                                                                                                      Frequency (Hz)
Figure 24. Source voltage harmonic spectrum (it has third and fifth harmonics)
350
300
                                                                           250
                                                           Amplitude (V)
200
150
100
50
                                                                            0
                                                                                          50          100     150      200      250        300         350      400     450       500          550
                                                                                                                                      Frequency (Hz)
Figure 25. Load voltage harmonic spectrum (harmonics have been compensated)
108 An Update on Power Quality
70
60
50
40
                                              Amplitude (A)
                                                              30
20
10
                                                               0
                                                                   0   100   200   300   400        500         600   700   800   900   1000
                                                                                               Frequency (Hz)
70
60
50
                                                              40
                                          Amplitude (A)
30
20
10
                                                              0
                                                                   0   100   200   300   400        500         600   700   800   900   1000
                                                                                               Frequency (Hz)
     The power system consists of a harmonized and unbalanced three phase 380V (RMS, L-L),
     50 Hz utility, a three phase rectifier as a nonlinear load, a three phase balanced R-L load
     which is connected to the circuit at 0.04 sec and a one phase load which is connected to the
     circuit at 0.07 sec.
     For the investigation of the voltage harmonic condition, utility voltages have harmonic and
     negative sequence components between 0.03 sec and 0.1 sec. Also, for the investigation of
     the proposed control strategy in unbalance condition, magnitude of the first phase voltage is
     increased to the 1.25 pu between 0.02 sec and 0.04 sec and decreased to the 0.75 pu between
     0.06 sec to 0.08 sec. Figure 28 shows the source side voltage of phase 1. Figure 29, shows the
     compensator voltage of phase 1. Figure 30, shows load side voltage of phase 1. Figure 31,
     shows the load side current of phase 1. Figure 32, shows the reactive current of phase 1.
     Figure 33, shows the harmonic current of phase 1. Finally Figure 34, shows the source side
                                            Reference Generation of Custom Power Devices (CPs) 109
current of phase 1. Load voltage and source current harmonics have been compensated
satisfactory.
This power system consists of a harmonized and unbalanced three phase 20 kV (RMS, L-L),
50 Hz utility, a three phase balanced R-L load and a nonlinear three phase load. For the
investigation of the voltage harmonic condition, utility voltages have harmonic and negative
sequence components between 0.15 s and 0.35 s. Also, for the investigation of the proposed
control strategy in unbalance condition, magnitude of the first phase voltage is increased to
the 1.25 pu between 0.10 s and 0.20 s and decreased to the 0.75 pu between 0.3 s to 0.4 s.
Investigation of the control circuit performance in fault condition is done by a three phase
fault in output terminal of the main source between 0.4 s to 0.5 s. Table 4 shows the utility
voltage harmonic and sequence parameters data and Table 5 shows the load power and
voltage parameters. Table 6 show states of switches of s1 and s2 . A number of selected
simulation results have been shown next.
     Figure 36, shows the source side voltage of phase 1. Figure 37, shows the compensator
     voltage of phase 1. Figure 38, shows the load side voltage of phase 1. Figure 39, shows the
     load side current of phase 1. Figure 40, shows the compensator current of phase 1. Figure
     41, shows the source side current of phase 1. Figure 42, shows the load active and reactive
     powers. Figure 43, shows generation PAF active and reactive powers. Figure 44, shows the
     consumption active and reactive powers of the series active filter. Figure 45, shows
     generation active and reactive powers of the source. Figure 46, shows the difference between
     load voltage magnitude and nominal value and finally Figure 47, shows the difference
     between load voltage and source voltage phases.
     Figure 36. Source side voltage of phase 1 (a swell has been occurred between 0.1 and 0.2 sec and a sag
     has been occurred between 0.3 and 0.4 sec. Also positive and negative harmonic sequences have been
     concluded between 0.15 and 0.35 sec. It has been tripped between 0.4 and 0.5 sec)
                                                      Reference Generation of Custom Power Devices (CPs) 113
Figure 37. Compensator voltage of phase 1 (compensator voltage has been determined for the sag,
swell, interruption, negative sequence and harmonics improvement)
Figure 38. Load side voltage of phase 1 (swell, sag, positive and negative harmonic sequences have
been improved. Load voltage has been compensated in the fault condition)
Figure 39. Load side current of phase 1 (it has different order harmonics. It should be considered that
this current has been calculated after the voltage compensation, so the voltage unbalance has not been
concluded in the current)
114 An Update on Power Quality
     Figure 40. Compensator current of phase 1 (compensator current has been determined for the load
     current harmonics improvement as well as the reactive power)
     Figure 41. Source side current of phase 1 (harmonics and reactive power components of the load
     current have been canceled)
     Figure 42. Load active and reactive power (load is nonlinear resistive-inductive)
                                                     Reference Generation of Custom Power Devices (CPs) 115
Figure 43. Generation PAF active and reactive powers (reactive power and harmonics of load current
have been supplied by the parallel active filter)
Figure 44. Consumption active and reactive power of series active filter (it is considered that the
consumption power has been increased between sag times and decreased between swell times. Cause of
power oscillation has been investigated in the text. Active power has been increased in fault condition
for prevention of load interruption)
Figure 45. Generation active and reactive power of source (it is considered that the generation active
power has been increased between sag times and decreased between swell times. Reactive power has
been compensated. Cause of power oscillation has been investigated in the text. These powers are equal
to zero in fault condition)
116 An Update on Power Quality
     Figure 46. Difference between load voltage magnitude and nominal value (this amount is decreased by
     use of the PI controller to zero)
     Figure 47. Difference between load voltage and source voltage phases (this amount decreased by use of
     PI controller to zero)
     8. Conclusions
     In this research different approaches for reference generation of UPQC have been proposed.
     Based on the general equations of Fourier transform, its response settling time is one cycle.
     In this research for increasing the response speed and improving the control system
     capabilities in dynamic conditions, very fast Fourier transform approach has been proposed
     for balanced three phase systems. In the proposed approach, settling time of the response
     could be reduced to one twelfth of a cycle. In the proposed approach, there were two data
     window lengths, T/12 and T/2. In the sag, swell, and load change conditions, control system
     was switched to T/12 for obtaining fast response. Then for improving the proposed
     approach responsibility in filtering of unwanted steady state oscillation, control system was
     switched to T/2 for obtaining no oscillated response. In these states, fast response in
     dynamic conditions as well as good response in the steady state conditions would be
     possible. In this research for the detection of the source voltage sag, swell, and load change
     conditions, derivative of the first order magnitude of the voltage and current signal, were
     compared to a constant value. This was based on the fact that in these conditions voltage or
     current magnitude generally changes rapidly. Proposed control approach was simulated in
     MATLAB/SIMULINK software. Voltage sag, swell, and harmonics were compensated by
                                                   Reference Generation of Custom Power Devices (CPs) 117
SAF. But, reactive power and current harmonics were compensated by PAF. THD of load
voltage before compensation was 14.14 percent which was reduced to almost zero after the
compensation. But, THD of the source current before compensation was 9 percent which
was reduced to almost zero after the compensation.
Also the proposed reference generation algorithm based on MOADALINE has been
compiled in MATLAB software via M-File. Voltage harmonics have been compensated by
SAF of the UPQC and current harmonics have been compensated by PAF of the UPQC.
Based on the results proposed strategy not only could generate pure sinusoidal source
current and load voltage but also could compensate source reactive power satisfactory. Total
harmonic distortion of load voltage and current before compensation was 0.17 and 0.12
respectively which was reduced to almost zero after the compensation.
Another scope of this research was reference generation based on power flow control. This
approach was based on relation between active and reactive powers and load voltage. In
this approach amount of reactive power arranged to zero but amount of active power
arranged to load nominal power. Also a PI controller used for arranging the load voltage
magnitude to the nominal amount.
Author details
Ahad Mokhtarpour
Department of Electrical Engineering, Tabriz Branch, Islamic Azad University, Tabriz, Iran
Heidarali Shayanfar
Department of Electrical Engineering, South Tehran Branch, Islamic Azad University, Tehran, Iran
9. References
[1] Fujita H., Akagi H. The Unified Power Quality Conditioner: The Integration of Series
    and Shunt Active Filters. IEEE Transaction on Power Electronics 1998; 13(2) 315-322.
[2] Hannan M. A., Mohamed A. PSCAD/EMTDC Simulation of Unified Series-Shunt
    Compensator for Power Quality Improvement. IEEE Transaction on Power Delivery
    2005; 20(2) 1650-1656.
[3] Shayanfar H. A., Mokhtarpour A. Management, Control and Automation of Power
    Quality Improvement. In: Eberhard A. (ed.) Power Quality. Austria: InTech; 2010.
    p127-152.
[4] Khadkikar V., Chandra A. A Novel Structure for Three Phase Four Wire Distribution
    System Utilizing Unified Power Quality Conditioner (UPQC). IEEE Transactions on
    Industry Applications 2009; 45(5) 1897-1902.
[5] Kwan K.H., Chu Y.C., So P.L. Model-Based H∞ Control of a Unied Power Quality
    Conditioner. IEEE Transactions on Industrial Electronics 2009; 56 (7) 2493-2504.
118 An Update on Power Quality
     [6] Khadkikar V., Chandra A. A New Control Philosophy for a Unified Power Quality
          Conditioner (UPQC) to Coordinate Load-Reactive Power Demand Between Shunt and
          Series Inverters. IEEE Transactions on Power Delivery 2008; 23 (4) 2522-2534.
     [7] Lee W.C., Lee D.M., Lee T.K. New Control Scheme for a Unified Power Quality
          Compensator-Q with Minimum Active Power Injection. IEEE Transactions on Power
          Delivery 2010; 25(2) 1068-1076.
     [8] Han B., Bae B., Kim H., Baek S. Combined Operation of Unified Power-Quality
          Conditioner with Distributed Generation. IEEE Transaction on Power Delivery 2006;
          21(1) 330-338.
     [9] Mohammadi H.R., Varjani A.Y., Mokhtari H. Multiconverter Unified Power-Quality
          Conditioning System: MC-UPQC. IEEE Transactions on Power Delivery 2009; 24(3)
          1679-1686.
     [10] Mokhtarpour A., Shayanfar H.A., Bathaee. S.M.T Extension of Fourier Transform for
          Very Fast Reference Generation of UPQC. International Journal on Technical and
          Physical Problems of Engineering 2011; 3(4) 120-126.
     [11] Mokhtarpour A., Shayanfar H.A., Bathaee. S.M.T UPQC Control Based on MO-
          ADALINE Approach. International Journal on Technical and Physical Problems of
          Engineering 2011; 3(4) 115-119.
                                       Section 3
http://dx.doi.org/10.5772/53234
1. Introduction
Power quality describes the quality of voltage and current. It is an important consideration
in industries and commercial applications. Power quality problems commonly faced are
transients, sags, swells, surges, outages, harmonics and impulses [1]. Among these voltage
sags and extended under voltages have large negative impact on industrial productivity,
and could be the most important type of power quality variation for many industrial and
commercial customers [1-5].
Voltage sags is mainly due to the fault occurring in the transmission and distribution
system, loads like welding and operation of building construction equipment, switching of
the loaded feeders or equipments. Both momentary and continuous voltage sags are
undesirable in complex process controls and household appliances as they use precision
electronic and computerized control.
Major problems associated with the unregulated long term voltage sags include equipment
failure, overheating and complete shutdown. Tap changing transformers with silicon-
controlled rectifiers (SCR) are usually used as a solution of continuous voltage sags [6]. They
require large transformer with many SCRs to control the voltage at the load which lacks the
facility of adjusting to momentary changes. Some solutions have been suggested in the past
to encounter the problems of voltage sag [7-11]. But these proposals have not been realized
practically to replace conventional tap changing transformers.
Now a day’s various power semiconductor devices are used to raise power quality levels to
meet the requirements [12]. Several AC voltage regulators have been studied as a solution of
voltage sags [13-18]. In [13] the input current was not sinusoidal, in [14-16] the efficiency of
the regulator was not analyzed and in [17-18] the input power factor was very low and the
efficiency is also found poor. Compact and fully electronic voltage regulators are still
unavailable practically.
                           © 2013 The
                           ©            Author(s).
                                    Ahmed           Licensee
                                            and Alam,         InTech.
                                                         licensee     This chapter
                                                                  InTech.           is distributed
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122 An Update on Power Quality
     Dynamic Voltage Restorer (DVR) is sometimes used to regulate the load side voltage [19-
     21]. The DVR requires energy storage device to compensate the voltage sags. Flywheels,
     batteries, superconducting magnetic energy storage (SMES) and super capacitors are
     generally used as energy storage devices. The rated power operation of DVR depends on the
     size and capacity of energy storage device which limits its use in high power applications.
     Whereas, switching regulator needs no energy storage devices, therefore, can be used both
     in low power and high power applications.
     The objective of this chapter is to describe the operation and design procedure of a switch
     mode AC voltage regulator. Firstly, some reviews of the regulators are presented then the
     procedure of design and analysis of a switch mode regulator is described step by step.
     Simulation software OrCAD version 9.1 [22] is used to analyze the regulator. The proposed
     regulator consists mainly two parts, power circuit and control circuit. The power circuit
     consist two bi-directional switches which serve as the freewheeling path for each other. A
     signal generating control circuit is to be associated with the power circuit for getting pulses
     of the switches. In the control circuit, a commercially available pulse width modulator IC
     chip SG1524B is used, thus circuit is compact and more viable.
     Figure 1 shows the block diagram of a SMPS. The power circuit is mainly the input, output
     side with the switching device. The switching device is continuously switched at high
     frequency by the gate signal from the control circuit to transfer power from input to the
     output. The control circuit of a SMPS basically generates high frequency gating pulses for
     the switching devices to control the output voltage. Switching is performed in multiple
     pulse width modulation (PWM) fashion according to feedback error signal from the load.
     High frequency switching reduces filter requirements at the input and output sides of the
     converter. Simplest PWM control uses multiple pulse modulations generated by comparing
     a DC with a high frequency carrier triangular wave.
     The PWM control circuit is commonly available as integrated form. The designer can select
     the switching frequency by choosing the value of RC to set oscillator frequency. As a rule of
     thumb to maximize the efficiency, the oscillation period should be about 100 times longer
     than the switching time of the switching device such as Transistor, Metal oxide
     semiconductor field-effect transistor (MOSFET), Insulated gate bipolar transistor (IGBT). For
                                              Power Quality Improvement Using Switch Mode Regulator 123
example, if a switch has a switching time of 0.5 us, the oscillator period would be 50 us,
which gives the maximum oscillation frequency of 20 KHz. This limitation is due to the
switching loss in the switching devices. The switching loss of switching devices increases
with the switching frequency. In addition, the core loss of inductor limits the high frequency
operation.
Power circuit
                                                                          Control circuit
Figure 1. Block diagram of Switching-mode power supply (SMPS).
The circuit of Fig. 3 illustrates basic principle of a DC-DC switching-mode power converter.
The controlling device is a switch. By controlling the duty cycle, (the ratio of the time in on
positions to the total time of on and off position of a switch) the power flow to the load can
be controlled in a very efficient way. Ideally this method is 100% efficient. In practice, the
efficiency is reduced as the switch is non-ideal and losses occur in power circuits. Hence,
one of the prime objectives in switch mode power conversion is to realize conversion with
the least number of components having better efficiency and reliability. The DC output
voltage to the load can be controlled by controlling the duty cycle of the rectangular wave
supplied to the base or gate of the switching device. When the switch is on, it has only a
small saturation voltage drop across it. In the off condition the current through the switch
is zero.
The output of the switch mode power conversion circuit (Fig. 3) is not pure DC. This type
of output is applicable in some cases such as oven heating without proper filtration. If
constant DC is required, then output of converter has to be smoothed out by the addition
of low-pass filter.
124 An Update on Power Quality
                              R1
                                                          V
                                                         Vin
                +
                      Vin              Vout    R2
                _
                                                         Vout
                                                                                          t
     Figure 2. Linear (dissipative) DC-DC power conversion circuit.
V Vout
                                                        Vin
                      BJT
                +
                      Vin              Vout    R
                _
                                                                                      t
     Figure 3. Switching-mode (non dissipative) DC-DC power conversion circuit.
     a.   Buck regulator
     b.   Boost regulator
     c.   Buck-Boost regulator and
     d.   Cûk regulator.
     The Circuit diagram of four basic DC-DC switching regulators is shown in Fig. 4. The
     expression of output voltage for the four types of DC-DC regulators are as follows:
                                                                         Vin
     For Buck regulator, Vout  kVin , For Boost regulator, Vout 
                                                                        1 k
                                                                -kVin
     For Buck- Boost regulator and Cûk regulator, Vout 
                                                                1 k
     Where k is the duty cycle, the value of k is less than 1. For Buck regulator output voltage is
     always lower than input voltage, for Boost regulator output voltage is always higher than
     input voltage. For Buck-Boost regulator and Cûk regulator output voltage is higher than
     input voltage when the value of k is higher than 0.5, and output voltage is lower than input
     voltage when the value of k is lower than 0.5. When k is equal to 0.5 output voltage is same
                                                    Power Quality Improvement Using Switch Mode Regulator 125
as input voltage. In Buck-Boost and Cûk regulator, the polarity of output voltage is opposite
to that of the input voltage, therefore theses regulators are also called inverting regulators.
                             L                                        L                    D
        BJT
 +
               Vg                                          +                                   C
                                 C    Vout      R                                    BJT             Vout   R
  _     Vin              D                                 _    Vin       Vg
                                                                  L1            C1         L2
         BJT                 D
 +             Vg                                          +
                                 C                              Vg             BJT              C2          R
        Vin              L               Vout   R              Vin                     D             Vout
  _                                                        _
Figure 4. Circuit diagram of DC-DC regulator, (a) Buck regulator, (b) Boost regulator, (c) Buck-Boost
regulator, (d) Cûk regulator.
     changing switches are used and for large installation on-load tap changing switches are
     used. The switches are generally incorporated at the secondary of the transformer. For a low
     voltage high current load, the switches are provided on the primary side of the transformer
     due to economical reason. For line voltage correction, taps are provided on the primary of
     the transformer. For three-phase transformers three pole tap changing switches are used.
     In off-load tap changer, the output is momentarily cut-off from the supply. It is therefore
     used for low capacity equipment and where the momentary cut-off of the supply is not
     objectionable for the load. The major limitation of the off-load tap changing switches is the
     occurrences of arcs at the contact points during the change-over operation. This shortens the
     life of off-load rotary switches, particularly of high current ratings. In Fig. 5 (a), three four-
     position switches of an off load tap changer are shown, such that the minimum of X volts
     per step are available at the output.
     The voltage is corrected by tap-charging switches in steps. Where stepless control is required,
     variable autotransformers or variacs are used. The normal variac consists of a toroidal coil
     wound on a laminated iron ring. The insulation of the wire is removed from one of the end
     faces and the wire is grounded to ensure a smooth path for the carbon brush. Carbon brush is
     used to limit the circulating current, which flows between the short-circuited turns.
     A Buck-Boost transformer is sometimes used for AC voltage regulation when the output
     voltage is approximately the same as the mean input voltage as shown in Fig. 5(b). In this
     case if the output voltage is less than or greater than the desired value, it can be increased or
     decreased to the desired value by adding a suitable forward or reverse voltage with the
     input through the Buck-Boost transformer.
                                                                                     Ns
                            16X
                            16X        Coarse
                            16X                                                      Np
                                       Medium                                   Buck – Boost
                            4X                                                  Transformer     Output
        Input                                                Input                             = Ei  Ei/2
                            4X                    Output
                                                             = Ei                              (Ns/Np)
                            4X
                                                                         Ei/2
                            X            Fine
                            X
                            X
            (a) Off load tap changing switch                  (b) Voltage control by combination of a
                      arrangement.                             Buck–Boost transformer and a variac.
     Figure 5. Circuit diagram of AC voltage controller using (a) Off load tap changer and (b) Buck-Boost
     transformer and variac.
through three anti-parallel switches. When the SCR1-SCR2 switch is fired, tap 1 is connected
to the load. Similarly taps 2 and 3 can be connected to the load through the SCR3-SCR4 and
CSR5-SCR6 switches respectively. Thus, any number of taps can be connected to the load
with similar SCR switches. When one group of SCRs operates for the whole cycle and other
groups are off, the voltage corresponding to the tap of that group appears at the load.
Changeover from one loop to the other is done simply by shifting the firing pulses from one
group of SCRs to the other.
With resistive load, the load current becomes zero and the SCRs stop conduction as soon as
the voltage reverses its polarity. Therefore, when one group is fired, the other groups are
commutated automatically. With reactive loads, the situation is complicated by the fact that
the zero current angle depends on the load power factor. This means that the SCR conducts
a finite value of current at the time of reversal of line voltage. This results in either
preventing a tap change due to reverse bias on the SCR to be triggered or causing a short
circuit between the taps through two SCRs.
                                                       SCR 1                   GR 1
                                                               SCR 2
                                                V1
                                                       SCR 3
                                                                SCR 4          GR 2
                        Input
                                                V2                                                   Lo
                                                                                              Output ad
                                                       SCR 5
                                                                SCR 6          GR 3
                                                V3
                                SCR2                                 SCR1
                 SCR1
                                                                SCR2
SCR1
                                                     Input            Output
         Input                         Output                                         Input                   Output
                                       T1                                             ET1(P)              ET1(S)
                        ET
                        ET                                                       C     ET2
                                       T2
                                (a)                                                           (b)
     Figure 8. Fero-resonant AC voltage regulator.
     The value of the capacitor is such that it resonant with the saturated inductance of T2 at
     some point. The characteristics of the circuit is such that a small change in voltage across T2
                                            Power Quality Improvement Using Switch Mode Regulator 129
causes the circuit to go out of resonance consequently a large change in input current and
power factor. For a change in the input voltage, the change in voltage across the resonant
circuit is small but the change in voltage at T1 is large, and by suitable proportioning of the
voltage, a good degree of stabilization is achieved for the variation of input voltage as well
as load current. The simple Ferro-resonant regulator has the following disadvantages:
Four common types of switch mode converters are used in DC-DC conversion. They are
Buck, Boost, Buck-Boost and C^UK converters. Researches are trying to modify these DC
regulators to regulate AC voltages. Buck- Boost and Cûk converter configuration has been
investigated for voltage regulation [17-18]. But in every case it is found that the input power
factor is very low and the efficiency is poor.
     These regulators are not suited for critical loads because the output waveforms are
     truncated sine waves, which contain large percentage of distortion. The input power factor
     is low. These drawbacks are largely overcome and the voltage can be efficiently controlled
     by means of a solid-state AC regulator using PWM technique.
     The power circuit of the proposed AC voltage regulator is shown in Fig. 9. The circuit
     operation can be explained with the help of Fig. 10. During positive half cycle of the input
     voltage, at mode 1, when switch-1 is on and switch-2 is off, the current passes through diode
     D1, switch-1, diode D4 and through the inductor and the energy is stored in the inductor. At
     mode 2, when switch-1 is off and switch-2 is on, the energy stored in the inductor is
     transferred through diode D8, switch-2 and diode D5. At mode 1, power is transferred from
     source and at mode 2, power is not transferred from the source, so by controlling the on and
     off duration of switch-1 output power can be controlled.
     During negative half cycle of the input voltage, at mode 1, when switch-1 is on and switch-2
     is off the current passes through the inductor, diode D3, switch-1, and diode D2 and the
     energy is stored in the inductor. At mode 2, when switch-1 is off and switch-2 is on the
     energy stored in the inductor is transferred through diode D6, switch-2 and diode D7.
D1 D3
                    Gate signal 1
                               +    +
                                         Switch 1
                               -     -
                                                          D5 Gate signal 2        D6
                                                                                               TX1
                               0                                       Switch 2
                                                                                                            Lo
                                                               +
                                                                   -
                     D2                      D4           0
                                                               +
                                                                                                            ad
                                                                   -
                                                         D7                       D8
                                                                                                       0
Switch 1 Switch 1
                              (a)                                                      (b)
     Figure 10. Operation of the power circuit of AC voltage regulator (a) Operation during positive half
     cycle (b) Operation during negative half cycle
                                                         Power Quality Improvement Using Switch Mode Regulator 131
The outputs of OPAMP are used to turn on/off the switches of the power circuit of the
regulator to regulate the output voltage. The output of OPAMP is directly passed through
limiter-1 which is the gate signal for switch-1 and after inverting the output of the
comparator is passed through the limiter-2 which is the gate signal for switch-2. The
function of the limiter is to limit the output of comparator from 0 to 5 V. When switch-1 of
the power circuit is on then switch-2 should be off. So the gate signal generating circuit is
arranged in such a way that when gate signal of switch-1 is on then gate signal for switch-2
is off and vice versa.
                                                     0
                                                    V3                         5
                                                                  -1
                                            8
                                                    12Vdc
                                    3                                          0
                                                                                      gate signal 2
                                            V+
                                        +
                  V1                                      1
                                                OUT
                                    2                                          5
                                       -
                                            V-
                     V1 = 10        V2
          5Vdc       V2 = 0                     AD648A
                     TD = 0                                                    0
                                            4
                                                                                        gate signal 1
                     TR = .125ms                 V4
                     TF = .125ms
                     PW = .005ms                     12Vdc
                     PER = .255ms
                 0                  0           0
Figure 11. Gate signal generation circuit of manually controlled AC voltage regulator.
     voltage to 300V (peak) for variations of input voltage from 200V (peak) to 400V (peak), also
     for variation of load from 100 ohm to 200 ohm. However, the output voltage can be set to
     any desirable value according to requirement. The values of all voltages and currents
     indicated in this chapter are in peak values.
     The input current and output voltage waveforms of the manually controlled AC voltage
     regulator as shown in Fig. 12, is shown in Fig. 13, when the input voltage is 300V and
     output voltage is also 300V. The spectrum of the input current and output voltage as shown
     in Fig. 13 is shown in Fig. From the waveforms it is seen that the waveforms are not smooth,
     sinusoidal and from the spectrum it is seen that due to high frequency switching the
     significant number and amount of harmonics occur. The switching frequency is selected to 4
     KHz. Harmonics occurs at switching frequency and its odd multiple frequencies. So, filters
     are required at input and output side to filter out these harmonics to get desired sinusoidal
     waveforms.
                     SW1
                               S1
                           +   +
                           -    -
                                                                       SW2            TX1
                           0
                                                                       S2                             R6
                                                               +
                                                               -
         Input                                         0
                                                                   +
                                                               -
            VOFF = 0                                                                                  100
            VAMPL = 300
            FREQ = 50
0 0
                                                           0                          5
                                                                             -1
                                                        V3
                                                                                      0
                                                  8
                                                                                                SW2
                                          3
                                                  V+
                                              +        12Vdc
                                                               1
        5Vdc                                           OUT
                 V1                       2
                                              -
                                                  V-
                      V1 = 10      V2
                      V2 = 0                          AD648A                          5
                      TD = 0
                                                  4
                      TR = .125ms                       V4
                      TF = .125ms                                                     0
                                                       12Vdc                                    SW1
                      PW = .005ms
                      PER = .255ms
                 0                    0                0
     Figure 12. Fundamental circuit of manually controlled AC voltage regulator (ideal switch
     implementation).
                                                Power Quality Improvement Using Switch Mode Regulator 133
10A
0A
    SEL>>
     -15A
                  - I(V5)
500V
0V
-500V
Figure 13. Input current and output voltage waveforms of the regulator shown in Fig. 12.
-I(V5): Input current, V(R3:2): Output voltage.
10A
5A
      0A
              - I(V5)
    400V
200V
   SEL>>
      0V
        0Hz                 10KHz          20KHz             30KHz             40KHz          50KHz
              V2(R3)
                                                   Frequency
Figure 14. Spectrum of input current and output voltage waveforms. -I(V5):Input current V(R3:2):
Output voltage.
     The input to the filter is high frequency modulated 50 Hz AC input. The switching signal
     that modulates the 50 Hz signal is taken to be 4 KHz in this case. So, we will have to make a
     filter that would pass signal up to 1 KHz (say) and attenuate all other frequencies. This
     would result a nearly sinusoidal output voltage. In the LC filter section we choose a
     capacitor of 5µF and determine the value of inductor for a cutoff from AC sweep analysis
     through OrCAD simulation. We found the value of the inductor to be 30 mH.
L1 500V
30mH
                                                            0V
                                                             10Hz       100Hz      1.0KHz          10KHz
                                      0                          V(R1:2)
                                                                            Frequency
                                (a)                                            (b)
Figure 15. Output voltage filter and AC sweep analysis (a) Output voltage filter (b) AC sweep analysis.
                    L1
                                                            20A
                    30mH
                 20Aac
                 0Adc                                R1     10A
        Input
                                          C1
                                          5u
                                                             0A
                                                              10Hz       100Hz     1.0KHz            10KHz
                                          0                       - I(R2)
                                                                            Frequency
                                  (a)                                            (b)
     Figure 16. Input current filter and corresponding AC sweep analysis (a) Input current filter (b) AC
     sweep analysis.
                                                      Power Quality Improvement Using Switch Mode Regulator 135
3.4. Free wheeling path and surge voltage across switching devices
The power circuit of the proposed regulator with input and output filter is shown in Fig. 17.
In an inductor, current does not change instantaneously. When the switches of power circuit
switched on and off the current into the inductor of input and output filter are changed
abruptly. Abrupt change of current causes a high di/dt resulting high voltage which is equal
to Ldi/dt. These voltages appear across the switches as surge. Usually providing
freewheeling path in restricts such occurrence.
              L1                                                                          L2
                                  SW1
                                                S1
              30mH                                                                       30mH
                                            +   +
                                            -    -                     SW2         TX1
            Input
                                        0
             VAMPL = 300                                               S2                       C2        R3
                                                                   +
                                                               -
             FREQ = 50                                     0
                                                                   +
                                                               -
5u 100
                         C1
                         5u
0 0
Figure 17. The power circuit of the proposed AC voltage regulator with input and output filters.
400KV
200KV
         SEL>>
            0V
                         V(S1:3)- V(S1:4)
         400KV
200KV
             0V
                    0s             4ms               8ms                    12ms         16ms                   20ms
                         V(S2:3)- V(S2:4)
                                                           Time
Figure 18. Voltage across switches with filters and without snubbers. V(S1:3)-V(S1:4): Voltage across
switch-1, V(S2:3)-V(S2:4): Voltage across switch-2.
136 An Update on Power Quality
     These spiky voltages across the switches may be excessively high, about thousand of
     kilovolt and which may destroy the switches during the operation of the circuit. Remedial
     measures should be taken to prevent this phenomenon to make the circuit commercially
     viable. In the proposed circuit RC snubbers are used for suppressing surge voltage across
     the switches. The power circuit of the proposed regulator with input output filter and
     snubbers is shown in Fig. 19.
     Snubber enhances the performance of the switching circuits and results in higher reliability,
     higher efficiency, higher switching frequency, smaller size and lower EMI. The basic intent
     of a snubber is to absorb energy from the reactive elements in the circuit. The benefits of this
     may include circuit damping, controlling the rate of change of voltage or current or
     clamping voltage overshoot. The waveforms of voltages across switches with input output
     filters and snubbers are shown in Fig. 20.
     Use of snubbers reduces the spiky voltage across the switches to a tolerate limit for practical
     application of the AC voltage regulator.
                  L1                                                                    L2
                                   SW1            1
                                             S1    R5
                  30mH                                                                  30mH
                                         +   +
                                         -    -                         SW2       TX1
                Input                             C5
                                         0        0.1u                   S2
                                                                   +
                                                               -
                 VAMPL = 300                               0                                   C2        R3
                                                                    +
                                                               -
                 FREQ = 50
                                                                                                5u       100
                                                                    R6
                         C1                               C3 0.1u             1
                         5u
0 0
     Figure 19. The power circuit of the proposed AC voltage regulator with input output filters and
     snubbers.
400V
200V
                0V
                          V(S1:3)- V(S1:4)
             400V
200V
            SEL>>
               0V
                  0s                5ms                     10ms                   15ms                   20ms
                          V(S2:3)- V(S2:4)
                                                            Time
     Figure 20. Voltage across switches with filters and snubbers. V(S1:3)-V(S1:4): Voltage across switch-1,
     V(S2:3)-V(S2:4): Voltage across switch-2.
                                                                                       Power Quality Improvement Using Switch Mode Regulator 137
                                                             R1
                                       U1
                                                 16
                                                                                                                                                               S2
                                                 3
      R3             20Vdc V1                                         0                                           R15        U3              R8
                                                 VREF
                                                  OSC
      50k                      15                                                                                            A4N25A
                 0           C1            VIN
                                7                                12                           6                                                       V3
                 0      4000pf 6           CT   C_A              11                                                                          15V
                                           RT   E_A                                       2
                                1
                                2          ERR-                  13                           0
      R4                                   ERR+ C_B              14                                                     0          R6
                                  4             E_B
                                           CL+                        V2                                                                                       G2
                                                 COMP
      1                           5                                                  R5
                                                         SHUT
                                           GND
                                           CL-                        10Vdc
                                                                SG1524B                           U2A                                                               S1
             0          V6        0                                              0                            6              R16       U4             R9
                                                        10
                                             0           R20
                                       8
                                                                                      3            2      2                            A4N25A
                        100uVdc                                       0                                                                                             V4
                                                          1k                                                  0                                       15V
                                                         C2
                                                                                       CD4009A
                        0                                 0.001u                                                                             R7
                                                                                                                                   0
                                                     0                                                                                                                   G1
                                      D1                                  D3
            L1                                                                                                                                  L2
                                                     1 R10
            30mH                                                                                                                                   30mH
                                      Z1
                                                         D9
                                                                               D5                 S2                    D6                                          100
                                S1                       C6                          G2                                                TX1                C4
            V5                                                                                          Z2                                                5u        R14
                      C3                                 0.1u                   R11
                      5u        G1
0 0
Figure 21. Manually controlled AC voltage regulator circuit with practical switches.
     regulator can be controlled. Thus it is a very suitable device for using in the regulator
     circuits.
                             15            Reference                                                  16
                       VCC                 Regulator                                                       REF OUT
                                                                     Vref
                                                                             Vref                     12
                                                                                                           COL 1
                                                                                                      11
                                                                                                           EMIT 1
                                                                             T                        13
                                                                                                           COL 2
                                                            Vref                                      14
                        RT 6                                                                             EMIT 2
                                                       Oscillator                                      3
                        CT 7                                                                             OSC OUT
                                                                             Vref
                            1               Vref
                       IN -            –
                            2          +                                         Comparator
                       IN +
                             9
                      COMP
                                            Vref           Error Amplifier
                          4
               CURR LIM +              +
                          5
               CURR LIM -              –
                             10   1 kΩ
               SHUTDOWN
                                    10 kΩ
                             8
                       GND
400V
0V
            -400V
                      0s                   50ms                     100ms                     150ms         200ms
                           V1(V5)           V(R14:2)
                                                                     Time
     Figure 23. Input and output voltage waveforms, Input 200V output 300V. V1(V5): Input voltage –
     dotted line, V(R14:2): Output voltage – solid line.
                                               Power Quality Improvement Using Switch Mode Regulator 139
400V
0V
     -400V
              0s               50ms               100ms               150ms           200ms
                    V1(V5)     V(R14:2)
                                                   Time
Figure 24. Input and output voltage waveforms, Input 400V output 300V. V1(V5): Input voltage –
dotted line, V(R14:2): Output voltage – solid line.
5.0A
0A
     -5.0A
               0s              50ms               100ms               150ms           200ms
                    -I(V5)      -I(R14)
                                                   Time
Figure 25. Input and output current waveforms for input 200V output 300V. -I(V5): Input current -
dotted line, -I(R14): Output current – solid line.
4.0A
0A
     -4.0A
               0s              50ms               100ms               150ms           200ms
                    -I(V5)      -I(R14)
                                                   Time
Figure 26. Input and output current waveforms for input 400V output 300V. -I(V5): Input current –
dotted line, -I(R14): Output current – solid line.
140 An Update on Power Quality
     From the waveforms shown in Fig. 23 to Fig. 26, it is seen that the waveforms of output
     voltage and input current is perfectly sinusoidal. The variation of output voltage of the
     proposed regulator with the duty cycle is shown in Fig. 27. The value of input voltage is
     kept constant to 300V. From Fig. 23 it is seen that the variation of output voltage with duty
     cycle is almost linear. The variation of duty cycle with the variation of input voltage from
     200V to 400V to maintain the output voltage constant to 300V is shown in Fig. 28.
                                       600
                  Output voltage (V)
                                       500
                                       400
                                       300
                                       200
                                       100
                                             0.2   0.3   0.4    0.5   0.6   0.7    0.8    0.9    1
                                                                  Duty cycle
Figure 27. Variation of output voltage with duty cycle. Input voltage is 300V.
                                       0.8
                                       0.7
                                       0.6
                  Duty cycle
                                       0.5
                                       0.4
                                       0.3
                                       0.2
                                          175        225         275       325      375         425
                                                               Input voltage (V)
Figure 28. Variation of duty cycle with input voltage to maintain output voltage constant to 300V.
There are two types of automatic control voltage regulator, discontinuous control and
continuous control. The automatic control system consists of a sensing or measuring unit
and a power control or regulating unit. The sensing unit compares the output voltage or the
controlled variable with a steady reference and gives an output proportional to their
difference called the error signal. The error voltage is amplified, integrated or differentiated
or modified whenever necessary. The processed error voltage is fed to the main control unit
to have required corrective action.
In the discontinuous type of control, the measuring unit is such as to produce no signal as
long as the voltage is within certain limits. When the voltage goes outside this limit, a signal
is produced by the measuring unit until the voltage is again brought within this limit. In this
type of measuring or sensing unit, the correcting voltage is independent of percentage of
error. When the voltage is brought back to this limit, the signal from the measuring unit is
zero and the regulating unit remains at its new position until another signal is received from
the measuring unit.
In continuous control, the measuring unit produces a signal with amplitude proportional to
the difference between the fixed reference and the controlled voltage. The output of the
measuring unit is zero when the controlled voltage or a fraction of it is equal to the reference
voltage. The regulating or the controlling unit, which is associated with the continuous
measuring unit, gives a correcting voltage proportional to the output of the measuring unit.
The principle of operation of a continuous control AC voltage regulator is described in this
section.
4.1. Control and gate signal generating circuit for controlled AC voltage
regulator
Figure 29 shows the circuit of the proposed automatic controlled AC voltage regulator
including the control and gate signal generating circuit. A fraction of the output voltage
after capacitor voltage dividing and rectifying is passed through an OPAMP buffer. Buffer is
used to remove the loading effect. Output voltage of the buffer is same as its input voltage.
The output voltage of the buffer is further reduces using resistive voltage divider and taken
as the negative input of the error amplifier of the PWM voltage regulating IC SG1524B.
The positive input of the error amplifier is taken from the reference voltage of the chip, after
voltage dividing using 50K and 1 ohm resistance. The positive input of the error amplifier is
fixed and the negative input is error signal which will vary according to the output voltage.
Since the error signal is applied to the negative input of the error amplifier, the duty cycle
will be increased if the error signal is decreased and vice versa.
When the output voltage increases above the set value which is 300V either due to change in
input voltage or load, the error signal will be increased, therefore the duty cycle will
decrease. As a result less power will be transferred from the input to output, and output
voltage start to decrease until it reaches to the set value.
When the output voltage decreases below the set value either due to change in input voltage
or load then error signal will be decreased which will increase the duty cycle. As a result,
142 An Update on Power Quality
     more power will be transferred from the input to output, and output voltage start to
     increase until it reaches to the set value.
     When the output voltage is same as the set value than the negative and positive input of the
     error amplifier will be same as a result the duty cycle will remain same and output voltage
     will remain unchanged. In this way the proposed regulator will maintain output voltage
     constant, irrespective of the variation of input voltage and load.
                                                     16
                                                     3                                                                                                                 S2
                                       U1
                         20Vdc V1                                    R1                                                 R15       U3                R8
                                                                           0
                                                     VREF
                                                      OSC
        50k                          15                                                                                           A4N25A
                0                   C1         VIN                                                                                                                         V3
        R14              4000pf        7                              12                              6
                     0                 6       CT   C_A               11                                                                                                   15V
                                               RT   E_A                                           2
                                       1
                                       2       ERR-                   13                              0                                 R6
                                               ERR+ C_B               14                                                      0
                                                    E_B                                                                                                                         G2
        R4                            4
                                               CL+                         V2
                                                     COM P
                                      5                                                    R5
                                                              SHUT
                                               GND
                                                 0            R20
                                           8
                                                                                                                    0                                    R9
                                                                           0                                                                                                  15V
                                   SG1524B                     50k                         CD4009A
                                                              C2                                                                                    R7
                                                             .001u                                                                       0
                                                                                                                                                                                      G1
                                                         0
                                                                                                                                                                       11
                                                                                                                                                                       0          -
                                                                                                                                                                                       2
                                                                                                                                                                         V-
                                                                                                                                        R18
                                                                                                                                                          1        LM324
                                                                                                                                                               OUT   U5A
                                                                                                                                                                                       3
                                                                                                                                                                         V+
                                                                                                                                        R19                                      +
                                                                                                                                                                                 V7
                                                                                                                                                                       4
                                                                                                                                                    0                         20V
                                           R10
         L1                 D1                        D3                                                                                     L2                    0
                                           1
         30mH                                                                                                                                30mH
                                                                                                                                                                              0.1u
                                           D9
                                                                           D5                                   D6                                                               C7
                              S1                      C6                          G2              S2
        V5
                                       Z1                                                                 Z3                  TX1                        100
                                                      0.1u                     R11
                              G1                                                                                                                    C4   R3
       FREQ = 50                                                                                                                                    5u
                                                                               0.001
       VAMPL = 300                                                                                              R13
                                        R12           D4                               C5         D10           1                                                             0.3u
                            D2         0.001                                                                                                                       10u                  R17
                                                                                                                                                                              C9
                                                                                D7             0.1u             D8
                C3                                                                                                                                                 C8                 4000k
5u
0 0
Figure 29. Automatic controlled AC voltage regulator circuit with practical switches.
waveforms of the input current and output currents corresponding to the waveforms of Fig.
30 and Fig. 31 for a load of 100 Ω.
400V
0V
        -400V
                      V(R14:2)
         400V
0V
        SEL>>
        -400V
              0s          100ms       200ms       300ms       400ms       500ms 600ms
                      V1(V5)
                                                   Time
Figure 30. Input and output voltage waveforms for input 250V and output 300V. V1(V5): Input voltage-
bottom figure, V(R14:2): Output voltage – top figure.
500V
0V
        SEL>>
        -500V
                      V(R14:2)
         400V
0V
        -400V
                 0s       100ms       200ms       300ms       400ms       500ms 600ms
                      V1(V5)
                                                   Time
Figure 31. Input and output voltage waveforms for input 350V and output 300V. V1(V5): Input voltage-
bottom figure, V(R14:2): Output voltage – top figure.
Table 1 summarizes the result of the proposed regulator to regulate output voltage to 300V
for variation of input voltage from 200V to 350V and load from 100 ohm to 200 ohm. In this
144 An Update on Power Quality
     table input current, output current, input power factor, and efficiency of the regulator are
     also provided. The proposed regulator can regulate the output voltage effectively, for a
     wide variation of input voltage and load with efficiency of more than 90% and input power
     factor more than 0.9.
4.0A
0A
             SEL>>
             -4.0A
                            -I(R14)
               5.0A
0A
             -5.0A
                       0s       100ms      200ms        300ms       400ms        500ms 600ms
                            -I(V5)
                                                         Time
     Figure 32. Input and output current waveforms for input 250V output 300V. -I(V5): Input current –
     bottom figure, -I(R14): Output current – top figure.
5.0A
0A
            SEL>>
            -5.0A
                            -I(R14)
5.0A
0A
-5.0A
Table 1. Results of proposed automatic controlled AC voltage regulator for maintaining output 300 V.
5. Conclusion
An essential feature of efficient electronic power processing is the use of semiconductors
devices in switch mode to control the transfer of energy from source to load through the use
of pulse width modulation techniques. Inductive and capacitive energy storage elements are
used to smooth the flow of energy while keeping losses at a lower level. As the frequency of
the switching increases, the size of the capacitive and inductive elements decreases in a
direct proportion. Because of the superior performance, the SMPS are replacing
conventional linear power supplies.
In this chapter the design and analysis of an AC voltage regulator operated in switch mode
is described in details. AC voltage regulator is used to maintain output voltage constant
either for an input voltage variation or load variation to improve the power quality. If the
output voltage remains constant, equipment life time increases and outages and
maintenance are reduced.
At first the regulator is analyzed using ideal switches, then the ideal switches is replaced by
practical switches which required isolated gate signal. The procedure of smoothing the
input current and output voltage, and suppressing the surge voltage across the switches is
described. A manually controlled AC voltage regulator is analyzed then the concept of
operation of an automatic controlled AC voltage regulator is described. Finally an automatic
controlled AC voltage regulator is designed and its performance is analyzed.
The proposed regulator can maintain the output voltage constant to 300V, when input
voltage is vary from 200V to 350V also for variation of load. To maintain constant output
voltage PWM control is used. By varying the duty cycle of the control circuit have achieved
the goal of maintaining the constant output voltage across load. For generation of gate
146 An Update on Power Quality
     signal of the switches an IC chip SG1524B is used which is compact and commercially
     available at a very low cost. The input current of the proposed regulator is sinusoidal and
     the input power factor is above 0.9. From simulation results it is seen that the efficiency of
     the proposed regulator is more than 90%.
     Author details
     Raju Ahmed
     Electrical and Electronic Engineering Department, Dhaka University of Engineering and Technology
     (DUET), Gazipur, Bangladesh
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                                           Power Quality Improvement Using Switch Mode Regulator 147
[12] G. Venkataramanan. B. K. Johnson, and A. Sundaram, “An AC-AC power converter for
     custom power applications,” IEEE Transactions on Power Delivery, vol. 11, pp. 1666-
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                          Edited by Dylan Dah-Chuan Lu
                                                                               ISBN 978-953-51-6327-5
                                                                                    978-953-51-1079-8