1. What is computer architecture?

a) set of categories and methods that specify the functioning, organisation, and implementation of
computer systems
b) set of principles and methods that specify the functioning, organisation, and implementation of
computer systems
c) set of functions and methods that specify the functioning, organisation, and implementation of
computer systems
d) None of the mentioned
View Answer
Answer: b
Explanation: A set of principles and methods that specify the functioning, organisation, and
implementation of computer systems is known as computer architecture. A system’s architecture
refers to its structure in terms of the system’s individually specified components and their
interrelationships.

2. What is computer organization?

a) structure and behaviour of a computer system as observed by the user
b) structure of a computer system as observed by the developer
c) structure and behaviour of a computer system as observed by the developer
d) All of the mentioned
View Answer
Answer: a
Explanation: The structure and behaviour of a computer system as observed by the user is the
subject of computer organisation.

3. Which of the following is a type of computer architecture?

a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) All of the mentioned
View Answer
Answer: d
Explanation: Below are the types of Computer Architecture:
i) Von-Neumann Architecture
ii) Harvard Architecture
iii) Instruction Set Architecture
iv) Microarchitecture
v) System Design

4. Which of the following is a type of architecture used in the computers nowadays?

a) Microarchitecture
b) Harvard Architecture
c) Von-Neumann Architecture
d) System Design
View Answer
Answer: c
Explanation: John von Neumann proposed this architecture. The architecture of today’s computers is
based on von Neumann architecture. It is based on a few ideas.

5. Which of the following is the subcategories of computer architecture?

a) Microarchitecture
b) Instruction set architecture
c) Systems design
d) All of the mentioned
View Answer
Answer: a
Explanation: The three main subcategories of computer architecture are:
i) Microarchitecture
ii) Instruction set architecture
iii) Systems design

6. Which of the architecture is power efficient?

a) RISC
b) ISA
c) IANA
d) CISC
View Answer
Answer: a
Explanation: Hence the RISC architecture is followed in the design of mobile devices.

7. What does CSA stands for?

a) Computer Service Architecture
b) Computer Speed Addition
c) Carry Save Addition
d) None of the mentioned
View Answer
Answer: b
Explanation: The CSA is used to speed up the addition of multiplicands.
8. If an exception is raised and the succeeding instructions are executed completely, then the
processor is said to have ______
a) Generation word
b) Exception handling
c) Imprecise exceptions
d) None of the mentioned
View Answer
Answer: c
Explanation: The processor since as executed the following instructions even though an exception
was raised, hence the exception is treated as imprecise.

9. To reduce the memory access time we generally make use of ______

a) SDRAM’s
b) Heaps
c) Cache’s
d) Higher capacity RAM’s
View Answer
Answer: c
Explanation: The time required to access a part of the memory for data retrieval.
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10. The IA-32 system follows which of the following design?

a) CISC
b) SIMD
c) RISC
d) None of the mentioned
View Answer
Answer: a
Explanation: This system architecture is used to reduce the steps involved in execution by
performing complex operations in one step.

11. Which of the following architecture is suitable for a wide range of data types?
a) IA-32
b) ARM
c) ASUS firebird
d) 68000
View Answer
Answer: a
Explanation: IA-32 architecture is suitable for a wide range of data types.

12. In IA-32 architecture along with the general flags, which of the following conditional flags are
provided?
a) TF
b) IOPL
c) IF
d) All of the mentioned
View Answer
Answer: d
Explanation: These flags are basically used to check the system for exceptions.

13. The VLIW architecture follows _____ approach to achieve parallelism.

a) SISD
b) MIMD
c) MISD
d) SIMD
View Answer
Answer: b
Explanation: The MIMD stands for Multiple Instructions Multiple Data.

14. What does VLIW stands for?

a) Very Long Instruction Width
b) Very Large Instruction Word
c) Very Long Instruction Width
d) Very Long Instruction Word
View Answer
Answer: d
Explanation: It is the architecture designed to perform multiple operations in parallel.
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15. In CISC architecture most of the complex instructions are stored in _____
a) CMOS
b) Register
c) Transistors
d) Diodes
View Answer
Answer: c
Explanation: In CISC architecture more emphasis is given on the instruction set and the instructions
take over a cycle to complete.

16. Both the CISC and RISC architectures have been developed to reduce the ______
a) Time delay
b) Semantic gap
c) Cost
d) All of the mentioned
View Answer
Answer: b
Explanation: The semantic gap is the gap between the high level language and the low level language.

17. ________ are the different type/s of generating control signals.

a) Hardwired
b) Micro-instruction
c) Micro-programmed
d) Both Micro-programmed and Hardwired
View Answer
Answer: d
Explanation: The above is used to generate control signals in different types of system architectures.

18. If the instruction Add R1, R2, R3 is executed in a system which is pipelined, then the value of S is
(Where S is term of the Basic performance equation).
a) 2
b) ~1
c) ~7
d) 2
View Answer
Answer: b
Explanation: The value will be much lower in case of multiple BUS organisation.

19. The small extremely fast, RAM’s all called as ________

a) Heaps
b) Accumulators
c) Stacks
d) Cache
View Answer
Answer: a
Explanation: Cache’s are extremely essential in single BUS organisation to achieve fast operation.

20. For a given FINITE number of instructions to be executed, which architecture of the processor
provides for a faster execution?
a) ANSA
b) Super-scalar
c) ISA
d) All of the mentioned
View Answer
Answer: b
Explanation: In super-scalar architecture, the instructions are set in groups and they’re decoded and
executed together reducing the amount of time required to process them.

21. What is the full form of ISA?

a) Industry Standard Architecture
b) International Standard Architecture
c) International American Standard
d) None of the mentioned
View Answer
Answer: c
Explanation: The ISA is an architectural standard developed by IBM for its PC’s.

22. Which of the following is the fullform of CISC?

a) Complex Instruction Sequential Compilation
b) Complete Instruction Sequential Compilation
c) Computer Integrated Sequential Compiler
d) Complex Instruction Set Computer
View Answer
Answer: d
Explanation: The CISC machines are well adept at handling multiple BUS organisation.
23. The reason for the cells to lose their state over time is ________
a) Use of Shift registers
b) The lower voltage levels
c) Usage of capacitors to store the charge
d) None of the mentioned
View Answer
Answer: c
Explanation: Since capacitors are used the charge dissipates over time.

24. In order to read multiple bytes of a row at the same time, we make use of ______
a) Memory extension
b) Cache
c) Shift register
d) Latch
View Answer
Answer: d
Explanation: The latch makes it easy to ready multiple bytes of data of the same row simultaneously
by just giving the consecutive column address.

25. The difference in the address and data connection between DRAM’s and SDRAM’s is _______
a) The requirement of more address lines in SDRAM’s
b) The usage of a buffer in SDRAM’s
c) The usage of more number of pins in SDRAM’s
d) None of the mentioned
View Answer
Answer: b
Explanation: The SDRAM uses buffered storage of address and data.

26. The chip can be disabled or cut off from an external connection using ______
a) ACPT
b) RESET
c) LOCK
d) Chip select
View Answer
Answer: d
Explanation: The chip gets enabled if the CS is set otherwise the chip gets disabled.

27. The controller multiplexes the addresses after getting the _____ signal.
a) INTR
b) ACK
c) RESET
d) Request
View Answer
Answer: d
Explanation: The controller gets the request from the device needing the memory read or write
operation and then it multiplexes the address.

28. The data is transferred over the RAMBUS as _______

a) Blocks
b) Swing voltages
c) Bits
d) Packets
View Answer
Answer: b
Explanation: By using voltage swings to transfer data, the transfer rate along with efficiency is
improved.
29. The memory devices which are similar to EEPROM but differ in the cost effectiveness is ______
a) CMOS
b) Memory sticks
c) Blue-ray devices
d) Flash memory
View Answer
Answer: d
Explanation: The flash memory functions similar to the EEPROM but is much cheaper.

30. The flash memory modules designed to replace the functioning of a hard disk is ______
a) RIMM
b) FIMM
c) Flash drives
d) DIMM
View Answer
Answer: c
Explanation: The flash drives have been developed to provide faster operation but with lesser space.

31. The drawback of building a large memory with DRAM is ______________

a) The Slow speed of operation
b) The large cost factor
c) The inefficient memory organisation
d) All of the mentioned
View Answer
Answer: a
Explanation: The DRAM’s were used for large memory modules for a long time until a substitute was
found.

32. In a 4M-bit chip organisation has a total of 19 external connections, then it has _______ address if 8
data lines are there.
a) 2
b) 5
c) 9
d) 8
View Answer
Answer: c
Explanation: To have 8 data lines and 19 external connections it has to have 9 address lines(i.e 512 x
8 organisation).

33. What does ISO stands for?

a) International Software Organisation
b) Industrial Software Organisation
c) International Standards Organisation
d) Industrial Standards Organisation
View Answer
Answer: c
Explanation: The ISO is yet another architectural standard, used to design systems.

34. The bit used to signify that the cache location is updated is ________
a) Flag bit
b) Reference bit
c) Update bit
d) Dirty bit
View Answer
Answer: d
Explanation: When the cache location is updated in order to signal to the processor this bit is used.

35. During a write operation if the required block is not present in the cache then ______ occurs.
a) Write miss
b) Write latency
c) Write hit
d) Write delay
View Answer
Answer: a
Explanation: This indicates that the operation has missed and it brings the required block into the
cache.

36. While using the direct mapping technique, in a 16 bit system the higher order 5 bits are used for
________
a) Id
b) Word
c) Tag
d) Block
View Answer
Answer: c
Explanation: The tag is used to identify the block mapped onto one particular cache block.

37. The bit used to indicate whether the block was recently used or not is _______
a) Reference bit
b) Dirty bit
c) Control bit
d) Idol bit
View Answer
Answer: b
Explanation: The dirty bit is used to show that the block was recently modified and for a
replacement algorithm.

38. The number successful accesses to memory stated as a fraction is called as _____
a) Access rate
b) Success rate
c) Hit rate
d) Miss rate
View Answer
Answer: c
Explanation: The hit rate is an important factor in performance measurement.

1) Who developed the basic architecture of computer?

1. Blaise Pascal
2. Charles Babbage
3. John Von Neumann
4. None of the above
Answer: (c) John Von Neumann

2) Which of the following allows simultaneous write and read operations?

1. ROM
2. EROM
3. RAM
4. None of the above
Answer: (c) RAM

3) Which of the following is not considered as a peripheral device?

 1. CPU
2. Keyboard
3. Monitor
4. All of the above
Answer: (a) CPU

4) Which of the following computer memory is fastest?

1. Register
2. Hard disk
3. RAM
4. None of the above
Answer: (a) Register

5) Which of the following operations is/are performed by the ALU?

1. Data manipulation
2. Exponential
3. Square root
4. All of the above
Answer: (d) All of the above

6) Which of the following format is used to store data?

1. Decimal
2. Octal
3. BCD
4. Hexadecimal
Answer: (c) BCD

7) Which of the following memory of the computer is used to speed up the computer processing?
1. Cache memory
2. RAM
3. ROM
4. None of the above
Answer: (a) Cache memory

8) Computer address bus is -

1. Multidirectional
2. Bidirectional
3. Unidirectional
4. None of the above
Answer: (c) Unidirectional

9) Which of the following circuit is used to store one bit of data?

1. Flip Flop
2. Decoder
3. Encoder
4. Register
Answer: (a) Flip Flop

10) Which of the following is a way in which the components of a computer are connected to each
other?
1. Computer parts
2. Computer architecture
3. Computer hardware
4. None of the above
Answer: (b) Computer architecture
11) Which of the following circuit convert the binary data into a decimal?
1. Decoder
2. Encoder
3. Code converter
4. Multiplexer
Answer: (c) Code converter

12) The address in the main memory is known as -

1. Logical address
2. Physical address
3. Memory address
4. None of the above
Answer: (b) Physical address

13) Subtraction in computers is carried out by -

1. 1's complement
2. 2's complement
3. 3's complement
4. 9's complement
Answer: (b) 2's complement

14) Which of the following computer bus connects the CPU to a memory on the system board?
1. Expansion bus
2. Width bus
3. System bus
4. None of the above
Answer: (c) System bus

15) Which of the following memory unit communicates directly with the CPU?
1. Auxiliary memory
2. Main memory
3. Secondary memory
4. None of the above
Answer: (b) Main memory

16) The collection of 8-bits is called as -

1. Byte
2. Nibble
3. Word
4. Record
Answer: (a) Byte

17) Which of the following register can interact with the secondary storage?
1. PC
2. MAR
3. MDR
4. IR
Answer: (b) MAR

18) In which of the following form the computer stores its data in memory?
1. Hexadecimal form
2. Octal form
3. Binary form
4. Decimal form
Answer: (c) Binary form
19) Which of the following is a combinational logic circuit which sends data from a single source to
two or more separate destinations?
1. Multiplexer
2. Demultiplexer
3. Encoder
4. Decoder
Answer: (b) Demultiplexer

20) Which of the following is a group of bits that tells the computer to perform a particular
operation?
1. Accumulator
2. Register
3. Instruction code
4. None of the above
Answer: (c) Instruction code

21) Where is the document temporarily stored during working on a document on PC?
1. ROM
2. CPU
3. RAM
4. Flash memory
Answer: (c) RAM

22) Where is the decoded instruction stored?

1. Registers
2. MDR
3. PC
4. IR
Answer: (d) IR

23) What does MIMD stand for?

1. Multiple Instruction Memory Data
2. Multiple Instruction Multiple Data
3. Memory Instruction Multiple Data
4. Memory Information Memory Data
Answer: (b) Multiple Instruction Multiple Data

24) The status bit is also called as -

1. Unsigned bit
2. Signed bit
3. Flag bit
4. None of the above
Answer: (c) Flag bit

25) Which of the following register keeps track of the instructions stored in the program stored in
memory?
1. Accumulator
2. Address Register
3. Program Counter
4. Index Register
Answer: (c) Program Counter

26) The Program Counter is also called as -

1. Instruction Pointer
2. Data Counter
3. Memory pointer
 4. None of the above
Answer: (a) Instruction Pointer

27) Which of the following topology is used in Ethernet?

1. Ring topology
2. Bus topology
3. Mesh topology
4. Star topology
Answer: (b) Bus topology

28) Which of the following is correct about memory and storage?

1. Memory is temporary, Storage is temporary
2. Memory is temporary, Storage is permanent
3. Memory is permanent, Storage is temporary
4. Memory is slow, Storage is Fast
Answer: (b) Memory is temporary, Storage is permanent

29) Which of the following is equal to 4 bits?

1. Byte
2. Nibble
3. Record
4. All of the above
Answer: (b) Nibble

30) What does one thousand bytes represent?

1. Kilobyte (KB)
2. Megabyte (MB)
3. Gigabyte (GB)
4. Terabyte (TB)
Answer: (a) Kilobyte (KB)

31) What is the content of stack pointer (SP)?

1. Address of the top element in the stack
2. Address of current instruction
3. Address of next instruction
4. None of the above
Answer: (a) Address of the top element in the stack

32) An n-bit microprocessor has -

1. n-bit instruction register
2. n-bit address register
3. n-bit program counter
4. None of the above
Answer: (a) n-bit instruction register

33) Which of the following is the operation executed on data stored in registers?
1. Byte operation
2. Bit operation
3. Macrooperation
4. Microoperation
Answer: (d) Microoperation

34) What does a computer bus line consists of?

1. Set of parallel lines
2. Accumulators
3. Registers
 4. None of the above
Answer: (a) Set of parallel lines

35) Which of the following is performed by half adder?

1. Binary addition operation for 2 decimal inputs
2. Binary addition operation for 2 binary inputs
3. Decimal addition operation for 2 decimal inputs
4. Binary addition operation for 2 binary inputs
Answer: (b) Binary addition operation for 2 binary inputs

36) Which of the following is a combinational logic circuit which converts binary information from n
coded inputs to a maximum of 2n unique outputs?
1. Multiplexer
2. Demultiplexer
3. Encoder
4. Decoder
Answer: (d) Decoder

37) Which of the following is a combinational logic circuit that change the binary information into N
output lines?
1. Multiplexer
2. Demultiplexer
3. Encoder
4. Decoder
Answer: (c) Encoder

38) Which of the following is a combinational logic circuit that has 2n input lines and a single output
line?
1. Multiplexer
2. Demultiplexer
3. Encoder
4. Decoder
Answer: (a) Multiplexer

39) Which of the following building block can be used to implement any combinational logic circuit?
1. AND
2. OR
3. NAND
4. None of the above
Answer: (c) NAND

40) Which of the following is the circuit board on which chips and processor are placed?
1. Master circuit
2. Motherboard
3. Big board
4. None of the above
Answer: (b) Motherboard

41) Which of the following computer register collects the result of computation?
1. Accumulator
2. Instruction Pointer
3. Storage register
4. None of the above
Answer: (a) Accumulator

42) CISC stands for -

 1. Complex Instruction Set Computer
2. Complete Instruction Sequential Compilation
3. Complex Instruction Sequential Compiler
4. None of the above
Answer: (a) Complex Instruction Set Computer

43) Which of the following is the function of the control unit in the CPU?
1. It stores program instruction
2. It decodes program instruction
3. It performs logic operations
4. None of the above
Answer: (b) It decodes program instruction

44) What does EEPROM stands for?

1. Electrically Erasable and Programmable Read-Only Memory
2. Electronically Erasable and Programmable Read-Only Memory
3. Electrically Enabled and Programmable Read-Only Memory
4. None of the above
Answer: (a) Electrically Erasable and Programmable Read-Only Memory

45) In which of the following term the performance of cache memory is measured?
1. Chat ratio
2. Hit ratio
3. Copy ratio
4. Data ratio
Answer: (b) Hit ratio

46) RISC stands for -

1. Reduce Instruction Set Computer
2. Risk Instruction Sequential Compilation
3. Risk Instruction Source Compiler
4. None of the above
Answer: (a) Reduce Instruction Set Computer

47) Which of the following is an essential data transfer technique?

1. MMA
2. DMA
3. CAD
4. CAM
Answer: (b) DMA

48) Which of the following is page fault?

1. Page fault occurs when a program accesses a page of another program
2. Page fault occurs when a program accesses a page in main memory
3. Page fault occurs when there is an error in particular page
4. Page fault occurs when a program accesses a page which is not present in main memory
Answer: (d) Page fault occurs when a program accesses a page which is not present in main memory

49) What does DRAM stands for?

1. Dynamic Read Access Memory
2. Digital Random Access Memory
3. Dynamic Random Access Memory
4. Dynamic Read Allocation Memory
Answer: (c) Dynamic Random Access Memory

50) Which of the following is known as the step by step procedure to solve a problem?
 1. Graph
2. Table
3. Algorithm
4. None of the above
Answer: (c) Algorithm