3/11/2024
Chapter 4
Silicon Solar Cells
Basic Principle
Doping??
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
3/11/2024
Basic Principle
Photovoltaic modules, commonly called solar modules,
are the key components used to convert sunlight into
electricity.
Solar modules are made of semiconductors that are very
similar to those used to create integrated circuits for
electronic equipment.
The most common type of semiconductor currently in use
is made of silicon crystal.
Silicon crystals are laminated into n-type and p-type
layers, stacked on top of each other.
Light striking the crystals induces the “photovoltaic
effect,” which generates electricity.
The electricity produced is called direct current (DC) and
can be used immediately or stored in a battery.
A device called an inverter changes the electricity into
alternating current (AC), the standard power used in
residential homes.
Working Principle
Energy band?
Energy level?
Fermi-energy level?
Intrinsic fermi-energy?
Energy gap?
Shallow level doping?
Deep level doping?
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
3/11/2024
Working Principle
Efficiency of solar cell
The dark current of an p-n junction can be written as:
𝑞𝑉 𝑘𝑇
𝐼𝐷 = 𝐼0 𝑒 −1
Where,
𝐼0 is the saturated dark current
q is the electron charge
k is the boltzmann’s constant and
T is the absolute temperature (K)
So, the junction current with light can be written as:
𝑞𝑉 𝑘𝑇
𝐼𝑜𝑢𝑡 = 𝐼𝑠𝑐 − 𝐼0 𝑒 −1
Where,
𝐼𝑠𝑐 is the short-circuit current
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
3/11/2024
Efficiency of solar cell
When the load is an open circuit ( 𝐼𝑜𝑢𝑡 = 0 ),
corresponding voltage is called the open-circuit voltage
(𝑉𝑜𝑐 )
Thus,
𝑘𝑇 𝐼𝑠𝑐
𝑉𝑜𝑐 = 𝑙𝑛 +1
𝑞 𝐼0
𝑘𝑇 𝐼𝑠𝑐
≈ 𝑙𝑛
𝑞 𝐼0
The output power is 𝑃𝑜𝑢𝑡 = 𝑉𝑜𝑢𝑡 × 𝐼𝑜𝑢𝑡
Maximum power output, 𝑃𝑚 = 𝑉𝑚 × 𝐼𝑚
Efficiency of solar cell
Fill factor is a measure of quality of a solar cell.
This is the available power at the maximum power
point (Pm) divided by the open circuit voltage (VOC)
and the short circuit current (ISC):
𝑃𝑚
𝐹𝐹 = 𝑉
𝑜𝑐 ×𝐼𝑠𝑐
𝑉 ×𝐼
𝐹𝐹 = 𝑉𝑚 ×𝐼𝑚
𝑜𝑐 𝑠𝑐
So, the maximum power conversion efficiency is:
𝑃𝑚 𝑉𝑜𝑐 × 𝐼𝑠𝑐 × 𝐹𝐹
𝜂= =
𝑃𝑖𝑛 𝑖𝑛𝑐𝑖𝑑𝑒𝑛𝑡 𝑠𝑜𝑙𝑎𝑟 𝑝𝑜𝑤𝑒𝑟
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
3/11/2024
Efficiency limiting factors
Bandgap Energy (Eg):
Doping concentration increases the Eg
𝑉𝑜𝑐 increases with increasing Eg.
On the other hand Jsc decreases with increasing Eg.
As a result , solar cell efficiency became peak at a
certain Eg.
Temperature:
Efficiency decreases with increasing temperature
For every 1°C increase in temperature, Voc drop by
about 0.4% of its room temperature value.
Thermal loss increases.
Efficiency limiting factors
Recombination Lifetime:
Long carrier-recombination lifetimes are desirable
mainly because they help to achieve large Isc
The key to achieve long recombination lifetimes is to
avoid introducing recombination centers during
material preparation and cell fabrication.
Light Intensity:
Directly related to the output power.
Doping Density & Profile:
With increasing doping density the Voc is increasing.
As well as the dark saturation current density also
increase with increasing doping density.
Defect density increase.
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
3/11/2024
Efficiency limiting factors
Surface Recombination Velocities:
Low surface recombination velocities help enhance Isc
Back surface filed (BSF) is usually use to minimize surface
recombination velocity.
Passivation layers also help to decrease it.
Series Resistance:
Comes from lead, metal contact grid, bulk cell resistance.
Can minimized by spacing the metal lines closely.
Metal Grid and Optical Reflection:
Metal grids on the front surface are opaque to sunlight.
To maximize Isc the metal grid area should minimize.
The reflectivity of the bare silicon surface is about 40%
it can be reduced by using antireflection coating.
Design consideration
Steps for designing a typical silicon solar cell:
Take a p-type single crystalline silicon.
Usually Czochralski (C-Z) technique is used.
Slicing it to the proper plane.
Chemical etching (by mixture of Nitric, HF, acetic
acid) to remove oxidized layer.
Polishing is done by sic and Al2O3 slurry.
Then dope with thin layer of n-type.
n-region is thin and highly doped
To make ohmic contact easer.
Chose a proper material for making electrodes.
Choose proper metal to reduce the series
resistance.
Annealing of the metal-semiconductor junction
decrease the contact resistance.
Dr. A.T.M. Saiful Islam
Associate Professor
Dept. of EEE, BSMRSTU
