Holy Stone MLCC
Holy Stone MLCC
1. Scope
This specification is applied to Multilayer Ceramic Chip Capacitor(MLCC) for use in electric equipment
for the voltage is ranging from 4V to 50V.
The series suitable for general electrics circuit, telecommunications, personal computers and peripheral,
power circuit and mobile application. (This product is compliant with the RoHS.)
(7)Tapping
Code Type
T Tape & Reel
B Bulk
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
5. Storage Condition
:
Storage Temperature 5 to 40 ℃
:
Relative Humidity 20 to 70 %
:
Storage Time 12 months max.
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
6. Dimensions
6.1 Configuration and Dimension :
BW B
L
Unit:mm
TYPE L W T (max) B (min) BW (min)
0201 0.60± 0.03 0.30± 0.03 0.33 0.20 0.10
0402 1.00± 0.05 0.50± 0.05 0.55 0.30 0.15
0603 1.60± 0.10 0.80± 0.10 1.00 0.40 0.15
0805 2.00± 0.20 1.25± 0.20 1.45 0.70 0.20
1206 3.20± 0.30 1.60± 0.20 1.80 1.50 0.30
1210 3.20± 0.30 2.50± 0.20 2.60 1.60 0.30
1808 4.60± 0.30 2.00± 0.20 2.20 2.50 0.30
1812 4.60± 0.30 3.20± 0.30 3.00 2.50 0.30
1825 4.60± 0.30 6.35± 0.40 2.60 2.50 0.30
2208 5.70± 0.40 2.00± 0.20 2.20 3.50 0.30
2211 5.70± 0.40 2.80± 0.40 3.00 3.50 0.30
2220 5.70± 0.40 5.00± 0.40 3.00 3.50 0.30
2225 5.70± 0.40 6.35± 0.40 3.00 3.50 0.30
Solder Metal
Barrier
External Electrodes
Inner Electrodes
Ceramic Body
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
7. Performance
No. Item Specification Test Condition
1 Visual No abnormal exterior appearance Visual Inspection
2 Dimension See Page 3 Visual Inspection
3 Insulation 10,000MΩ or 500/C Ω whichever is smaller Applied Voltage: Rated Voltage
Resistance for rated voltage>10V and greater 100/C Ω Charge Time : 60±5 sec.
for rated voltage≤10V. Charge-Discharge current shall be less than 50mA
current.
4 Capacitance Within The Specified Tolerance Class Ⅰ:
5 Q Class ≧
More Than 30pF : Q 1000 Char Frequency Voltage
Ⅰ ≧
30pF & Below: Q 400+20C ≦
C 1000pF 1MHz 10% ± 1.0 0.2Vrms ±
(C : Capacitance , pF) >
C 1000pF 1KHz 10% ±
Tan δ Class X7R/X7S/X6S/X5R/X5S: shell meet the Class Ⅱ:
Ⅱ value in table 1 Char Frequency Voltage
Y5V/Y5U/Z5U : 0.2 max. ≦
C 10uF 1KHz 10% ± *1.0 0.2Vrms ±
or 0.5 0.2Vrms ±
>
C 10uF 120Hz 20% ± 0.5 0.2Vrms ±
±℃
Perform a heat temperature at 150 5 for 30min
then place room temp. for 24 2hr. ±
* Depend on the individual parts.
6 Withstanding No dielectric breakdown or mechanical 250% of the rated voltage for 1~5 sec.
Voltage breakdown charge/discharge Current is less than 50mA.
7 Temperature Class Ⅰ Char. Temp. Range Cap. Change(%) Class Ⅰ:
Capacitance ℃ ℃
NPO -55 ~+125 ± 30 ppm/ ℃ -
C2 C1 ×100%
Coefficient Class Char. Temp. Range Cap. Change(%) -
C1(T2 T1)
Ⅱ -55℃~+125℃
X7R
-55℃~+125℃
± 15%
Class Ⅱ:
X7S
X6S -55℃~+105℃
± 22%
± 22%
C2 -C1 ×100%
-55℃~+85℃
C1
X5R ± 15%
X5S -55℃~+85℃ ± 22% T1: Standard Temperature(25 ) ℃
-30℃~+85℃ T2: Test Temperature
℃)
Y5V +22% ~-82%
Y5U -30℃~+85℃ +22% ~-56% C1:Capacitance At Standard Temperature(25
Z5U +10℃~+85℃ +22% ~-56% C2: Capacitance At Test Temperature (T2)
0.2Vrms shall be applied.
8 Adhesive Strength No indication of peeling shall occur on the Pull force shall be applied for 10± 1 second.
Of Termination terminal electrode. ≦ ≒
0603----5N( 0.5 Kg·f)
> ≒
0603----10N( 1.0 Kg·f)
N·f
.
9 Resistance Appear- No mechanical damage or capacitance The board shall be bend 1.0mm with a rate of 1.0
to ance change more than the following table. mm/sec.
Flexure R230
Capacitance Change Bending
of Substrate C-Meter Limit
Char. Cap. Change
NPO(N) ≦ ± 5.0% of initial value C Meter
X7R (X)
X7S (R) 45±1mm 45±1mm
X6S (S) ≦ ± 12.5% of initial value
X5R (B)
X5S (D)
Y5V (Y) ≦ ± 30.0% of initial value
Y5U (E)
Z5U (Z)
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
10 Solderability More than 90% of the terminal surface is to be Solder Temperature : 245± 5 ℃
soldered newly, so metal part does not come out Dip Time : 5 ± 0.5sec
or dissolve. Immersing Speed : 25±10% mm/s
Solder : Lead Free Solder
Flux :Rosin
Preheat : At 80~120 ℃for 10~30sec.
11 Resistance Appear- No mechanical damage shall occur. Ⅱ
Class capacitor shall be set for 48±4 hours
at room temperature after one hour heat
To
Soldering
ance
Capacit- Class Ⅰ Within ± 2.5% or ± 0.25pF
℃
treatment at 150 +0/-10 before initial
measure.
Preheat : at 150± 10℃ for 60~120sec.
Heat ance (NPO) whichever is larger of initial
℃
(NPO) whichever is larger of initial
value Temperature : 40± 2
X7R/X7S/X6S ±
≤ 12.5% of initial value Relative Humidity : 90 ~ 95%RH
X5R/X5S Test Time : 500 Hrs Max.
Y5V/Y5U/Z5U ±
≤ 30% of initial value
Q ≧
30pF & Over : Q 350 Measure at room temperature after cooling for
Ⅰ
Ⅰ ≧ Class : 24 ± 2 Hours
Ⅱ
10 to 30pF : Q 275+2.5C
≧
Class
30pF & Below: Q 200+10C Class : 48 ± 4 Hours
Tan δ X7R/X7S/X6S/X5R/X5S: shell meet the value in
Class Ⅱ table 1
Y5V/Y5U/Z5U : 0.4 max.
Insulation 1000MΩ or 50/C Ω whichever is smaller for
Resistance rated voltage>10V and greater 10/C Ω for rated
≦
voltage 10V. (C in Farad)
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Table 1
Temp char: X7R,X7S,X6S,X5R,X5S
Tanδ (MAX)
Rated voltage Capacitance 5. Initial 13.Humidity
Range 16.Vibration 14.Humidity loading
11.Resistance to solder heat 15.High temperature loading
12.Temperature cycle
0201 DC 4V All Capacitance 15.0% 25.0%
DC 6.3V ≦
C 0.01uF 10.0% 20.0%
≦
0.1uF =C 2.2uF 15.0% 25.0%
DC 10V ≦
C 0.01uF 10.0% 20.0%
DC 16V ≦
C 3.3nF 10.0% 20.0%
DC 25V ≦
C 2.2nF 10.0% 20.0%
DC 50V ≦
C 1nF 10.0% 20.0%
0402 DC 4V ≦
C 10uF 10.0% 20.0%
DC 6.3V ≦
C 0.22uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
DC 10V ≦
C 0.1uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
DC 16V ≦
C 4.7uF 15.0% 25.0%
DC 25V ≦
C 2.2uF 15.0% 25.0%
DC 35V ≦
C 2.2uF 15.0% 25.0%
DC 50V ≦
C 3.9nF 10.0% 20.0%
0603 DC 6.3V C<4.7uF 10.0% 20.0%
≦
C 47uF 15.0% 25.0%
DC 10V C<4.7uF 10.0% 20.0%
≦
C 22uF 15.0% 25.0%
DC 16V ≦
C 2.2uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
DC 25V ≦
C 1.0uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 0.1uF 10.0% 20.0%
0805
DC 4V ≦
C 47uF 15.0% 25.0%
DC 6.3V C<10uF 10.0% 20.0%
≦
C 100uF 15.0% 25.0%
DC 10V C<4.7uF 10.0% 20.0%
≦
C 47uF 15.0% 25.0%
DC 16V ≦
C 4.7uF 10.0% 20.0%
≦
C 22uF 15.0% 25.0%
DC 25V ≦
C 4.7uF 10.0% 20.0%
C=10uF 10.0% 20.0%
≦
C 22uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 1.0uF 10.0% 20.0%
C=2.2uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
DC 6.3V <
C 10uF 10.0% 20.0%
1206
≦
C 100uF 15.0% 25.0%
DC 10V ≦
C 47uF 10.0% 20.0%
DC 16V ≦
C 22uF 15.0% 25.0%
DC 25V ≦
C 10uF 10.0% 20.0%
<≦
10uF C 22uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 4.7uF 10.0% 20.0%
≦
C 10uF 15.0% 25.0%
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Fig.1
P.C. Board for Bending Strength Test
C
40mm
Material : Glass Epoxy Substrate
A
: Copper (Thickness : 0.035mm)
B
: Solder Resist
100mm
1.6mm
Fig.2
Test Substrate
Solder Resist Copper C
100mm
Unit:mm
Type A B C
0201 0.2 0.9 0.4
0402 0.5 1.5 0.6
0603 1.0 3.0 1.0
0805 1.2 4.0 1.6
1206 2.2 5.0 2.0
1210 2.2 5.0 2.9
1808 3.5 7.0 2.5
1812 3.5 7.0 3.7
2208 4.5 8.0 2.5
2211 4.5 8.0 3.0
2220 4.5 8.0 5.6
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
8. Packing
8.1 Bulk Packing
According to customer request.
8.2 Chip Capacitors Tape Packing
Tape 1206
Material ≦
T 0.90mm 0.90mm <T≦1.25mm T >1.25mm
Paper 4,000 pcs/Reel NA NA
Plastic NA 3,000 pcs/Reel 2,000 pcs/Reel
Tape 1808/1210
Material T ≦1.25mm <≦
1.25mm T 2.40mm T >2.40mm
Paper NA NA NA
Plastic 3000 pcs/Reel 2000 pcs/Reel 500/1,000 pcs/Reel
165 to 180°
Top Tape
Bottom Tape
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
A F
G H
B
t C D E
Unit:mm
TYPE A B C D E
0201 0.37± 0.1 0.67± 0.1 4.00± 0.1 2.00± 0.05 2.00± 0.1
0402 0.61± 0.1 1.20± 0.1
0603 1.10± 0.2 1.90± 0.2 4.00± 0.1
0805 1.50± 0.2 2.30± 0.2
1206 1.90± 0.2 3.50± 0.2
1210 2.90± 0.2 3.60± 0.2
TYPE F G H I t
0201 1.75± 0.10 3.50± 0.05 8.0± 0.30 φ1.50 +0.10/-0 1.10 max.
0402
0603
0805
1206
1210
F
A
G H
B
t O C D E
J Unit:mm
Type A B C D E F
0805 1.5±0.2 2.3±0.2 4.0± 0.1 2.0± 0.05 4.0± 0.1 1.75± 0.1
1206 1.9±0.2 3.5±0.2
1210 2.9±0.2 3.6±0.2
1808 2.5±0.2 4.9±0.2
1812 3.6±0.2 4.9±0.2 8.0± 0.1
1825 ±
6.9 0.2 ±
4.9 0.2
2208 2.5±0.2 6.1±0.2
2211 3.2±0.2 6.1±0.2
2220 5.4±0.2 6.1±0.2
2225 ±
6.9 0.2 ±
6.1 0.2
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Type G H I J t O
0805 3.5± 0.05 8.0± 0.3 φ1.5+0.1/-0 3.0 max. 0.3 max. 1.0± 0.1
1206
1210
1808 5.5± 0.05 12.0 ± 0.3 4.0 max. 1.5± 0.1
1812
1825
2208
2211
2220
2225
A
W
Unit:mm
Type A B C D E W
0201 φ382 max φ50 min φ13± 0.5 φ21± 0.8 2.0±0.5 10± 0.15
0402
0603
0805
1206
1210
1808 φ178±0.2 φ60±0.2 ±
13 0.3
1812
1825
2208
2211
2220
2225
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Precautionary Notes:
1. Storage
Store the capacitors where the temperature and relative humidity don’t exceed 40°C and 70%RH. We
recommend that the capacitors be used within 12 months from the date of manufacturing. Store the products in
the original package and do not open the outer wrapped, polyethylene bag, till just before usage. If it is open, seal
it as soon as possible or keep it in a desiccant with a desiccation agent.
2.2 Mechanical strength varies according to location of chip capacitors on the P.C. board.
Design layout of components on the PC board such a way to minimize the stress imposed on the
components, upon flexure of the boards in depanelization or other processes.
Component layout close to the edge of the board or the “depanelization line” is not recommended.
Susceptibility to stress is in the order of: a>b>c and d>e
e b
perforation slit
c
a d
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Adhesive
PCB Solder Land
α
Adhesive
Solder Land β
α>β
PCB
3. Mounting
3.1 Sometimes crack is caused by the impact load due to suction nozzle in pick and place operation.
In pick and place operation, if the low dead point is too low, excessive stress is applied to component. This may
cause cracks in the ceramic capacitor, therefore it is required to move low dead point of a suction nozzle to the
higher level to minimize the board warp age and stress on the components. Nozzle pressure is typically
adjusted to 1N to 3N (static load) during the pick and place operation.
Nozzle
PCB
Crack
Support pin
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
4. Soldering
4.1. Wave Soldering
Most of components are wave soldered with solder at 230 to 250°C. Adequate care must be taken to prevent
the potential of thermal cracks on the ceramic capacitors. Refer to the soldering methods below for optimum
soldering benefits.
Recommend flow soldering temperature Profile
Soldering
Pre-heating Cooling
300
Soldering Method ℃
Change in Temp.( )
250
230
1206 and Under ΔT ≤ 100~130 max.
200
ΔT
Temperature (°C)
120seconds or more
60seconds or more
2 to 3 sec.
To optimize the result of soldering, proper preheating is essential:
1) Preheat temperature is too low
a. Flux flows to easily
b. Possibility of thermal cracks
2) Preheat temperature is too high
a. Flux deteriorates even when oxide film is removed
b. Causes warping of circuit board
c. Loss of reliability in chip and other components
Cooling Condition:
Natural cooling using air is recommended. If the chips are dipped into a solvent for cleaning, the temperature
Δ
difference ( T) between the solvent and the chips must be less than 100°C.
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
350
Soldering Method Change in Temp.( ℃)
1206 and Under Δ ≦
T 150 ℃
250
1210 and Over Δ ≦
T 130 ℃
200
ΔT
Temperature (°C)
Within 5 seconds.
Bending
→
Twist
5.2 There is a potential of crack if board is warped due to excessive load by check pin
╳ ○ Support Pin
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MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605
Crack
Crack
Floor
6.2 In piling and stacking of the P.C. boards after mounting for storage or handling, the corner of the P.C. board
may hit the chip capacitor mounted on another board to cause crack.
PCB
Crack
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