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Holy Stone MLCC

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0% found this document useful (0 votes)
66 views17 pages

Holy Stone MLCC

Uploaded by

d1014163023
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 17

MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

1. Scope
This specification is applied to Multilayer Ceramic Chip Capacitor(MLCC) for use in electric equipment
for the voltage is ranging from 4V to 50V.

The series suitable for general electrics circuit, telecommunications, personal computers and peripheral,
power circuit and mobile application. (This product is compliant with the RoHS.)

2. Parts Number Code


e

C 1206 X 105 K 025 T

(1) (2) (3) (4) (5) (6) (7)

(1)Product (4)Capacitance unit :pico farads(pF)


Product Code Code Nominal Capacitance (pF)
C Multilayer Ceramic Chip Capacitor 5R0 5.0
120 12.0
151 150.0
(2)Chip Size
222 2,200.0
Code Length×Width unit : mm(inch) 473 47,000.0
0201 0.60× 0.30 (.024× .011) 224 220,000.0
0402 1.00× 0.50 (.039× .020) 105 1,000,000.0
0603 1.60× 0.80 (.063× .031) 106 10,000,000.0
0805
1206
2.00× 1.25 (.079× .049)
3.20× 1.60 (.126× .063)
※ . If there is a decimal point, it shall be expressed by an
English capital letter R
1210 3.20× 2.50 (.126× .098)
1808 4.60× 2.00 (.181× .079) (5)Capacitance Tolerance
1812 4.60× 3.20 (.181× .125) Code Tolerance Nominal Capacitance
1825 4.60× 6.35 (.181× .250) B ± 0.10 pF Less Than 10 pF
2208 5.70× 2.00 (.220× .197) C ± 0.25 pF (Include 10 pF)
2211 5.70× 2.80 (.220× .110) D ± 0.50 pF
2220 5.70× 5.00 (.220× .197) E ± 1.00 pF
2225 5.70× 6.35 (.220× .250) F ± 1.00 % More Than 10 pF
G ± 2.00 %
(3)Temperature Characteristics J ± 5.00 %
K ± 10.0 %
Code Temperature Temperature Temperature
Characteristic Range Coefficient M ± 20.0 %
N NPO ℃
-55 ~+125 ℃ 30 ppm/℃ Z +80/-20 %
X X7R ℃
-55 ~+125 ℃ ± 15%
B X5R ℃
-55 ~+85 ℃ ± 15%
(6)Rated Voltage
R X7S ℃
-55 ~+125 ℃ ± 22%
Code Rated Voltage (Vdc)
S X6S ℃
-55 ~+105 ℃ ± 22%
004 4
D X5S ℃
-55 ~+85 ℃ ± 22%
007 6.3
Y Y5V ℃
-30 ~+85 ℃ +22/-82%
010 10
Z Z5U ℃
+10 ~+85 ℃ +22/-56%
016 16
E Y5U ℃
-30 ~+85 ℃ +22/-56%
025
035
25
35
050 50

(7)Tapping
Code Type
T Tape & Reel
B Bulk
Page : 1 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

3. Nominal Capacitance and Tolerance


3.1 Standard Combination of Nominal Capacitance and Tolerance
Class Characteristic Tolerance Nominal Capacitance
Ⅰ NPO Less Then 10 pF B (± 0.10 pF) 0.5,1,1.5,2,2.5,3
C (± 0.25 pF) 0.5,1,1.5,2,2.5,3,3.5,4,4.5,5
D (± 0.50 pF) 5,6,7,8,9,10
E (± 1.00 pF) 6,7,8,9,10
More Than 10 pF F (±1.00 %) E-12, E-24 series
G (±2.00 %)
J (± 5.00 %)
K (± 10.0 %)
Ⅱ X7R/ X7S/ X5R K (± 10.0 %), M (± 20.0 %) E-3, E-6 series
X6S/ X5S
Y5V M (± 20.0 %), Z( +80/-20 %) E- 3 series
Z5U
Y5U
3.2 E series(standard Number)
Standard No. Application Capacitance
E- 3 1.0 2.2 4.7
E- 6 1.0 1.5 2.2 3.3 4.7 6.8
E-12 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2
E-24 1.0 1.2 1.5 1.8 2.2 2.7 3.3 3.9 4.7 5.6 6.8 8.2
1.1 1.3 1.6 2.0 2.4 3.0 3.6 4.3 5.1 6.2 7.5 9.1

4. Operation Temperature Range


Class Characteristic Temperature Range Reference Temp.
Ⅰ NPO (N) ℃
-55 ~ +125 ℃ ℃
25
Ⅱ X7R (X) ℃
-55 ~ +125 ℃ ℃
25
X7S (R) ℃
-55 ~ +125 ℃ ℃
25
X5R (B) ℃
-55 ~ +85 ℃ ℃
25
X5S (D) -55 ℃~ +85 ℃ ℃
25
X6S (S) -55 ℃
~ +105 ℃ ℃
25
Y5V (Y) -30 ℃~ +85 ℃ ℃
25
Z5U (Z) +10 ℃~ +85 ℃ ℃
25
Y5U (E) -30 ℃~ +85 ℃ ℃
25
Other -25 ℃~ +85 ℃ ℃
25

5. Storage Condition

Storage Temperature 5 to 40 ℃

Relative Humidity 20 to 70 %

Storage Time 12 months max.

Page : 2 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

6. Dimensions
6.1 Configuration and Dimension :
BW B

L
Unit:mm
TYPE L W T (max) B (min) BW (min)
0201 0.60± 0.03 0.30± 0.03 0.33 0.20 0.10
0402 1.00± 0.05 0.50± 0.05 0.55 0.30 0.15
0603 1.60± 0.10 0.80± 0.10 1.00 0.40 0.15
0805 2.00± 0.20 1.25± 0.20 1.45 0.70 0.20
1206 3.20± 0.30 1.60± 0.20 1.80 1.50 0.30
1210 3.20± 0.30 2.50± 0.20 2.60 1.60 0.30
1808 4.60± 0.30 2.00± 0.20 2.20 2.50 0.30
1812 4.60± 0.30 3.20± 0.30 3.00 2.50 0.30
1825 4.60± 0.30 6.35± 0.40 2.60 2.50 0.30
2208 5.70± 0.40 2.00± 0.20 2.20 3.50 0.30
2211 5.70± 0.40 2.80± 0.40 3.00 3.50 0.30
2220 5.70± 0.40 5.00± 0.40 3.00 3.50 0.30
2225 5.70± 0.40 6.35± 0.40 3.00 3.50 0.30

6.2 Termination Type :

Solder Metal

Barrier
External Electrodes
Inner Electrodes

Ceramic Body

Page : 3 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

7. Performance
No. Item Specification Test Condition
1 Visual No abnormal exterior appearance Visual Inspection
2 Dimension See Page 3 Visual Inspection
3 Insulation 10,000MΩ or 500/C Ω whichever is smaller Applied Voltage: Rated Voltage
Resistance for rated voltage>10V and greater 100/C Ω Charge Time : 60±5 sec.
for rated voltage≤10V. Charge-Discharge current shall be less than 50mA
current.
4 Capacitance Within The Specified Tolerance Class Ⅰ:
5 Q Class ≧
More Than 30pF : Q 1000 Char Frequency Voltage
Ⅰ ≧
30pF & Below: Q 400+20C ≦
C 1000pF 1MHz 10% ± 1.0 0.2Vrms ±
(C : Capacitance , pF) >
C 1000pF 1KHz 10% ±
Tan δ Class X7R/X7S/X6S/X5R/X5S: shell meet the Class Ⅱ:
Ⅱ value in table 1 Char Frequency Voltage
Y5V/Y5U/Z5U : 0.2 max. ≦
C 10uF 1KHz 10% ± *1.0 0.2Vrms ±
or 0.5 0.2Vrms ±

C 10uF 120Hz 20% ± 0.5 0.2Vrms ±
±℃
Perform a heat temperature at 150 5 for 30min
then place room temp. for 24 2hr. ±
* Depend on the individual parts.
6 Withstanding No dielectric breakdown or mechanical 250% of the rated voltage for 1~5 sec.
Voltage breakdown charge/discharge Current is less than 50mA.
7 Temperature Class Ⅰ Char. Temp. Range Cap. Change(%) Class Ⅰ:
Capacitance ℃ ℃
NPO -55 ~+125 ± 30 ppm/ ℃ -
C2 C1 ×100%
Coefficient Class Char. Temp. Range Cap. Change(%) -
C1(T2 T1)
Ⅱ -55℃~+125℃
X7R
-55℃~+125℃
± 15%
Class Ⅱ:
X7S
X6S -55℃~+105℃
± 22%
± 22%
C2 -C1 ×100%
-55℃~+85℃
C1
X5R ± 15%
X5S -55℃~+85℃ ± 22% T1: Standard Temperature(25 ) ℃
-30℃~+85℃ T2: Test Temperature
℃)
Y5V +22% ~-82%
Y5U -30℃~+85℃ +22% ~-56% C1:Capacitance At Standard Temperature(25
Z5U +10℃~+85℃ +22% ~-56% C2: Capacitance At Test Temperature (T2)
0.2Vrms shall be applied.
8 Adhesive Strength No indication of peeling shall occur on the Pull force shall be applied for 10± 1 second.
Of Termination terminal electrode. ≦ ≒
0603----5N( 0.5 Kg·f)
> ≒
0603----10N( 1.0 Kg·f)

N·f
.

9 Resistance Appear- No mechanical damage or capacitance The board shall be bend 1.0mm with a rate of 1.0
to ance change more than the following table. mm/sec.
Flexure R230
Capacitance Change Bending
of Substrate C-Meter Limit
Char. Cap. Change
NPO(N) ≦ ± 5.0% of initial value C Meter
X7R (X)
X7S (R) 45±1mm 45±1mm
X6S (S) ≦ ± 12.5% of initial value
X5R (B)
X5S (D)
Y5V (Y) ≦ ± 30.0% of initial value
Y5U (E)
Z5U (Z)
Page : 4 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

No. Item Specification Test Condition

10 Solderability More than 90% of the terminal surface is to be Solder Temperature : 245± 5 ℃
soldered newly, so metal part does not come out Dip Time : 5 ± 0.5sec
or dissolve. Immersing Speed : 25±10% mm/s
Solder : Lead Free Solder
Flux :Rosin
Preheat : At 80~120 ℃for 10~30sec.
11 Resistance Appear- No mechanical damage shall occur. Ⅱ
Class capacitor shall be set for 48±4 hours
at room temperature after one hour heat
To
Soldering
ance
Capacit- Class Ⅰ Within ± 2.5% or ± 0.25pF

treatment at 150 +0/-10 before initial
measure.
Preheat : at 150± 10℃ for 60~120sec.
Heat ance (NPO) whichever is larger of initial

Dip : solder temperature of 260± 5℃


value
X7R/X7S/X6S ±
≤ 7.5% of initial value
Dip Time : 10 ± 1sec.
X5R/X5S
Y5V/Y5U/Z5U ±
≤ 20% of initial value
Immersing Speed : 25±10% mm/s
Flux :Rosin
Q To satisfy the specified initial value
ClassⅠ Measure at room temperature after cooling for
Tanδ
X7R/X7S/X6S/X5R/X5S: shell meet the value in Ⅰ
Class : 24 ± 2 Hours
ClassⅡ
table 1 Ⅱ
Class : 48 ± 4 Hours
Y5V/Y5U/Z5U : 0.2 max.
Insulation To satisfy the specified initial value
Resistance
12 Tempera-. Appear- No mechanical damage shall occur. Ⅱ
Class capacitor shall be set for 48±4 hours at
ture ance room temperature after one hour heat
Cycle Capacit- Class Ⅰ Within ± 2.5% or ± 0.25pF ℃
treatment at 150 +0/-10 before initial
ance (NPO) whichever is larger of initial measure.
value Capacitor shall be subjected to five cycles of
X7R/X7S/X6S ±
≤ 7.5% of initial value the temperature cycle as following:
X5R/X5S
Y5V/Y5U/Z5U ±
≤ 20% of initial value
Step Temp.( ℃) Time(min)
1 Min Rated Temp. +0/-3 30
Q To satisfy the specified initial value
ClassⅠ 2 25 3
Tan δ X7R/X7S/X6S/X5R/X5S: shell meet the value in 3 Max Rated Temp. +3/-0 30
ClassⅡ table 1 4 25 3
Y5V/Y5U/Z5U : 0.2 max. Measure at room temperature after cooling for
±
ClassⅠ: 24 2 Hours
Insulation
Resistance
To satisfy the specified initial value
ClassⅡ: 48 ± 4 Hours
13 Humidity Appear- No mechanical damage shall occur. Ⅱ
Class capacitor shall be set for 48± 4 hours
ance at room temperature after one hour heat
Capacit- Characteristic Cap. Change treatment at 150 +0/-10 ℃
before initial
ance Class Ⅰ Within ± 5.0% or ± 0.5pF measure.


(NPO) whichever is larger of initial
value Temperature : 40± 2
X7R/X7S/X6S ±
≤ 12.5% of initial value Relative Humidity : 90 ~ 95%RH
X5R/X5S Test Time : 500 Hrs Max.
Y5V/Y5U/Z5U ±
≤ 30% of initial value
Q ≧
30pF & Over : Q 350 Measure at room temperature after cooling for

Ⅰ ≧ Class : 24 ± 2 Hours

10 to 30pF : Q 275+2.5C

Class
30pF & Below: Q 200+10C Class : 48 ± 4 Hours
Tan δ X7R/X7S/X6S/X5R/X5S: shell meet the value in
Class Ⅱ table 1
Y5V/Y5U/Z5U : 0.4 max.
Insulation 1000MΩ or 50/C Ω whichever is smaller for
Resistance rated voltage>10V and greater 10/C Ω for rated

voltage 10V. (C in Farad)

Page : 5 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

No. Item Specification Test Condition


14 Humidity Appear- No mechanical damage shall occur. Ⅱ
Class capacitors applied DC voltage of the
Load ance rated voltage is applied for one hour at maximum
Capacit- Characteristic Cap. Change operation temperature then shall be set for 48± 4
ance Class Ⅰ Within ± 7.5% or ± 0.75pF hours at room temperature and the initial
(NPO) whichever is larger of measurement shall be conducted.
initial value Applied Voltage :Rated Voltage
X7R/X7S/X6S ≤ ±
12.5% of initial value Temperature : 40± 2 ℃
X5R/X5S Relative Humidity : 90 ~ 95%RH
Y5V/Y5U/Z5U ≤ ±
30% of initial value Test Time : 500 Hrs Max.
Q 30pF & Over : Q 350≧ Current Applied : 50 mA Max.
Ⅰ ≧
10 to 30pF : Q 275+2.5C

Class
30pF & Below: Q 200+10C Measure at room temperature after cooling for
Tanδ Ⅰ
Class : 24 ± 2 Hours
ClassⅡ
X7R/X7S/X6S/X5R/X5S: shell meet the value in
table 1 Ⅱ
Class : 48 ± 4 Hours
Y5V/Y5U/Z5U : 0.4 max.
Insulation 500MΩ or 25/C Ω whichever is smaller for
Resistance rated voltage>10V and greater 5/C Ω for rated

voltage 10V. (C in Farad)
15 High Appear- No mechanical damage shall occur. The capacitors applied DC testing voltage is
Temperature ance applied for one hour at maximum operation
Load Capacit- Characteristic Cap. Change temperature then shell be set for 48± 4 hours at
(Life Test) ance Class Ⅰ Within 5.0% or 0.5pF ± room temperature and the initial measurement
(NPO) whichever is larger of shall be conducted.
initial value
±
Applied Voltage: Rated Voltage
X7R/X7S/X6S ≤ 12.5% of initial value However:
X5R/X5S Ⅰ
The class applied voltage 200% of rated
Y5V/Y5U/Z5U ±
≤ 30% of initial value voltage.
Q 30pF & Over : Q 350 ≧ Temperature: max. operation temperature
Ⅰ ≧
10 to 30pF : Q 275+2.5C Test Time : 1000 Hrs Max.

Class
30pF & Below: Q 200+10C Current Applied : 50mA Max
Tan δ X7R/X7S/X6S/X5R/X5S: shell meet the value in Measure at room temperature after cooling for
Class Ⅱ table 1 Ⅰ
Class : 24 ± 2 Hours
Y5V/Y5U/Z5U : 0.4 max. Ⅱ
Class : 48 ± 4 Hours
Insulation 1,000MΩ or 50/C Ω whichever is smaller for
Resistance rated voltage>10V and greater 10/C Ω for rated

voltage 10V. (C in Farad)
16 Vibration Appear- No mechanical damage shall occur Solder the capacitor on P.C. board.
ance
Vibrate the capacitor with amplitude of
Capacit- Within the specified tolerance
1.5mm P-P changing the frequencies
ance from 10Hz to 55Hz and back to 10Hz
Q To satisfy the specified initial value in about 1 min.
Class Ⅰ
Tan δ X7R/X7S/X6S/X5R/X5S: shell meet the value in Repeat this for 2 hours each in 3 perpendicular
Class Ⅱ table 1 directions.
Y5V/Y5U/Z5U : 0.2 max.

Page : 6 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

Table 1
Temp char: X7R,X7S,X6S,X5R,X5S
Tanδ (MAX)
Rated voltage Capacitance 5. Initial 13.Humidity
Range 16.Vibration 14.Humidity loading
11.Resistance to solder heat 15.High temperature loading
12.Temperature cycle
0201 DC 4V All Capacitance 15.0% 25.0%
DC 6.3V ≦
C 0.01uF 10.0% 20.0%

0.1uF =C 2.2uF 15.0% 25.0%
DC 10V ≦
C 0.01uF 10.0% 20.0%
DC 16V ≦
C 3.3nF 10.0% 20.0%
DC 25V ≦
C 2.2nF 10.0% 20.0%
DC 50V ≦
C 1nF 10.0% 20.0%
0402 DC 4V ≦
C 10uF 10.0% 20.0%
DC 6.3V ≦
C 0.22uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 10V ≦
C 0.1uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 16V ≦
C 4.7uF 15.0% 25.0%
DC 25V ≦
C 2.2uF 15.0% 25.0%
DC 35V ≦
C 2.2uF 15.0% 25.0%
DC 50V ≦
C 3.9nF 10.0% 20.0%
0603 DC 6.3V C<4.7uF 10.0% 20.0%

C 47uF 15.0% 25.0%
DC 10V C<4.7uF 10.0% 20.0%

C 22uF 15.0% 25.0%
DC 16V ≦
C 2.2uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 25V ≦
C 1.0uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 0.1uF 10.0% 20.0%
0805
DC 4V ≦
C 47uF 15.0% 25.0%
DC 6.3V C<10uF 10.0% 20.0%

C 100uF 15.0% 25.0%
DC 10V C<4.7uF 10.0% 20.0%

C 47uF 15.0% 25.0%
DC 16V ≦
C 4.7uF 10.0% 20.0%

C 22uF 15.0% 25.0%
DC 25V ≦
C 4.7uF 10.0% 20.0%
C=10uF 10.0% 20.0%

C 22uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 1.0uF 10.0% 20.0%
C=2.2uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 6.3V <
C 10uF 10.0% 20.0%
1206

C 100uF 15.0% 25.0%
DC 10V ≦
C 47uF 10.0% 20.0%
DC 16V ≦
C 22uF 15.0% 25.0%
DC 25V ≦
C 10uF 10.0% 20.0%
<≦
10uF C 22uF 15.0% 25.0%
DC 35V ≦
C 10uF 15.0% 25.0%
DC 50V ≦
C 4.7uF 10.0% 20.0%

C 10uF 15.0% 25.0%

Page : 7 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

1210 DC 4V C=100uF 15.0% 25.0%


DC 6.3V ≦
C 47uF 10.0% 20.0%

47uF C ≦220uF 15.0% 25.0%
DC 10V ≦
C 22uF 10.0% 20.0%

22uF C ≦47uF 15.0% 25.0%
C=100uF 15.0% 25.0%
DC 16V ≦
C 10uF 10.0% 20.0%

10uF C ≦47uF 15.0% 25.0%
DC 25V ≦
C 10uF 10.0% 20.0%

10uF C ≦22uF 15.0% 25.0%
DC 35V ≦
C 4.7uF 10.0% 20.0%

C 10uF 15.0% 25.0%
DC 50V ≦
C 10uF 10.0% 20.0%

C 22uF 15.0% 25.0%
DC 6.3V 10.0% 20.0%
1812 DC 10V 10.0% 20.0%
DC 16V 10.0% 20.0%
All Capacitance
DC 25V 10.0% 20.0%
DC 35V 10.0% 20.0%
DC 50V 10.0% 20.0%
2220 DC 50V All Capacitance 10.0% 20.0%

Page : 8 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

Fig.1
P.C. Board for Bending Strength Test

Solder Resist Copper

C
40mm
Material : Glass Epoxy Substrate
A
: Copper (Thickness : 0.035mm)
B
: Solder Resist
100mm
1.6mm
Fig.2
Test Substrate
Solder Resist Copper C

Material : Glass Epoxy Substrate


40mm A B : Copper (Thickness : 0.035mm)
: Solder Resist
Thickness : 1.6 mm

100mm

Unit:mm
Type A B C
0201 0.2 0.9 0.4
0402 0.5 1.5 0.6
0603 1.0 3.0 1.0
0805 1.2 4.0 1.6
1206 2.2 5.0 2.0
1210 2.2 5.0 2.9
1808 3.5 7.0 2.5
1812 3.5 7.0 3.7
2208 4.5 8.0 2.5
2211 4.5 8.0 3.0
2220 4.5 8.0 5.6

Page : 9 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

8. Packing
8.1 Bulk Packing
According to customer request.
8.2 Chip Capacitors Tape Packing

Empty Section Chip Section Empty Section


40mm min. 20mm min.

Drawing Direction 400mm min.

8.3 Material And Quantity

Tape 0201 0402 0603/0805


Material ≦
T 0.33mm ≦
T 0.55mm ≦
T 0.90mm >
T 0.90mm
Paper 15,000 pcs/Reel 10,000 pcs/Reel 4,000 pcs/Reel NA
Plastic NA NA NA 3,000 pcs/Reel

Tape 1206
Material ≦
T 0.90mm 0.90mm <T≦1.25mm T >1.25mm
Paper 4,000 pcs/Reel NA NA
Plastic NA 3,000 pcs/Reel 2,000 pcs/Reel

Tape 1808/1210
Material T ≦1.25mm <≦
1.25mm T 2.40mm T >2.40mm
Paper NA NA NA
Plastic 3000 pcs/Reel 2000 pcs/Reel 500/1,000 pcs/Reel

Tape 1812/2211/2220 1825/2225 2208


≦ >
Material T 2.20mm T 2.20mm T 2.20mm T 2.20mm ≦ >
T 2.20mm ≦
Paper NA NA NA NA NA
Plastic 1000 pcs/Reel 700 pcs/Reel 700 pcs/Reel 400 pcs/Reel 1000 pcs/Reel

NA Not Available

8.4 Cover Tape Reel Off Force


8.4.1 Peel-Off Force
5 g·f ≦Peel-Off Force ≦70 g·f
8.4.2 Measure Method

165 to 180°
Top Tape

Bottom Tape

Page : 10 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

8.5 Paper Tape Pitch Hold I Chip Inserting Hole

A F

G H
B

t C D E

Unit:mm
TYPE A B C D E
0201 0.37± 0.1 0.67± 0.1 4.00± 0.1 2.00± 0.05 2.00± 0.1
0402 0.61± 0.1 1.20± 0.1
0603 1.10± 0.2 1.90± 0.2 4.00± 0.1
0805 1.50± 0.2 2.30± 0.2
1206 1.90± 0.2 3.50± 0.2
1210 2.90± 0.2 3.60± 0.2

TYPE F G H I t
0201 1.75± 0.10 3.50± 0.05 8.0± 0.30 φ1.50 +0.10/-0 1.10 max.
0402
0603
0805
1206
1210

8.6 Plastic Tape

Pitch Hold I Chip Inserting Hole

F
A
G H
B

t O C D E

J Unit:mm
Type A B C D E F
0805 1.5±0.2 2.3±0.2 4.0± 0.1 2.0± 0.05 4.0± 0.1 1.75± 0.1
1206 1.9±0.2 3.5±0.2
1210 2.9±0.2 3.6±0.2
1808 2.5±0.2 4.9±0.2
1812 3.6±0.2 4.9±0.2 8.0± 0.1
1825 ±
6.9 0.2 ±
4.9 0.2
2208 2.5±0.2 6.1±0.2
2211 3.2±0.2 6.1±0.2
2220 5.4±0.2 6.1±0.2
2225 ±
6.9 0.2 ±
6.1 0.2

Page : 11 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

Type G H I J t O
0805 3.5± 0.05 8.0± 0.3 φ1.5+0.1/-0 3.0 max. 0.3 max. 1.0± 0.1
1206
1210
1808 5.5± 0.05 12.0 ± 0.3 4.0 max. 1.5± 0.1
1812
1825
2208
2211
2220
2225

8.7 Reel Dimensions


:Polystyrene
Reel Material

A
W
Unit:mm
Type A B C D E W
0201 φ382 max φ50 min φ13± 0.5 φ21± 0.8 2.0±0.5 10± 0.15
0402
0603
0805
1206
1210
1808 φ178±0.2 φ60±0.2 ±
13 0.3
1812
1825
2208
2211
2220
2225

Page : 12 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

Precautionary Notes:
1. Storage
Store the capacitors where the temperature and relative humidity don’t exceed 40°C and 70%RH. We
recommend that the capacitors be used within 12 months from the date of manufacturing. Store the products in
the original package and do not open the outer wrapped, polyethylene bag, till just before usage. If it is open, seal
it as soon as possible or keep it in a desiccant with a desiccation agent.

2. Construction of Board Pattern


Improper circuit layout and pad/land size may cause excessive or not enough solder amount on the PC board. Not
enough solder may create weak joint, and excessive solder may increase the potential of mechanical or thermal
cracks on the ceramic capacitor. Therefore we recommend the land size to be as shown in the following table: 2.1
Size and recommend land dimensions for reflow soldering

Chip (mm) Land (mm)


EIA Code
Capacitor Slit Land L W A B C D E
C
0201 0.60 0.30 0.2~0.3 0.2~0.4 0.2~0.4 -- --
0402 1.00 0.50 0.3~0.5 0.3~0.5 0.4~0.6 -- --
0603 1.60 0.80 0.4~0.6 0.6~0.7 0.6~0.8 -- --
0805 2.00 1.25 0.7~0.9 0.6~0.8 0.8~1.1 -- --
E 1206 3.20 1.60 2.2~2.4 0.8~0.9 1.0~1.4 1.0~2.0 3.2~3.7
1210 3.20 2.50 2.2~2.4 1.0~1.2 1.8~2.3 1.0~2.0 4.1~4.6
1808 4.60 2.00 2.8~3.4 1.8~2.0 1.5~1.8 1.0~2.8 3.6~4.1
1812 4.60 3.20 2.8~3.4 1.8~2.0 2.3~3.0 1.0~2.8 4.8~5.3
1825 4.60 6.35 2.8~3.4 1.8~2.0 5.1~5.8 1.0~4.0 7.1~8.3
2208 5.70 2.00 4.0~4.6 2.0~2.2 1.5~1.8 1.0~4.0 3.6~4.1
Solder Resistor
D 2211 5.70 2.80 4.0~4.6 2.0~2.2 2.0~2.6 1.0~4.0 4.4~4.9
2220 5.70 5.00 4.0~4.6 2.0~2.2 3.5~4.8 1.0~4.0 6.6~7.1
B A 2225 5.70 6.35 4.0~4.6 2.0~2.2 5.1~5.8 1.0~4.0 7.1~8.3

2.2 Mechanical strength varies according to location of chip capacitors on the P.C. board.
Design layout of components on the PC board such a way to minimize the stress imposed on the
components, upon flexure of the boards in depanelization or other processes.

Component layout close to the edge of the board or the “depanelization line” is not recommended.
Susceptibility to stress is in the order of: a>b>c and d>e

e b

perforation slit
c

a d

Page : 13 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

2.3 Layout Recommendation

Example Use of Common Solder With Chassis Use of Common Solder


Solder Land Land With Other SMD
Need to Avoid Lead Wire Chassis
Chip Solder Excessive
Solder Solder Land

Adhesive
PCB Solder Land
α

Recommendation Lead Wire Solder Resist


Chip Solder Resist

Adhesive
Solder Land β
α>β
PCB

3. Mounting
3.1 Sometimes crack is caused by the impact load due to suction nozzle in pick and place operation.
In pick and place operation, if the low dead point is too low, excessive stress is applied to component. This may
cause cracks in the ceramic capacitor, therefore it is required to move low dead point of a suction nozzle to the
higher level to minimize the board warp age and stress on the components. Nozzle pressure is typically
adjusted to 1N to 3N (static load) during the pick and place operation.

Excessive Stress Warping of Board Warping of Board

Nozzle
PCB
Crack

Support pin

3.2 Amount of Adhesive


a a
b Example : 0805 & 1206
a 0.2mm min.
b 70 ~ 100 µm
c Do not touch the solder land
c c

Page : 14 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

4. Soldering
4.1. Wave Soldering
Most of components are wave soldered with solder at 230 to 250°C. Adequate care must be taken to prevent
the potential of thermal cracks on the ceramic capacitors. Refer to the soldering methods below for optimum
soldering benefits.
Recommend flow soldering temperature Profile
Soldering
Pre-heating Cooling
300
Soldering Method ℃
Change in Temp.( )
250
230
1206 and Under ΔT ≤ 100~130 max.

200
ΔT
Temperature (°C)

120seconds or more
60seconds or more
2 to 3 sec.
To optimize the result of soldering, proper preheating is essential:
1) Preheat temperature is too low
a. Flux flows to easily
b. Possibility of thermal cracks
2) Preheat temperature is too high
a. Flux deteriorates even when oxide film is removed
b. Causes warping of circuit board
c. Loss of reliability in chip and other components

Cooling Condition:
Natural cooling using air is recommended. If the chips are dipped into a solvent for cleaning, the temperature
Δ
difference ( T) between the solvent and the chips must be less than 100°C.

4.2 Reflow Soldering


Preheat and gradual increase in temperature to the reflow temperature is recommended to decrease the
potential of thermal crack on the components. The recommended heating rate depends on the size of
component, however it should not exceed 3°C/Sec.
Recommend reflow profile for Lead-Free soldering temperature Profile (MIL-STD-202G #210F)
Pre-heating Soldering Cooling

260°C max./10sec. ※ The cycles of soldering : Twice (max.)


Change in Temp.( ℃)
260max.
Min. Soldering Method
217 1206 and Under ΔT ≦ 190 ℃
ΔT 1210 and Over ΔT ≦ 130 ℃
Temperature (°C)

150°C /60sec. Min. 70 to 90 sec.

Page : 15 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

4.3 Hand Soldering


Sudden temperature change in components, results in a temperature gradient recommended in the following
table, and therefore may cause internal thermal cracks in the components. In general a hand soldering method
is not recommended unless proper preheating and handling practices have been taken. Care must also be
taken not to touch the ceramic body of the capacitor with the tip of solder Iron.

350
Soldering Method Change in Temp.( ℃)
1206 and Under Δ ≦
T 150 ℃
250
1210 and Over Δ ≦
T 130 ℃
200

ΔT
Temperature (°C)

Within 5 seconds.

How to Solder Repair by Solder Iron


1) Selection of the soldering iron tip
The required temperature of solder iron for any type of repair depends on the type of the tip, the substrate
material, and the solder land size.
2) recommended solder iron condition

a.) Preheating Condition Board and components should be preheated sufficiently at 150°C or over,
and soldering should be conducted with soldering iron as boards and components are maintained
at sufficient temperatures.
b.) Soldering iron power shall not exceed 30 W.
c.) Soldering iron tip diameter shall not exceed 3mm.
d.) Temperature of iron tip shall not exceed 350°C to perform the process within 5 seconds.
(refer to MIL-STD-202G)
f.) Do not touch the ceramic body with the tip of solder iron. Direct contact of the soldering iron tip to ceramic
body may cause thermal cracks.
g.) After soldering operation, let the products cool down gradually in the room temperature.
5. Handling after chip mounted
5.1 Proper handling is recommended, since excessive bending and twist of the board, depends on the orientation
of the chip on the board, may induce mechanical stress and cause internal crack in the capacitor.
Higher potential of crack Lower potential of crack

Bending

Twist

5.2 There is a potential of crack if board is warped due to excessive load by check pin
╳ ○ Support Pin

Check pin Check pin

Page : 16 /17
MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1605

5.3 Mechanical stress due to warping and torsion.


(a) Crack occurrence ratio will be increased by manual separation.
(b) Crack occurrence ratio will be increased by tensile force , rather than compressive force.
╳ :Tensile Stresss ○ :Compressive Stress

Crack

6.. Handling of Loose Chip Capacitor


6.1 If dropped the chip capacitor may crack.

Crack
Floor

6.2 In piling and stacking of the P.C. boards after mounting for storage or handling, the corner of the P.C. board
may hit the chip capacitor mounted on another board to cause crack.

PCB
Crack

7. Safekeeping condition and period


For
or safekeeping of the products, we recommend to keep the storage temperature between +5 to +40°C and
under humidity of 20 to 70%
% RH. The shelf life of capacitors is 12 months.

Page : 17 /17

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