Unit-2 VLSI Circuit Design Processes

MOS LAYERS
MOS design is aimed at turning a specification into masks for processing silicon to meet the
specification. We have seen that MOS circuits are formed on four basic layers
 N-diffusion
 P-diffusion
 Poly Si
 Metal
which are isolated from one another by thick or thin (thinox) silicon silicon dioxide insulating
layers. The thin oxide (thinox) mask region includes n-diffusion, p-diffusion, and transistor
channels. Polysilicon and thinox regions interact so that a transistor is formed where they cross
one another.
STICK DIAGRAMS

A stick diagram is a diagrammatic representation of a chip layout that helps to abstract a model
for design of full layout from traditional transistor schematic. Stick diagrams are used to convey
the layer information with the help of a color code.
“A stick diagram is a cartoon of a layout.”
The designer draws a freehand sketch of a layout, using colored lines to represent the various
process layers such as diffusion, metal and polysilicon. Where polysilicon crosses diffusion,
transistors are created and where metal wires join diffusion or polysilicon, contacts are formed.
For example, in the case of nMOS design,
 Green color is used for n-diffusion
 Red for polysilicon
 Blue for metal
 Yellow for implant, and black for contact areas.
Monochrome encoding is also used in stick diagrams to represent the layer information.

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Unit-2 VLSI Circuit Design Processes

Stick Diagrams –NMOS Encoding

NMOS ENCODING

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CMOS ENCODING

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Stick Diagrams – Some Rules

Rule 1:

When two or more ‘sticks’ of the same type cross or touch each other that represents
electrical contact.

Rule 2:
When two or more “sticks” of different type cross or touch each other there is no electrical
contact. (If electrical contact is needed we have to show the connection explicitly)

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Unit-2 VLSI Circuit Design Processes

Rule 3:

When a poly crosses diffusion it represents a transistor.

Note: If a contact is shown then it is not a transistor.

Rule 4:

In CMOS a demarcation line is drawn to avoid touching of p-diff with n-diff. All PMOS must lie
on one side of the line and all NMOS will have to be on the other side.

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Unit-2 VLSI Circuit Design Processes

nMOS Design Style :

To understand the design rules for nMOS design style , let us consider a single metal, single

polysilicon nMOS technology.

The layout of nMOS is based on the following important features.

 n-diffusion [n-diff.] and other thin oxide regions [thinox] (green) ;

 polysilicon 1 [poly.]-since there is only one polysilicon layer here (red);

 metal 1 [metal]-since we use only one metal layer here (blue);

 implant (yellow);

 contacts (black or brown [buried]).

A transistor is formed wherever poly. crosses n-diff. (red over green) and all diffusion wires

(interconnections) are n-type (green).When starting a layout, the first step normally taken is to

draw the metal (blue) VDD and GND rails in parallel allowing enough space between them for the

other circuit elements which will be required. Next, thinox (green) paths may be drawn between

the rails for inverters and inverter based logic as shown in Fig. below. Inverters and inverter-

based logic comprise a pull-up structure, usually a depletion mode transistor, connected from the

output point to VDD and a pull down structure of enhancement mode transistors suitably

interconnected between the output point and GND. This is illustrated in the Fig.(b). remembering

that poly. (red) crosses thinox (green)wherever transistors are required. One should consider the

implants (yellow) for depletion mode transistors and also consider the length to width (L:W)

ratio for each transistor. These ratios are important particularly in nMOS and nMOS- like

circuits.

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CMOS Design Style:

The CMOS design rules are almost similar and extensions of n-MOS design rules except the
Implant (yellow) and the buried contact (brown). In CMOS design Yellow is used to identify p
transistors and wires, as depletion mode devices are not utilized. The two types of transistors 'n'
and 'p', are separated by the demarcation line (representing the p-well boundary) above which all
p-type devices are placed (transistors and wires (yellow). The n-devices (green) are consequently
placed below the demarcation line and are thus located in the p-well as shown in the diagram
below.

Diffusion paths must not cross the demarcation line and n-diffusion and p-diffusion wires must

not join. The 'n' and 'p' features are normally joined by metal where a connection is needed. Their

geometry will appear when the stick diagram is translated to a mask layout. However, one must not forget

to place crosses on VDD and Vss rails to represent the substrate and p-well connection respectively. The

design style is explained by taking the example the design of a single bit shift register. The design begins

with the drawing of the VDD and Vss rails in parallel and in metal and the creation of an (imaginary)

demarcation line in-between, as shown in Fig.below. The n-transistors are then placed below this line and

thus close to Vss, while p-transistors are placed above the line and below VDD In both cases, the

transistors are conveniently placed with their diffusion paths parallel to the rails (horizontal in the

diagram) as shown in Fig.(b). A similar approach can be taken with transistors in symbolic form.

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Unit-2 VLSI Circuit Design Processes

Fig. CMOS stick layout design style (a,b,c,d)

The n- along with the p-transistors are interconnected to the rails using the metal and
connect as Shown in Fig.(d). It must be remembered that only metal and poly-silicon can cross
the demarcation line but with that restriction, wires can run-in diffusion also. Finally, the
remaining interconnections are made as appropriate and the control signals and data inputs are
added as shown in the Fig.(d).

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Stick Diagrams:

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Examples of Stick Diagrams

CMOS Inverter

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Contd….

Fig. CMOS NAND gate

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