Shri G.S.
Institute of Technology & Science, Indore
Department of Electronics & Telecommunication Engineering
VLSI Design LAB project
(Code-EC35010)
Session: July-Dec2024
A Laboratory Work Project File
Submitted By: Submitted To:
HARSH JAIN (0801EC221037) PROF. ASHWIN SHRIVASTAVA
KAUSHAL SHARMA (0801EC221044) PROF. NEETA SHARMA
HIMANSHU DOHARE (0801EC221039)
ADITYA TARLEY (0801EC221006)
CODE:
module calculator_4bit (
input [3:0] A, B,
input [1:0] Op, // Operation select: 00 = add, 01 = sub, 10 = mul, 11 = div
output reg [7:0] Result, // Result size to accommodate multiplication/division
output reg Cout, // Carry-out for add/sub
output reg [3:0] Remainder // Remainder for division
);
wire [3:0] add_sub_result;
wire [7:0] mul_result;
wire [3:0] div_result;
wire [3:0] div_rem;
wire carry_out;
// Instantiate adder/subtractor
adder_subtractor_4bit adder_sub(.A(A), .B(B), .Sub(Op[0]), .Result(add_sub_result),
.Cout(carry_out));
// Instantiate multiplier
multiplier_4bit multiplier(.A(A), .B(B), .Product(mul_result));
// Instantiate divider
divider_4bit divider(.A(A), .B(B), .Quotient(div_result), .Remainder(div_rem));
// Select operation using behavioral if statement (Dataflow)
always @(*) begin
case (Op)
2'b00: begin
Result = {4'b0000, add_sub_result}; // Addition
Cout = carry_out;
Remainder = 4'b0000;
end
2'b01: begin
Result = {4'b0000, add_sub_result}; // Subtraction
Cout = carry_out;
Remainder = 4'b0000;
end
2'b10: begin
Result = mul_result; // Multiplication
Cout = 1'b0;
Remainder = 4'b0000;
end
2'b11: begin
Result = {4'b0000, div_result}; // Division
Cout = 1'b0;
Remainder = div_rem;
end
endcase
end
endmodule
// Adder/Subtractor Module
module adder_subtractor_4bit(
input [3:0] A, B,
input Sub, // Sub = 0 for addition, Sub = 1 for subtraction
output [3:0] Result,
output Cout
);
wire [3:0] B_xor;
wire [4:0] Sum;
// XOR B with Sub: If Sub = 1, perform subtraction (B' + 1)
assign B_xor = B ^ {4{Sub}};
// Add A and modified B
assign Sum = A + B_xor + Sub;
assign Result = Sum[3:0];
assign Cout = Sum[4];
endmodule
// Multiplier Module
module multiplier_4bit(
input [3:0] A, B,
output [7:0] Product
);
assign Product = A * B;
endmodule
// Divider Module
module divider_4bit(
input [3:0] A, B,
output [3:0] Quotient,
output [3:0] Remainder
);
assign Quotient = (B == 0) ? 4'b0000 : A / B; // Handle divide-by-zero case
assign Remainder = (B == 0) ? A : A % B; // Remainder if division possible
endmodule
RTL:
View Technology:
SCHEMATIC:
Addition Schematic:
Sub Schematic:
Multiplication Schematic:
Division Schematic: