3105 FB
3105 FB
TYPICAL APPLICATION
Single Photovoltaic Cell Li-Ion Trickle Charger Output Current vs Input Voltage
10µH 80
MPPC DISABLED
70
225mV TO 5V
VIN SW VOUT = 3.3V
60
+
OUTPUT CURRENT (mA)
VOUT
PHOTOVOLTAIC VOUT
10µF 4.1V 50
CELL – LTC3105 VOUT = 4.2V
1020k
40
FB VOUT = 5V
Li-Ion
30
MPPC PGOOD 332k
OFF ON SHDN LDO 2.2V 20
10µF
40.2k AUX FBLDO 10
3105fb
PIN CONFIGURATION
TOP VIEW
TOP VIEW
FB 1 10 AUX 1
FB 12 AUX
LDO 2 9 VOUT LDO 2 11 VOUT
11
FBLDO 3 8 PGOOD FBLDO 3 10 PGOOD
GND
SHDN 4 7 SW SHDN 4 9 SW
MPPC 5 8 VIN
MPPC 5 6 VIN 6
GND 7 GND
DD PACKAGE MS PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN 12-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/W TJMAX = 125°C, θJA = 130°C/W, θJC = 21°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3105EDD#PBF LTC3105EDD#TRPBF LFQC 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C
LTC3105EMS#PBF LTC3105EMS#TRPBF 3105 12-Lead Plastic MSOP –40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3105fb
Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: Current measurements are performed when the LTC3105 is not
may cause permanent damage to the device. Exposure to any Absolute switching. The current limit values measured in operation will be somewhat
Maximum Rating condition for extended periods may affect device higher due to the propagation delay of the comparators.
reliability and lifetime. Note 4: This IC includes over temperature protection that is intended
Note 2: The LTC3105 is tested under pulsed load conditions such that to protect the device during momentary overload conditions. Junction
TJ ≈ TA. The LTC3105E is guaranteed to meet specifications from temperature will exceed 125°C when overtemperature protection is active.
0°C to 85°C junction temperature. Specifications over the –40°C to 85°C Continuous operation above the specified maximum operating junction
operating junction temperature range are assured by design, character- temperature may impair device reliability.
ization and correlation with statistical process controls. Note that the Note 5: The LTC3105 has been optimized for use with high impedance
maximum ambient temperature consistent with these specifications is power sources such as photovoltaic cells and thermoelectric generators.
determined by specific operating conditions in conjunction with board The input start-up voltage is measured using an input voltage source with
layout, the rated package thermal impedance and other environmental a series resistance of approximately 200mΩ and MPPC enabled. Use of the
factors. LTC3105 with lower resistance voltage sources or with MPPC disabled may
result in a higher input start-up voltage.
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900
320 IC ENABLE
800
700
240 300
60
200
220
100
200 0 40
–45 –30 –15 0 15 30 45 60 75 90 1.25 2.25 3.25 4.25 5.25 1.25 2.25 3.25 4.25 5.25
TEMPERATURE (°C) SUPPLY VOLTAGE, VIN OR VAUX (V) SUPPLY VOLTAGE, VIN OR VAUX (V)
3105 G01 3105 G02 3105 G03
2.0
1.20
1.5
CHANGE FROM 25°C (%)
1.15
1.0
0.5 1.10
0
1.05
–0.5
1.00
–1.0
–1.5 0.95
–45 –30 –15 0 15 30 45 60 75 90 1 2 3 4 5 6
TEMPERATURE (°C) 3105 G05
LDO LOAD CURRENT (mA)
3105 G06
VOUT IQ vs Temperature
During Shutdown VIN for Synchronous Operation
22 5.0
SHDN = 0V
20 4.5
NONSYNCHRONOUS
MAXIMUM INPUT VOLTAGE (V)
18 4.0 OPERATION
16 3.5
3.0
14
IQ (µA)
2.5
12
2.0
10 SYNCHRONOUS
1.5 OPERATION
8 1.0
6 0.5
4 0
–45 –30 –15 0 15 30 45 60 75 90 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
TEMPERATURE (°C) 3105 G07
OUTPUT VOLTAGE (V)
3105 G09
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EFFICIENCY (%)
INDUCTOR IVALLEY
CURRENT –0.5
100mA/DIV 70
–1.0
MPPC VOLTAGE
60
200mV/DIV –1.5
–2.0 50
–2.5 40
15µs/DIV 3105 G10
–45 –30 –15 0 15 30 45 60 75 90 0.25 1.25 2.25 3.25 4.25 5.25
TEMPERATURE (°C) INPUT VOLTAGE (V)
3105 G11 3105 G12
50mV/DIV
50
SW CURRENT 10
200mA/DIV 40
POWER LOSS
30
1
20
INPUT
VOLTAGE 10
5mV/DIV
0 0.1
50µs/DIV 0.01 0.1 1 10 100
3105 G13
OUTPUT CURRENT (mA) 3105 G14
EFFICIENCY
EFFICIENCY (%)
70 500
60 10 400
50 300
POWER LOSS
40 1 200
30 100
20 0.1 0
0.01 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (mA) 3105 G15
INPUT VOLTAGE (V)
3105 G16
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FB (Pin 1/Pin 1): Step-Up Converter Feedback Input. GND (Exposed Pad Pin 11/Pins 6, 7) : Small Signal and
Connect the VOUT resistor divider tap to this input. The Power Ground for the IC. The GND connections should be
output voltage can be adjusted between 1.6V and 5.25V. soldered to the PCB ground using the lowest impedance
LDO (Pin 2/Pin 2): LDO Regulator Output. Connect a 4.7µF path possible.
or larger capacitor between LDO and GND. SW (Pin 7/Pin 9): Switch Pin. Connect an inductor between
FBLDO (Pin 3/Pin 3): LDO Feedback Input. Connect the SW and VIN. PCB trace lengths should be as short as pos-
sible to reduce EMI. While the converter is sleeping or is
LDO resistive divider tab to this input. Alternatively, con-
necting FBLDO directly to GND will configure the LDO in shutdown, the internal antiringing switch connects the
output voltage to be internally set at 2.2V (nominal). SW pin to the VIN pin in order to minimize EMI.
PGOOD (Pin 8/Pin 10): Power Good Indicator. This is an
SHDN (Pin 4/Pin 4): Logic Controlled Shutdown Input.
open-drain output. The pull-down is disabled when VOUT
With SHDN open, the converter is enabled by an internal
has achieved the voltage defined by the feedback divider
2MΩ pull-up resistor. The SHDN pin should be driven with
on the FB pin. The pull-down is also disabled while the IC
an open-drain or open-collector pull-down and floated until
is in shutdown or start-up mode.
the converter has entered normal operation. Excessive
loading on this pin may cause a failure to complete start-up. VOUT (Pin 9/Pin 11): Step-Up Converter Output. This is the
drain connection of the main output internal synchronous
SHDN = Low: IC Disabled
rectifier. A 10µF or larger capacitor must be connected
SHDN = High: IC Enabled between this pin and GND. The PCB trace length from the
MPPC (Pin 5/Pin 5): Set Point Input for Maximum VOUT pin to the output filter capacitor should be as short
Power Point Control. Connect a resistor from MPPC to and wide as possible.
GND to program the activation point for the MPPC loop. AUX (Pin 10/Pin 12): Auxiliary Voltage. Connect a 1µF
To disable the MPPC circuit, connect MPPC directly capacitor between this pin and GND. This pin is used by
to GND. the start-up circuitry to generate a voltage rail to power
VIN (Pin 6/Pin 8): Input Supply. Connect a decoupling internal circuitry until the main output reaches regulation.
capacitor between this pin and GND. The PCB trace length AUX and VOUT are internally connected together once VOUT
from the VIN pin to the decoupling capacitor should be as exceeds VAUX.
short and wide as possible. When used with high imped-
ance sources such as photovoltaic cells, this pin should
have a 10µF or larger decoupling capacitor.
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L1
10µH
7
SHUTDOWN SW
OR WELL
SLEEP CONTROL
AUX
10
CAUX
SHORT 1µF
CONTROL
VIN LOW VOLTAGE VOUT 1.6V TO
225mV 6 CURRENT 9 5.25V
START-UP
TO 5V ADJUST
CIN COUT
10µF 10µF
LDO
SHUTDOWN VAUX 2
VCC – + – + CLDO
4.7µF
10µA
MPPC
5 –g PEAK CURRENT
m LIMIT
RMPPC VIN + SHUTDOWN
VCC VALLEY CURRENT LIMIT – +
SLEEP
2M LOGIC R3 R1
SHDN USER SHUTDOWN BURST FBLDO
4 1.004V 3
CONTROL
FB
– 1
PGOOD
VIN + 1.004V 8 R4 R2
VAUX
–
VCC FB
+
0.9V
EXPOSED PAD
SLEEP
11
3105 BD
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TIME
OUTPUT VOLTAGE
1.4V
TIME
VOUT IN
LDO IN REGULATION
REGULATION VOUT = VAUX
VOUT SYNCHRONOUS
START-UP MODE NORMAL OPERATION RECTIFIER ENABLED 3105 F01
above VAUX , an internal switch is enabled to connect the When VOUT reaches the regulation point, the N- and P-
two outputs together. channel MOSFETs connected to the SW pin are disabled
If VIN is greater than the voltage on the driven output (VOUT and the converter enters sleep.
or VAUX), or the driven output is less than 1.2V (typical),
Auxiliary LDO
the synchronous rectifiers are disabled. With the synchro-
nous rectifiers disabled, the converter operates in critical The integrated LDO provides a regulated 6mA rail to
conduction mode. In this mode, the N-channel MOSFET power microcontrollers and external sensors. When the
between SW and GND is enabled and remains on until the input voltage is above the minimum of 225mV, the LDO is
inductor current reaches the peak current limit. It is then powered from the AUX output allowing the LDO to attain
disabled and the inductor current discharges completely regulation while the main output is still charging. The LDO
before the cycle is repeated. has a 12mA current limit and an internal 1ms soft-start
to eliminate inrush currents. The LDO output voltage is
When the output voltage is greater than the input voltage
and greater than 1.2V, the synchronous rectifier is enabled. set by the FBLDO pin. If a resistor divider is connected
In this mode, the N-channel MOSFET between SW and to this pin, the ratio of the resistors determines the LDO
GND is enabled until the inductor current reaches the peak output voltage. If the FBLDO pin is connected directly to
current limit. Once current limit is reached, the N-channel GND, the LDO will use a 2MΩ internal divider network to
MOSFET turns off and the P-channel MOSFET between SW program a 2.2V nominal output voltage. The LDO should
and the driven output is enabled. This switch remains on be programmed for an output voltage less than the pro-
until the inductor current drops below the valley current grammed VOUT .
limit and the cycle is repeated.
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APPLICATIONS INFORMATION
Component Selection should be large enough to allow the converter to complete
Low DCR power inductors with values between 4.7µH start-up mode using the energy stored in the input ca-
and 30µH are suitable for use with the LTC3105. For pacitor. When using bulk input capacitors that have high
most applications, a 10µH inductor is recommended. In ESR, a small valued parallel ceramic capacitor should be
applications where the input voltage is very low, a larger placed between VIN and GND as close to the converter
value inductor can provide higher efficiency and a lower pins as possible.
start-up voltage. In applications where the input voltage A 1µF ceramic capacitor should be connected between
is relatively high (VIN > 0.8V), smaller inductors may be AUX and GND. Larger capacitors should be avoided to
used to provide a smaller overall footprint. In all cases, minimize start-up time. A low ESR output capacitor should
the inductor must have low DCR and sufficient saturation be connected between VOUT and GND. The main output
current rating. If the DC resistance of the inductor is too capacitor should be 10µF or larger. The main output can
high, efficiency will be reduced and the minimum operating also be used to charge energy storage devices including
voltage will increase. tantalum capacitors, supercapacitors and batteries. When
Input capacitor selection is highly important in low voltage, using output bulk storage devices with high ESR, a small
high source resistance systems. For general applications, valued ceramic capacitor should be placed in parallel and
a 10µF ceramic capacitor is recommended between VIN located as close to the converter pins as possible.
and GND. For high impedance sources, the input capacitor
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APPLICATIONS INFORMATION
Step-Up Converter Feedback Configuration MPPC Threshold Configuration
A resistor divider connected between the VOUT and FB pins The MPPC circuit controls the inductor current to main-
programs the step-up converter output voltage, as shown tain VIN at the voltage on the MPPC pin. The MPPC pin
in Figure 2. An optional 22pF feedforward capacitor, CFF1, voltage is set by connecting a resistor between the MPPC
can be used to reduce output ripple and improve load pin and GND, as shown in Figure 4. The MPPC voltage is
transient response. The equation for VOUT is: determined by the equation:
R1 VMPPC = 10µA • RMPPC
VOUT = 1.004V • +1
R2 In photovoltaic cell applications, a diode can be used to
set the MPPC threshold so that it tracks the cell voltage
LDO Regulator Feedback Configuration over temperature, as shown in Figure 5. The diode should
Two methods can be used to program the LDO output be thermally coupled to the photovoltaic cell to ensure
voltage, as shown in Figure 3. A resistor divider connected proper tracking. A resistor placed in series with the diode
between the LDO and FBLDO pins can be used to program can be used to adjust the DC set point to better match
the LDO output voltage. The equation for the LDO output the maximum power point of a particular source if the
voltage is: selected diode forward voltage is too low. If the diode is
located far from the converter inputs, a capacitor may be
R3 required to filter noise that may couple onto the MPPC
VLDO = 1.004V • +1
R4 pin, as shown in Figure 5. This method can be extended
to stacked cell sources through use of multiple series
Alternatively, the FBLDO pin can be connected directly to
connected diodes.
GND. In this configuration, the LDO is internally set to a
nominal 2.2V output.
VOUT
MPPC
10µA
CFF1 R1 LTC3105
RMPPC LTC3105
FB
R2
3105 F02
3105 F04
FBLDO FBLDO + C6
VFWD
R4 10nF
–
should be set for a value approximately 50mV below the Figure 6. Current Loop Power Tap
minimum diode forward voltage.
TYPICAL APPLICATIONS
3.3V from a Single-Cell Photovoltaic Source with Temperature Tracking
L1**
10µH
VIN SW
+ VOUT
CIN VOUT 3.3V
– 10µF R1
LTC3105
2.26M
FB
THERMALLY COUT
COUPLED MPPC PGOOD R2 10µF
RMPPC OFF ON 1M
SHDN LDO 2.2V
9.09k
AUX FBLDO
CMPPC
D1* 10nF GND CLDO
CAUX
1µF 4.7µF
** COILCRAFT MSS5131-103MX
0.5
MPPC VOLTAGE (V)
0.4
0.38V
INPUT VOLTAGE
0.3 50mV/DIV
3105fb
L1**
6.8µH
+
– VIN SW
+ CIN VOUT
VOUT 3.3V
10µF
– LTC3105
R1
1.37M
RMPPC
THERMALLY FB
4.99k COUT
COUPLED 10µF
MPPC PGOOD R2
OFF ON 604k
SHDN LDO 2.2V
D1*
CMPPC AUX FBLDO
10nF
D2* GND CLDO
CAUX
1µF 4.7µF
3105 TA03
* MRA4003T3
** PANASONIC ELL-VEG6R8N
L1**
10µH
∆T ≥ 10°C
+ VIN SW
TEG* VOUT
CIN VOUT 2.4V
100µF CFF R1
LTC3105 22pF 1.10M
FB COUT
1µF
MPPC PGOOD R2 + CBULK
787k 1F
OFF ON SHDN LDO 2.2V
2.5V
RMPPC AUX FBLDO
30.1k
GND CLDO
CAUX
1µF 4.7µF
3105 TA04
* MICROPELT MPG-D751
** COILCRAFT MSS5131-103MX
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VIN SW
VOUT
R1
LTC3105
VFWD = 330mV 2M
4mA TO 20mA FB
CURRENT LOOP R2
CIN PGOOD EN
1M
D1*
470µF RPG +
499k µP 10µF
280mV VOUT, 3V
MPPC LDO
2.2V
VDD –
OFF ON SHDN CLDO
RMPPC 4.7µF
28k AUX FBLDO
CAUX GND
* MBRS190T3 1µF
** COILCRAFT MSS5131-103MX
3105 TA05
VOUT VOLTAGE
VOUT VOLTAGE 500mV/DIV
250mV/DIV
LDO VOLTAGE
500mV/DIV
VIN VOLTAGE
50mV/DIV
0V
VIN VOLTAGE
LOAD CURRENT 200mV/DIV
2mA/DIV
100mV
VIN SW
+ CIN VOUT
VOUT
3.2V
10µF R1 COUT
+
– LTC3105
1.02M 10µF NiMH
FB + ×2
MPPC PGOOD R2
470k
3105fb
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
5 1
0.200 REF 0.75 ±0.05 0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3105fb
MS Package
12-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1668 Rev A)
0.889 ±0.127
(.035 ±.005)
5.10
(.201) 3.20 – 3.45
MIN (.126 – .136)
4.039 ±0.102
0.42 ±0.038 0.65 (.159 ±.004)
(.0165 ±.0015) (.0256) (NOTE 3) 0.406 ±0.076
TYP BSC
12 11 10 9 8 7 (.016 ±.003)
RECOMMENDED SOLDER PAD LAYOUT REF
0.53 ±0.152
1 2 3 4 5 6
(.021 ±.006) 1.10 0.86
(.043) (.034)
DETAIL “A”
MAX REF
0.18 SEATING
(.007) PLANE
3105fb
3105fb
17
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
For more
tion that the interconnection information
of its circuits www.linear.com/LTC3105
as described herein will not infringe on existing patent rights.
LTC3105
TYPICAL APPLICATION
Single-Cell Powered Remote Wireless Sensor
L1*
10µH
VIN SW
+ VOUT
CIN VOUT
10µF 3.3V
– R1
LTC3105 2.32M
MPPC FB COUT XMTR
R2 100µF
RMPPC 1.02M
40.2k I/O
PGOOD EN A/D SENSOR
OFF ON
RPG µC
SHDN LDO 2.2V
499k
AUX FBLDO VDD GPIO
2N7000 GND GND
CAUX CLDO
1µF 4.7µF
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