OPERATING SYSTEMS

MODULE 4 : MEMORY MANAGEMENT

4.1 Main Memory

Basic Hardware
• Program must be
→ brought (from disk) into memory and
→ placed within a process for it to be run.
• Main-memory and registers are only storage CPU can access directly.
• Register access in one CPU clock.
• Main-memory can take many cycles.
• Cache sits between main-memory and CPU registers.
• Protection of memory required to ensure correct operation.
• A pair of base- and limit-registers define the logical (virtual) address space (Figure 4.1 & 4.2).

Figure 4.1 A base and a limit-register define a logical-address space

Figure 4.2 Hardware address protection with base and limit-registers

Sinchana M N. Asst Prof

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4.1.1 Address Binding
• Address binding of instructions to memory-addresses can happen at 4 different stages (Figure 4.4):
1) Compile Time
 If memory-location known a priori, absolute code can be generated.
 Must recompile code if starting location changes.
2) Load Time
 Must generate relocatable code if memory-location is not known at compile time.
3) Execution Time
 Binding delayed until run-time if the process can be moved during its execution from one
memory-segment to another.
 Need hardware support for address maps (e.g. base and limit-registers).

Figure 4.4 Multistep processing of a user-program

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4.1.2 Logical versus Physical Address Space
• Logical-address is generated by the CPU (also referred to as virtual-address).
Physical-address is the address seen by the memory-unit.
• Logical & physical-addresses are the same in compile-time & load-time address-binding methods.
Logical and physical-addresses differ in execution-time address-binding method.
• MMU (Memory-Management Unit)
 Hardware device that maps virtual-address to physical-address (Figure 4.4).
 The value in the relocation-register is added to every address generated by a user-process at
the time it is sent to memory.
 The user-program deals with logical-addresses; it never sees the real physical-addresses.

Figure 4.4 Dynamic relocation using a relocation-register

4.1.3 Dynamic Loading

• This can be used to obtain better memory-space utilization.
• A routine is not loaded until it is called.
• This works as follows:
4.1.3.1 Initially, all routines are kept on disk in a relocatable-load format.
4.1.3.2 Firstly, the main-program is loaded into memory and is executed.
4.1.3.3 When a main-program calls the routine, the main-program first checks to see
whether theroutine has been loaded.
4.1.3.4 If routine has been not yet loaded, the loader is called to load desired routine into
memory.
4.1.3.5 Finally, control is passed to the newly loaded-routine.
• Advantages:
1) An unused routine is never loaded.
2) Useful when large amounts of code are needed to handle infrequently occurring cases.
3) Although the total program-size may be large, the portion that is used (and hence loaded)
may be much smaller.
4) Does not require special support from the OS.

4.1.4 Dynamic Linking and Shared Libraries

• Linking postponed until execution-time.
• This feature is usually used with system libraries, such as language subroutine libraries.
• A stub is included in the image for each library-routine reference.
• The stub is a small piece of code used to locate the appropriate memory-resident library-routine.
• When the stub is executed, it checks to see whether the needed routine is already in memory. If not,
the program loads the routine into memory.
• Stub replaces itself with the address of the routine, and executes the routine.
• Thus, the next time that particular code-segment is reached, the library-routine is executed directly,
incurring no cost for dynamic-linking.
• All processes that use a language library execute only one copy of the library code.
Shared libraries
• A library may be replaced by a new version, and all programs that reference the library will
automatically use the new one.
• Version info. is included in both program & library so that programs won't accidentally execute
incompatible versions.

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4.3 Swapping
• A process must be in memory to be executed.
• A process can be
→ swapped temporarily out-of-memory to a backing-store and
→ then brought into memory for continued execution.
• Backing-store is a fast disk which is large enough to accommodate copies of all memory-images for
all users.
• Roll out/Roll in is a swapping variant used for priority-based scheduling algorithms.
 Lower-priority process is swapped out so that higher-priority process can be loaded and
executed.
 Once the higher-priority process finishes, the lower-priority process can be swapped back in
and continued (Figure 4.5).

Figure 4.5 Swapping of two processes using a disk as a backing-store

• Swapping depends upon address-binding:

4.3.1 If binding is done at load-time, then process cannot be easily moved to a
different location.
4.3.2 If binding is done at execution-time, then a process can be swapped into a different
memory-space, because the physical-addresses are computed during execution-time.
• Major part of swap-time is transfer-time; i.e. total transfer-time is directly proportional to the
amount of memory swapped.
• Disadvantages:
1) Context-switch time is fairly high.
2) If we want to swap a process, we must be sure that it is completely idle.
Two solutions:
i) Never swap a process with pending I/O.
ii) Execute I/O operations only into OS buffers.

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4.4 Contiguous Memory Allocation
• Memory is usually divided into 2 partitions:
→ One for the resident OS.
→ One for the user-processes.
• Each process is contained in a single contiguous section of memory.

4.4.1 Memory Mapping & Protection

• Memory-protection means
→ protecting OS from user-process and
→ protecting user-processes from one another.
• Memory-protection is done using
→ Relocation-register: contains the value of the smallest physical-address.
→ Limit-register: contains the range of logical-addresses.
• Each logical-address must be less than the limit-register.
• The MMU maps the logical-address dynamically by adding the value in the relocation-register. This
mapped-address is sent to memory (Figure 4.6).
• When the CPU scheduler selects a process for execution, the dispatcher loads the relocation and
limit-registers with the correct values.
• Because every address generated by the CPU is checked against these registers, we can protect the
OS from the running-process.
• The relocation-register scheme provides an effective way to allow the OS size to change dynamically.
• Transient OS code: Code that comes & goes as needed to save memory-space and overhead for
unnecessary swapping.

Figure 4.6 Hardware support for relocation and limit-registers

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4.4.2 Memory Allocation
• Two types of memory partitioning are: 1) Fixed-sized partitioning and
2) Variable-sized partitioning
4.4.2.1 Fixed-sized Partitioning
 The memory is divided into fixed-sized partitions.
 Each partition may contain exactly one process.
 The degree of multiprogramming is bound by the number of partitions.
 When a partition is free, a process is
→ selected from the input queue and
→ loaded into the free partition.
 When the process terminates, the partition becomes available for another process.
4.4.2.2 Variable-sized Partitioning
 The OS keeps a table indicating
→ which parts of memory are available and
→ which parts are occupied.
 A hole is a block of available memory.
 Normally, memory contains a set of holes of various sizes.
 Initially, all memory is
→ available for user-processes and
→ considered one large hole.
 When a process arrives, the process is allocated memory from a large hole.
 If we find the hole, we
→ allocate only as much memory as is needed and
→ keep the remaining memory available to satisfy future requests.
• Three strategies used to select a free hole from the set of available holes.
1) First Fit
 Allocate the first hole that is big enough.
 Searching can start either
→ at the beginning of the set of holes or
→ at the location where the previous first-fit search ended.
2) Best Fit
 Allocate the smallest hole that is big enough.
 We must search the entire list, unless the list is ordered by size.
 This strategy produces the smallest leftover hole.
3) Worst Fit
 Allocate the largest hole.
 Again, we must search the entire list, unless it is sorted by size.
 This strategy produces the largest leftover hole.
• First-fit and best fit are better than worst fit in terms of decreasing time and storage utilization.

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4.4.3 Fragmentation
• Two types of memory fragmentation: 1) Internal fragmentation and
2) External fragmentation
1) Internal Fragmentation
• The general approach is to
→ break the physical-memory into fixed-sized blocks and
→ allocate memory in units based on block size (Figure 4.7).
• The allocated-memory to a process may be slightly larger than the requested-memory.
• The difference between requested-memory and allocated-memory is called internal fragmentation i.e.
Unused memory that is internal to a partition.
2) External Fragmentation
• External fragmentation occurs when there is enough total memory-space to satisfy a request but the
available-spaces are not contiguous. (i.e. storage is fragmented into a large number of small holes).
• Both the first-fit and best-fit strategies for memory-allocation suffer from external fragmentation.
• Statistical analysis of first-fit reveals that
→ given N allocated blocks, another 0.5 N blocks will be lost to fragmentation.
This property is known as the 50-percent rule.
• Two solutions to external fragmentation (Figure 4.8):
1) Compaction
 The goal is to shuffle the memory-contents to place all free memory together in one large
hole.
 Compaction is possible only if relocation is
→ dynamic and
→ done at execution-time.
2) Permit the logical-address space of the processes to be non-contiguous.
 This allows a process to be allocated physical-memory wherever such memory is available.
 Two techniques achieve this solution:
1) Paging and
2) Segmentation.

Figure 4.7: Internal fragmentation Figure 4.8: External fragmentation

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4.5 Paging
• Paging is a memory-management scheme.
• This permits the physical-address space of a process to be non-contiguous.
• This also solves the considerable problem of fitting memory-chunks of varying sizes onto the
backing-store.
• Traditionally: Support for paging has been handled by hardware.
Recent designs: The hardware & OS are closely integrated.

4.5.1 Basic Method

• Physical-memory is broken into fixed-sized blocks called frames(Figure 4.16).
Logical-memory is broken into same-sized blocks called pages.
• When a process is to be executed, its pages are loaded into any available memory-frames from the
backing-store.
• The backing-store is divided into fixed-sized blocks that are of the same size as the memory-frames.

Figure 4.16 Paging hardware

• The page-table contains the base-address of each page in physical-memory.

• Address generated by CPU is divided into 2 parts (Figure 4.17):
4.5.1.1 Page-number(p) is used as an index to the page-table and
4.5.1.2 Offset(d) is combined with the base-address to define the
physical-address.This physical-address is sent to the memory-unit.

Figure 4.17 Paging model of logical and physical-memory

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• The page-size (like the frame size) is defined by the hardware (Figure 4.18).
• If the size of the logical-address space is 2m, and a page-size is 2n addressing-units (bytes or words)
then the high-order m-n bits of a logical-address designate the page-number, and the n low-order bits
designate the page-offset.

Figure 4.18 Free frames (a) before allocation and (b) after allocation

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4.5.2 Hardware Support for Paging
• Most OS's store a page-table for each process.
• A pointer to the page-table is stored in the PCB.
Translation Lookaside Buffer
• The TLB is associative, high-speed memory.
• The TLB contains only a few of the page-table entries.
• Working:
 When a logical-address is generated by the CPU, its page-number is presented to the TLB.
 If the page-number is found (TLB hit), its frame-number is
→ immediately available and
→ used to access memory.
 If page-number is not in TLB (TLB miss), a memory-reference to page table must be made.
 The obtained frame-number can be used to access memory (Figure 4.19).
 In addition, we add the page-number and frame-number to the TLB, so that they will be
found quickly on the next reference.
• If the TLB is already full of entries, the OS must select one for replacement.
• Percentage of times that a particular page-number is found in the TLB is called hit ratio.
• Advantage: Search operation is fast.
Disadvantage: Hardware is expensive.
• Some TLBs have wired down entries that can't be removed.
• Some TLBs store ASID (address-space identifier) in each entry of the TLB that uniquely
→ identify each process and
→ provide address space protection for that process.

Figure 4.19 Paging hardware with TLB

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4.5.3 Protection
• Memory-protection is achieved by protection-bits for each frame.
• The protection-bits are kept in the page-table.
• One protection-bit can define a page to be read-write or read-only.
• Every reference to memory goes through the page-table to find the correct frame-number.
• Firstly, the physical-address is computed. At the same time, the protection-bit is checked to verify
that no writes are being made to a read-only page.
• An attempt to write to a read-only page causes a hardware-trap to the OS (or memory-protection
violation).
Valid Invalid Bit
• This bit is attached to each entry in the page-table (Figure 4.20).
4.5.3.1 Valid bit: The page is in the process’ logical-address space.
4.5.3.2 Invalid bit: The page is not in the process’ logical-address space.
• Illegal addresses are trapped by use of valid-invalid bit.
• The OS sets this bit for each page to allow or disallow access to the page.

Figure 4.20 Valid (v) or invalid (i) bit in a page-table

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4.5.4 Shared Pages
• Advantage of paging:
4.5.4.1 Possible to share common code.
• Re-entrant code is non-self-modifying code, it never changes during execution.
• Two or more processes can execute the same code at the same time.
• Each process has its own copy of registers and data-storage to hold the data for the process's
execution.
• The data for 2 different processes will be different.
• Only one copy of the editor need be kept in physical-memory (Figure 4.21).
• Each user's page-table maps onto the same physical copy of the editor,
but data pages are mapped onto different frames.
• Disadvantage:
1) Systems that use inverted page-tables have difficulty implementing shared-memory.

Figure 4.21 Sharing of code in a paging environment

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4.6 Structure of the Page Table
1) Hierarchical Paging
2) Hashed Page-tables
3) Inverted Page-tables

4.6.1 Hierarchical Paging

• Problem: Most computers support a large logical-address space (242 to 264). In these systems, the
page-table itself becomes excessively large.
Solution: Divide the page-table into smaller pieces.
Two Level Paging Algorithm
• The page-table itself is also paged (Figure 4.22).
• This is also known as a forward-mapped page-table because address translation works from the
outer page-table inwards.
• For example (Figure 4.24):
 Consider the system with a 42-bit logical-address space and a page-size of 4 KB.
 A logical-address is divided into
→ 20-bit page-number and
→ 12-bit page-offset.
 Since the page-table is paged, the page-number is further divided into
→ 10-bit page-number and
→ 10-bit page-offset.
 Thus, a logical-address is as follows:

Figure 4.22 A two-level page-table scheme

Figure 4.24 Address translation for a two-level 42-bit paging architecture

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4.6.2 Hashed Page Tables

• This approach is used for handling address spaces larger than 42 bits.
• The hash-value is the virtual page-number.
• Each entry in the hash-table contains a linked-list of elements that hash to the same location (to
handle collisions).
• Each element consists of 4 fields:
4.6.2.1 Virtual page-number
4.6.2.2 Value of the mapped page-frame and
4.6.2.3 Pointer to the next element in the linked-list.
• The algorithm works as follows (Figure 4.24):
1) The virtual page-number is hashed into the hash-table.
2) The virtual page-number is compared with the first element in the linked-list.
3) If there is a match, the corresponding page-frame (field 2) is used to form the desired
physical-address.
4) If there is no match, subsequent entries in the linked-list are searched for a matching virtual
page-number.
Clustered Page Tables
• These are similar to hashed page-tables except that each entry in the hash-table refers to several
pages rather than a single page.
• Advantages:
1) Favorable for 64-bit address spaces.
2) Useful for address spaces, where memory-references are noncontiguous and scattered
throughout the address space.

Figure 4.24 Hashed page-table

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4.6.3 Inverted Page Tables
• Has one entry for each real page of memory.
• Each entry consists of
→ virtual-address of the page stored in that real memory-location and
→ information about the process that owns the page.

Figure 4.25 Inverted page-table

• Each virtual-address consists of a triplet (Figure 4.25):

<process-id, page-number, offset>.
• Each inverted page-table entry is a pair <process-id, page-number>
• The algorithm works as follows:
4.6.3.1 When a memory-reference occurs, part of the virtual-address, consisting of
<process-id,page-number>, is presented to the memory subsystem.
4.6.3.2 The inverted page-table is then searched for a match.
4.6.3.3 If a match is found, at entry i-then the physical-address <i, offset> is generated.
4.6.3.4 If no match is found, then an illegal address access has been attempted.
• Advantage:
1) Decreases memory needed to store each page-table
• Disadvantages:
1) Increases amount of time needed to search table when a page reference occurs.
2) Difficulty implementing shared-memory.

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4.7 Segmentation
4.7.1 Basic Method
• This is a memory-management scheme that supports user-view of memory(Figure 4.26).
• A logical-address space is a collection of segments.
• Each segment has a name and a length.
• The addresses specify both
→ segment-name and
→ offset within the segment.
• Normally, the user-program is compiled, and the compiler automatically constructs segments
reflecting the input program.
For ex:
→ The code → Global variables
→ The heap, from which memory is allocated → The stacks used by each thread
→ The standard C library

Figure 4.26 Programmer’s view of a program

4.7.2 Hardware Support

• Segment-table maps 2 dimensional user-defined addresses into one-dimensional physical-addresses.
• In the segment-table, each entry has following 2 fields:
4.7.2.1 Segment-base contains starting physical-address where the segment
resides in memory.
4.7.2.2 Segment-limit specifies the length of the segment (Figure 4.27).
• A logical-address consists of 2 parts:
1) Segment-number(s) is used as an index to the segment-table .
2) Offset(d) must be between 0 and the segment-limit.
• If offset is not between 0 & segment-limit, then we trap to the OS(logical-addressing attempt beyond
end of segment).
• If offset is legal, then it is added to the segment-base to produce the physical-memory address.

Figure 4.27 Segmentation hardware

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CONTENTS:
 Virtual Memory Management:
 Background;
 Demand paging;
 Copy-on-write;
 Page replacement;
 Allocation of frames;
 Thrashing

MODULE 4
VIRTUAL MEMORYMANAGEMENT
 Virtual memory is a technique that allows for the execution of partially loaded process.
 Advantages:
 A program will not be limited by the amount of physical memory that is available
user can able to write in to large virtual space.
 Since each program takes less amount of physical memory, more than one
program could be run at the same time which can increase the throughput and
CPU utilization.
 Less i/o operation is needed to swap or load user program in to memory. So each
user program could run faster.

Fig: Virtual memory that is larger than physical memory.

 Virtual memory is the separation of users logical memory from physical memory. This
separation allows an extremely large virtual memory to be provided when these is less
physical memory.
 Separating logical memory from physical memory also allows files and memory to be
shared by several different processes through page sharing.

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Fig: Shared Library using Virtual Memory

 Virtual memory is implemented using Demand Paging.

 Virtual address space: Every process has a virtual address space i.e used as the stack or
heap grows in size.

Fig: Virtual address space

DEMAND PAGING
 A demand paging is similar to paging system with swapping when we want to execute a
process we swap the process the in to memory otherwise it will not be loaded in to
memory.
 A swapper manipulates the entire processes, where as a pager manipulates individual
pages of the process.
 Bring a page into memory only when it is needed
 Less I/O needed
 Less memory needed
 Faster response

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 More users
 Page is needed ⇒ reference to it
 invalid reference ⇒abort
 not-in-memory ⇒ bring to memory
 Lazy swapper– never swaps a page into memory unless page will be needed
 Swapper that deals with pages is a pager.

Fig: Transfer of a paged memory into continuous disk space

 Basic concept: Instead of swapping the whole process the pager swaps only the necessary
pages in to memory. Thus it avoids reading unused pages and decreases the swap time and
amount of physical memory needed.
 The valid-invalid bit scheme can be used to distinguish between the pages that are on the disk
and that are in memory.
 With each page table entry a valid–invalid bit is associated
 (v ⇒ in-memory, i⇒not-in-memory)
 Initially valid–invalid bit is set to ion all entries
 Example of a page table snapshot:

 During address translation, if valid–invalid bit in page table entry is I ⇒ page fault.
 If the bit is valid then the page is both legal and is in memory.
 If the bit is invalid then either page is not valid or is valid but is currently on the disk. Marking

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a page as invalid will have no effect if the processes never access to that page. Suppose if it
access the page which is marked invalid, causes a page fault trap. This may result in failure of
OS to bring the desired page in to memory.

Fig: Page Table when some pages are not in main memory

Page Fault

If a page is needed that was not originally loaded up, then a page fault trap is generated.
Steps in Handling a Page Fault
1. The memory address requested is first checked, to make sure it was a valid memory
request.
2. If the reference is to an invalid page, the process is terminated. Otherwise, if the page is
not present in memory, it must be paged in.
3. A free frame is located, possibly from a free-frame list.
4. A disk operation is scheduled to bring in the necessary page from disk.
5. After the page is loaded to memory, the process's page table is updated with the new
frame number, and the invalid bit is changed to indicate that this is now a valid page
reference.
6. The instruction that caused the page fault must now be restarted from the beginning.

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Fig: steps in handling page fault

Pure Demand Paging: Never bring a page into main memory until it is required.
 We can start executing a process without loading any of its pages into main memory.
 Page fault occurs for the non memory resident pages.
 After the page is brought into memory, process continues to execute.
 Again page fault occurs for the next page.

Hardware support: For demand paging the same hardware is required as paging and swapping.
1. Page table:-Has the ability to mark an entry invalid through valid-invalid bit.
2. Secondary memory:-This holds the pages that are not present in main memory.

Performance of Demand Paging: Demand paging can have significant effect on the performance
of the computer system.
 Let P be the probability of the page fault (0<=P<=1)
 Effective access time = (1-P) * ma + P * page fault.
 Where P = page fault and ma = memory access time.
 Effective access time is directly proportional to page fault rate. It is important to keep page
fault rate low in demand paging.

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Demand Paging Example

 Memory access time = 200 nanoseconds
 Average page-fault service time = 8milliseconds
 EAT = (1 – p) x 200 + p (8milliseconds)
= (1 – p x 200 + p x 8,000,000
= 200 + p x 7,999,800
 If one access out of 1,000 causes a page fault, then EAT = 8.2 microseconds. This is a
slowdown by a factor of 40.

COPY-ON-WRITE
 Technique initially allows the parent and the child to share the same pages. These
pages are marked as copy on- write pages i.e., if either process writes to a shared page,
a copy of shared page is created.
 Eg:-If a child process try to modify a page containing portions of the stack; the OS
recognizes them as a copy-on-write page and create a copy of this page and maps it on
to the address space of the child process. So the child process will modify its copied
page and not the page belonging to parent. The new pages are obtained from the pool
of free pages.
 The previous contents of pages are erased before getting them into main memory. This
is called Zero – on fill demand.

a) Before Process 1 modifies pageC

b) After process 1 modifies page C

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PAGE REPLACEMENT
 Page replacement policy deals with the solution of pages in memory to be replaced by a
new page that must be brought in. When a user process is executing a page fault occurs.
 The hardware traps to the operating system, which checks the internal table to see that this
is a page fault and not an illegal memory access.
 The operating system determines where the derived page is residing on the disk, and this
finds that there are no free frames on the list of free frames.
 When all the frames are in main memory, it is necessary to bring a new page to satisfy the
page fault, replacement policy is concerned with selecting a page currently in memory to be
replaced.
 The page i,e to be removed should be the page i,e least likely to be referenced in future.

Fig: Page Replacement

Working of Page Replacement Algorithm

1. Find the location of derived page on the disk.
2. Find a free frame x If there is a free frame, use it. x Otherwise, use a replacement
algorithm to select a victim.
 Write the victim page to the disk.
 Change the page and frame tables accordingly.
3. Read the desired page into the free frame; change the page and frame tables.
4. Restart the user process.

Victim Page
 The page that is supported out of physical memory is called victim page.
 If no frames are free, the two page transforms come (out and one in) are read. This will see
the effective access time.
 Each page or frame may have a dirty (modify) bit associated with the hardware. The
modify bit for a page is set by the hardware whenever any word or byte in the page is

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written into, indicating that the page has been modified.

 When we select the page for replacement, we check its modify bit. If the bit is set, then the
page is modified since it was read from the disk.
 If the bit was not set, the page has not been modified since it was read into memory.
Therefore, if the copy of the page has not been modified we can avoid writing the memory
page to the disk, if it is already there. Sum pages cannot be modified.

Modify bit/ Dirty bit :

 Each page/frame has a modify bit associated with it.
 If the page is not modified (read-only) then one can discard such page without writing it
onto the disk. Modify bit of such page is set to0.
 Modify bit is set to 1, if the page has been modified. Such pages must be written to the
disk.
 Modify bit is used to reduce overhead of page transfers – only modified pages are written
to disk

PAGE REPLACEMENT ALGORITHMS

 Want lowest page-fault rate
 Evaluate algorithm by running it on a particular string of memory references (reference
string) and computing the number of page faults on that string
 In all our examples, the reference string is
1, 2, 3, 4, 1, 2, 5, 1, 2, 3, 4, 5

FIFO Algorithm:
 This is the simplest page replacement algorithm. A FIFO replacement algorithm associates
each page the time when that page was brought into memory.
 When a Page is to be replaced the oldest one is selected.
 We replace the queue at the head of the queue. When a page is brought into memory, we
insert it at the tail of the queue.
 In the following example, a reference string is given and there are 3 free frames. There are
20 page requests, which results in 15 page faults

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Belady’s Anomaly
 For some page replacement algorithm, the page fault may increase as the number of
allocated frames increases. FIFO replacement algorithm may face this problem.
more frames ⇒ more page faults

Example: Consider the following references string with frames initially empty.
 The first three references (7,0,1) cases page faults and are brought into the empty frames.
 The next references 2 replaces page 7 because the page 7 was brought in first. x Since 0 is
the next references and 0 is already in memory e has no page faults.
 The next references 3 results in page 0 being replaced so that the next references to 0
causer page fault. This will continue till the end of string. There are 15 faults all together.

FIFO Illustrating Belady’s Anomaly

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Optimal Algorithm
 Optimal page replacement algorithm is mainly to solve the problem of Belady’s Anomaly.
 Optimal page replacement algorithm has the lowest page fault rate of all algorithms.
 An optimal page replacement algorithm exists and has been called OPT.

The working is simple “Replace the page that will not be used for the longest period of time”
Example: consider the following reference string
 The first three references cause faults that fill the three empty frames.
 The references to page 2 replaces page 7, because 7 will not be used until reference 18. x
The page 0 will be used at 5 and page 1 at 14.
 With only 9 page faults, optimal replacement is much better than a FIFO, which had 15
faults. This algorithm is difficult t implement because it requires future knowledge of
reference strings.
 Replace page that will not be used for longest period of time

Optimal Page Replacement

Least Recently Used (LRU) Algorithm

 The LRU (Least Recently Used) algorithm, predicts that the page that has not been used
in the longest time is the one that will not be used again in the near future.
 Some view LRU as analogous to OPT, but here we look backwards in time instead of
forwards.

The main problem to how to implement LRU is the LRU requires additional h/w assistance.

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Two implementation are possible:

1. Counters: In this we associate each page table entry a time -of -use field, and add to
the cpu a logical clock or counter. The clock is incremented for each memory
reference. When a reference to a page is made, the contents of the clock register are
copied to the time-of-use field in the page table entry for that page. In this way we
have the time of last reference to each page we replace the page with smallest time
value. The time must also be maintained when page tables are changed.
2. Stack: Another approach to implement LRU replacement is to keep a stack of page
numbers when a page is referenced it is removed from the stack and put on to the top
of stack. In this way the top of stack is always the most recently used page and the
bottom in least recently used page. Since the entries are removed from the stack it is
best implement by a doubly linked list. With a head and tail pointer.

Note: Neither optimal replacement nor LRU replacement suffers from Belady’s Anamoly. These
are called stack algorithms.

LRU-Approximation Page Replacement

 Many systems offer some degree of hardware support, enough to approximate LRU.
 In particular, many systems provide a reference bit for every entry in a page table, which
is set anytime that page is accessed. Initially all bits are set to zero, and they can also all be
cleared at any time. One bit distinguishes pages that have been accessed since the last clear
from those that have not been accessed.
Additional-Reference-Bits Algorithm
 An 8-bit byte (reference bit) is stored for each page in a table in memory.
 At regular intervals (say, every 100 milliseconds), a timer interrupt transfers control to the
operating system. The operating system shifts the reference bit for each page into the
high-order bit of its 8-bit byte, shifting the other bits right by 1 bit and discarding the low-
order bit.
 These 8-bit shift registers contain the history of page use for the last eight time periods.
 If the shift register contains 00000000, then the page has not been used for eight time
periods.
 A page with a history register value of 11000100 has been used more recently than one
with a value of 01110111.
Second- chance (clock) page replacement algorithm
 The second chance algorithm is a FIFO replacement algorithm, except the reference bit
is used to give pages a second chance at staying in the page table.
 When a page must be replaced, the page table is scanned in a FIFO (circular queue)
manner.
 If a page is found with its reference bit as ‘0’, then that page is selected as the next
victim.

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 If the reference bitvalueis‘1’, then the page is given a second chance and its reference bit
value is cleared (assigned as‘0’).
 Thus, a page that is given a second chance will not be replaced until all other pages have
been replaced (or given second chances). In addition, if a page is used often, then it sets
its reference bit again.
 This algorithm is also known as the clock algorithm.

Enhanced Second-Chance Algorithm

 The enhanced second chance algorithm looks at the reference bit and the modify bit ( dirty
bit ) as an ordered page, and classifies pages into one of four classes:
1. ( 0, 0 ) - Neither recently used nor modified.
2. ( 0, 1 ) - Not recently used, but modified.
3. ( 1, 0 ) - Recently used, but clean.
4. ( 1, 1 ) - Recently used and modified.
 This algorithm searches the page table in a circular fashion, looking for the first page it can
find in the lowest numbered category. i.e. it first makes a pass looking for a ( 0, 0 ), and then
if it can't find one, it makes another pass looking for a(0,1),etc.
 The main difference between this algorithm and the previous one is the preference for
replacing clean pages if possible.

Count Based Page Replacement

There is many other algorithms that can be used for page replacement, we can keep a counter
of the number of references that has made to a page.
a) LFU (least frequently used):
This causes the page with the smallest count to be replaced. The reason for this selection
is that actively used page should have a large reference count.

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This algorithm suffers from the situation in which a page is used heavily during the
initial phase of a process but never used again. Since it was used heavily, it has a large
count and remains in memory even though it is no longer needed.
b) MFU Algorithm:
based on the argument that the page with the smallest count was probably just brought in
and has yet to be used

ALLOCATION OF FRAMES
 The absolute minimum number of frames that a process must be allocated is dependent
on system architecture.
 The maximum number is defined by the amount of available physical memory.
Allocation Algorithms
After loading of OS, there are two ways in which the allocation of frames can be done to
the processes.
 Equal Allocation- If there are m frames available and n processes to share them, each
process gets m / n frames, and the left over’s are kept in a free-frame buffer pool.
 Proportional Allocation - Allocate the frames proportionally depending on the size
of the process. If the size of process i is Si, and S is the sum of size of all processes in
the system, then the allocation for process Pi is ai= m * Si/ S. where m is the free
frames available in the system.
 Consider a system with a 1KB frame size. If a small student process of 10 KB and an
interactive database of 127 KB are the only two processes running in a system with 62
free frames.
 with proportional allocation, we would split 62 frames between two processes, as
follows
m=62, S = (10+127)=137
Allocation for process 1 = 62 X 10/137 ~ 4 Allocation for process 2 = 62 X
127/137 ~57
Thus allocates 4 frames and 57 frames to student process and database
respectively.
 Variations on proportional allocation could consider priority of process rather than just
their size.
Global versus Local Allocation
 Page replacement can occur both at local or global level.
 With local replacement, the number of pages allocated to a process is fixed, and page
replacement occurs only amongst the pages allocated to this process.
 With global replacement, any page may be a potential victim, whether it currently
belongs to the process seeking a free frame or not.
 Local page replacement allows processes to better control their own page fault rates,
and leads to more consistent performance of a given process over different system load
levels.

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 Global page replacement is over all more efficient, and is the more commonly used
approach.

Non-Uniform Memory Access (New)

 Usually the time required to access all memory in a system is equivalent.
 This may not be the case in multiple-processor systems, especially where each CPU is
physically located on a separate circuit board which also holds some portion of the
overall system memory.
 In such systems, CPU s can access memory that is physically located on the same board
much faster than the memory on the other boards.
 The basic solution is akin to processor affinity - At the same time that we try to
schedule processes on the same CPU to minimize cache misses, we also try to allocate
memory for those processes on the same boards, to minimize access times.

THRASHING
 If the number of frames allocated to a low-priority process falls below the minimum
number required by the computer architecture then we suspend the process execution.
 A process is thrashing if it is spending more time in paging than executing.
 If the processes do not have enough number of frames, it will quickly page fault.
During this it must replace some page that is not currently in use. Consequently it
quickly faults again and again.
 The process continues to fault, replacing pages for which it then faults and brings
back. This high paging activity is called thrashing. The phenomenon of excessively
moving pages back and forth b/w memory and secondary has been called thrashing.

Cause of Thrashing
 Thrashing results in severe performance problem.
 The operating system monitors the cpu utilization is low. We increase the degree of
multi programming by introducing new process to the system.
 A global page replacement algorithm replaces pages with no regards to the process to
which they belong.

The figure shows the thrashing

 As the degree of multi programming increases, more slowly until a maximum is

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reached. If the degree of multi programming is increased further thrashing sets in and
the cpu utilization drops sharply.
 At this point, to increases CPU utilization and stop thrashing, we must increase degree
of multiprogramming.
 we can limit the effect of thrashing by using a local replacement algorithm. To prevent
thrashing, we must provide a process as many frames as it needs.

Locality of Reference:
 As the process executes it moves from locality to locality.
 A locality is a set of pages that are actively used.
 A program may consist of several different localities, which may overlap.
 Locality is caused by loops in code that find to reference arrays and other data
structures by indices.
 The ordered list of page number accessed by a program is called reference string.
 Locality is of two types :
1. spatial locality 2. temporal locality

Working set model

 Working set model algorithm uses the current memory requirements to determine the
number of page frames to allocate to the process, an informal definition is “the
collection of pages that a process is working with and which must be resident if the
process to avoid thrashing”. The idea is to use the recent needs of a process to predict
its future reader.
 The working set is an approximation of programs locality. Ex: given a sequence of
memory reference, if the working set window size to memory references, then working
set at time t1 is{1,2,5,6,7} and at t2 is changed to {3,4}
 At any given time, all pages referenced by a process in its last 4 seconds of execution
are considered to compromise its working set.
 A process will never execute until its working set is resident in main memory.
 Pages outside the working set can be discarded at any movement.
 Working sets are not enough and we must also introduce balance set.
 If the sum of the working sets of all the run able process is greater than the size
of memory the refuse some process for a while.
 Divide the run able process into two groups, active and inactive. The collection
of active set is called the balance set. When a process is made active its working
set is loaded.
 Some algorithm must be provided for moving process into and out of the balance
set. As a working set is changed, corresponding change is made to the balance
set.
 Working set presents thrashing by keeping the degree of multi programming as
high as possible. Thus if optimizes the CPU utilization. The main disadvantage
of this is keeping track of the working set.

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Page-Fault Frequency
 When page- fault rate is too high, the process needs more frames and when it is too low,
the process may have too many frames.
 The upper and lower bounds can be established on the page-fault rate. If the actual
page- fault rate exceeds the upper limit, allocate the process another frame or suspend
the process.
 If the page-fault rate falls below the lower limit, remove a frame from the process.
Thus, we can directly measure and control the page-fault rate to prevent thrashing.

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