UNIT II

Universal Asynchronous Receiver Transmitter (UART) Protocol

UART means Universal Asynchronous Receiver Transmitter Protocol. UART is used

for serial communication from the name itself we can understand the functions of
UART, where U stands for Universal which means this protocol can be applied to any
transmitter and receiver, and A is for Asynchronous which means one cannot use
clock signal for communication of data and R and T refers to Receiver and Transmitter
hence UART refers to a protocol in which serial data communication will happen
without clock signal.
UART is established for serial communication. In this article, we will discuss how
parallel communication is established with respect to serial communication using
UART as well as how to configure UART and what is the data format in UART. Later
on, we will discuss the Pros and Cons of the UART.

UART is a Universal Asynchronous Receiver Transmitter protocol that is used for

serial communication. Two wires are established here in which only one wire is used
for transmission whereas the second wire is used for reception. Data format and
transmission speeds can be configured here. So, before starting with the
communication define the data format and transmission speed. Data format and
transmission speed for communication will be defined here and we do not have a
clock over here that’s why it is referred to as asynchronous communication with UART
protocol.

HOW UART WORKS

The UART that is going to transmit data receives the data from a data bus. The data bus is
used to send data to the UART by another device like a CPU, memory, or microcontroller.
Data is transferred from the data bus to the transmitting UART in parallel form. After the
transmitting UART gets the parallel data from the data bus, it adds a start bit, a parity bit,
and a stop bit, creating the data packet. Next, the data packet is output serially, bit by bit at
the Tx pin. The receiving UART reads the data packet bit by bit at its Rx pin. The receiving
UART then converts the data back into parallel form and removes the start bit, parity bit,
and stop bits. Finally, the receiving UART transfers the data packet in parallel to the data
bus on the receiving end:
UART transmitted data is organized into packets. Each packet contains 1 start bit, 5 to 9
data bits (depending on the UART), an optional parity bit, and 1 or 2 stop bits:

START BIT
The UART data transmission line is normally held at a high voltage level when it’s
not transmitting data. To start the transfer of data, the transmitting UART pulls the
transmission line from high to low for one clock cycle. When the receiving UART detects the
high to low voltage transition, it begins reading the bits in the data frame at the frequency of
the baud rate.

DATA FRAME
The data frame contains the actual data being transferred. It can be 5 bits up to 8 bits long if
a parity bit is used. If no parity bit is used, the data frame can be 9 bits long. In most cases,
the data is sent with the least significant bit first.

PARITY
Parity describes the evenness or oddness of a number. The parity bit is a way for the
receiving UART to tell if any data has changed during transmission. Bits can be changed
by electromagnetic radiation, mismatched baud rates, or long distance data transfers. After
the receiving UART reads the data frame, it counts the number of bits with a value of 1 and
checks if the total is an even or odd number. If the parity bit is a 0 (even parity), the 1 bits in
the data frame should total to an even number. If the parity bit is a 1 (odd parity), the 1 bits
in the data frame should total to an odd number. When the parity bit matches the data, the
UART knows that the transmission was free of errors. But if the parity bit is a 0, and the total
is odd; or the parity bit is a 1, and the total is even, the UART knows that bits in the data
frame have changed.

STOP BITS
To signal the end of the data packet, the sending UART drives the data transmission line
from a low voltage to a high voltage for at least two bit durations.

STEPS OF UART TRANSMISSION

1. The transmitting UART receives data in parallel from the data bus:
2. The transmitting UART adds the start bit, parity bit, and the stop bit(s) to the data frame:

3. The entire packet is sent serially from the transmitting UART to the receiving UART. The
receiving UART samples the data line at the pre-configured baud rate:

4. The receiving UART discards the start bit, parity bit, and stop bit from the data frame:
5. The receiving UART converts the serial data back into parallel and transfers it to the data
bus on the receiving end:

ADVANTAGES AND DISADVANTAGES OF UARTS

No communication protocol is perfect, but UARTs are pretty good at what they do. Here are
some pros and cons to help you decide whether or not they fit the needs of your project:

Pros of UART Protocol

 It is having less physical interfacing based on only two lines.

 Simple to configure data and data size. Speed is also configurable. In the
majority of cases, this baud rate is 9600 for the UART protocol. Full duplex
mode configuration is possible by using two wires so that is the major
advantage of UART.
 Error detention is possible
Cons of UART Protocol

 UART is having serial communication, therefore, it has less speed.

 Start bit, stop bit, and the parity bit is other overhead.
 Since this is asynchronous communication so here there are many things
that we need to do in configuration, for instance, we should configure both
devices at the same speed because the clock signal is absent.

I2C PROTOCOL:

The I2C Protocol I2C or I2 C stands for ‘Inter-Integrated Circuit’ and is a simple ‘two wire’ protocol with
just two wires, and was developed by Philips in 1980 for its TV applications which required the
connection of a CPU to many ICs. Today, this bus is very widely used in the embedded fi eld. Th is is a
synchronous, half duplex, serial protocol and is also byte oriented, which means that one byte is sent,
but one bit at a time in a serial fashion. After each byte, an acknowledgement is to be sent by the
receiver IC to the sender IC.

In its simplest form, this can have one master and many slaves (Figure 5.8). Th e master, usually a
microcontroller unit (MCU), can transmit as well as receive, so also the slaves depending on whether
they are input or output devices. For example, a slave which is a ROM can only be read from, an LCD
controller can only be written to, while an external RAM chip can be read and written into. Th e two
signal wires are bidirectional and carry the signals SCL, the serial clock and SDA the serial data. Each
device has its own unique address, usually fi xed by hardware. Figure 5.8. shows the two active wires
connected to pullup resistors (wired AND connection), indicating that they are open collector or open
drain connections, depending on whether the technology is BJT or MOS.

The I2C Protocol

Now let’s have a look at the talk session between a master and its slaves. Refer to Figure 5.9.
i) First, the master issues a START signal. Th is signal causes all the slaves to come to
attention and listen. Th e start condition corresponds to the action of the master
pulling the SDA line low, when the clock (SCL) is high.
ii) The first byte sent by the master is the address. Th is address (7-bit) is sent serially
on the SDA line (MSB fi rst). Note that the bits on the SDA line are synchronized by
the clock signal on the SCL line which means that the data on the SDA line is read
during the time that the clock on the SCL line is high (data is valid at the L to H
transition of the clock).
iii) Just after this, the master also sends the R/W signal indicating the direction of data
transfer (see Figure 5.9 a). Note that all activities are synchronized by the clock.
iv) Only one of the slaves will have the broadcasted address, and on realizing that its
address matches with this address, the particular slave responds by sending an
‘acknowledge’ signal back to the master.
v) Now a byte can be received from the slave if the R/W bit is set to READ, or be
written to the slave, if otherwise (see Figure 5.9b).

vi) Once this data transfer is over, the device (master or slave) that has received the
byte sends an acknowledge signal. Acknowledgement is when the receiver drives
SDA low.
vii) If more bytes are to be transferred, steps v and vi are repeated.
 viii) After this, the master pulls the SCL high, and then the SDA line also. Th is amounts
to a STOP condition when the bus is idle, also indicating that it is available for use by
other slaves.

Th e I2C bus was originally developed as a multi-master bus. This means that more than one device
initiating transfers can be active in the system. In such a case, each master will have to arbitrate for the
bus. I2C controllers have the additional hardware and protocol for this.

There are three standards for I2C bus and have the following three speeds:

i) Slow (under 100 Kbps)

ii) ii) Fast (400 Kbps)
iii) iii) High-speed (3.4 Mbps)

Extended Addressing

Due to the popularity of the I2C bus, the 7-bit address space soon got exhausted. For those who are
designing new I2C compatible ICs, this became a problem and so the I2C standard has been updated to
implement a 10-bit addressing mode. A chip that conforms to the new standard, receives two address
bytes. The first consists of the extended addressing reserved address including the 2 upper bits of the
device address and the Read/Write bit. The second byte contains the 8 lower bits of the address. Any
new design should implement this new addressing scheme. The I2C protocol is very simple, but it is not
as fast as the competing SPI.

The SPI Bus

This is a bus developed by Motorola.

SPI stands for ‘Serial Peripheral Interface’ and as the name suggests it is a serial data transfer protocol,
which is synchronous and full duplex (data can be sent in both directions simultaneously), between a
microcontroller unit (MCU) and a peripheral. As a system, it is a single master, multi-slave system, in
which only one of the slaves is to be enabled at a time. It is a master slave protocol, in the sense that
the master is the unit that generates the clock signal and initiates data transfer. When the master does
this, data transfer occurs in both directions (simultaneously).

Figure 5.10a shows the signals of the SPI bus in a single slave configuration. There are four wires for the
bus: SCLK, the clock generated by the master; MOSI, which carries data from the master to the slave;
MISO which carries data from the slave to the master; and SS, the slave select signal. Th e last pin SS
(Slave Select) of the master is to be connected to the chip enable pin of the slave to be selected, and is
usually an active low signal.

MOSI stands for Master Out, Slave In

MISO stands for Master In, Slave Out

Now see

Figure 5.10b which shows a multi-slave SPI configuration. The master is usually a microcontroller which
has an SPI controller with the specified pins. The MCU’s SPI controller unit has three SS pins, but only
one slave is selected at a time. Slaves that are currently not selected should have their MOSI and MISO
tristated and thus be isolated from the system.

The SPI Protocol

The transfer of data using an SPI interface can be thought of as a large shift register shared between the
master and slave devices. Data is clocked IN at the same time as it is clocked OUT of the devices (the
clock is shared by the two devices). In addition, there should be a transmit buff er register at the
transmitter side, and a receive buffer register at the receiver side.
The SPI protocol behaves like a ring buff er, so that whenever the master sends a byte to the slave, the
slave sends a byte back to the master. Essentially, two actions take place in an SPI clock cycle which are
as follows:

i) The master sends a bit on the MOSI line which the slave reads from the same line
ii) ii) The slave sends a bit on the MISO line and the master reads it from that same line
Figure 5.11 shows the data transfer between a master and a slave. There are shift registers in the master
and slave which are serially connected using the MOSI and MISO pins. In this interconnection, a bit is
shifted from master to slave and slave to master simultaneously (full duplex). Not all transmissions
require all these operations to be meaningful but this is the way the protocol works. If, say, the
individual shift registers are 8 bits long, it is apparent that after 8 clock cycles, the data in the master and
slave gets exchanged. The length of the shift registers is decided by the manufacturer of the SPI
controller.

Once a set of data has been transmitted, the buffer at the transmitter side should get fresh data to be
sent. Similarly, the received data should be copied and saved at the receiver side. This process can
continue until the required block of data is transferred.

Points to Note

i) SPI can operate at a higher speed compared to the I2C protocol, but it has a serious problem in
that it has no acknowledged signal. So the master has no way of confirming the receipt of the
data sent.
ii) The protocol works best for a single slave system.
iii) Clock frequencies up to 70 MHz are possible.
iv) Slave devices such as serial EEPROM, fl ash memory, LCD drivers, memory cards, serial ADCs,
etc. are devices that frequently use the SPI protocol.
v) Popular MCUs like ARM, PIC, AVR, etc. have SPI controllers as a standard feature.

Zigbee
This is a wireless network of active modules, founded on a packet-based protocol known as the IEEE
802.15.4. ZigBee-compliant products operate in unlicensed bands worldwide, including 2.4GHz (global),
902 to 928 MHz (America) and 868 MHz (Europe). The transmission range is from 10 to 100 m,
depending on the power output and environmental characteristics.

Communication Technology ZigBee uses direct sequence spread spectrum in the 2.4 GHz band, with off
set- quadrature phase-shift keying modulation. T e 868 and 900 MHz bands also use direct-sequence
spread spectrum but with binary phase- shift keying modulation.

Application Arena The name Zigbee was suggested by the alliance which standardized and developed
this protocol; the name was coined to compare the data movement in the network, to the zigzag
movement that honey bees use to share information, such as the location, distance and direction of a
newly discovered food source to fellow colony members.

The application arena of Zigbee is such that the focus is on low data rate and low power dissipation, to
be useful for ‘monitoring and control’. The applications lined up for using Zigbee are industrial control,
embedded sensing, medical data collection, remote metering, smoke and intruder warning, building
automation and domotics (Th e word domotics means home robotics, as ‘domus’ is the latin word for
home).

The field of domotics covers the whole range of smart home technology, including the highly
sophisticated sensors and controls that automate temperature, lighting, security systems, toys and so
on. A special area of interest for Zigbee is ‘wireless sensor networks’ (Section 4.4).

To formalize and standardize the protocol, an alliance of interested groups was formed naming itself
the ‘Zigbee Alliance’. The initial eight promoter companies were Chipcon, Ember, Freescale, Honeywell,
Mitsubishi, Motorola, Philips and Samsung. Now, things are looking up for Zigbee with a growing
number of companies (over 175) expressing their commitment to providing Zigbee compliant products
and solutions.

Understanding Zigbee Zigbee involves the interconnection of nodes. Each node has a processing unit
and peripherals—some of the peripherals may be sensors, others may be actuators—besides this,
nodes need to transmit and receive; as such, there is a transceiver and an antenna as well in each node.

Zigbee Nodes Zigbee is based on a master–slave confi guration. Zigbee defi nes two diff erent kinds of
devices which act as the nodes in the network.

i) Zigbee Full Function Device (FFD): This device can act as a coordinator or router. The
coordinators and routers have to listen to the network continuously.
ii) ii) Zigee Reduced Function Device (RFD): Such devices can only act as slaves. They can find a
network and transfer data from its application, if necessary. They are designed for energy
saving and are typically battery powered.

A network consists of FFDs and RFDs connected in a mesh, star, cluster mesh or peerto-peer topology.
See Figures 5.39 and Figure 5.40 which show these topologies. Th e components of the network are
defi ned as follows:
Zigbee Co-Ordinator Only one coordinator is required for a network—this is the node which initiates
the formation of the network—new nodes can be added only at the behest of the coordinator. But
once the network is formed, the coordinator becomes just a ‘router’. It is a full function device. In a
peer-to-peer network, there is no specific co-ordinator as all nodes are peers and have equal
functionality, and all nodes use full function devices.

Zigbee Router As the name indicates, it participates in mulit-hop routing of messages from one node to
another. It should be a full function device. The number of routers depends on the application
requirements. The idea is that messages from any point of the network must get routed to any other
point of the network, through any path; so a series of routers are needed.

Zigbee End Device It is a reduced function device, in that it cannot do routing of messages. It can talk
with a ZC or ZR but nothing more. F igure 5.41 shows a typical Zigbee node. There is an RF transceiver
module with an antenna and also a processor module connected to sensors/actuators. There are also
components which take care of the Zigbee protocol.

Th e module which contains the MCU and the Zigbee network hardware is given the name ‘MCU
module’.
The OSI Model and Zigbee

The Zigbee standard is loosely based on the OSI 7-layer model. Th e IEEE 802.15.4 wireless standard
defines the lower two layers, the application is determined by the customer needs and the standards of
the Zigbee Alliance, define the remaining three intermediate layers.
Projects Using Zigbee From an academic point of view, projects can be done in which remote
transmission is necessary. For this, the nodes with a microcontroller and peripherals can be developed.
Since Zigbee is a high level protocol, it is not possible to implement it easily by using the instructions
available in the processor. Dedicated hardware and firmware plus the RF section are needed. The
solution is to buy a Zigbee module from any of the standard sources. Zigbee modules to fi t your
application are available at relatively low cost, from many sources.