AT27C040

Features
• Fast Read Access Time - 70 ns
• Low Power CMOS Operation
100 µA max. Standby
30 mA max. Active at 5 MHz
• JEDEC Standard Packages
32-Lead 600-mil PDIP
32-Lead 450-mil SOIC (SOP)
32-Lead PLCC
32-Lead TSOP
• 5V ± 10% Supply
• High Reliability CMOS Technology
4-Megabit
2000V ESD Protection
200 mA Latchup Immunity (512K x 8)
• Rapid™Programming Algorithm - 100 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs OTP EPROM
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges

Description AT27C040
The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time pro-
grammable read only memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 70 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel's scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically 8 mA in active mode and less than 10
µA in standby mode.
(continued)

Pin Configurations PDIP, SOIC Top View

Pin Name Function
A0 - A18 Addresses
O0 - O7 Outputs
CE Chip Enable
OE Output Enable

PLCC Top View

TSOP Top View

0189E-A–7/97

1
The AT27C040 is available in a choice of industry standard Switching Considerations
JEDEC-approved one-time programmable (OTP) plastic
Switching between active and standby conditions via the
PDIP, PLCC, SOIC (SOP), and TSOP packages. The
Chip Enable pin may produce transient voltage excursions.
device features two-line control (CE, OE) to eliminate bus
Unless accommodated by the system design, these tran-
contention in high-speed systems.
sients may exceed data sheet limits, resulting in device
Atmel's AT27C040 has additional features to ensure high non-conformance. At a minimum, a 0.1 µF high frequency,
quality and efficient production use. The Rapid™Program- low inherent inductance, ceramic capacitor should be uti-
ming Algorithm reduces the time required to program the lized for each device. This capacitor should be connected
part and guarantees reliable programming. Programming between the VCC and Ground terminals of the device, as
time is typically only 100 µs/byte. The Integrated Product close to the device as possible. Additionally, to stabilize the
Identification Code electronically identifies the device and supply voltage level on printed circuit boards with large
manufacturer. This feature is used by industry standard EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
programming equipment to select the proper programming be utilized, again connected between the VCC and Ground
algorithms and voltages. terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.

2 AT27C040
 AT27C040

Block Diagram

Operating Modes
Mode/Pin CE OE Ai VPP Outputs
Read VIL VIL Ai X(1) DOUT
Output Disable X VIH X X High Z
Standby VIH X X X High Z
Rapid Program(2) VIL VIH Ai VPP DIN
PGM Verify X VIL Ai VPP DOUT
PGM Inhibit VIH VIH X VPP High Z
A9 = VH(3)
(4)
Product Identification VIL VIL A0 = VIH or VIL X Identification Code
A1 - A18 = VIL
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identificaton byte and high (VIH) to select the Device Code byte.

Absolute Maximum Ratings*

Temperature Under Bias ......................-55°C to +125°C

Storage Temperature............................-65°C to +150°C

Voltage on Any Pin with

Respect to Ground ..............................-2.0V to +7.0V (1)

Voltage on A9 with
Respect to Ground ...........................-2.0V to +14.0V (1)

VPP Supply Voltage with

Respect to Ground ............................-2.0V to +14.0V (1)
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the oper-
ational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.

3
DC and AC Operating Conditions for Read Operation
AT27C040
-70 -90 -12 -15

Operating Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C
Temperature (Case) Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C
VCC Power Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%

DC and Operating Characteristics for Read Operation

Symbol Paramter Condition Min Max Units
ILI Input Load Current VIN = 0V to VCC ±1 µA
ILO Output Leakage Current VOUT = 0V to VCC ±5 µA
IPP1 (2) VPP(1) Read/Standby Current VPP = VCC 10 µA
ISB1 (CMOS), CE = VCC ± 0.3V 100 µA
ISB VCC1(1) Standby Current
ISB2 (TTL), CE = 2.0 to VCC + 0.5V 1 mA
f = 5 MHz, IOUT = 0 mA,
ICC VCC Active Current 30 mA
CE = VIL
VIL Input Low Voltage -0.6 0.8 V
VCC +
VIH Input High Voltage 2.0 V
0.5
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and
IPP.

AC Characteristics for Read Operation

AT27C040
-70 -90 -12 -15
Symbol Parameter Condition Min Max Min Max Min Max Min Max Units
CE = OE
tACC(3) Address to Output Delay 70 90 120 150 ns
= VIL
tCE(2) CE to Output Delay OE = VIL 70 90 120 150 ns
tOE(2)(3) OE to Output Delay CE = VIL 30 35 35 40 ns
OE or CE High to Output
tDF(4)(5) Float, whichever occurred 20 20 30 30 ns
first
Output Hold from Address,
tOH CE or OE, whichever 0 0 0 0 ns
occurred first
Note: 2, 3, 4, 5 - see AC Waveforms for Read Operation

4 AT27C040
 AT27C040

AC Waveforms for Read Operation(1)

Notes: 1. Tiiming measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.

Input Test Waveforms and Measurement Levels Output Test Load

Pin Capacitance
(f = 1 MHz, T = 25°C) (1)
Typ Max Units Conditions
CIN 4 8 pF VIN = 0V
COUT 8 12 pF VOUT = 0V
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.

5
Programming Waveforms(1)

Notes: 1. The Input Timing Reference is 0.8V for V IL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C040 a 0.1 µF capacitor is required across VPP and ground to supress spurious voltage tran-
sients.

DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol Parameter Test Conditions Min Max Units
ILI Input Load Current VIN = VIL, VIH ±10 µA
VIL Input Low Level -0.6 0.8 V
VIH Input High Level 2.0 VCC + 0.7 V
VOL Output Low Voltage IOL = 2.1 mA 0.4 V
VOH Output High Voltage IOH = -400 µA 2.4 V
ICC2 VCC Supply Current (Program and Verify) 40 mA
IPP2 VPP Supply Current CE = VIL 20 mA
VID A9 Product Identification Voltage 11.5 12.5 V

6 AT27C040
 AT27C040

AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol Parameter Test Conditions(1) Min Max Units
tAS Address Setup Time 2 µs
tOES OE Setup Time 2 µs
Input Rise and Fall Times
tDS Data Setup Time (10% to 90%) 20ns 2 µs
tAH Address Hold Time 0 µs
Input Pulse Levels
tDH Data Hold Time 0.45V to 2.4V 2 µs
tDFP OE High to Output Float Delay(2) 0 130 ns
Input Timing Reference Level
tVPS VPP Setup Time 2 µs
0.8V to 2.0V
tVCS VCC Setup Time 2 µs
tPW CE Program Pulse Width (3) Output Timing Reference Level 95 105 µs
0.8V to 2.0V
tOE Data Valid from OE(2) 150 ns
tPRT VPP Pulse Rise Time During Programming 50 ns
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
— see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.

Atmel's 27C040 Integrated Product Identification Code

Pins
Hex Data
Codes A0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0 0 0 0 1 1 1 1 0 1E
Device Type 1 0 0 0 0 1 0 1 1 0B

7
Rapid Programming Algorithm
A 100 µs CE pulse width is used to program. The address pulse. If the byte fails to verify after 10 pulses have been
is set to the first location. VCC is raised to 6.5V and VPP is applied, the part is considered failed. After the byte verifies
raised to 13.0V. Each address is first programmed with one properly, the next address is selected until all have been
100 µs CE pulse without verification. Then a verifica- checked. VPP is then lowered to 5.0V and VCC to 5.0V. All
tion/reprogramming loop is executed for each address. In bytes are read again and compared with the original data to
the event a byte fails to pass verification, up to 10 succes- determine if the device passes or fails.
sive 100 µs pulses are applied with a verification after each

8 AT27C040
 AT27C040

Ordering Information
ICC (mA)
tACC (ns) Active Standby Ordering Code Package Operation Range
70 30 0.1 AT27C040-70JC 32J Commercial
AT27C040-70PC 32P6 (0°C to 70°C)
AT27C040-70RC 32R
AT27C040-70TC 32T
30 0.1 AT27C040-70JI 32J Industrial
AT27C040-70PI 32P6 (-40°C to 85°C)
AT27C040-70RI 32R
AT27C040-70TI 32T
90 30 0.1 AT27C040-90JC 32J Commercial
AT27C040-90PC 32P6 (0°C to 70°C)
AT27C040-90RC 32R
AT27C040-90TC 32T
30 0.1 AT27C040-90JI 32J Industrial
AT27C040-90PI 32P6 (-40°C to 85°C)
AT27C040-90RI 32R
AT27C040-90TI 32T
120 30 0.1 AT27C040-12JC 32J Commercial
AT27C040-12PC 32P6 (0°C to 70°C)
AT27C040-12RC 32R
AT27C040-12TC 32T
30 0.1 AT27C040-12JI 32J Industrial
AT27C040-12PI 32P6 (-40°C to 85°C)
AT27C040-12RI 32R
AT27C040-12TI 32T
150 30 0.1 AT27C040-15JC 32J Commercial
AT27C040-15PC 32P6 (0°C to 70°C)
AT27C040-15RC 32R
AT27C040-15TC 32T
30 0.1 AT27C040-15JI 32J Industrial
AT27C040-15PI 32P6 (-40°C to 85°C)
AT27C040-15RI 32R
AT27C040-15TI 32T

Package Type
32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
32P6 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
32R 32-Lead, 0.450" Wide, Plastic Gull Wing Small Outline (SOIC)
32T 32-Lead, Plastic Thin Small Outline Package (TSOP)