CAMBRIDGE INSTITUTE OF TECHNOLOGY

An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

Question Bank
Subject: Analog Electronic Circuits
Subject code: EC202 Academic year: 2024-2025
Faculty Incharge: Dr. Kavitha MV and Prof. Lokesh

Module 1:
1. With neat schematic diagrams, explain the working principle of zero bias ,xreverse bias and
forward bias of a pn junction.
2. A silicon pn junction at T = 300 K, with doping concentrations of Na = 1016cm-3 and Nd =
1015cm-3. Assume ni = 1.5 x 1010cm-3 and Cj0 = 0.5 pF. Calculate the junction capacitance at
VR = 1V and VR = 5V. Write a comment the variation of junction capacitance for the variation
in reverse voltage VR.Discuss the areas on which we need to focus for capacity building for
entrepreneurs in India.
3. A silicon at T = 300 K doped with phosphorous and boron at a concentration of Nd = 1016cm-
3
and Na = 5 x 1016cm-3 respectively.Calculate the thermal equilibrium electron and hole
concentrations. Assume ni = 1.5 x 1010cm-3.Discuss with examples how entrepreneurs can
bring socioeconomic transformation in a region.
4. With a neat constructional diagram, explain the constructional details and the concept of
formation of channel or inversion layer in n-channel enhancement type MOSFET.
5. With a neat constructional diagram, explain the working principle of Light-Emitting-Diode.
Also, write the types of compound semiconductors used in constructing the Light-Emitting-
Diodes for emitting different colors of light.
6. Describe the current relationships in BJT and then obtain the expressions for common base
current gain (α) and common emitter current gain (β).
7. With relevant circuit diagrams and necessary equations, explain the iteration and graphical
analysis models used to understand the concept of diode characteristics
8. Using a piecewise linear model, determine the diode voltage and diode current in the circuit
shown in figure 1. Also determine the power dissipated in the diode. Assume piecewise linaer
diode parameters of Vγ = 0.6V and rf = 10Ω.

Figure 1
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

9. Analyze and determine the DC and AC quantities in the circuit shown in figure 2. Assume the
circuit and diode parameters of Vps = 5V, R = 5KΩ, Vγ = 0.6V, and vi = 0.1sinωt(V).

Figure 2
10. With a neat constructional diagram, explain the constructional details and the concept of
formation of channel or inversion layer in p-channel enhancement type MOSFET.
11. With a neat constructional diagram, explain the working principle of Schottky barrier diode.
Also, write the applications of Schottky barrier diode.
12. With a neat circuit diagram and output characteristics, explain the concept of BJT as a
constant current source in common-base configuration.
13. Explain structure and working principle of SiC based MOSFETS.
14. Explain structure and working principle of GaN MOSFET.
15. What is forbidden energy gap? Mention the value of energy gap in silicon and gallium arsenide
semiconductors.
16. Define drift and diffusion currents in semiconductors.
17. List the differences between a solar cell and a photo diode.
18. List the differences between a BJT and a MOSFET.
19. List any two advantages of doping in semiconductors.
20. What is junction capacitance. Mention the expression for the junction capacitance when the
pn junction is reverse biased.
21. List any two advantages of Schottky barrier diode.
22. Mention any four applications of bipolar junction transistor.
23. What is base width modulation in BJT?
24. Explain construction , working principle applications of : (i) Solar Cell (ii) Photo Diode (iii)
Zener Diode
25. Differentiate between intrinsic and extrinsic semiconductors.
26. Explain AC analysis of diode with appropriate derivation for iD,IDQ,vd and rd.
27. Explain the operation of CMOS inverter.
28. Calculate the current in an n-channel MOSFET. Consider an n-channel enhancement-mode
MOSFET with the following para meters: VTN = 0.4V, W = 20μm, L = 0.8μm,μn =
650cm2/V–s, tox = 200Å, and ox = (3.9)(8.85 × 10−14) F/cm. Determine the current when
the transistor is bi ased in the saturation region for (a) vGS = 0.8Vand (b) vGS = 1.6V.
29. Determine the source-to-drain voltage required to bias a p-channel enhancement-mode
MOSFET in the saturation region. Consideranenhancement-modep-channel MOSFET
forwhich Kp = 0.2mA/V2, VTP=−0.50V, and iD = 0.50 mA.
30. Describe the basic structure and operation of npn and pnp bipolar transistors.
31. What are the bias voltages that need to be applied to an npn bipolar transistor such that the
transistor is biased in the forward-active mode?
32. Define the conditions for cutoff, forward-active mode, and saturation mode for a pnp bipolar
transistor.
33. Define common-base current gain and common-emitter current gain.
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

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34. State the relationships between collector, emitter, and base currents in a bipolar transistor
biased in the forward-active mode.
35. Define Early voltage and collector output resistance.
36. Describe a simple common-emitter circuit with an npn bipolar transistor and dis cuss the
relation between collector–emitter voltage and input base current.
37. Describe the parameters that define a load line. Define Q-point.
38. Explain construction, working and operating characteristics of n-channel JFET. Design a first
order high pass filter for 𝑓𝐿 = 5𝐾𝐻𝑧, 𝑝𝑎𝑠𝑠 𝑏𝑎𝑛𝑑 𝑔𝑎𝑖𝑛 = 4. Assume 𝐶 = 0.01 𝜇𝐹. Draw the
circuit diagram and its frequency response

Module 2:

1. Analyze and design the DC analysis of npn transistor in common-emitter configuration.

Assume the transistor is biased in forward-active mode. Also write its DC equivalent circuit.
2. Calculate the IB, IC, IE, VCE, and the transistor power dissipation (PT) in the circuit shown in
figure 1. Assume the transistor parameters are VBE(on) = 0.7V and β = 200. Also indicate the
calculated values in the circuit diagram.

3. Calculate the Q-point values (IBQ, ICQ, & VCEQ) and DC load line values (VCEmax & ICmax) for
the circuit shown in figure 2. Assume the transistor parameters are VBE(on) = 0.7V and β = 75.
Also plot the load line with the output characteristics of a transistor.

4. With neat circuit diagrams and relevant equations, explain the transistor behaves as a switch
and digital logic.
5. Analyze and design the DC analysis of pnp transistor in common-emitter configuration.
Assume the transistor is biased in forward-active mode. Also write its DC equivalent circuit.
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

6. Analyze the common-emitter circuit with a pnp transistor for the circuit shown in figure 3. Calculate
the IB, IC, IE and Rc such that VEC = V+/2 Assume the transistor parameters are VEB(on) =
0.6V and β = 100. Also indicate the calculated values in the circuit diagram.

7. With necessary equations, explain the DC load line analysis for the circuit shown in figure 4.
Also plot the individual input and output DC load line with the input and output characteristics
of a transistor respectively.

Figure 3

8. Design and plot the voltage transfer curves for the circuit shown in figure 5. Assume the
transistor parameters are VBE(on) = 0.7V and β = 120, VCE(sat) = 0.2V and VA = Ꝏ.

F Figure 5
9. What do you understand by ‘Bias stability’ of a transistor ? Why is it necessary ? Explain the
working of self-bias or voltage divider bias circuit for common emitter BJT.
10. What do you mean by biasing of a transistor ? Explain single base resistor biasing or fixed
bias for common emitter BJT. Mention its advantages and disadvantages.
11. What are the steps used to analyze the dc response of a bipolar transistor circuit?
12. Describe how an npn transistor can be used to switch an LED diode on and off.
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

13. Describe a bipolar transistor NOR logic circuit.

14. Describe how a transistor can be used to amplify a time-varying voltage.
15. Discuss the advantages of using resistor voltage divider biasing compared to a single base
resistor.
16. How can the Q-point be stabilized against variations in transistor parameters?
17. The circuit elements in Figure 6 , RB = 200 k , RC =4 k , and V+ = 9 V. The transistor parameters
are β = 100, VBE(on) = 0.7 V, and VCE(sat) = 0.2 V. Plot the voltage transfer characteristics for
0 ≤ VI ≤ 9 V.

Figure 6
18. The parameters of the circuit shown in Figure 7 , V+ =3.3V, V− =−3.3V, VBB =0, RB =640k
, RE =2.4k , and RC = 10k . The transistor parameters are β = 80 and VBE(on) = 0.7 V.
Calculate all transistor currents and VCE.

Figure 7
19. Design the common-base circuit shown in Figure 8 such that IEQ = 0.125mA and VECQ = 2.2V.
The transistor parameters are β = 110 and VEB(on) = 0.7V

Figure 8
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

20. Consider the circuit shown in Figure 9. Assume VCC = 2.8 V, β =150, and VBE(on) = 0.7V. Design the
circuit such that ICQ = 0.12mA and VCEQ = 1.4V

Figure 9

21. For the circuit shown in Figure 10, let VCC = 3.3 V, RE = 500Ω , RC =4k ,R1 =85kΩ ,R2 =35kΩ ,and
β =150. (a) Determine RTH and VTH. (b) Find IBQ, ICQ, and VCEQ.

Figure 10
22. Consider the circuit shown in Figure 11. The transistor parameters are β =150 and VBE(on) = 0.7V. The
circuit parameters are RE = 2kΩ and RC =10kΩ . Design a bias-stable circuit such that the quiescent
output voltage is zero. What are the values of ICQ and VCEQ?

Figure 11
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

Module 3:

1. Design a first order high pass filter for 𝑓𝐿 = 5𝐾𝐻𝑧, 𝑝𝑎𝑠𝑠 𝑏𝑎𝑛𝑑 𝑔𝑎𝑖𝑛 = 4. Assume 𝐶 = 0.01 𝜇𝐹. Draw
the circuit diagram and its frequency response.
2. Design an averaging amplifier in inverting mode. Assume the input voltages are 𝑉𝑎 = 1𝑉, 𝑉𝑏 = 2𝑉, 𝑉𝑐
= 3𝑉. Draw the circuit diagram.
3. Draw and explain the working of integrator/differentiator using op amp. Obtain expressions for the cut
off frequencies 𝑓𝑎 𝑎𝑛𝑑 𝑓𝑏.
4. What is a comparator? Draw and explain the working of comparator in non-inverting mode. Draw the
different waveforms when the reference voltage 𝑉𝑅 is positive and negative.
5. What is zero crossing detector? State its drawback.
6. Design an op amp circuit with three input voltage V1,V2,V3 such that to get an output voltage of Vo=-
(0.5V1+V2+2V3).
7. Draw the circuit of first order narrow band pass/ narrow band reject (notch) filter and explain its
operation.
8. Explain the working of a first order active low pass/ high pass filter with circuit and frequency
response.
9. Design a low pass filter using op amp at a cutoff frequency of 1 kHz with pass gain of 2.
10. With a neat diagram explain the op amp based inverting scaling amplifier and averaging circuit with
relevant expressions for the output.
11. With a neat diagram explain the op amp based difference amplifier circuit with relevant expressions
for the output.
12. Draw the schematic diagram of op amp based Wein bridge oscillator and explain with relevant
expression for the output frequency.
13. A certain Wein bridge oscillator uses R = 4.7 kΩ , C =0.01 𝜇𝐹 , and Rf = 2R1. What is the frequency
of oscillation.
14. Draw the schematic diagram of a triangular wave generator using a square wave generator and an
integrator .Also draw the input and output waveforms.
15. In the triangular wave generator of figure 1 , R2 = 1.2 kΩ, R3 = 6.8 kΩ ,R1 = 120 kΩ and C1 = 0.01
𝜇𝐹 . Determine (i) the peak to peak output amplitude of the triangular wave and (ii) the frequency
triangular wave.
16. Draw the schematic diagram of a sawtooth wave generator. Also draw its input and output waveforms.
17. For the VCO of figure 2 determine the change in output frequency if Vc is varied between 9V and
11V. Assume that +V = 12V, R2 = 15 kΩ , R3 = 100 kΩ , R1 = 6.8 kΩ and C1 = 75 pF.
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

18. Design a narrow band pass filter so that fC = 2 kHz ,Q = 20, and AF = 10.
19. Design a 400 Hz active notch filter.
20. Explain the following terms (i) CMRR (ii) Common mode gain (iii) Differential mode gain (iv) input
and output impedance (v) slew rate (vi) input offset voltage and current (vii) frequency limitation

Module 4:

1. With circuit diagram and waveform, explain the working of binary weighted resistors 4-bit digital to
analog converter.
2. In a R-2R digital to analog converter Rf=12kΩ , R= 5 kΩ , calculate the output voltage when only the
LSB is ON , and the output voltage when all the four bits are ON. Assume reference voltage is +5V.
3. Design a circuit using 555 timer to get a mono shot pulse width 10ms. Choose C=1uF .
4. Explain the operation of a successive approximation analog to digital converter and mention it’s
advantages.
5. Mention the applications of 555 IC Timer.
6. Design an astable multivibrator using 555 IC timer with
(i) fo = 1 kHz and D = 40%
(ii) fo = 2 kHz and D = 50%
(iii) fo = 1 kHz and D = 70%

Assume c = 0.01uF for all cases.

7. Explain the functional block diagram of IC 555 timer.

8. Design a monostable 555 timer to produce an output pulse of 10msee wide . Draw the circuit diagram.
9. In the astable multivibrator RA=2.2kΩ, RB=3.9kΩ and C=0.1µF. Determine the positive pulse width
tc, negative pulse width td and free-running frequency.
10. Explain the operation of Astable /Monostable multivibrator and write it’s applications.
11. Draw a block diagram of a PLL and explain its basic operation.
12. What is the difference between capture range and lock range for a PLL?
13. Give at least two applications for a fixed-frequency oscillator or VCO.
14. Give at least two applications for the PLL.
15. Design a square wave generator that is adjustable from 5 kHz to 20 kHz.
16. Define the following (i) sampling theorem (ii) resolution and sampling rate
17. Explain practical Digital-to-Analog Converter Limits.
18. Explain sample and hold circuit.

Module 5:

1. Differentiate between PCB and PWB.

2. Explain different types of PCB based on layers with a neat diagram/
3. List and explain the materials used for PCB board manufacturing.
4. List and explain all the electrical layers of PCB.
5. List and explain all the mechanical layers of PCB.
6. Explain in depth all the key elements of PCB/
7. Explain two types of components used for making PCB?
8. Explain in brief different layers used in two layer PCB?
9. With a neat diagram explain PCB layout flow process.
 CAMBRIDGE INSTITUTE OF TECHNOLOGY
An Autonomous Institution
K.R. PURAM, BANGALORE – 560 036, Ph: 080-2561 8798 / 2561 8799
Fax: 080-2561 8789, email: principal@cambridge.edu.in
Affiliated to VTU, Belagavi| Approved by AICTE, New Delhi |NAAC A+ & NBA Accredited|

NIRF Innovation Ranked, UGC 2(f), ISO Certified| Recognized by Govt. of Karnataka

10. Mention the required input file type for PCB layout.
11. Mention different types of via’s used in PCB.
12. Explain in details the PCB physical design flow.
13. Explain the purpose of solder mask and silkscreen.
14. What is routing?
15. What is DRC,DFM? Why these tests are done?
16. Mention the IPC standards for schematic, PCB designing, materials and fabrication.