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Logic Gates

The document is a lab manual for studying and verifying truth tables of various logic gates using an experimental kit. It outlines the learning outcomes, apparatus required, theoretical background on logic gates, and a detailed procedure for conducting experiments. Additionally, it discusses potential systematic and random errors that may affect the results.

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Arjun Patil
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0% found this document useful (0 votes)
5 views4 pages

Logic Gates

The document is a lab manual for studying and verifying truth tables of various logic gates using an experimental kit. It outlines the learning outcomes, apparatus required, theoretical background on logic gates, and a detailed procedure for conducting experiments. Additionally, it discusses potential systematic and random errors that may affect the results.

Uploaded by

Arjun Patil
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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EEE Lab Manual | 2024 TITLE: - To study and verify trut (AND/OR/NOTINANDINORIKORIR NOISES coe Learning Outcome: i) To study basic symbols of various Logic Gates ii) To veri i) sate Truth Tables of various Logic Gates practically on Experimental Kit. iii) Identify various ICs and their specification. APPARATUS: - + Logic gates (IC) trainer kit + Connecting patch chords. + IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486 THEORY:- The basic logic gates are the building blocks of more complex logic circuits. These logic gates perform the basic Boolean functions, such as AND, OR, e@ NAND, NOR, Inversion, Exclusive-OR, Exclusive-NOR. Fig. below shows the circuit symbol, Boolean function, and truth. Itis seen from the Fig that each gate . has one or two binary inputs, A and B, and one binary output, C. The small circle ‘on the output of the circuit symbols designates the logic complement. The AND, OR, NAND, and NOR gates can be extended to have more than two inputs. A ) gate can be extended to have multiple inputs if the binary operation it represents is commutative and associative These basic logic gates are implemented as sm (ssiCs) or as part of more complex medium scale (MSI) or very large-scale (LSI) integrated circuits. Digital IC gates are classified not only by thelr logic 0 the specific logic-circuit family to which they belong. Each pon which more complex digital all-scale integrated circuits operation, but als ‘ own basic electronic circuit uy logic family has its ; e developed. The followin funcd logic families are the most circuits and functions ar‘ frequently used. TIL- Transistor-transistor logic ECL - Emitter-coupled logic MOS - Metal-oxide semiconductor e i ctor CMOS - Complementary metakoxide semicondu page 3814 used in and relat 108 logic. There are V! ies, ECL is used only n field effect i fail 4 CMOS, are based © circuits because of their higt 1d circuits igh component targe scale integrate wet eoneumpion. CMOS fOolc CONSUMES fa a F less, Power rarious commercial integrated circuit chi PS avail abl, eng ively tow i than Mi qT ICs are usually distinguished by numerical designation as the 5499 ang = INPUTS Series, =NO | GATE ‘SYMBOL a | a es a Search A. s a a sO cae Tale c B. - - : 1 i 0 Z| NOR IC = v v ¢ ” a cine. (es i B 1 0 i 1 1 0 7 [aD tt : = x (C=AB ota 7 1 0 7 tpt ; o| 0 7 pa T iso T Ta T 3 : gees 1 6 : i 9 1 1 0 Figure 1; Basic Gates and Truth Tables AND GATE 7408 Yoo fal al | 3, ORGATE 7432 PROCEDURE: @. Place the IC on the Experimental kit. b. Connect Vec and Ground to respective pins of IC on Trainer Kit. © Connect the inputs to pins from the Input Section provided in the IC Trainer Kit, 4. Connect the outputs of IC to the of LEDs on Output Section. e. Apply various combinations of Inputs according to the truth table and observe condition of LEDs (Output). Verify Truth Tables, CONCLUSION: The truth -table Fox basic logic gates 1905 vex, Sauer ee a *PEEMEN Kit based on boeoleon matey es eeved ~sesulls Con foxmi heir behaviour - Wie) a crn 8 Orcanacy of Canmections inthe experi Sap could lead up to in consistencies in Outputs *Vazietions in +he Suppl i an availa Voltage sight affect the perfor SYSTEMATIC ERRORS: |opse Ox WK RANDOM ERRORS: Ciscuit noise & inteexence impacting he cbserver! oud *Flickeving IED @utput Coused by Unstable input signals fointly path cords . \ J Vs wt \now xP! AM: ) _ ToDesian aoning ovtome us To identi 4 Teapely To desi vi)

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