......
,.aw,, ......
......
....., .....
,;.....
............,..............
Hnce Vf O
. :,-.,
••
Widl S c:lokd, v" v1
Hence • k.a .. ., ,emaua. dowd, die
reproduct,on ,;f the Input • a:nal V ff dJe tWJIQ
ideal IWJlul w,th 1a, closed
when open, ,tis evident ~ AOC
or autnuatwn dun g
Jn practJce the
Jn fig,(b), the I
·gnal waveform. during the desired tt
oduction of the It is obvious that with S dcr...ed,
otherwise.
externally applied output v0 = v1 •
nal is generally a Thu~ an inpui signal iJ ua....,...._..=..
when S opens.
time-sdection gate. In pr.actice, ~ - : g ~
the input wavefonn, the configurations may be adopt=d for a
ular etc., a sampling
12.2 Classification of.Sampling Gates
can be studied with ~ Sampling g,a:es may be
The main difference unidirectional sampli=g g.a:t:s. a::d b:dirtttian.al ~ gMa.
cuit of fig.(a) U!>CS a If the inpi.-i sigr. coasms ~ of" c.:::..fueclioul , - .
it.ch. the sampling gu · req-_--ired to respond a ~ d' only cne pobrily
It is then termed i:.s t.,-,,tt1·:~rlnt'l~l gu.
g~:e 15 l'CG""-~~ to h3:id:e t h e ~
!rmcda.sb~ ga:e
S ... Switch
operated by
gating signal 12.3 Unidirectional Diode Gate
A d ect s.i.--:::pwtg g:.:t ..,. ... h ~~--s a semi:o;;±tUJr dJodc
_ __,._~DIOJTALCiRCOJTS
D
The effect of the . S-... 0.. 391
·-L.
•r•unacallv in Ii•. l l-J.
latjn1 IIIJlal ( -V. )
2 • - - • ...... • - - .
11•~1
-~ c.; ~-
(a) Signal input
(b -Vl =0
attenuated O\tptt1sthe
(~1s neg2tr;e) exact replica of
mputs1gnat
(Fig.12-~
(i) When the gating s gnal -V2 tS negative and has
1
than that of the pos the input signal, there is attenuation of
signal, as sho\l.n m (al
(ii) When -\12 = 0 , the mput signal is tran:.mittcd without
tion. as is ob-.iou:. from fig.(b.
tiii) When the g~ting signal \/2 b made po5itive, it is seen that the
output \\ hich b the reprodut'tion of the input signll is superimposed c:il
:lpedtbtal.
orward-biased. The It may be noted in thii connection that the gating signal i.e. control
d through the gate , olt.tge ,, hich i:-. of rectangulnrv.:l-..efonn itself gets distorted because of
the C1R1 integrating net\\Ork . It:. \'iU\eform, as it appears at A is as
dlere is neither attenuation shcm n in fig.12-4 .
voltage would be an exact
392 PUI Sl• AND DIGlTAL CIRCUITS
ov
Input
signnf
- - -n
---~..J,,----t- - - - -
A diode.sampling gate of
type discussed above h· lhe
d ements.
.
· <1Sthe
f o II owing advantage,
and
Output
voltage a) Advantages:
i) It is very simple.
ii) The time-delay is quite
·Ya small , since the input arid
output are coupled directly
throu gh the capacitor and
diode.
.....
(II Tla...11rawa.• CUl'RQl\jl its quiescent condition.
(i¥)111111 --••teadcdile amulti-input OR gate with
1 llila1kiiUllldi011 ~ J a p u t signal source and the control
· - • - . ; • •..- · Ulldelirable.
ctice. Any modificatio!! :nade
ormance may cause un":2.med
nal diode gate
lier may be easily adopted to
pte is shown in fig.12-
D1• D:!. .. Diodes
Vs , Vs, .. Input
' · signals
v0 •. 0u1put
\'o/lage
Satnp10 G- 39)
The control input has two levels. a higher level which
zero ( i.e. -v2 = 0) and a lower level Which IS nega,, e usua l)
1
( i.e. -v. ).
WIien lhe control sipal is at lhe lower level. evident!) the d od
'Y dllre It IN> condu tion through t em. The
oltage i at the higher
input signals to be
an easily be d
ge 1i 0 deve I op =r
t that the circu·t of fi __ 1 =-
INHIBITOR tern a
ts as the irihibitor i-==".lu
as the number of i p .
ds to become hea ) . T s
ional diode gate -.;
difficulty posed b) t e
19 J PULSE AND DIGITAi CIRCUITS
.
12.4.2 Another:.. modi ficd vc, s iPn of thl! un idit cctionat d"t"•i,
shown in fi!! . 12-6. v, C £'\tc
' 1~ .
R
o-.1\,/\/. ~-~-~ It wns seen earlier
Signal' Refer.' fig.12.3) that, i~'
j_ the higher lcvet of the
C L1 control signal is not
Cont~ol ~ r-.. . exactly zero, either
j_ there is attenuation of
the input signal or the
output signal gets
supcri mposed on a
IFig.12-61 pedastal.
This is not a desirable feature in many practical applications. This is
obviated in the modified circuit of fig.12-6.
In the absence of the control signal, it · is easily seen that diode
D, is forward-biased and hence it conducts. The current throug:i R
deveJopcs a large voltage ctrop across it with the result that the voltage
at A is less than the cut-in voltage of D0 . Hence there is no conduction
through D0 , and the output is zero.
If a positive-going control signal is applied, it is evident that
diode D1 gets reverse-biased and hence conduction through it stop,
Diode D0 gets forward-biased and as a result, the input signal gets
transmitted through the gate for the duration of the control signal.
For proper functioning of the gate, it is essential that the input
signal is d.c. coupled ( Resistor R ), but the control signal n1a) be either
d.c. coupled or a.c. coupled.
12-S Bidiredleaal Sampllna Gata .
As studied earlier, a bidln,ctlo'111 . . . . pte is one which is
IIIQuired to handle aipal-input ncunrions of lfalt,Jdarides. Such gates
~ be constructed usingeithertramJllknOC.flllll-.JQtlt types of gates
ttudied in~ followmg secticSna.
13-&.J ft] ■2 8
S tnp n Gc1te 395
«.Uonal • p11 Gate
Ill ...12-7
•
A ► bidircctiooaJ
0 . . 11a1
ng transistor
smnplina Pie using a tran I l r
1
.n- P-n trans, Lor
v .. Input ignal
Vc·. Control 1,oltage
v0 •• Output voltage
rectangular pulse ha · g
I. • t
, it biases the trans· t r
to V2 • it biases the
Jramistor is driven
for the duration
• the output.
ons of /1e
396 PULSE
.. AND DIGITAL C IRClJ I rs
~ ---~==-----:----:-tl I
v11
r-
lfi1.12-81
The latina sipal bas.11 usual, two le,·""ls. n highca level \/2 und
a Iowa- leYel V. .
When the coatn>I voltqe la at tbe upper l~vcl \I_,, Q, l'<·~omeN
Off IIDd a heavy current flows tbrouah the rcsistP1 R1 • Th~ vohrttl·
cln,p acroa it cauaes 1he potential of th, emitter of Q:i to 1 be such thnl
Q becomea cut.-jlff. Nonce thlle la no transmission of the input slgnnl,
•✓
When die . ,... ...,., la II tbl lower level V1 , Q1 b cut ofl
ad 02 is ON, operadna ln the actlw 191loL It functions ns nu .u1111H ltCI
ad tbo iaput ....... trlllfflltllCI for . . . . . . of the ~Ohno Nir11,,t
ad It ...... tllp!lflld It the OUlplM.
k ii ID Ill IIOlld - dudls1111 ......._ of the input ~,gnnl,
Q la cut--off, W la•a.-•111 ti IO..,..,
bet\\ t•en the
••---end1bl•StoilflNi•••••1'-ltDl loadin~ p1nhk111,
12.S.3 Bidirectiona1 n· . Sampling Gates 397
A b. . •Ode sam r
td1rectionaJ d ' d P •ng Gate
. io e sa mp 1·
1ng gate us
transistors as show . fi · d' .
n In ig.12-9. es •odes instead of
R. A
• p
~ i---,.._ -('I+
♦
RL . vo
+
o-·n.v:.c_
_J L _v n
IFi1.12-91
The distinct advantages of the diode sampling gate over the
• nillor sampling gate studied earlier are : (i) Linearity of operation
-.I (Ii) elimination of pedestal.
la Older to understand the operation of the gate, the circuit is
• la •• • shown in fig.12-10.
. - - - - - - r ----1ii +
Yo
t - - -0 -
- .. - +
B C
Re -:-
_!f,!2~101 Bridp Network
-tt-
••• two 1ym,noctrical ....... sipals
v re-
+vc and
-ol v....-
. . 1t 1hl lovell +v. and - n
b' d and
. . n _. teverse· iase
- • dial■ Di ,.4~
........ iJlpllt aignal is not
level• VC 111d -vC
and there la tranamiaaion
pulaea.
obvious that there can be
Iba characteristics of both
