College of Engineering

Biomedical Engineering Department

BIOEN 431: Biomedical Electronics and Measurement

Lab Report 2: Amplifiers-II

Students Lama Alzahrani Asma Alshehri Wedad Alqahtani

ID Numbers 2220005676 2220003669 2220003769

Academic Year 2024 - 2025

Section Number F1

Instructor Eng. Kamran Hameed

Submission Date October 1, 2024

1
Introduction
Circuits with operational amplifier (Op-Amp) are indispensable in analog electronics, since each
one has its proposed function and arrangement according to the application. One such arrangement is the
voltage follower which it also known as unity-gain or buffer amplifier (Figure 1). This circuit provides zero
amplification, since the output voltage is simply equal to the input voltage (not greater than or less than),
resulting in a gain of 1. Reflected as 𝑣𝑜𝑢𝑡𝑝𝑢𝑡 = 𝑣𝑖𝑛𝑝𝑢𝑡 , this guarantees a high input impedance and low
output impedance whilst preserving the signal of input. The Other Crucial Op-Amp Configuration:
Differential Amplifier (Figure 2), a difference amplifier amplifies the difference between two input signals
while rejecting any common-mode signals. Such behavior can be expressed by 𝑣𝑜 = 𝐴𝑑 (𝑣1 - 𝑣2 ), where
𝐴𝑑 indicates the differential gain.

Figure 1: Voltage Follower

Figure 2: Differential Amplifier

The objective of this lab is to design & implement a voltage follower circuit, design a differential
amplifier using certain gain requirements and analyze the working characteristics of differental amplifiers
along with measuring common mode rejection ratio (CMRR) for evaluating its performance. These tasks
will help in understanding the op-amp applications and how important they are to analog circuit design.

Materials and Equipment

• Breadboard
• Oscilloscope
• Digital Multimeter
• LM741 Op-Amp
• KL-21001 Linear Circuit Lab Main Unit
• Wires
• Resistors: 2 of 1kΩ, 100 Ω, 10 kΩ, 2 of 1.5kΩ, 2 of 12 kΩ.

2
Experimental procedure

➢ Task 1: Voltage Follower

In this task, we need to design a voltage divider circuit (Figure 3) with
output voltage of 5 V and 10 V to serve as a power supply. Because the
output voltage of 5V is half that of 10V, the ratio of resistors must be
half (Equation 1), and the resistors must be equal. Our resistor was 1 kΩ
which was chosen based on the common standard component values.
Figure 3: Voltage divider circuit
𝑅2
𝑣𝑜 = 𝑣𝑠 𝑅 (Equation 1)
1 + 𝑅2

Afterward, we constructed the circuit on a breadboard and recorded the

measurements in Table 1. The second step is to add a load resistor to the
voltage divider circuit (Figure 4) and measure the output voltage at the
load resistor. To calculate the voltage at the load resistor we used Equation
2. The result is then recorded in Table 2 with two values of load resistors,
𝑅𝐿 = 100 Ω, 10 kΩ. Figure 4: Voltage divider
circuit with load resistor
𝑅2 || 𝑅𝐿
𝑣𝑅𝐿 = 𝑣𝑠 𝑅 (Equation 2)
1 + 𝑅2 ||𝑅𝐿

In the third step, we added a voltage follower circuit (Figure 1) between

the voltage divider and the load resistor (Figure 3). The DC power supply
has a voltage of ±12V, which falls within the linear range. The voltage
divider is connected to the Op-Amp's non-inverting input. Equation 4 is
used to get the output voltage across the load resistor, and the gain equals
one. Ideally, the input and output voltage would be equal. Table 3 contains
Figure 5: Voltage follower with
the observed and computed values of 𝑣𝑜 . voltage divider and the load resistor
𝑣𝑜 = A × 𝑣𝑖𝑛 (Equation 3)

For all of the steps, we calculated the error percentage using Equation 4.
𝐶𝑎𝑙𝑐𝑢𝑙𝑎𝑡𝑒𝑑 𝑉𝑎𝑙𝑢𝑒−𝑀𝑒𝑎𝑠𝑢𝑟𝑒𝑑 𝑉𝑎𝑙𝑢𝑒
Error (%) = 𝐶𝑎𝑙𝑐𝑢𝑙𝑎𝑡𝑒𝑑 𝑉𝑎𝑙𝑢𝑒
× 100 (Equation 4)

3
 ➢ Task 2: Differential Amplifier

We designed a difference amplifier of gain 8 and power it with 𝑉𝑐𝑐 = ±18V as in Figure 2. To the relation
in Equation 5, we chose 𝑅1 = 𝑅3 = 1.5 kΩ and assuming 𝑅2 = 𝑅4= 12 kΩ from the standard common
values of components.

𝑅1 𝑅3
= (Equation 5)
𝑅2 𝑅4

With 𝑣1 = 5V we can compute the range of 𝑉2 to remain in the linear

region by using Equation 6.

− 𝑉𝑐𝑐 ≤ A(𝑉2 - 𝑉1 ) ≤ + 𝑉𝑐𝑐 (Equation 6)

The differential amplifier circuit was realized on breadboard as in

Figure 6 and measured the output voltage in the differential mode
input by Equation 7, the result is given in Table 4.
Figure 6: Differential Amplifier
Circuit on the Breadboard
𝑣𝑜 = A(𝑣2 – 𝑣1 ) (Equation 7)

Finally, the common mode input is applied with 𝑣𝑐 = 6 V as in

Figure 7. We have calculated the value of CMRR by using
Equation 8, 9, and 10.

𝐴
CMRR = 20log( 𝐴𝑑𝑚 ) (Equation 8)
𝑐𝑚

𝑣𝑜
𝐴𝑑𝑚 = , 𝑣𝑑𝑚 = 𝑣2 − 𝑣1 (Equation 9)
𝑣𝑑𝑚

𝑣 𝑣2 − 𝑣1 Figure 7: Differential Amplifier Circuit

𝐴𝑐𝑚 = 𝑣 𝑜 , 𝑣𝑐𝑚 = 2
(Equation 10) in the common mode input.
𝑐𝑚

We calculated the error percentage using Equation 4.

4
Results
➢ Task 1: Voltage Follower
The result of the measured, calculated output voltage and the error percentage between them is recorded in
Table 1. For the desired 𝑣𝑜 we used Equation 1 as follows:
1 𝑘𝛺
𝑣𝑜 = 10 × 1 𝑘𝛺+ 1 𝑘𝛺 = 5 𝑣

Table 1: Voltage Divider Measurements

𝑣𝑜 (v)

Desired Measured Error

5v 4.97 v 0.6 %

After adding a load resistor parallel with 𝑅2 on the voltage divider circuit, we measured and calculated the
output voltage using Equation 2 across 𝑅𝐿 with 𝑅𝐿 = 100 Ω then 𝑅𝐿 = 10 KΩ. Then calculated the error
percentage using Equation 4.

1 𝑘𝛺 || 100𝛺
For 𝑅𝐿 = 100 𝛺 ∶ 𝑣𝑅𝐿 = 10 × = 9.545 𝑣
1 𝑘𝛺+ 1 𝑘𝛺 || 100𝛺

1 𝑘𝛺 || 10 𝑘𝛺
For 𝑅𝐿 = 10 𝑘𝛺 ∶ 𝑣𝑅𝐿 = 10 × 1 𝑘𝛺+ 1 𝑘𝛺 || 10𝑘𝛺 = 5.454 𝑣

Table 2: Voltage values across the load resistor using voltage divider circuit

𝑣𝑅𝐿 (v)
Load Error
Calculated Measured
100 Ω 9.545 v 9.114 v 4.51 %
10 kΩ 5.454 v 4.700 v 13.7 %

Equation 3 was used to get the output voltage across the load resistor following the addition of a voltage
follower circuit, and Equation 4 was used to determine the error percentage.

For 𝑅𝐿 = 100 𝛺 ∶ 𝑣𝑅𝐿 = 1 × 5 = 5 𝑣

For 𝑅𝐿 = 10 𝑘𝛺 ∶ 𝑣𝑅𝐿 = 1 × 5 = 5 𝑣

Table 3: Voltage values across the load resistor using voltage follower circuit

𝑣𝑅𝐿 (v)
Load Error
Calculated Measured
100 Ω 5.0 v 2.2 v 56 %
10 kΩ 5.0 v 9.8 v 96 %

5
 ➢ Task 2: Differential Amplifier

In the differential input mode, Equation 7 was used to calculate the voltage output, while Equation 6 was
used to calculate the range of voltage. The range of voltage was calculated using Equation 6 and the voltage
output was calculated using Equation 7 in the differential input mode. The error percentage was calculated
using Equation 4.

For 𝑣2 : −18 ≤ 8(𝑣2 − 5) ≤ +18, 2.75 ≤ 𝑣2 ≤ 7.25, we used 𝑣2 = 6v.

For 𝑣𝑜 : 𝑣𝑜 = 8(6 − 5) = 8v.

Table 4: Input/Output voltages of Differential Amplifier

𝑣𝑜 (v)
𝑣1 (v) 𝑣2 (v) Error
Calculated Measured
5v 6v 8v 9.8 v 22.5 %

For common mode: the measured output voltage is v0=0.003 V

To calculate CMRR we used Eq.8, Eq.9, Eq.10:
6+6
𝑣𝑐𝑚 = 2
= 6v
𝑣 0.003
𝐴𝑐𝑚 = 𝑣 𝑜 = 6
= 0.0005
𝑐𝑚

𝐴𝑑𝑚 = 8
8
CMRR = 20log( ) = 84.08 dB
0.0005

6
Discussion
Task 1
We utilized two equal resistors, R1 = 10 kΩ and R2 = 10 kΩ, while creating a voltage divider to
achieve an output voltage Vo = 5V from a 10V power supply. In close proximity to the intended 5V, this
setup yielded a measured output of 4.97V. Tolerances in the resistor, possible effects of the load, and
measurement accuracy are responsible for the little 0.03V difference. All things considered, the circuit
worked well, proving that voltage dividers can consistently produce stable voltage levels for a range of
uses.
Significant changes in the output voltage were detected upon the addition of a load resistor to the
voltage divider circuit. When a 100Ω load was applied, the measured voltage dropped to 9.114V, but the
predicted output was 9.545V. Due to the load consuming current and influencing the voltage division, there
has been a reduction. In the case of a 10 kΩ load, the measured voltage dropped to 4.700V whereas the
estimated output was 5.454V. Because of the greater load's considerable effect on the circuit's capacity to
maintain the intended output voltage, this larger disparity serves as an example of how load resistance
affects the voltage divider's performance. The significance of taking load effects into account while using
voltage dividers in real-world applications is demonstrated by these findings.

To stabilize the output voltage under load, a voltage follower circuit was added between the voltage
divider and the load resistor. The estimated output voltage was predicted to stay at 5V with a 100Ω load,
however the measured output decreased to 2.2V. This discrepancy suggests that either the voltage follower
was not set up correctly or the op-amp's design or power supply settings prevented it from supplying enough
current. In contrast, the measured voltage was 9.8V while the predicted output was 5V when a 10 kΩ load
was used. This unanticipated rise highlights the significance of load characteristics and op-amp capabilities
in achieving the desired performance in real-world applications, indicating that the voltage follower
effectively buffered the voltage divider output.

7
Task 2
We applied V1 = 5V to the differential amplifier's inverting input terminal and V2 = 6V to its non-
inverting input terminal for this task. The differential amplifier formula was used to calculate the output
voltage Vout, which came out to be 8V. The output voltage, which was recorded at 9.8V, was noticeably
higher. There are other reasons for this disparity, such as measurement mistakes, op-amp offset voltages,
and possible flaws in resistor values that impact gain computations. It's possible that the op-amp is working
close to its limitations or that the gain configuration is not quite in line with theoretical assumptions based
on the observed output. In real-world circuit applications, it emphasizes how crucial accurate component
selection and calibration are.

A well-designed differential amplifier should have a Common Mode Rejection Ratio (CMRR) that
typically ranges from 60 dB to over 100 dB, depending on the circuit architecture, op-amp specifications,
and component quality. An expected CMRR value for a conventional differential amplifier using high-
quality op-amps would be between 80 and 90 dB. This shows that the required differential signal may be
amplified while common mode signals are efficiently rejected by the amplifier. You might get even better
results if your design and its constituent parts are optimized [4].

By applying a common mode input voltage of 6V and measuring the output voltage, which was
incredibly tiny at 0.003V, we evaluated the differential amplifier's performance in the second section.
Because of its modest output, the amplifier appears to be efficiently rejecting common mode signals,
indicating that the common mode gain is small. When we computed the Common Mode Rejection Ratio
(CMRR) with a known differential gain of 8, a high value was found. At 84.08 dB, the result was With the
output focused on the intended differential signal, the amplifier's high CMRR demonstrates its powerful
ability to filter out extraneous noise and interference. In applications that need accurate signal processing
in noisy situations, this kind of performance is essential.

The Common Mode Rejection Ratio (CMRR) of an ideal operational amplifier is infinite, meaning
that all common mode signals are perfectly rejected and that the output is only dependent on the differential
input. The output of practical op-amps, on the other hand, is susceptible to certain common mode signals
due to their finite CMRR, which commonly ranges from 60 dB to over 100 dB. Component tolerances, op-
amp parameters (such as input offset voltage), frequency responsiveness, power supply fluctuations, the
common mode voltage range, and temperature impacts are some of the elements that affect CMRR in real-
world circuits. These elements work together to determine how successfully an op-amp can continue to
reject undesirable signals, illustrating the difficulties in obtaining optimal behavior in practical situations.

Conclusion
We investigated the operation and results of differential amplifier and voltage divider circuits in this
work. The voltage divider effectively demonstrated its ability to create steady output voltages, while load
influences considerably influenced its performance. In order to steady the output under load, a voltage
follower was added, which exposed issues with the current supply and op-amp setup. We observed
differences between calculated and measured outputs while analyzing the differential amplifier,
highlighting the significance of precise component selection. Additionally, the Common Mode Rejection
Ratio test demonstrated how well the amplifier rejected undesired signals, which is important for preserving
signal integrity in noisy situations. All things considered, these results highlight how important design
factors and accurate calibration are to obtaining dependable performance in electronic circuits.

8
References

[1] “Compare ideal and practical opamp,” Ques10,

https://www.ques10.com/p/22700/compare-ideal-and-practical-opamp-1/ (accessed Sep. 21, 2024).

[2] LM741-mil operational amplifier datasheet - Texas Instruments India,

https://www.ti.com/lit/ds/symlink/lm741-mil.pdf (accessed Sep. 21, 2023).

[3 W. Storr,“Non-inverting operational amplifier - the non-inverting op-amp,” Basic Electronics

Tutorials, https://www.electronics-tutorials.ws/opamp/opamp_3.html (accessed Sep. 21, 2024)

[4] common mode rejection ratio in differential amplifiers. Available at:

https://www.researchgate.net/publication/3087649_Common_Mode_Rejection_Ratio_in_Differential_Amplifiers
(Accessed: 01 October 2024).