STS5DNF60L
Datasheet
Automotive-grade dual N-channel 60 V, 35 mΩ typ., 5 A STripFET II
Power MOSFET in an SO-8 package
5 Features
8
Order code VDS RDS(on) max. ID
STS5DNF60L 60 V 45 mΩ 5A
4
1
SO-8 • AEC-Q101 qualified
• Exceptional dv/dt capability
D1(7, 8) D2(5, 6) • 100% avalanche tested
• Low gate charge
Applications
G1(2) G2(4) • Switching applications
Description
S1(1) S2(3) This Power MOSFET has been developed using STMicroelectronics' unique
SC12820 STripFET process, which is specifically designed to minimize input capacitance and
gate charge. This renders the device suitable for use as primary switch in advanced
high-efficiency isolated DC-DC converters for telecom and computer applications,
and applications with low gate charge driving requirements.
Product status link
STS5DNF60L
Product summary
Order code STS5DNF60L
Marking 5DF60L
Package SO-8
Packing Tape and reel
DS5750 - Rev 4 - March 2021 www.st.com
For further information contact your local STMicroelectronics sales office.
STS5DNF60L
Electrical ratings
1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage 60 V
VGS Gate-source voltage ±15 V
Drain current (continuous) at Tamb = 25 °C 5 A
ID
Drain current (continuous) at Tamb = 100 °C 3 A
IDM(1) Drain current (pulsed) 16 A
PTOT(2) Total power dissipation at Tamb = 25 °C 2 W
Tstg Storage temperature range °C
-55 to 150
TJ Operating junction temperature range °C
1. Pulse width limited by safe operating area.
2. PTOT = 1.6 W for single operation.
Table 2. Thermal data
Symbol Parameter Value Unit
RthJB(1) Thermal resistance, junction-to-board 62.5 °C/W
1. When mounted on 1 inch² FR-4 board, 2 Oz Cu, t ≤ 10 s, dual operation.
DS5750 - Rev 4 page 2/14
STS5DNF60L
Electrical characteristics
2 Electrical characteristics
TC = 25 °C unless otherwise specified.
Table 3. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 250 μA 60 V
VGS = 0 V, VDS = 60 V 1 µA
IDSS Zero gate voltage drain current
VGS = 0 V, VDS = 60 V, TC = 125 °C(1) 10 µA
IGSS Gate-body leakage current VDS = 0 V, VGS = ±15 V ±100 nA
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 1.0 1.7 2.5 V
VGS = 10 V, ID = 2 A 35 45
RDS(on) Static drain-source on-resistance mΩ
VGS = 4.5 V, ID = 2 A 45 55
1. Defined by design, not subject to production test.
Table 4. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 1030 - pF
Coss Output capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V - 140 - pF
Crss Reverse transfer capacitance - 40 - pF
Qg Total gate charge - 15 - nC
VDD = 48 V, ID = 4 A, VGS = 4.5 V
Qgs Gate-source charge (see Figure 12. Test circuit for gate - 4 - nC
Qgd charge behavior)
Gate-drain charge - 4 - nC
Table 5. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD = 30 V, ID = 2.2 A, - 15 - ns
tr Rise time RG = 4.7 Ω, VGS = 4.5 V - 28 - ns
td(off) Turn-off delay time (see Figure 11. Test circuit for - 45 - ns
resistive load switching times and
tf Fall time Figure 16. Switching time waveform) - 10 - ns
DS5750 - Rev 4 page 3/14
STS5DNF60L
Electrical characteristics
Table 6. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD Source-drain current - 5 A
ISDM (1)
Source-drain current (pulsed) - 16 A
VSD(2) Forward on voltage ISD = 4 A, VGS = 0 V - 1.2 V
trr Reverse recovery time - 85 ns
ISD = 4 A, di/dt = 100 A/µs,VDD = 20 V
Qrr Reverse recovery charge - 85 nC
(see Figure 16. Switching time waveform)
IRRM Reverse recovery current - 2 A
1. Pulse width limited by safe operating area.
2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%.
DS5750 - Rev 4 page 4/14
STS5DNF60L
Electrical characteristics (curves)
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance
AM06497v1 AM06498v1
ID
K
(A) δ=0.5
0.2
is
R rea
0.1
n)
ax a
o
S(
10
m this
0.05
by n
100µs
d ni
ite io
m at
0.02
Li per
-1
10
O
1ms
Tj =150°C Zthj-pcb = K * Rthj-pcb
1
Tpcb =25°C 100ms Rthj-pcb = 62.5°C/W
Single 0.01
pulse
Single pulse
-2
0.1 10 -5 -4 -2 -1 0 1
tP (s)
-3
0.1 1 10 VDS (V) 10 10 10 10 10 10 10
Figure 3. Output characteristics Figure 4. Transfer characteristics
GC92010 GC92020
Figure 5. Source-drain diode forward characteristics Figure 6. Static drain-source on-resistance
GC92090 GC92040
DS5750 - Rev 4 page 5/14
STS5DNF60L
Electrical characteristics (curves)
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
GC92050 GC92060
Figure 9. Normalized gate threshold voltage vs
Figure 10. Normalized on-resistance vs temperature
temperature
GC92080
GC92070
DS5750 - Rev 4 page 6/14
STS5DNF60L
Test circuits
3 Test circuits
Figure 11. Test circuit for resistive load switching times Figure 12. Test circuit for gate charge behavior
VDD
12 V 47 kΩ
1 kΩ
100 nF
RL
2200 3.3
+ μF μF VDD
VD IG= CONST
VGS 100 Ω D.U.T.
VGS
RG D.U.T. pulse width +
2.7 kΩ
2200 VG
pulse width μF
47 kΩ
1 kΩ
AM01468v1 AM01469v1
Figure 13. Test circuit for inductive load switching and
Figure 14. Unclamped inductive load test circuit
diode recovery times
A A A L
D VD
fast 100 µH
G D.U.T. diode 2200 3.3
S B 3.3 1000 + µF µF VDD
B B
25 Ω D
µF + µF VDD ID
G D.U.T.
+ RG S
Vi D.U.T.
_
pulse width
AM01471v1
AM01470v1
Figure 16. Switching time waveform
Figure 15. Unclamped inductive waveform
ton toff
V(BR)DSS
td(on) tr td(off) tf
VD
90% 90%
IDM
10% VDS 10%
ID 0
VDD VDD
VGS 90%
AM01472v1 0 10%
AM01473v1
DS5750 - Rev 4 page 7/14
STS5DNF60L
Package information
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
4.1 SO-8 package information
Figure 17. SO-8 package outline
0016023_So-807_fig2_Rev10
DS5750 - Rev 4 page 8/14
STS5DNF60L
SO-8 package information
Table 7. SO-8 mechanical data
mm
Dim.
Min. Typ. Max.
A 1.75
A1 0.10 0.25
A2 1.25
b 0.31 0.51
b1 0.28 0.48
c 0.10 0.25
c1 0.10 0.23
D 4.80 4.90 5.00
E 5.80 6.00 6.20
E1 3.80 3.90 4.00
e 1.27
h 0.25 0.50
L 0.40 1.27
L1 1.04
L2 0.25
k 0° 8°
ccc 0.10
Figure 18. SO-8 recommended footprint (dimensions are in mm)
0016023_So-807_footprint_Rev10
DS5750 - Rev 4 page 9/14
STS5DNF60L
SO-8 packing information
4.2 SO-8 packing information
Figure 19. SO-8 tape and reel dimensions
A D N
T
Po
Bo
Ko Ao P
0016023_SO-8_O7_T_R
Figure 20. Tape orientation
DS5750 - Rev 4 page 10/14
STS5DNF60L
SO-8 packing information
Table 8. SO-8 tape and reel mechanical data
mm
Dim.
Min. Typ. Max.
A 330
C 12.8 13.2
D 20.2
N 60
T 22.4
-
Ao 6.5 6.7
Bo 5.4 5.6
Ko 2.0 2.2
Po 3.9 4.1
P 7.9 8.1
DS5750 - Rev 4 page 11/14
STS5DNF60L
Revision history
Table 9. Document revision history
Date Version Changes
03-Mar-2008 1 First release.
18-Mar-2010 2 Figure 2: Safe operating area and Figure 3: Thermal impedance have been changed.
Updated title, features and description in cover page.
Added AEC-Q101 qualified in the Features section.
17-Oct-2016 3
Updated Package information and Packing information.
Minor text changes.
Updated Internal schematic for SO-8 dual N-channel and Features in cover page.
Updated Table 4. Dynamic.
04-Mar-2021 4
Updated Section 4.2 SO-8 packing information.
Minor text changes.
DS5750 - Rev 4 page 12/14
STS5DNF60L
Contents
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2 SO-8 packing information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
DS5750 - Rev 4 page 13/14
STS5DNF60L
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DS5750 - Rev 4 page 14/14
