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L8721P

The L8721P is a silicon VDMOS and LDMOS RF transistor designed for broadband applications, suitable for military radios, cellular amplifiers, and more. It features high efficiency, low noise, and high gain with a maximum output of 15 watts. Key specifications include a maximum junction temperature of 150°C, a drain efficiency of 45%, and a load mismatch tolerance of 20:1.
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0% found this document useful (0 votes)
16 views2 pages

L8721P

The L8721P is a silicon VDMOS and LDMOS RF transistor designed for broadband applications, suitable for military radios, cellular amplifiers, and more. It features high efficiency, low noise, and high gain with a maximum output of 15 watts. Key specifications include a maximum junction temperature of 150°C, a drain efficiency of 45%, and a load mismatch tolerance of 20:1.
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© © All Rights Reserved
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polyfet rf devices

L8721P

General Description
Silicon VDMOS and LDMOS
transistors designed specifically SILICON GATE ENHANCEMENT MODE
for broadband RF applications.
Suitable for Militry Radios,
RF POWER LDMOS TRANSISTOR
Cellular and Paging Amplifier Base
Stations, Broadcast FM/AM, MRI, 15.0 Watts Single Ended
Laser Driver and others.
TM Package Style S08 P
"Polyfet" process features
low feedback and output capacitances
resulting in high F t transistors with high
HIGH EFFICIENCY, LINEAR
input impedance and high efficiency. HIGH GAIN, LOW NOISE
o
ABSOLUTE MAXIMUM RATINGS ( T = 25 C )
Total Junction to Maximum Storage DC Drain Drain to Drain to Gate to
Device Case Thermal Junction Temperature Current Gate Source Source
Dissipation Resistance Temperature Voltage Voltage Voltage
o o o o
60 Watts 2.50 C/W 150 C -65 C to 150 C 8.0 A 36 V 36 V 20 V

RF CHARACTERISTICS ( 15.0 WATTS OUTPUT )


SYMBOL PARAMETER MIN TYP MAX UNITS TEST CONDITIONS

Gps Common Source Power Gain 11 dB Idq = 0.40 A, Vds = 12.5 V, F = 500 MHz
η Drain Efficiency 45 % Idq = 0.40 A, Vds = 12.5 V, F = 500 MHz
VSWR Load Mismatch Tolerance 20:1 Relative Idq = 0.40 A, Vds = 12.5 V, F = 500 MHz

ELECTRICAL CHARACTERISTICS ( EACH SIDE )


SYMBOL PARAMETER MIN TYP MAX UNITS TEST CONDITIONS

Bvdss Drain Breakdown Voltage 36 V Ids = 0.20 mA, Vgs = 0V

Idss Zero Bias Drain Current 2.0 mA Vds = 12.5 V, Vgs = 0V

Igss Gate Leakage Current 1 uA Vds = 0V Vgs = 30V

Vgs Gate Bias for Drain Current 1 7 V Ids = 0.20 A, Vgs = Vds

gM Forward Transconductance 1.7 Mho Vds = 10V, Vgs = 5V

Rdson Saturation Resistance 0.40 Ohm Vgs = 20V, Ids = 8.00 A

Idsat Saturation Current 13.00 Amp Vgs = 20V, Vds = 10V

Ciss Common Source Input Capacitance 50.0 pF Vds = 12.5 Vgs = 0V, F = 1 MHz

Crss Common Source Feedback Capacitance 2.0 pF Vds = 12.5 Vgs = 0V, F = 1 MHz

Coss Common Source Output Capacitance 40.0 pF Vds = 12.5 Vgs = 0V, F = 1 MHz

POLYFET RF DEVICES REVISION 03/13/2002


1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
L8721P

POUT VS PIN GRAPH CAPACITANCE VS VOLTAGE


L8721P Pin vs Pout Freq=500MHz, L1C 1DIE CAPACITANCE

Vds=12.5Vdc, Idq=.4A
1000
25 15

14
20
Pout
100
13 Ciss
15

12 Coss
10 10
11
Crss
5 Gain
Efficiency @15 watts = 46% 10

1
0 9 0 5 10 15 20 25 30
0 0.5 1 1.5 2 2.5 3
VDS IN VOLTS
Pin in Watts

IV CURVE ID & GM VS VGS


L1C 1 DIE ID, GM vs VG
L1C 1 DIE IV 100
16

14

12

10 ID
ID IN AMPS

8
10
6

2
G
0 M
0 2 4 6 8 10 12 14 16 18 20
VDS IN VOLTS
1
vg=2v Vg=4v Vg=6v vg=8v vg=10v vg=12v
0 2 4 Vgs
6 in Volts
8 10 12 14

Zin Zout PACKAGE DIMENSIONS IN INCHES

Tolerance .XX +/-0.01 .XXX +/-.005 inches

03/13/2002

POLYFET RF DEVICES REVISION


1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com

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