A8514

Wide Input Voltage Range, High Efficiency

Fault Tolerant LED Driver

FEATURES AND BENEFITS DESCRIPTION

• AEC-Q100 qualified The A8514 is a multi-output white LED driver for small-size
• Wide input voltage range of 5 to 40 V for start/stop, cold LCD backlighting. It integrates a current-mode boost converter
crank and load dump requirements with internal power switch and four current sinks. The boost
• Fully integrated LED current sinks and boost converter converter can drive up to 48 LEDs, 12 LEDs per string, at
with 60 V DMOS 80 mA. The LED sinks can be paralleled together to achieve
• Sync function to synchronize boost converter switching
even higher LED currents, up to 320 mA. The A8514 can
frequency up to 2.3 MHz, allowing operation above the
AM band operate with a single power supply, from 5 to 40 V, which
• Excellent input voltage transient response allows the part to withstand load dump conditions encountered
• Single resistor primary OVP minimizes VOUT leakage in automotive systems.
• Internal secondary OVP for redundant protection The A8514 can drive an external P-FET to disconnect the input
• LED current of 80 mA per channel
supply from the system in the event of a fault. The A8514
• Drives up to 12 series LEDs in 4 parallel strings
• 0.7% to 0.8% LED to LED matching accuracy provides protection against output short and overvoltage,
• PWM and analog dimming inputs open or shorted diode, open or shorted LED pin, shorted
• 5000:1 PWM dimming at 200 Hz boost switch or inductor, shorted FSET or ISET resistor, and
• Provides driver for external PMOS input disconnect switch IC overtemperature. A dual level cycle-by-cycle current limit
• Extensive protection against: function provides soft start and protects the internal current
▫ Shorted boost switch or inductor switch against high current overloads.
▫ Shorted FSET or ISET resistor
▫ Shorted output The A8514 has a synchronization pin that allows PWM
▫ Open or shorted LED pin switching frequencies to be synchronized in the range of
▫ Open boost Schottky 580 kHz to 2.3 MHz. The high switching frequency allows
▫ Overtemperature (OTP) the A8514 to operate above the AM radio band.

PACKAGE: Continued on the next page…

20-pin TSSOP with exposed thermal pad (suffix LP) APPLICATIONS:

LCD backlighting or LED lighting for:
• Automotive infotainment
• Automotive cluster
Not to scale • Automotive center stack

VIN RSC D1
8 to 16 V Optional L1 VOUT
0.033 Ω 10 µH 2 A / 60 V

CIN RC CC
22 nF ROVP
4.7 µF RADJ 20 Ω Q1 COUT
50 V 137 kΩ
249 Ω GATE SW 4.7 µF
OVP
VSENSE 50 V
VC VIN A8514
CVDD VDD
100 kΩ 0.1 µF PAD LED1
FAULT LED2
PWM/EN LED3
APWM LED4
ISET
COMP
FSET/SYNC CP RZ
RISET 150 Ω
8.25 kΩ RFSET 120 pF
10 kΩ AGND PGND
CZ
0.47 µF

Figure 1: Typical Application Circuit

A8514-DS, Rev. 9 March 24, 2020

MCO-0000151
 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

DESCRIPTION (CONTINUED)
The A8514 is provided in a 20-pin TSSOP package (suffix LP) with
an exposed pad for enhanced thermal dissipation. It is lead (Pb) free,
with 100% matte-tin leadframe plating.

SELECTION GUIDE
Part Number Packing [1]
A8514KLPTR-T 4000 pieces per 13-in. reel
1 Contact Allegro™ for additional packing options

ABSOLUTE MAXIMUM RATINGS [2]

Characteristic Symbol Notes Rating Unit
LEDx Pins –0.3 to 55 V
OVP Pin –0.3 to 60 V
VSENSE and GATE pins should not exceed VIN
VIN, VSENSE, GATE Pins –0.3 to 40 V
by more than 0.4 V
Continuous –0.6 to 62 V
SW Pin
t < 50 ns –1.0 V
¯Ā¯Ū¯L̄¯T̄¯ Pin
F̄ -0.3 to 40 V
ISET, FSET, APWM, COMP Pins –0.3 to 5.5 V
All Other Pins –0.3 to 7 V
Operating Ambient Temperature TA Range K –40 to 125 °C
Maximum Junction Temperature TJ(max) 150 °C
Storage Temperature Tstg –55 to 150 °C

2 Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical
Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability.

Table of Contents
Specifications 2
Setting the current sense resistor 24
Thermal Characteristics 3
Pin-out Diagram and Terminal List 3 Input UVLO 24
Characteristic Performance 8 VDD 24
Functional Description 11 Shutdown 24
Enabling the IC 11 Fault protection during operation 25
Powering up: LED pin short-to-ground check 11 Application Information 27
Soft start function 13 Design Example for Boost Configuration 27
Frequency selection 13
Design Example for SEPIC Configuration 31
Sync 14
LED current setting and LED dimming 16 Package Outline Drawing 35
PWM dimming 16 Appendix A. Feedback Loop Calculations A-1
APWM pin 17 Power Stage Transfer Function A-1
Analog dimming 19 Output to Control Transfer Function A-2
LED short detect 19 Stabilizing the Closed Loop System A-4
Overvoltage protection 20
Measuring the Feedback Loop Gain and Phase Margin A-6
Boost switch overcurrent protection 22
Input overcurrent protection and disconnect switch 23

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

GATE 1 20 SW
VSENSE 2 19 OVP
VIN 3 18 PGND

Pinout Diagram FAULT 4 17 PGND

COMP 5 16 PGND
APWM 6 15 VDD
PWM/EN 7 14 LED1
FSET/SYNC 8 13 LED2
ISET 9 12 LED3
AGND 10 11 LED4

Terminal List Table

Number Name Function
1 GATE Output gate driver pin for external P-channel FET control.
Connect this pin to the negative sense side of the current sense resistor RSC. The threshold
2 VSENSE voltage is measured as VIN – VSENSE . There is also a fixed current sink to allow for trip
threshold adjustment.
3 VIN Input power to the A8514 as well as the positive input used for current sense resistor.
Indicates a fault condition. Connect a 100 kΩ resistor between this pin and the required logic
4 F̄¯Ā¯Ū¯L̄
¯T̄¯ level voltage. The pin is an open drain type configuration that will be pulled low when a fault
occurs.
Output of the error amplifier and compensation node. Connect a series RZ-CZ network from
5 COMP
this pin to ground for control loop compensation.
Analog trimming option for dimming. Applying a digital PWM signal to this pin adjusts the
6 APWM
internal ISET current.
PWM dimming pin, used to control the LED intensity by using pulse width modulation. Also
7 PWM/EN
used to enable the A8514.
Frequency/synchronization pin. A resistor RFSET from this pin to ground sets the switching
8 FSET/SYNC frequency. This pin can also be used to synchronize two or more A8514s in the system. The
maximum synchronization frequency is 2.3 MHz.
9 ISET Connect the RISET resistor between this pin and ground to set the 100% LED current.
10 AGND LED signal ground.
11,12,13,14 LEDx Connect the cathodes of the LED strings to these pins.
15 VDD Output of internal LDO; connect a 0.1 µF decoupling capacitor between this pin and ground.
16,17.18 PGND Power ground for internal DMOS device.
Overvoltage Condition (OVP) sense; connect the ROVP resistor from VOUT to this pin to
19 OVP
adjust the overvoltage protection.
20 SW The drain of the internal DMOS switch of the boost converter.
Exposed pad of the package providing enhanced thermal dissipation. This pad must be
– PAD
connected to the ground plane(s) of the PCB with at least 8 vias, directly in the pad.

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions [1] Value Unit
2
On 2-layer PCB, 3 in. 40.0 °C/W
Package Thermal Resistance RθJA On 4-layer PCB based on JEDEC standard
29.0 °C/W
(estimated)
1 Additional thermal information available on the Allegro website.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Functional Block Diagram

VDD SW

Internal VCC

Regulator 1.235 V VREF

VIN UVLO Ref

Internal VCC AGND

Fault
Diode
FSET/SYNC ∑ + Open
Driver
Oscillator – Circuit + Sense
COMP
+ –

Internal –
Soft Start Current
ISS Sense
+ PGND
–
VSENSE Thermal
Input Current
Sense Amplifier Shutdown
IADJ
Fault + OVP
GATE – VREF
PMOS OVP
Driver GOFF Sense

PWM/EN Fault Open/Short

Enable
LED Detect
PWM
100 kΩ ISS
VREF
LED1
LED
Driver LED2
APWM LED3
Internal VCC ISET
LED4

ISET AGND Fault

FAULT

PAD
PGND AGND

4
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

ELECTRICAL CHARACTERISTICS [1][2]: Valid at VIN = 16 V, TA = 25°C, indicates specifications guaranteed by design and
characterization over the full operating temperature range with TA = TJ = –40°C to 125°C, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
INPUT VOLTAGE SPECIFICATIONS
Operating Input Voltage Range [3] VIN 5 – 40 V
UVLO Start Threshold VUVLOrise VIN rising − – 4.35 V
UVLO Stop Threshold VUVLOfall VIN falling − – 3.90 V
UVLO Hysteresis [2] VUVLOHYS 300 450 600 mV
INPUT CURRENTS
Input Quiescent Current IQ PWM/EN = VIH ; SW = 2 MHz, no load − 5.5 10 mA
Input Sleep Supply Current IQSLEEP VIN = 16 V, VPWMEN = VFSETSYNC = 0 V − 2 10.0 μA
INPUT LOGIC LEVELS (PWM/EN AND APWM)
Input Logic Level-Low VIL VIN throughout operating input voltage range – – 400 mV
Input Logic Level-High VIH VIN throughout operating input voltage range 1.5 – – V
PWM/EN Pin Open Drain
RPWMEN PWM/EN = 5 V 60 100 140 kΩ
Pull-Down Resistor
APWM Pull-Down Resistor RAPWM PWM/EN = VIH 60 100 140 kΩ
APWM
APWM Frequency [2] fAPWM VIH = 2 V, VIL = 0 V 20 − 1000 kHz
ERROR AMPLIFIER
Open Loop Voltage Gain AVOL 44 48 52 dB
Transconductance gm ΔICOMP = ±10 μA 750 990 1220 μA/V
Source Current IEA(SRC) VCOMP = 1.5 V − –350 − μA
Sink Current IEA(SINK) VCOMP = 1.5 V − 350 − μA
COMP Pin Pull-Down Resistance RCOMP F̄¯ĀŪ¯L̄¯T̄¯ = 0 − 2000 − Ω
OVERVOLTAGE PROTECTION
Overvoltage Threshold VOVP(th) OVP connected to VOUT 7.7 8.1 8.5 V
OVP Sense Current IOVPH 188 199 210 μA
OVP Leakage Current IOVPLKG ROVP = 40.2 kΩ, VIN = 16 V, PWM/EN = VIL − 0.1 1 μA
Secondary Overvoltage Protection VOVP(sec) 53 55 58 V
BOOST SWITCH
Switch On-Resistance RSW ISW = 0.750 A, VIN = 16 V 75 300 600 mΩ
Switch Leakage Current ISWLKG VSW = 16 V, PWM/EN = VIL − 0.1 1 µA
Switch Current Limit ISW(LIM) 3.0 3.5 4.2 A
Higher than ISW(LIM)(max) for all conditions,
Secondary Switch Current Limit [2] ISW(LIM2) − 7.00 − A
device latches when detected
Soft Start Boost Current Limit ISWSS(LIM) Initial soft start current for boost switch − 700 − mA
Minimum Switch On-Time tSWONTIME 60 85 111 ns
Minimum Switch Off-Time tSWOFFTIME 30 47 68 ns

Continued on the next page…

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

ELECTRICAL CHARACTERISTICS [1][2] (continued): Valid at VIN = 16 V, TA = 25°C, indicates specifications guaranteed by
design and characterization over the full operating temperature range with TA = TJ = –40°C to 125°C, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
OSCILLATOR FREQUENCY
RFSET = 10 kΩ 1.8 2 2.2 MHz
Oscillator Frequency fSW RFSET = 20 kΩ 0.9 1 1.1 MHz
RFSET = 35.6 kΩ 520 580 640 kHz
FSET/SYNC Pin Voltage VFSET RFSET = 10 kΩ − 1.00 − V
FSET Frequency Range fFSET 580 − 2500 kHz
SYNCHRONIZATION
Synchronized PWM Frequency fSWSYNC 580 − 2300 kHz
Synchronization Input
tPWSYNCOFF 150 − − ns
Minimum Off‑Time
Synchronization Input
tPWSYNCON 150 − − ns
Minimum On‑Time
VSYNC(H) FSET/SYNC pin, high level 2.0 − – V
SYNC Input Logic Voltage
VSYNC(L) FSET/SYNC pin, low level – − 0.4 V
LED CURRENT SINKS
LEDx Accuracy ErrLED ISET = 120 µA − − 3 %
LEDx Matching ΔLEDx ISET = 120 µA − − 3 %
LEDx Regulation Voltage VLED VLED1=VLED2=VLED3 =VLED4, ISET = 120 µA 600 700 800 mV
ISET to ILEDx Current Gain AISET ISET = 120 µA 633 653 672 A/A
ISET Pin Voltage VISET 0.988 1.003 1.018 V
Allowable ISET Current ISET 20 − 120 µA
While LED sinks are in regulation, sensed
VLED Short Detect VLEDSC 4.6 5.1 5.6 V
from LEDx pin to ground
Current through each enabled LEDx pin
Soft Start LEDx Current ILEDSS − 2.0 – mA
during soft start
Measured while PWM/EN = low, during
Maximum PWM Dimming dimming control and internal references fSW
tPWML − 32,750 −
Until Off‑Time [2] are powered-on (exceeding tPWML results in cycles
shutdown)
Minimum PWM On‑Time tPWMH First cycle when powering-up device − 0.75 2 µs
Time between PWM enable and LED current
PWM High to LED‑On Delay tdPWM(on) − 0.5 1 µs
reaching 90% of maximum
Time between PWM enable going low and
PWM Low to LED‑Off Delay tdPWM(off) − 360 500 ns
LED current reaching 10% of maximum

Continued on the next page…

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

ELECTRICAL CHARACTERISTICS [1][2] (continued): Valid at VIN = 16 V, TA = 25°C, indicates specifications guaranteed by
design and characterization over the full operating temperature range with TA = TJ = –40°C to 125°C, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
GATE PIN
GATE Pin Sink Current IGSINK VGS = VIN − −104 − µA
Gate Fault Shutdown Greater than
tGFAULT2 − − 3 µs
2× Current [2]
Gate Fault Shutdown Greater than fSW
tGFAULT1 − 10,000 −
1–2× Current cycles
Gate to source voltage measured when gate
Gate Voltage VGS − –6.7 − V
is on
VSENSE Pin
VSENSE Pin Sink Current IADJ 18.8 20.3 21.8 µA
Measured between VIN and VSENSE,
VSENSE Trip Point VSENSEtrip1 94 104 114 mV
RADJ = 0 Ω
2× VSENSEtrip , instantaneous shutdown,
VSENSE 2× Trip [2] VSENSEtrip2 − 180 − mV
RADJ = 0 Ω
F̄¯Ā¯Ū¯L̄¯T̄¯ PIN
F̄¯ĀŪ¯L̄¯T̄¯ Pull-Down Voltage VFAULT IFAULT = 1 mA − − 0.5 V
¯ĀŪ¯L̄¯T̄¯ Pin Leakage Current
F̄ IFAULTLKG VFAULT = 5 V − − 1 µA
THERMAL PROTECTION (TSD)
Thermal Shutdown Threshold [2] TSD Temperature rising − 165 − °C
Thermal Shutdown Hysteresis [2] TSDHYS − 20 − °C

1 For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as
going into the node or pin (sinking).
2 Ensured by design and characterization, not production tested.
3 Minimum V = 5 V is only required at startup. After startup is completed, the IC is able to function down to V = 4 V.
IN IN

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

CHARACTERISTIC PERFORMANCE
TA = TJ

VIN Input Sleep Mode Current VIN UVLO Start Threshold Voltage
versus Ambient Temperature versus Ambient Temperature
10 4.40
9 4.35
8

VUVLOrise (V)
IQSLEEP (µA)

7
4.30
6 4.25
5 4.20
4 4.15
3
2
4.10
1 4.05
0 4.00
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C) Temperature (°C)

Switching Frequency VIN UVLO Stop Threshold Voltage

versus Ambient Temperature versus Ambient Temperature
2.20 3.70
2.15 3.69
3.68
VUVLOfall (V)

2.10
3.67
fSW (MHz)

2.05 3.66
2.00 3.65
1.95 3.64
3.63
1.90
3.62
1.85 3.61
1.80 3.60
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C) Temperature (°C)

OVP Pin Sense Current OVP Pin Overvoltage Threshold

versus Ambient Temperature versus Ambient Temperature
210 8.4
208 8.3
206
8.2
IOVPH (µA)

VOVP(th) (V)

204
202 8.1
200 8.0
198 7.9
196
7.8
194
192 7.7
190 7.6
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C) Temperature (°C)

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Input Disconnect Switch Gate to Source Voltage VSENSE Pin Sink Current
versus Ambient Temperature versus Ambient Temperature
-6.3 20.8
20.7
-6.4
20.6
-6.5

IADJ (µA)
20.5
VGS (V)

-6.6 20.4
20.3
-6.7
20.2
-6.8 20.1
-6.9 20.0
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130

Temperature (°C) Temperature (°C)

LED Current versus Ambient Temperature ISET to LED Current Gain versus Ambient Temperature
ISET = 120 µA
83 670
82
665
AISET (A/A)

81
660
ILED (mA)

80
79 655
78
650
77
76 645
75 640
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Temperature (°C) Temperature (°C)

LED to LED Matching Accuracy

3
versus Ambient Temperature
2
ΔLEDx (%)

-1

-2

-3
-50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Temperature (°C)

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Efficiency for Various 4-String Configurations

ILED = 70 mA, LED Vf ≈ 3.2 V
100

95
Efficiency (%)

90
6 series LEDs each string
85 7 series LEDs each string
8 series LEDs each string

80

75
5 7 9 11 13 15 17

Input Voltage, VIN (V)

Efficiency for Various 4-String Configurations

ILED = 80 mA, LED Vf ≈ 3.2 V
100

95
Efficiency (%)

90
6 series LEDs each string
85 7 series LEDs each string
8 series LEDs each string
80

75
5 7 9 11 13 15 17

Input Voltage, VIN (V)

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

FUNCTIONAL DESCRIPTION
The A8514 incorporates a current-mode boost controller with Powering up: LED pin short-to-ground check
internal DMOS switch, and four LED current sinks. It can be The VIN pin has a UVLO function that prevents the A8514
used to drive four LED strings of up to 12 white LEDs in series, from powering-up until the UVLO threshold is reached. After
with current up to 80 mA per string. For optimal efficiency, the VIN pin goes above UVLO, and a high signal is present on
the PWM/EN pin, the IC proceeds to power-up. As shown in
the output of the boost stage is adaptively adjusted to the mini-
Figure 3, at this point the A8514 enables the disconnect switch
mum voltage required to power all of the LED strings. This is and checks if any LEDx pins are shorted to ground and/or are not
expressed by the following equation: used.
VOUT = max ( VLED1 ,..., VLED4 ) + VREG (1) The LED detect phase starts when the GATE voltage of the
where disconnect switch is equal to VIN – 4.5 V. After the voltage
VLEDx is the voltage drop across LED strings 1 through 4, and threshold on the LEDx pins exceeds 120 mV, a delay of between
3000 and 4000 clock cycles is used to determine the status of the
VREG is the regulation voltage of the LED current sinks (typi- pins. Thus, the LED detection duration varies with the switching
cally 0.7 V at the maximum LED current). frequency, as shown in the following table:

Enabling the IC Switching Frequency Detection Time

(MHz) (ms)
The IC turns on when a logic high signal is applied on the
2 1.5 to 2
PWM/EN pin with a minimum duration of tPWMH for the first
1 3 to 4
clock cycle, and the input voltage present on the VIN pin is
0.800 3.75 to 5
greater than the 4.35 V necessary to clear the UVLO (VUVLOrise )
0.600 5 to 6.7
threshold. The power-up sequence is shown in Figure 2. Before
the LEDs are enabled, the A8514 driver goes through a system The LED pin detection voltage thresholds are as follows:
check to determine if there are any possible fault conditions that
LED Pin Voltage LED Pin Status Action
might prevent the system from functioning correctly. Also, if the
<70 mV Short-to-ground Power-up is halted
FSET/SYNC pin is pulled low, the IC will not power-up. More
150 mV Not used LED removed from operation
information on the FSET/SYNC pin can be found in the Sync
325 mV LED pin in use None
section of this datasheet.

GATE = VIN – 4.5 V

VDD
GATE
C1
FSET/SYNC
C1
LEDx
C2 C2 LED detection period
ISET
C3
ISET
C3
PWM/EN
C4 C4 PWM/EN

t t

Figure 3: Power-up diagram; shows VDD (ch1, 2 V/div.), FSET/SYNC (ch2, Figure 2: Power-up diagram; shows the relationship of an LEDx pin with
1 V/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 2 V/div.) pins, respect to the gate voltage of the disconnect switch (if used) during the
time = 200 µs/div. LED detect phase, as well as the duration of the LED detect phase for a
switching frequency of 2 MHz; shows GATE (ch1, 5 V/div.), LED (ch2,
500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins,
time = 500 µs/div.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

LED1 LED1
C1 LED detection period C1 LED detection period

C2
LED2 LED2
C2

C3
ISET ISET
C3

C4 PWM/EN C4 PWM/EN

t t

Figure 4A: An LED detect occurring when both LED pins are selected to Figure 4B: Example with LED2 pin not being used; the detect voltage is
be used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.), ISET about 150 mV; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.),
(ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 500 µs/div. ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 500 µs/div.

Short removed

Pin shorted LED1

C1

LED2
C2

ISET
C3

C4 PWM/EN

Figure 4C: Example with one LED shorted to ground. The IC will not proceed
with power-up until the shorted LED pin is released, at which point the LED is
checked to see if it is being used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2,
500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins,
time = 1 ms/div.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

All unused pins should be connected with a 2.37 kΩ resistor to In case during operation a fault occurs that will increase the
ground, as shown in Figure 5. The unused pin, with the pull-down switching frequency, the FSET/SYNC pin is clamped to a
resistor, will be taken out of regulation at this point and will not maximum switching frequency of no more than 3.5 MHz. If the
contribute to the boost regulation loop. FSET/SYNC pin is shorted to GND the part will shut down. For
more details see the Fault Mode table later in this datasheet.
If a LEDx pin is shorted to ground the A8514 will not proceed
with soft start until the short is removed from the LEDx pin. This
prevents the A8514 from powering-up and putting an uncon-
Inrush current caused by
trolled amount of current through the LEDs. enabling the disconnect
switch (when used) Operation during
Soft start function C1 ISWSS(lim)
During soft start the LEDx pins are set to sink (ILEDSS) and the IOUT
boost switch current is reduced to the ISWSS(LIM) level to limit
the inrush current generated by charging the output capacitors. C2
When the converter senses that there is enough voltage on the IIN
LEDx pins the converter proceeds to increase the LED current to Normal operation
ISW(lim)
the preset regulation current and the boost switch current limit is C3
switched to the ISW(LIM) level to allow the A8514 to deliver the VOUT
necessary output power to the LEDs. This is shown in Figure 6. C4
PWM/EN
Frequency selection t
The switching frequency on the boost regulator is set by the resis-
tor connected to the FSET/SYNC pin. The switching frequency Figure 6: Startup diagram showing the input current, output voltage, and
can be anywhere from 580 kHz to 2.3 MHz. Figure 7 shows the output current; shows IOUT (ch1, 200 mA/div.), IIN (ch2, 1 A/div.), VOUT
(ch3, 20 V/div.), and PWM/EN (ch4, 5 V/div.), time = 1 ms/div.
typical switching frequencies for various resistor values, with
the relationship between RFSET and typical switching frequency
given as:
2.1
fSW = k / (RFSET + RINT ), or (2)
1.9
RFSET = k / fSW – RINT
Switching Frequency, fSW (MHz)

1.7
where RFSET is in in kΩ, fSW is in megahertz, k = 20.9 and RINT
(internal resistance of FSET pin) = 0.6 kΩ. 1.5

1.3

A8514 A8514 1.1

0.9
LED1
LED2
LED1
LED2
0.7
LED3 LED3
GND LED4 GND LED4
0.5
2.37 kΩ 10 12 14 16 18 20 22 24 26 28 30 32 34 36
Resistance for RFSET (kΩ)

Figure 5: Channel select setup: (left) using only LED1, LED2, and LED3, Figure 7: Typical Switching Frequency versus value of RFSET resistor
and (right) using all four channels.

13
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

SYNC
The A8514 can also be synchronized using an external clock VOUT
on the FSET/SYNC pin. Figure 8 shows the correspondence
of a sync signal and the FSET/SYNC pin, and Figure 9 shows C1
IOUT
the result when a sync signal is detected: the LED current does C2
not show any variation while the frequency changeover occurs.
At power-up if the FSET/SYNC pin is held low, the IC will not
power-up. Only when the FSET/SYNC pin is tri-stated to allow
C3
the pin to rise, to about 1 V, or when a synchronization clock is FSET/SYNC
detected, will the A8514 try to power-up. SW node
The basic requirement of the sync signal is 150 ns minimum on-
time and 150 ns minimum off time, as indicated by the specifica-
C4
tions for tPWSYNCON and tPWSYNCOFF . Figure 10 shows the timing t
for a synchronization clock into the A8514 at 2.2 MHz. Thus, any Figure 8: Diagram showing a synchronized FSET/SYNC pin and switch
pulse with a duty cycle of 33% to 66% at 2.2 MHz can be used to node; shows VOUT (ch1, 20 V/div.), IOUT (ch2, 200 mA/div.), FSET/SYNC
synchronize the IC. (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), time = 2 µs/div.

The SYNC pulse duty cycle ranges for selected switching fre-
quencies are: VOUT

C1
SYNC Pulse Frequency Duty Cycle Range
(MHz) (%) IOUT
C2
2.2 33 to 66
2 30 to 70
1 15 to 85
C3
0.800 12 to 88 2 MHz operation FSET/SYNC 1 MHz operation
0.600 9 to 91 SW node

If during operation a sync clock is lost, the IC will revert to the

preset switching frequency that is set by the resistor RFSET. Dur- C4

ing this period the IC will stop switching for a maximum period t

of about 7 µs to allow the sync detection circuitry to switch over Figure 9: Transition of the SW waveform when the SYNC pulse is detect-
to the externally preset switching frequency. ed. The A8514 switching at 2 MHz, applied SYNC pulse at 1 MHz; shows
VOUT (ch1, 20 V/div.), IOUT (ch2, 200 mA/div.), FSET/SYNC (ch3, 2 V/div.),
If the clock is held low for more than 7 µs, the A8514 will shut and SW node (ch4, 20 V/div.), time = 5 µs/div.

14
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

down. In this shutdown mode the IC will stop switching, the If it is necessary to switch over between internal oscillator and
input disconnect switch is open, and the LEDs will stop sinking external sync during operation, ensure the transition takes place
current. To shut down the IC into low power mode, the user must at least 500 ns after the previous PWM = H rising edge. Alterna-
disable the IC using the PWM pin, by keeping the pin low for a tively, execute the switchover during PWM = L only. This restric-
period of 32,750 clock cycles. If the FSET/SYNC pin is released tion does not apply if PWM dimming is not being used.
at any time after 7 µs, the A8514 will proceed to soft start.
To prevent generating a fault when the external SYNC signal is PWM
stuck at low, the circuit shown in Figure 11 can be used. When 500 ns
the external SYNC signal goes low, the A8514 will continue to Ext_Sync
operate normally at the switching frequency set by RFSET. No / FSET 1 V
FAULT flag is generated.
Internal
Clock
t PWSYNCON Internal oscillator External Sync
154 ns

Figure 12: Avoid switching over between Internal Oscillator and External
150 ns
Sync in highlighted region

150 ns

t PWSYNCOFF

T = 454 ns

Figure 10: SYNC pulse on and off time requirements.

A8514
External
Synchronization
Signal FSET

220 pF

Schottky RFSET
Barrier 10.2 kΩ
Diode

Figure 11: Countermeasure to prevent external sync signal stuck-at-low

fault.

15
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

VOUT

LED current setting and LED dimming COMP

The maximum LED current can be up to 80 mA per channel,
and is set through the ISET pin. To set the ILED current, connect C2
a resistor, RISET, between this pin and ground, according to the PWM
C1
following formula: C3
RISET = (1.003 × 653) / ILED (3)
where ILED is in A and RISET is in Ω. This sets the maximum cur- ILED
rent through the LEDs, referred to as the 100% current. Standard C4

RISET values, at gain equals 653, are as follows:

t
Standard Closest RISET
Figure 13B: Typical PWM diagram showing VOUT, ILED, and COMP pin as
Resistor Value LED current per LED, ILED
well as the PWM signal. PWM dimming frequency is 500 Hz at 1% duty
(kΩ) (mA)
cycle ; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3,
8.25 80 5 V/div.), and ILED (ch4, 50 mA/div.), time = 500 µs/div.
10.2 65
16.5 40 PWM
22.1 30

PWM dimming C1

The LED current can be reduced from the 100% current level
by PWM dimming using the PWM/EN pin. When the PWM/EN
pin is pulled high, the A8514 turns on and all enabled LEDs sink ILED
100% current. When PWM/EN is pulled low, the boost converter
and LED sinks are turned off. The compensation (COMP) pin is C2

floated, and critical internal circuits are kept active. The typi-
cal PWM dimming frequencies fall between 200 Hz and 1 kHz.
Figure 13A to Figure 13D provide examples of PWM switching
behavior. t
Figure 13C: Delay from rising edge of PWM signal to LED current; shows
PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), time = 200 ns/div.

VOUT PWM

C1
COMP
C2
PWM
C1
C3
ILED
C2

C4
ILED

t t

Figure 13A: Typical PWM diagram showing VOUT, ILED, and COMP pin as Figure 12D. Delay from falling edge of PWM signal to LED current turn off;
well as the PWM signal. PWM dimming frequency is 500 Hz at 50% duty shows PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), time = 200 ns/div.
cycle; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3,
5 V/div.), and ILED (ch4, 50 mA/div.), time = 500 µs/div.

16
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Another important feature of the A8514 is the PWM signal to The duty cycle of this signal is inversely proportional to the per-
LED current delay. This delay is typically less than 500 ns, which centage of current that is delivered to the LEDs (Figure 16).
allows greater accuracy at low PWM dimming duty cycles, as
shown in Figure 14. To use this pin for a trim function, the user should set the maxi-
mum output current to a value higher than the required current by
APWM pin at least 5%. The LED ISET current is then trimmed down to the
The APWM pin is used in conjunction with the ISET pin (see appropriate value. Another consideration that also is important
Figure 15. This is a digital signal pin that internally adjusts is the limitation of the user APWM signal duty cycle. In some
the ISET current. When this pin is not used it should be tied to cases, it might be preferable to set the maximum ISET current to
ground. be 25% to 50% higher, thus allowing the APWM signal to have
The typical input signal frequency is between 20 kHz and 1 MHz. duty cycles that are between 25% and 50%.

10 APWM A8514

8
ISET ISET Current
ErrLED (%)

Worst-case
6 Current
Typical Mirror Adjust
4 RISET

2 PWM LED
Driver
0
0.1 1 10 100
PWM Duty Cycle, D (%)

Figure 14: Percentage Error of the LED current versus PWM duty cycle Figure 16: Simplified block diagram of the APWM and ISET circuit.
(at 200 Hz PWM frequency).

80 12
70 10
60
IOUT (mA)

50 8
%ErrLED

IOUT = 80 mA
40 6
30 IOUT = 65 mA
IOUT = 65 mA 4
20 IOUT = 80 mA
10 2
0 0
0 20 40 60 80 100 0 20 40 60 80 100
APWM Duty Cycle (%) APWM Duty Cycle (%)

Figure 15: Output current versus duty cycle; 200 kHz APWM signal. Figure 17: Percentage Error of the LED current versus PWM duty cycle;
200 kHz APWM signal.

17
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

As an example, a system that delivers a full LED current of should be enable before or at the same time as the PWM signal.
80 mA per LED would deliver 60 mA of current per LED when This sequence will prevent the light output intensity from chang-
an APWM signal is applied with a duty cycle of 25% (Figure ing during power up of the IC.
18 and Figure 19).
Figure 20 shows the sequencing of the APWM and PWM signal
Although the order in which APWM and the PWM signal are during power-up to prevent inadvertent light intensity changes.
enabled does not matter, when enabling the A8514 into low cur- The full intensity light output with no APWM or PWM dimming
rent output while PWM and APWM dimming, the APWM signal is 80 mA per channel.

ILED
ILED

C1 C1

C2 C2
APWM APWM

PWM/EN PWM/EN
C3 C3
t t

Figure 18: Diagram showing the transition of LED current from 60 mA Figure 20: Diagram showing the transition of LED current from 80 mA
to 80 mA, when a 25% duty cycle signal is removed from the APWM pin. to 60 mA, when a 25% duty cycle signal is applied to the APWM pin;
PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 10 V/div.), and PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 10 V/div.), and
PWM/EN (ch3, 5 V/div.), time = 500 µs/div. PWM/EN (ch3, 5 V/div.), time = 500 µs/div.

APWM

C1

C1
ILED
IOUT
C2
PWM/EN
C3 C2
APWM

VOUT
C3
PWM/EN
C4
t t

Figure 19: Diagram showing power-up sequencing LED current of 5 mA Figure 21: Transition of output current level when a 50% duty cycle signal
per channel with a 10% duty cycle PWM signal and a 95% duty cycle is applied to the APWM pin, in conjunction with a 50% duty cycle PWM
APWM signal; shows APWM (ch1, 5 V/div.), ILED (ch2, 50 mA/div.), dimming being applied to the PWM pin; shows IOUT (ch1, 50 mA/div.),
PWM/EN (ch3, 5 V/div.), and VOUT (ch4, 10 V/div.), time = 500 µs/div. APWM (ch2, 10 V/div.), and PWM/EN (ch3, 5 V/div.), time = 500 µs/div.

18
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Although the APWM dimming function has a wide frequency maximum. To keep the internal gain amplifier stable, the user
range, if this function is used strictly as an analog dimming should not decrease the current through the RISET resistor to less
function it is recommended to use frequency ranges between than 20 µA
50 and 500 kHz for best accuracy. The frequency range must be
• For a dual-resistor configuration (panel B of Figure 22), the ISET
considered only if the user is not using this function as a closed
loop trim function. Another limitation is that the propagation current is controlled by the following formula:
delay between this APWM signal and IOUT takes several milli-
VISET VDAC – VISET
seconds to change the actual LED current. This effect is shown in ISET = – (5)
Figure 18, Figure 19, and Figure 21. RISET R1

The advantage of this circuit is that the DAC voltage can be

Analog dimming
higher or lower, thus adjusting the LED current to a higher or
The A8514 can also be dimmed by using an external DAC or
lower value of the preset LED current set by the RISET resistor:
another voltage source applied either directly to the ground side
of the RISET resistor or through an external resistor to the ISET ▫ VDAC = 1.003 V; the output is strictly controlled by RISET
pin (see Figure 20). The limit of this type of dimming depends ▫ VDAC > 1.003 V; the LED current is reduced
on the range of the ISET pin. In the case of the A8514 the limit is ▫ VDAC < 1.003 V; the LED current is increased
20 to 125 µA.
• For a single resistor (panel A of Figure 22), the ISET current is LED short detect
controlled by the following formula: Both LEDx pins are capable of handling the maximum VOUT
VISET – VDAC that the converter can deliver, thus providing protection from the
ISET = (4) LEDx pin to VOUT in the event of a connector short.
R ISET
An LEDx pin that has a voltage exceeding VLEDSC will be
where VISET is the ISET pin voltage and VDAC is the DAC output
removed from operation (see Figure 23). This is to prevent the IC
voltage.
from dissipating too much power by having a large voltage pres-
When the DAC voltage is 0 V the LED current will be at its ent on an LEDx pin.

DAC R ISET A8514

VDAC IOUT
ISET
C1
GND GND

(A)

LED1
R1 C2
DAC A8514
VDAC ISET
GND GND
R ISET PWM/EN

C3
(B)
t

Figure 22: Simplified diagrams of voltage control of ILED: typical applica- Figure 23: Example of the disabling of an LED string when the LED pin
tions using a DAC to control ILED using a single resistor (upper), and dual voltage is increased above 4.6 V; shows IOUT (ch1, 200 mA/div.), LED1
resistors (lower). (ch2, 5 V/div.), and PWM/EN (ch3, 5 V/div.), time = 10 µs/div.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

While the IC is being PWM-dimmed, the IC rechecks the dis- ROVP is the value of the external resistor, in Ω,
abled LED every time the PWM signal goes high, to prevent false
VOVP(th) is the pin OVP trip point found in the Electrical Charac-
tripping of an LED short event. This also allows some self-cor-
teristics table, and
rection if an intermittent LED pin short to VOUT is present.
IOVPH is the current into the OVP pin.
Overvoltage protection
There are several possibilities for why an OVP condition would
The A8514 has overvoltage protection (OVP) and open Schottky
be encountered during operation, the two most common being: a
diode (D1 in Figure 1) protection. The OVP protection has a
disconnected output, and an open LED string. Examples of these
default level of 8.1 V and can be increased up to 53 V by con-
are provided in Figure 24 and Figure 25.
necting resistor ROVP between the OVP pin and VOUT . When
the current into the OVP pin exceeds 199 μA (typical), the OVP Figure 24 illustrates when the output of the A8514 is discon-
comparator goes low and the boost stops switching. nected from load during normal operation. The output voltage
instantly increases up to OVP voltage level and then the boost
The following equation can be used to determine the resistance
stops switching to prevent damage to the IC. If the output is
for setting the OVP level:
drained off, eventually the boost might start switching for a short
ROVP = ( VOUTovp – VOVP(th) ) / IOVPH (6) duration until the OVP threshold is hit again.
where:
Figure 25 displays a typical OVP event caused by an open LED
VOUTovp is the target overvoltage level, string. After the OVP condition is detected, the boost stops

Output disconnect VOUT

event detected LED string open
VOUT condition detected

SW node
C2 C2
SW node

PWM
C1 C1
C3 C3
PWM

IOUT IOUT
C4 C4

t t
Figure 24: OVP protection in an output disconnect event; shows VOUT Figure 25: OVP protection in an open LED string event; shows VOUT
(ch1, 10 V/div.), SW node (ch2, 50 V/div.), PWM (ch3, 5 V/div.), and (ch1, 10 V/div.), SW node (ch2, 50 V/div.), PWM (ch3, 5 V/div.), and
IOUT (ch4, 200 mA/div.), time = 1 ms/div. IOUT (ch4, 200 mA/div.), time = 500 µs/div.

20
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

switching, and the open LED string is removed from operation. the UVLO threshold on the VIN pin. Figure 26 illustrates this.
Afterwards VOUT is allowed to fall, and eventually the boost will As soon as the switch node voltage (SW) exceeds 60 V, the IC
resume switching and the A8514 will resume normal operation. shuts down. Due to small delays in the detection circuit, as well
A8514 also has built-in secondary overvoltage protection to as there being no load present, the switch node voltage will rise
protect the internal switch in the event of an open diode condi- above the trip point voltage.
tion. Open Schottky diode detection is implemented by detecting
overvoltage on the SW pin of the device. If voltage on the SW Figure 27 illustrates when the A8514 is being enabled during
pin exceeds the device safe operating voltage rating, the A8514 an open diode condition. The IC goes through all its initial LED
disables and remains latched. To clear this fault, the IC must be detection and then tries to enable the boost, at which point the
shut down either by using the PWM/EN signal or by going below open diode is detected.

Open diode
condition detected
PWM

C1 SW node

C2
VOUT

IOUT
C3
C4

t
Figure 26: OVP protection in an open Schottky diode event, while the IC is
in normal operation; shows PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.),
VOUT (ch3, 20 V/div.), and IOUT (ch4, 200 mA/div.), time = 1 µs/div.

Open diode
PWM condition detected

C1

SW node

C2
VOUT
C3

IOUT
C4

t
Figure 27: OVP protection when the IC is enabled during an open diode
condition; shows PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT
(ch3, 10 V/div.), and IOUT (ch4, 200 mA/div.), time = 500 µs/div.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Boost switch overcurrent protection

The boost switch is protected with cycle-by-cycle current limiting rent limit is set above the cycle-by-cycle current limit to protect
set at a minimum of 3.0 A. There is also a secondary current limit the switch from destructive currents when the boost inductor is
that is sensed on the boost switch. When detected this current shorted. Various boost switch overcurrent conditions are shown in
limit immediately shuts down the A8514. The level of this cur- Figure 28, Figure 29, and Figure 30.

C1 C1
SW node
SW node

C2
IL IL

VOUT VOUT
C2

PWM/EN PWM/EN
C3

C3
C4
C4
t t
Figure 28: Normal operation of the switch node (SW); inductor current (IL) Figure 29: Cycle-by-cycle current limiting; inductor current (yellow trace, IL),
and output voltage (VOUT) for 9 series LEDs in each of four strings con- note reduction in output voltage as compared to normal operation with the
figuration; shows SW node (ch1, 20 V/div.), inductor current IL (ch2, 1 A/ same configuration (Figure 27); shows SW node (ch1, 20 V/div.), inductor
div.), VOUT (ch3, 10 V/div.), and PWM/EN (ch4, 5 V/div.), current IL (ch2, 1 A/div.), VOUT (ch3, 10 V/div.), and PWM/EN (ch4, 5 V/div.),
time = 2 µs/div. time = 2 µs/div.

PWM/EN

C1
FAULT
C2

SW node

C3

IL
C4

Figure 30: Secondary boost switch current limit; when this limit is hit, the
A8514 immediately shuts down; shows PWM (ch1, 5 V/div.), VOUT (ch2,
5 V/div.), SW node (ch3, 50 V/div.), and inductor current IL (ch4, 2 A/div.),
time = 100 ns/div.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Input overcurrent protection and disconnect switch

The primary function of the input disconnect switch is to protect C1
FAULT
the system and the device from catastrophic input currents during (3) IIN limited to 3 A
(1) Initial fault
a fault condition. The external circuit implementing the discon- detected
nect is shown in Figure 31. If the input disconnect switch is not IIN
used, the VSENSE pin must be tied to VIN and the GATE pin
must be left open. C2

(2) Disconnect switch

When selecting the external PMOS, check for the following goes into a linear mode
parameters:
GATE
(4) After 12.5 ms,
• Drain-source breakdown voltage V(BR)DSS > –40 V disconnect switch
• Gate threshold voltage (make sure it is fully conducting at C3 shuts down
VGS = –4 V, and cut-off at –1 V) PWM/EN
C4
• RDS(on): Make sure the on-resistance is rated at VGS = –4.5 V or t
similar, not at –10 V; derate it for higher temperature
The input disconnect switch has two modes of operation: Figure 32: Showing typical wave forms for a 3-A, 1X current limit under a
fault condition; shows fSW = 800 kHz, F̄¯ĀŪ¯L̄¯T̄¯ (ch1, 5 V/div.), IIN (ch2, 2 A/
• 1× mode When the input current is between one and two times div.), GATE (ch3, 5 V/div.), and PWM/EN (ch4, 5 V/div.), time = 5 ms/div.
the preset current limit value, the disconnect switch enters a con-
stant-current mode for a maximum duration of 10,000 cycles or FAULT
5 ms at 2 MHz. During this time, the Fault flag is set immediately
and the disconnect switch goes into a linear mode of operation, C1 Fault flag set at
1× trip point
in which the input current will be limited to a value approximate
to the 1× current trip point level (Figure 32). If the fault corrects
A8514 shuts down at
itself before the expiration of the timer, the Fault flag will be C2 GATE
2× trip point
removed, and normal operation will resume.
IIN
The user can also during this time decide whether to shut down
the A8514. To immediately shut down the device, pull the FSET/ C3
SYNC pin low for more than 7 µs. After the FSET/SYNC pin has
been low for a period longer than 7 µs, the IC will stop switching, C4 PWM/EN
the input disconnect switch will open, and the LEDx pins will
stop sinking current. The A8514 can be powered down into low t
power mode. To do so, disable the IC by keeping the PWM/EN
Figure 33: 2× mode, secondary overcurrent fault condition. IIN is the input
pin low for a period of 32,750 clock cycles. To keep the discon- current through the switch. The Fault flag is set at the 1× current limit, and
nect switch stable while the disconnect switch is in 1× mode, use when the 2× current limit is reached the A8514 disables the gate of the
a 22 nF capacitor for CC and a 20 Ω resistor for RC. disconnect switch (GATE); shows F̄¯ĀŪ¯L̄¯T̄¯ (ch1, 5 V/div.), GATE (ch2, 10 V/
div.), IIN (ch3, 2 A/div.), and PWM/EN (ch4, 5 V/div.), time = 5 µs/div.

VIN RSC Q1 VIN

To L1 To L1
RC
CC
RADJ

GATE GATE
VSENSE A8514 VSENSE A8514
VIN VIN

Figure 31: Typical circuit (left) with the input disconnect feature implemented, and (right) without the input disconnect feature.

23
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

• 2× current limit If the input current level goes above 2× of the

preset current limit threshold, the A8514 will shut down in less
than 3 µs regardless of user input (Figure 33). This is a latched
condition. The Fault flag is also set to indicate a fault. This
feature is meant to prevent catastrophic failure in the system due
to inductor short to ground, switch pin short to ground, or output
short to ground.
VIN
Setting the current sense resistor
The typical threshold for the current sense circuit is 104 mV,
when RADJ is 0 Ω. This voltage can be trimmed by the RADJ IOUT
C1
resistor. The typical 1× trip point should be set at about 3 A, C2
VDD
which coincides with the cycle-by-cycle current limit minimum C3
threshold.
PWM/EN
For example, given 3 A of input current, and the calculated maxi-
mum value of the sense resistor, RSC = 0.033 Ω. C4
t
The RSC chosen is 0.03 Ω, a standard.
Also: Figure 34: Shutdown showing a falling input voltage (VIN); shows VIN
(ch1, 2 V/div.), IOUT (ch2, 200 mA/div.), VDD (ch3, 5 V/div.), and PWM/EN
RADJ = (VSENSETRIP – VADJ ) / IADJ (7) (ch4, 2 V/div.), time = 5 ms/div.

The trip point voltage is calculated as:

VADJ = 3.0 A × 0.03 Ω = 0.090 V
RADJ = (0.104 – 0.09 V) / (20.3 µA) = 731 Ω
GATE
C1
Input UVLO
When VIN and VSENSE rise above the VUVLOrise threshold, the
A8514 is enabled. A8514 is disabled when VIN falls below the IOUT
C2
VUVLOfall threshold for more than 50 μs. This small delay is used
to avoid shutting down because of momentary glitches in the
VDD
input power supply. When VIN falls below 4.35 V, the IC will
shut down (see Figure 33). C3

VDD PWM/EN
The VDD pin provides regulated bias supply for internal circuits. C4

Connect the capacitor CVDD with a value of 0.1 μF or greater to t

this pin. The internal LDO can deliver no more than 2 mA of cur-
rent with a typical VDD of about 3.5 V, enabling this pin to serve Figure 35: Shutdown using the enable function, showing the 16 ms delay
as the pull-up voltage for the F̄¯Ā¯Ū¯L̄¯T̄¯ pin. between the PWM/EN signal and when the VDD and GATE of the discon-
nect switch turns off; shows GATE (ch1, 10 V/div.), IOUT (ch2, 200 mA/
div.), VDD (ch3, 5 V/div.), and PWM/EN (ch4, 2 V/div.), time = 5 ms/div.
Shutdown
If the PWM/EN pin is pulled low for more than tPWML (32,750
clock cycles), the device enters shutdown mode and clears all

24
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

internal fault registers. As an example, at a 2 MHz clock fre- The possible fault conditions that the device can detect are: Open
quency, it will take approximately 16.3 ms to shut down the IC LED pin, LED pin shorted to ground, shorted inductor, VOUT
into the low power mode (Figure 35). When the A8514 is shut short to ground, SW pin shorted to ground, ISET pin shorted to
down, the IC will disable all current sources and wait until the ground, and input disconnect switch source shorted to ground.
PWM/EN signal goes high to re-enable the IC. If faster shut
down is required, the FSET/SYNC pin can be used. Note the following:

Fault protection during operation • Some of the protection features might not be active during
The A8514 constantly monitors the state of the system to deter- startup, to prevent false triggering of fault conditions.
mine if any fault conditions occur during normal operation. The • Some of these faults will not be protected if the input disconnect
response to a triggered fault condition is summarized in the Fault switch is not being used. An example of this is VOUT short to
Mode table. ground.

Fault Mode Table

Fault
Disconnect Sink
Fault Name Type Active Flag Description Boost
switch driver
Set
Primary switch
Off for
overcurrent protection This fault condition is triggered by the cycle-by-
Auto-restart Always No a single On On
(cycle-by-cycle cycle current limit, ISW(LIM).
cycle
current limit)
When the current through the boost switch exceeds
secondary current SW limit (ISW(LIM2)) the device
Secondary switch immediately shuts down the disconnect switch,
Latched Always Yes Off Off Off
current limit LED drivers, and boost. The Fault flag is set. To re-
enable the device, the PWM/EN pin must be pulled
low for 32,750 clock cycles.
The device is immediately shut off if the voltage
across the input sense resistor is 2X the preset
current value. The Fault flag is set. If the input
Input disconnect current limit is between 1X and 2X, the Fault flag
Latched Always Yes Off Off Off
current limit is set but the IC will continue to operate normally
for tGFAULT1 or until it is shut down. To re-enable
the device the PWM/EN pin must be pulled low for
32,750 clock cycles.
Secondary overvoltage protection is used for open
diode detection. When diode D1 opens, the SW pin
voltage will increase until VOVP(SEC) is reached. This
Secondary OVP Latched Always Yes fault latches the IC. The input disconnect switch is Off Off Off
disabled as well as the LED drivers, and the Fault
flag is set. To re-enable the part the PWM pin must
be pulled low for 32,750 clock cycles.

Continued on the next page…

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Fault Mode Table (continued)

Fault
Disconnect Sink
Fault Name Type Active Flag Description Boost
Switch driver
Set
This fault prevents the device from starting-up if
either of the LEDx pins are shorted. The device
LED Pin Short
Auto-restart Startup No stops soft-start from starting while either of the Off On Off
Protection
LEDx pins are determined to be shorted. After the
short is removed, soft-start is allowed to start.
When an LEDx pin is open the device will determine Off for
which LED pin is open by increasing the output open
Normal voltage until OVP is reached. Any LED string not pins.
LED Pin open Auto-restart No On On
Operation in regulation will be turned off. The device will then On
go back to normal operation by reducing the output for all
voltage to the appropriate voltage level. others.
This fault occurs when the ISET current goes above
150% of the maximum current. The boost will stop
switching, the disconnect switch will turn off, and
ISET Short Protection Auto-restart Always No Off On Off
the IC will disable the LED sinks until the fault is
removed. When the fault is removed the IC will try
to to regulate to the preset LED current.
Fault occurs when the FSET/SYNC current goes
above 150% of maximum current, about 180 µA.
FSET/SYNC Short The boost will stop switching, the disconnect switch
Auto-restart Always Yes Off Off Off
Protection will turn off, and the IC will disable the LED sinks
until the fault is removed. When the fault is removed
the IC will try to restart with soft-start.
Fault occurs when OVP pin exceeds VOVP(th)
Stop
threshold. The A8514 will immediately stop
Overvoltage during
Auto-restart Always No switching to try to reduce the output voltage. If On On
Protection OVP
the output voltage decreases, then the A8514 will
event.
restart switching to regulate the output voltage.
Off for
Fault occurs when the LED pin voltage exceeds shorted
VLEDSC. When the LED short protection is detected pins.
LED Short Protection Auto-restart Always No On On
the LED string that is above the threshold will be On
removed from operation. for all
others.
Overtemperature Fault occurs when the die temperature exceeds the
Auto-restart Always No Off Off Off
Protection overtemperature threshold, 165°C.
Fault occurs when VIN drops below VUVLO , 3.90 V
VIN UVLO Auto-restart Always No Off Off Off
maximum. This fault resets all latched faults.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

APPLICATION INFORMATION

Design Example for Boost Configuration Then the OVP resistor is:
This section provides a method for selecting component values
ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH (9)
when designing an application using the A8514. The resulting
design is diagrammed in Figure 36. = (34.7 (V) – 8.1 (V)) / 199 (µA) = 133.67 kΩ
Assumptions: For the purposes of this example, the following are where both IOVPH and VOVP(th) are taken from the Electrical
given as the application requirements: Characteristics table.
• VBAT: 10 to 14 V Chose a value of resistor that is higher value than the calculated
• Quantity of LED channels, #CHANNELS : 4 ROVP . In this case a value of 137 kΩ was selected. Below is the
actual value of the minimum OVP trip level with the selected
• Quantity of series LEDs per channel, #SERIESLEDS : 10
resistor:
• LED current per channel, ILED : 60 mA
VOUT(OVP) = 137 (kΩ) × 199 (µA) + 8.1 (V) = 35.36 V
• Vf at 60 mA: 3.2 V
• fSW : 2 MHz Step 3b: At this point a quick check must be done to see if the
• TA(max): 65°C conversion ratio is acceptable for the selected frequency.
• PWM dimming frequency: 200 Hz, 1% duty cycle Dmaxofboost = 1 – tSWOFFTIME × fSW (10)
= 1 – 68 (ns) × 2.0 (MHz) = 86.4%
Procedure: The procedure consists of selecting the appropriate
configuration and then the individual component values, in an where the minimum off-time (tSWOFFTIME) is found in the Electri-
ordered sequence. cal Characteristics table.

Step 1: Connect LEDs to pins LED1 and LED2. The Theoretical Maximum VOUT is then calculated as:

Step 2: Determining the LED current setting resistor RISET: VIN(min)

VOUT(max) = – Vd (11)
RISET = (VISET × AISET) / ILED (7) 1 – Dmaxofboost
= (1.003 (V) × 653) / 60 mA = 10.92 kΩ
10 (V)
Choose a 11.00 kΩ resistor. = – 0.4 (V) = 73.13 V
1 – 0.864
Step 3: Determining the OVP resistor. The OVP resistor is
connected between the OVP pin and the output voltage of the where Vd is the diode forward voltage.
converter. The Theoretical Maximum VOUT value must be greater than the
Step 3a: The first step is determining the maximum voltage value VOUT(OVP) . If this is not the case, the switching frequency
based on the LED requirements. The regulation voltage, VLED , of the boost converter must be reduced to meet the maximum
of the A8514 is 700 mV. A constant term, 2 V, is added to give duty cycle requirements.
margin to the design due to noise and output voltage ripple. Step 4: Selecting the inductor. The inductor must be chosen such
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 (V) (8) that it can handle the necessary input current. In most applica-
tions, due to stringent EMI requirements, the system must operate
= 10 × 3.2 V+ 0.7 V + 2 V in continuous conduction mode throughout the whole input volt-
= 34.7 V age range.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Step 4a: Determining the duty cycle, calculated as follows: Step 4d: Double-check to make sure the ½ current ripple is less
than IIN(min):
VIN(min)
D(max) = 1 – (12) IIN(min) > 1/2 ΔIL (18)
VOUT(OVP) + Vd
0.67 A > 0.19 A
10 (V) A good inductor value to use would be 10 µH.
= 1– = 72.04%
35.36 (V) + 0.4 (V) Step 4e: This step is used to verify that there is sufficient slope
compensation for the inductor chosen. The slope compensation
Step 4b: Determining the maximum and minimum input current
value is determined by the following formula:
to the system. The minimum input current will dictate the induc-
3.6 fSW
tor value. The maximum current rating will dictate the current Slope Compensation = = 3.6 A /µs (19)
2 10 6
rating of the inductor. First, the maximum input current, given:
IOUT = #CHANNELS ILED (13) Next insert the inductor value used in the design:

= 4 0.060 (A) = 0.240 A VIN(min) D(max)

ΔILused = (20)
then: Lused fSW
VOUT(OVP) IOUT 10 (V) 0.72
IIN(max) = (14) = = 0.36 A
VIN(min) η 10 (µH) 2.0 (MHz)
35.36 (V) 240 (mA)
= = 0.94 A Calculate the minimum required slope:
10 (V) 0.90
ΔILused 1 10 –6
where η is efficiency. Required Slope (min) = (21)
1
(1 – D(max))
Next, calculate minimum input current, as follows: fSW
0.36 (A) 1 10 –6
VOUT(OVP) IOUT = = 2.57 A/µs
(15) 1 (1 – 0.72)
IIN(min) = 2.0 (MHz)
VIN(max) η
35.36 (V) 240 (mA)
= = 0.67 A If the minimum required slope is greater than the calculated slope
14 (V) 0.90
compensation, the inductor value must be increased.
A good approximation of efficiency, η , can be taken from the
Note: The slope compensation value is in A/µs, and 1×10 –6 is a
efficiency curves located in the datasheet. A value of 90% is a
constant multiplier.
good starting approximation.
Step 4f: Determining the inductor current rating. The inductor
Step 4c: Determining the inductor value. To ensure that the
current rating must be greater than the IIN(max) value plus the
inductor operates in continuous conduction mode, the value of
ripple current ΔIL, calculated as follows:
the inductor must be set such that the ½ inductor ripple current is
not greater than the average minimum input current. A first past L(min) = IIN(max) + 1/2 ΔILused (22)
assumes Iripple to be 40% of the maximum inductor current: = 0.94 (A) + 0.36 (A) / 2 = 1.12 A
ΔIL = IIN(max) × Iripple (16) Step 5: Determining the resistor value for a particular switching
frequency. Use the RFSET values shown in Figure 7. For example,
= 0.94 × 0.40 = 0.376 A
a 10 kΩ resistor will result in a 2 MHz switching frequency.
then:
Step 6: Choosing the proper switching diode. The switching
VIN(min) (17)
L= D(max) diode must be chosen for three characteristics when it is used in
ΔIL fSW
LED lighting circuitry. The most obvious two are: current rating
10 (V) of the diode and reverse voltage rating.
= 0.72 = 9.57 µH
0.376 (A) 2 (MHz)

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

The reverse voltage rating should be such that during operation The rms current through the capacitor is given by:
condition, the voltage rating of the device is larger than the maxi-
mum output voltage. In this case it is VOUT(OVP). ∆ILused
D(max) + (25)
The peak current through the diode is calculated as: ICOUTrms = IOUT IIN(max) × 12
Idp = IIN(max) + 1/2 ΔILused (23) 1 – D(max)

= 0.94 (A) + 0.36 (A) / 2 = 1.12 A 0.36 (A)

0.72 +
The third major component in deciding the switching diode is the 0.94 (A) × 12
=0.240 (A) = 0.39 A
reverse current, IR , characteristic of the diode. This characteristic 1 – 0.72
is especially important when PWM dimming is implemented.
During PWM off-time the boost converter is not switching. This
results in a slow bleeding off of the output voltage, due to leakage The output capacitor must have a current rating of at least
currents. IR can be a large contributor, especially at high tempera- 390 mA. The capacitor selected in this design was a 4.7 µF 50 V
tures. On the diode that was selected in this design, the current capacitor with a 3 A current rating.
varies between 1 and 100 µA.
Step 8: Selecting input capacitor. The input capacitor must be
Step 7: Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the selected such that it provides a good filtering of the input voltage
boost converter and for the PWM dimming function. The biggest waveform. To reduce the switching frequency noise, a good rule
factors that contribute to the size of the output capacitor are: of thumb is to set the input voltage high frequency ripple ΔVIN to
PWM dimming frequency and PWM duty cycle. Another major
contributor is leakage current, ILK . This current is the combina- be 1% of the minimum input voltage. The minimum input capaci-
tion of the OVP leakage current as well as the reverse current of tor requirements are as follows:
the switching diode. In this design the PWM dimming frequency
is 200 Hz and the minimum duty cycle is 1%. Typically, the volt- ∆ILused
CIN = (26)
age variation on the output, VCOUT , during PWM dimming must 8 fSW ∆VIN
be less than 250 mV, so that no audible hum can be heard. The 0.36 (A)
capacitance can be calculated as follows: = = 0.23 µF
8 2 (MHz) 0.1 (V)
1 – D(min) (24)
COUT = ILK
fPWM(dimming) V The rms current through the capacitor is given by:
COUT
1 – 0.01
= 200 µA = 3.96 µF
200 Hz 0.250 V CINrms = ∆ILused / 12 = 0.104 A (27)

A capacitor larger than 3.96 µF should be selected due to degra- A good ceramic input capacitor with ratings of 2.2 µF 50 V or
dation of capacitance at high voltages on the capacitor. A ceramic
4.7 µF 50 V will suffice for this application. Corresponding
4.7 µF 50 V capacitor is a good choice to fulfill this requirement.
Corresponding capacitors include: capacitors include:

Vendor Value Part number Vendor Value Part number

Murata 4.7 µF 50 V GRM32ER71H475KA88L Murata 4.7 µF 50 V GRM32ER71H475KA88L
Murata 2.2 µF 50 V GRM31CR71H225KA88L Murata 2.2 µF 50 V GRM31CR71H225KA88L

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Selecting the electrolytic input capacitor according to dimming The required electrolytic capacitor will be:
transient ( ∆I ∆T ) 106 (30)
CIN = = 59.4 µF
During a PWM dimming transient, unless an adequate input ∆VIN
capacitor is used, the input voltage drops significantly. If this issue is important to the customer, it is recommended to
use a 50 V/ 68 µF, low ESR value electrolytic capacitor.
The input capacitor ripple current, ΔI , during the dimming tran-
sient is the same as the input maximum DC current, and can be Step 9: Choosing the input disconnect switch components. Set
calculated by: the input disconnect 1X current limit to 3 A by choosing a sense
resistor. The calculated maximum value of the sense resistor is:
VOUT IOUT
∆I = IINDC(max) = (28)
VIN(min) η RSC(max) = VSENSEtrip / 3.0 (A) (31)
= 0.104 (V) / 3.0 (A) = 0.035 Ω
where VIN(min) is the minimum input voltage, 10 V. The RSC chosen is 0.033 Ω, a standard.
Consider the case where: η = 0.88, VIN(min) = 10 V, The trip point voltage must be:
VOUT = 33.1 V, IOUT = 0.24 A, then:
VADJ = 3.0 (A) × 0.033 (Ω) = 0.099 (V)
ΔI = IINDC(max) RADJ = (VSENSEtrip – VADJ ) / IADJ (typ) (32)
= (33.1 × 0.24) / (10 × 0.88) = 0.9 A RADJ = (0.104 (V) – 0.099 (V)) / 20.3 (µA) = 246.31 Ω
A value of 249 Ω was chosen for this design.
Allowing VIN to drop by ΔVIN = 0.5 V, and considering the feed-
back loop bandwidth, or cross over frequency, to be fC = 30 kHz, Step 10: See appendix A for a detailed description of how to
the input drop will last ΔT, calculated by : calculate RZ, CZ, and CP. Using L1 = 10 µH, COUT = (4.7 µF +
2.2 µF ), and fC = 30 kHz, the calculation results for RZ , CZ , and
ΔT = 1 /  fC = 33 × 10–6 (second) (29) CP are: RZ = 499 Ω, CZ = 100 nF, and CP = 320 pF.

VIN RSC D1
10 to 14 V L1 VOUT
0.033 Ω Q1 10 µH 2 A / 60 V

RC CC
CIN ROVP
4.7 µF RADJ 20 Ω 22 nF
137 kΩ COUT1 COUT2
249 Ω GATE SW 4.7 µF 2.2 µF
OVP
VSENSE
VC VIN A8514
CVDD VDD
100 kΩ 0.1 µF PAD LED1
FAULT LED2
10 LEDs each string
PWM/EN LED3
APWM LED4
ISET
COMP
FSET/SYNC CP RZ
RISET
RFSET 320 pF 499 Ω
11 kΩ AGND
10 kΩ PGND
CZ
100 nF

Figure 36: The schematic diagram showing calculated values from the design example above.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Design Example for SEPIC Configuration of the A8514 is 700 mV. A constant term, 2 V, is added to give
This section provides a method for selecting component values margin to the design due to noise and output voltage ripple.
when designing an application using the A8514 in SEPIC (Sin-
VOUT(OVP) = #SERIESLEDS × Vf + VLED + 2 (V) (34)
gle-Ended Primary-Inductor Converter) circuit. SEPIC topology
has the advantage that it can generate a positive output voltage = 4 × 3.3 (V) + 0.7 (V) + 2 (V) = 15.9 V
either higher or lower than the input voltage. The resulting design Then the OVP resistor is:
is diagrammed in Figure 37. ROVP = (VOUT(OVP) – VOVP(th) ) / IOVPH (35)
Assumptions: For the purposes of this example, the following are = (15.9 (V) – 8.1 (V)) / 0.199 (mA) = 39.196 kΩ
given as the application requirements:
where both IOVPH and VOVP(th) are taken from the Electrical
• VBAT: 6 to 14 V ( VIN(min): 5 V and VIN(max): 16 V ) Characteristics table.
• Quantity of LED channels, #CHANNELS : 4 In this case a value of 39.2 kΩ was selected. Below is the actual
• Quantity of series LEDs per channel, #SERIESLEDS : 4 value of the minimum OVP trip level with the selected resistor:
• LED current per channel, ILED : 60 mA VOUT(OVP) = 39.2 (kΩ) × 0.199 (mA) + 8.1 (V) = 15.9 V
• LED Vf at 60 mA: ≈ 3.3 V
Step 3b: At this point a quick check must be done to determine if
• fSW : 2 MHz the conversion ratio is acceptable for the selected frequency.
• TA(max): 65°C
Dmax = 1 – tSWOFFTIME × fSW (36)
• PWM dimming frequency: 200 Hz, 1% duty cycle
= 1 – 68 (ns) × 2 (MHz) = 86.4%
Procedure: The procedure consists of selecting the appropriate where the minimum off-time (tSWOFFTIME) is found in the Electri-
configuration and then the individual component values, in an cal Characteristics table.
ordered sequence. The Theoretical Maximum VOUT is then calculated as:
Step 1: Connecting LEDs to LEDx pins. If only some of the LED
channels are needed, the unused LEDx pins should be pulled to Dmax (37)
VOUT(max) = VIN(min) – Vd
ground using a 1.5 kΩ resistor. 1 – Dmax
Step 2: Determining the LED current setting resistor RISET: 0.86
= 5 (V) – 0.4 (V) = 30.3 V
RISET = (VISET × AISET) / ILED (33) 1 – 0.86

 = (1.003 (V) × 653) / 0.60 (A) = 10.92 kΩ

where Vd is the diode forward voltage.
Choose an 11.00 kΩ 1% resistor.
The Theoretical Maximum VOUT value must be greater than
Step 3: Determining the OVP resistor. The OVP resistor is the value VOUT(OVP) . If this is not the case, it may be necessary
connected between the OVP pin and the output voltage of the to reduce the frequency to allow the boost to convert the volt-
converter. age ratios.
Step 3a: The first step is determining the maximum voltage Step 4: Selecting the inductor. The inductor must be chosen such
based on the LED requirements. The regulation voltage, VLED , that it can handle the necessary input current. In most applica-

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

tions, due to stringent EMI requirements, the system must operate then:
in continuous conduction mode throughout the whole input volt-
age range. VIN(min) (43)
L= D(max)
ΔIL fSW
Step 4a: Determining the duty cycle, calculated as follows:
5 (V)
VOUT(OVP) + Vd = 0.765 = 7.53 µH
D(max) = 0.254 (A) 2 (MHz)
VIN(min) + VOUT(OVP) + Vd (38)

Step 4d: Double-check to make sure the ½ current ripple is less

15.9 (V) + 0.4 (V)
= = 76.5% than IIN(min):
5 (V) + 15.9 (V) + 0.4 (V)
IIN(min) > 1/2 ΔIL (44)
Step 4b: Determining the maximum and minimum input current
to the system. The minimum input current will dictate the induc- 0.265 A > 0.127 A
tor value. The maximum current rating will dictate the current
A good inductor value to use would be 10 µH.
rating of the inductor. First, the maximum input current, given:
IOUT = #CHANNELS ILED (39) Step 4e: Next insert the inductor value used in the design to
= 4 0.060 (A) = 0.240 A determine the actual inductor ripple current:
then:
VOUT(OVP) IOUT VIN(min) D(max) (45)
(40) ΔILused =
IIN(max) = Lused fSW
VIN(min) η
5 (V) 0.765
15.9 (V) 0.24 (A) = = 0.191 A
= = 0.848 A 10 (µH) 2.0 (MHz)
5 (V) 0.90

Step 4f: Determining the inductor current rating. The inductor

where η is efficiency.
current rating must be greater than the IIN(max) value plus half of
Next, calculate minimum input current, as follows:
the ripple current ΔIL, calculated as follows:
VOUT(OVP) IOUT (41)
IIN(min) = L(min) = IIN(max) + 1/2 ΔILused (46)
VIN(max) η
15.9 (V) 0.24 (A) = 0.848 (A) + 0.096 (A) = 0.944 A
= = 0.265 A
16 (V) 0.90
Step 5: Determining the resistor value for a particular switching

Step 4c: Determining the inductor value. To ensure that the

frequency. Use the RFSET values shown in Figure 7. For example,
inductor operates in continuous conduction mode, the value of a 10 kΩ resistor will result in a 2 MHz switching frequency.
the inductor must be set such that the ½ inductor ripple current
is not greater than the average minimum input current. As a first Step 6: Choosing the proper switching diode. The switching
pass assume Iripple to be 30% of the maximum inductor current: diode must be chosen for three characteristics when it is used in
ΔIL = IIN(max) × Iripple (42) LED lighting circuitry. The most obvious two are: current rating
= 0.848 × 0.30 = 0.254 A of the diode and reverse voltage rating.

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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

The reverse breakdown voltage rating for the output diode in a A capacitor larger than 3.96 µF should be selected due to degra-
SEPIC circuit should be: dation of capacitance at high voltages on the capacitor. Select a
4.7 µF capacitor for this application.
VBD > VOUT(OVP)(max) + VIN(max) (47)
> 15.9 (V) + 16 (V) = 31.9 V The rms current through the capacitor is given by:
because the maximum output voltage in this case is VOUT(OVP). (50)
ICOUTrms = IOUT D(max)
The peak current through the diode is calculated as: 1 – D(max)
Idp = IIN(max) + 1/2 ΔILused (48) 0.765
= 0.240 (A) = 0.433 A
= 0.848 (A) + 0.096 (A) = 0.944 A 1 – 0.765
The third major component in deciding the switching diode is the
reverse current, IR , characteristic of the diode. This characteristic The output capacitor must have a ripple current rating of at least
is especially important when PWM dimming is implemented. 500 mA. The capacitor selected for this design is a 4.7 µF 50 V
During PWM off-time the boost converter is not switching. This capacitor with a 1.5 A current rating.
results in a slow bleeding off of the output voltage, due to leakage Step 8: Selecting input capacitor. The input capacitor must be
currents. IR can be a large contributor, especially at high tempera- selected such that it provides a good filtering of the input voltage
tures. On the diode that was selected in this design, the current waveform. A estimation rule is to set the input voltage ripple,
varies between 1 and 100 µA. It is often advantageous to pick a ΔVIN , to be 1% of the minimum input voltage. The minimum
diode with a much higher breakdown voltage, just to reduce the input capacitor requirements are as follows:
reverse current. Therefore, for this example, pick a diode rated
for a VBD of 60 V, instead of just 40 V. ∆ILused
CIN = (51)
8 fSW ∆VIN
Step 7: Choosing the output capacitors. The output capacitors
must be chosen such that they can provide filtering for both the 0.191 (A)
= = 0.24 µF
boost converter and for the PWM dimming function. The biggest 8 2 (MHz) 0.05 (V)
factors that contribute to the size of the output capacitor are:
PWM dimming frequency and PWM duty cycle. Another major The rms current through the capacitor is given by:
contributor is leakage current, ILK . This current is the combina- ∆ILused
tion of the OVP leakage current as well as the reverse current of CINrms = (52)
the switching diode. In this design the PWM dimming frequency 12
is 200 Hz and the minimum duty cycle is 1%. Typically, the volt- 0.191 (A)
= = 0.055 A
age variation on the output, VCOUT , during PWM dimming must 12
be less than 250 mV, so that no audible hum can be heard. The
capacitance can be calculated as follows: A good ceramic input capacitor with a rating of 2.2 µF 25 V will
suffice for this application.
1 – D(min) (49)
COUT = ILK
fPWM(dimming) V
COUT
1 – 0.01
= 200 (µA) = 3.96 µF
200 (Hz) 0.250 (V)

33
Allegro MicroSystems
955 Perimeter Road
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 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Step 9: Selecting coupling capacitor CSW. The minimum capaci- The rms current requirement of the coupling capacitor is given
tance of CSW is related to the maximum voltage ripple allowed by:
across it:
ICSWrms = IIN(max) 1 – D(max) (54)
IOUT DMAX D(max)
CSW = (53)
∆VSW fSW
1 – 0.765
0.24 (A) 0.765 = 0.848 (A) = 0.47 A
= = 0.92 µF 0.765
0.1 (V) 2 (MHz)
The voltage rating of the coupling capacitor must be greater than
VIN(max), or 16 V in this case. A ceramic capacitor rated for
2.2 µF 25 V will suffice for this application.

L2
10 µH
VIN L1 CSW D1
RSC
9 to 16 V 10 µH 2.2 µF 2 A / 60 V VOUT
0.033 Ω Q1

RC CC
CIN RADJ 22 nF
2.2 µF 20 Ω ROVP COUT
249 Ω GATE SW 39.2 kΩ 4.7 µF
VSENSE
VC VIN A8514 OVP
VDD
100 kΩ CVDD
PAD LED1
0.1 µF
FAULT LED2
PWM/EN LED3
APWM LED4
ISET
COMP
FSET/SYNC
RISET RFSET CP RZ 150 Ω
11 kΩ 10 kΩ AGND PGND 120 pF
CZ 0.47 µF

Figure 37: Typical application showing SEPIC configuration, with accurate input current sense, and VSENSE
to ground protection.

34
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Package LP, 20-Pin TSSOP with Exposed Thermal Pad

0.45
6.50±0.10 0.65
8º 20
0º
20
0.20 1.70
0.09

C
3.00 4.40±0.10 6.40±0.20 3.00 6.10
0.60 ±0.15
A 1.00 REF

1 2
4.12
0.25 BSC 1 2

SEATING PLANE 4.12

20X C
SEATING GAUGE PLANE
0.10 C PLANE B PCB Layout Reference View

0.30
0.19 1.20 MAX
0.65 BSC
For Reference Only; not for tooling use (reference MO-153 ACT)
0.15 Dimensions in millimeters
0.00 Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area

B Reference land pattern layout (reference IPC7351

SOP65P640X110-21M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
C Exposed thermal pad (bottom surface); dimensions may vary with device

35
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 Wide Input Voltage Range, High Efficiency
A8514 Fault Tolerant LED Driver

Revision History
Number Date Description
5 May 20, 2013 Update application information, add appendix A
6 October 1, 2015 Added Figure 11, and renumbered subsequent figures
7 March 1, 2017 Corrected SYNC Input Logic Voltage values on page 6
8 March 13, 2019 Updated Sync section (page 15)
9 March 24, 2020 Minor editorial updates

Copyright 2020, Allegro MicroSystems.

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information being relied upon is current.
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Allegro MicroSystems
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www.allegromicro.com