TAS6684-Q1

SLOSED8A – JULY 2024 – REVISED OCTOBER 2024

TAS6684-Q1 - 45V, 13A Digital Input 4-Channel Automotive Class-D Audio Amplifier
with Current Sense and Real-time Load Diagnostics
1 Features 2 Applications
• AEC-Q100 qualified for automotive applications • Automotive external amplifier
– Temperature grade 1: –40°C to +125°C, TA • Automotive head unit
• General operation
3 Description
– 4.5V to 45V supply voltage, 50V load dump
– Support for 1.8V and 3.3V I/O’s The TAS6684-Q1 is a four-channel, digital-input, high-
– I2C control with 8 address options voltage, Class-D audio amplifier that supports up to
– <2-W idle power loss at 14.4V, <8uA max 45V supply voltage. Combined with up to 13A output
VBAT+PVDD shutdown loss current, this device delivers maximum output power
• Integrated DSP processing and high fidelity audio in high and low impedance
– Class-H supply voltage control loads. The device provides four channels at 118W
– Thermal monitoring and foldback (45V, 8Ω, 1% THD, BTL) and 218W (45V, 4Ω, 1%
– Clip detection, PVDD monitoring and foldback THD, BTL).
• Output current sensing by channel via I2S/TDM The TAS6684-Q1 integrates DC and AC load
– No need for external circuitry diagnostics to determine the status of the connected
• Real-time load diagnostics loads before enabling the output stage. During audio
– Monitor output conditions while playing audio playback, the status can be monitored through
– Real-time temperature monitor for each the output current sense and temperature of each
channel channel which is available for each channel, and
– Open load, Shorted load, Short-to-power, reports the measurement to a host processor through
Short-to-ground detection TDM with minimal delay. The device monitors the
• DC and AC Standby load diagnostics output load condition while playing audio using real-
• Audio inputs time load diagnostics which operate independently
– 2-4 channel I2S or 4-16 channel TDM input from the host and audio input.
– Input sample rates: 44.1, 48, 96, 192kHz
To optimize system efficiency, the integrated DSP of
– Low latency < 100us at 96k sample rate
the TAS6684-Q1 enables Class-H envelope tracking
• Audio outputs
control, eliminating the need for the development of
– 4-channel bridge-tied load (BTL), configurable complex tracking software and making local boost
2-channel parallel BTL (PBTL) voltage control possible without the need for an
– 384kHz to 2MHz configurable output switching external microcontroller.
frequency
– Up to 13A channel output current The TAS6684-Q1 device features an additional low-
– 400VA peak BTL output power latency signal path for each channel, providing up to
– 118W (45V, 8Ω, 1% THD, BTL) 70% faster signal processing at 48kHz and support
– 218W (45V, 4Ω, 1% THD, BTL) an audio signal path latency of < 100us at 96kHz
• Audio Performance sample rate, which enables time-sensitive Active
– THD+N 0.03% (8Ω, 1W, 1kHz) Noise Cancellation (ANC), Road Noise Cancellation
– 111dB SNR (RNC) applications.
– 37µV (14.4V), 80µV (45V) output noise The TAS6684-Q1 is offered in a 64-pin QFP package
• Protection with the exposed thermal pad up, TAS6684-Q1 is pin-
– Output short protection to-pin compatible with TAS6584-Q1.
– DC offset, undervoltage and overvoltage
– Configurable overtemperature warning and
individual channel shutdown
– I2C temperature and supply voltage readout
• Easily meet CISPR25-L5 EMC specification
– Advanced spread-spectrum

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TAS6684-Q1
SLOSED8A – JULY 2024 – REVISED OCTOBER 2024 www.ti.com

Device Information
PART NUMBER PACKAGE(1) PACKAGE SIZE (NOM)(2)
TAS6684-Q1 HTQFP (64) 14.00mm x 14.00mm

(1) For all available packages, see the orderable addendum at the end of the data sheet.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.

4.5 - 45V 1.8V/3.3V

PVDD/VBAT DVDD

CH1
I2C
CH2
SoC/DSP TAS6684-Q1
I2S/
CH3
TDM
CH4

Simplified Diagram

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Table of Contents
1 Features............................................................................1 4.5 Trademarks................................................................. 4
2 Applications..................................................................... 1 4.6 Electrostatic Discharge Caution..................................4
3 Description.......................................................................1 4.7 Glossary......................................................................4
4 Device and Documentation Support..............................4 5 Revision History.............................................................. 4
4.1 Device Support........................................................... 4 6 Mechanical, Packaging, and Orderable Information.... 5
4.2 Documentation Support.............................................. 4 6.1 Package Option Addendum........................................ 6
4.3 Receiving Notification of Documentation Updates......4 6.2 Tape and Reel Information..........................................7
4.4 Support Resources..................................................... 4 6.3 Mechanical Data......................................................... 9

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4 Device and Documentation Support

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
4.1 Device Support

4.2 Documentation Support

4.2.1 Related Documentation

4.3 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Notifications to register and receive a weekly digest of any product information that has changed. For change
details, review the revision history included in any revised document.
4.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
4.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
4.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.

4.7 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.

5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision * (July 2024) to Revision A (October 2024) Page

• Changed device status from Advanced Information to Production Data ........................................................... 1

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6 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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6.1 Package Option Addendum

Packaging Information
Device
Package Package Lead/Ball
Orderable Device Status(1) Package Type Pins Eco Plan(2) MSL Peak Temp(3) Op Temp (°C) Marking(4)
Drawing Qty Finish(6) (5)

Level-3-260C-168
TAS6684QPHDRQ1 ACTIVE HTQFP PHD 64 1000 RoHS & Green NIPDAU -40 to 125 TAS6684
HR

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check www.ti.com/productcontent for the latest
availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the
requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified
lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used
between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by
weight in homogeneous material).
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the
finish value exceeds the maximum column width.

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6.2 Tape and Reel Information

REEL DIMENSIONS TAPE DIMENSIONS
K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants
Reel Reel
Package Package A0 B0 K0 P1 W Pin1
Device Pins SPQ Diameter Width W1
Type Drawing (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) (mm)
TAS6684QPHDRQ1 HTQFP PHD 64 1000 330.0 24.4 17.0 17.0 1.5 20.0 24.0 Q2

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TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

L
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TAS6684QPHDRQ1 HTQFP PHD 64 1000 350.0 350.0 43.0

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6.3 Mechanical Data

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 9

Product Folder Links: TAS6684-Q1
TAS6684-Q1
SLOSED8A – JULY 2024 – REVISED OCTOBER 2024 www.ti.com

PACKAGE OUTLINE
PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK
14.05
13.95 B
PIN 1 NOTE 3
INDEX AREA 8.00
64 6.68 49

48
1
THERMAL PAD
NOTE 4

14.05 8.00 16.15

13.95 6.68 15.85
NOTE 3 TYP

16
33
17 32

A 60 X 0.8 64 X 0.40
0.30
4 X 12 0.2 C A B

SEE DETAIL A
C
1.2 MAX
SEATING PLANE
(0.127) TYP

17 32

16 33

0.25
GAGE PLANE
1.05
0.95
0°-7°

0.15
0.75 0.05
0.1 C
0.45

DETAIL A
TYPICAL
1 48

64 49 4224850/B 05/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed
0.15 per side.
4. See technical brief. PowerPad Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
(www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004) for information regarding recommended board layout.

www.ti.com

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 TAS6684-Q1
www.ti.com SLOSED8A – JULY 2024 – REVISED OCTOBER 2024

EXAMPLE BOARD LAYOUT

PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK
SYMM

64 49

64 X (1.5)

1
48

64 X (0.55)

60 X (0.8)

SYMM
(15.4)

33
(R0.05) TYP 16

17 32
(15.4)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 6X

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

METAL SOLDER MASK

OPENING
EXPOSED
EXPOSED METAL
METAL
SOLDER MASK METAL UNDER
OPENING SOLDER MASK
NON SOLDER MASK SOLDER MASK
DEFINED DEFINED

SOLDER MASK DETAILS

4224850/B 05/2022

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.

www.ti.com

Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11

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TAS6684-Q1
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EXAMPLE STENCIL DESIGN

PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK

SYMM

64 49

64 X (1.5)

1
48

64 X (0.55)

60 X (0.8)

SYMM
(15.4)

33
(R0.05) TYP 16

17 32
(15.4)

SOLDER PASTE EXAMPLE

SCALE: 6X

4224850/B 05/2022

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com

12 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated

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 PACKAGE OPTION ADDENDUM

www.ti.com 5-Nov-2024

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

TAS6684QPHDRQ1 ACTIVE HTQFP PHD 64 1000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 125 TAS6684 Samples

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 28-Dec-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TAS6684QPHDRQ1 HTQFP PHD 64 1000 330.0 24.4 17.0 17.0 1.5 20.0 24.0 Q2
TAS6684QPHDRQ1 HTQFP PHD 64 1000 330.0 24.4 17.0 17.0 1.5 20.0 24.0 Q2

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 28-Dec-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TAS6684QPHDRQ1 HTQFP PHD 64 1000 367.0 367.0 55.0
TAS6684QPHDRQ1 HTQFP PHD 64 1000 350.0 350.0 43.0

Pack Materials-Page 2
 GENERIC PACKAGE VIEW
PHD 64 HTQFP - 1.2 mm max height
14 x 14, 0.8 mm pitch PLASTIC QUAD FLATPACK

This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.

4224851/B

www.ti.com
 PACKAGE OUTLINE
PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK
14.05
13.95 B
PIN 1 NOTE 3
INDEX AREA 8.00
64 6.68 49

48
1
THERMAL PAD
NOTE 4

14.05 8.00 16.15

13.95 6.68 15.85
NOTE 3 TYP

16
33
17 32

A 60 X 0.8 64 X 0.40
0.30
4 X 12 0.2 C A B

SEE DETAIL A
C
1.2 MAX
SEATING PLANE
(0.127) TYP

17 32

16 33

0.25
GAGE PLANE
1.05
0.95
0°-7°

0.15
0.75 0.05
0.1 C
0.45

DETAIL A
TYPICAL
1 48

64 49 4224850/B 05/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed
0.15 per side.
4. See technical brief. PowerPad Thermally Enhanced Package, Texas Instruments Literature No. SLMA002
(www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004) for information regarding recommended board layout.

www.ti.com
 EXAMPLE BOARD LAYOUT
PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK
SYMM

64 49

64 X (1.5)

1
48

64 X (0.55)

60 X (0.8)

SYMM
(15.4)

33
(R0.05) TYP 16

17 32
(15.4)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE: 6X

0.05 MAX 0.05 MIN

ALL AROUND ALL AROUND

METAL SOLDER MASK

OPENING
EXPOSED
EXPOSED METAL
METAL
SOLDER MASK METAL UNDER
OPENING SOLDER MASK
NON SOLDER MASK SOLDER MASK
DEFINED DEFINED

SOLDER MASK DETAILS

4224850/B 05/2022

NOTES: (continued)

5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.

www.ti.com
 EXAMPLE STENCIL DESIGN
PHD0064B HTQFP - 1.2 mm max height
PLASTIC QUAD FLATPACK

SYMM

64 49

64 X (1.5)

1
48

64 X (0.55)

60 X (0.8)

SYMM
(15.4)

33
(R0.05) TYP 16

17 32
(15.4)

SOLDER PASTE EXAMPLE

SCALE: 6X

4224850/B 05/2022

NOTES: (continued)

7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.

www.ti.com
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