See discussions, stats, and author profiles for this publication at: https://www.researchgate.
net/publication/3132044
Microwave Parametric Frequency Dividers With Conversion Gain
Article in IEEE Transactions on Microwave Theory and Techniques · November 2007
DOI: 10.1109/TMTT.2007.906490 · Source: IEEE Xplore
CITATIONS READS
18 1,277
3 authors, including:
Z. Heshmati
University of Tehran
19 PUBLICATIONS 263 CITATIONS
SEE PROFILE
All content following this page was uploaded by Z. Heshmati on 12 March 2015.
The user has requested enhancement of the downloaded file.
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 55, NO. 10, OCTOBER 2007 2059
Microwave Parametric Frequency Dividers
With Conversion Gain
Zainabolhoda Heshmati, Student Member, IEEE, Ian C. Hunter, Fellow, IEEE, and Roger D. Pollard, Fellow, IEEE
Abstract—A novel active parametric frequency divider config- Among the various analog solutions [1], parametric fre-
uration using coupled microstrip transmission lines and two bal- quency dividers [3], [4] offer simpler circuit configuration and
anced pseudomorphic HEMTs (pHEMTs) is presented. The anal- broader bandwidth in comparison with other alternatives such
ysis of the divide-by-2 circuit presented applies the principles of
subharmonic generation using a nonlinear reactance to an active as the regenerative [5]–[7] or injection-locked dividers [8]–[10].
semiconductor device such as a pHEMT. A 2–1-GHz active analog Parametric division is a process in which a subharmonic oscil-
frequency divider is designed and fabricated, with measurements lation is generated from the excitation of a nonlinear reactive
showing a 20% bandwidth, 13.5-dB conversion gain, and harmonic element. The most common nonlinear reactive element used
rejection levels of more than 22 dBc. A maximum conversion gain in parametric dividers is the varactor diode, which exploits the
of 18 dB is also achieved. These higher conversion efficiencies and
the ability to cascade dividers allow for higher order division ratios asymmetrical voltage-dependent depletion layer capacitance
to be achieved with the same topology. of an abrupt junction diode [11]. The basic theory of device
operation is presented in [12] and [13]. Some divider designs
Index Terms—Analog frequency dividers, coupled transmission
lines, nonlinear circuits, parametric subharmonic generation. based on empirical techniques are described in [4], [14], and
[15].
Due to losses within the varactor diodes, amplifiers are gen-
I. INTRODUCTION erally required to recover the input signal level. Although orig-
inal divider proposals had conceived the idea of a general di-
vision by , subsequent divider designs have been mainly di-
M ODERN communication systems require sophisticated
frequency generation circuits in which frequency synthe-
sizers play an important role. Frequency division is a key func-
vide-by–2 configurations. To obtain greater division ratios, fre-
quency dividers have been cascaded. However, this increases
tion of such circuits. hardware requirements and results in the need for more amplifi-
Frequency dividers have applications in many systems, from cation. The design presented here employs pseudomorphic high
communications to military applications. They are also essential electron-mobility transistor (pHEMT) devices to perform para-
to a variety of microwave systems. Classic examples include ap- metric frequency division and amplification simultaneously at
plications involving straight frequency counting, phase-locked microwave frequencies.
loops (PLLs), and phase noise reduction [1]. Frequency dividers A novel design has been developed and tested for an active
also have bandwidth compression capabilities, which opens up parametric frequency divide-by-2 circuit with a large division
the possibility of transferring wide microwave bands, to the re- bandwidth and high conversion gain. The presented circuit de-
gion where the power of digital logic can be used for processing sign consists of a balanced topology using microstrip coupled
[2]. transmission lines, which is more amenable to integration and
There have been a number of different microwave frequency can be implemented in contemporary silicon technology.
divider concepts described in the literature. Each of these in-
dividual concepts can be separated into two basic categories:
digital and analog. Digital dividers are capable of broadband II. PARAMETRIC FREQUENCY DIVISION
performances up into the microwave frequency range (up to
40 GHz), but their power consumption increases with frequency The term parametric has become associated with a class of
(several watts dc power at millimeter wavelengths). Analog di- amplifying and frequency-converting devices, which utilize the
viders feature lower power consumption, simpler circuit design, properties of nonlinear or time-varying reactances. These reac-
and higher operating frequencies, which makes them attractive tances channel energy from an ac source to a useful load and are
for communications purposes. capable of power conversion from one frequency to another.
Solid-state frequency dividers can be realized both in passive
and active configurations, either employing passive devices with
Manuscript received April 6, 2007; revised June 30, 2007. This work was sup- reactive nonlinearities (e.g., diodes under reversed bias) or using
ported by the British Ministry of Defence, Electro-Magnetic Remote Sensing active devices (e.g., MESFET, HEMT, HBT, etc.) biased in a
Defence Technology Centre. strongly nonlinear operating region. Unlike passive systems, ac-
The authors are with the Institute of Microwaves and Photonics, School
of Electronic and Electrical Engineering, The University of Leeds, Leeds tive dividers exhibit conversion gain and, therefore, do not re-
LS2 9JT, U.K. (e-mail: eenzh@leeds.ac.uk; i.c.hunter@leeds.ac.uk; r.d.pol- quire amplifiers to recover the output signal. The availability
lard@leeds.ac.uk). of active devices exhibiting conversion gain at frequencies ex-
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. tending well into the millimeter-wave region with considerable
Digital Object Identifier 10.1109/TMTT.2007.906490 bandwidth is pushing towards the active solution. Moreover, this
0018-9480/$25.00 © 2007 IEEE
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
2060 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 55, NO. 10, OCTOBER 2007
Fig. 1. Block diagram of a parametric frequency divider circuit.
Fig. 2. Simple lumped element varactor frequency divide-by-2 circuit.
choice has the obvious advantage of allowing functional inte-
gration in a single technology if monolithic implementation is The divide-by-2 circuit consists of a shunt varactor nested be-
attempted. tween two resonant LC network filters. The input filter is tuned
Existing documentation describe two parametric divider to the input pump frequency , and allows the pump energy
topologies, both implemented using varactors: filter-based to reach the varactor. The filter also isolates the source from the
dividers [15] and balanced dividers [16]. However, the two subharmonic oscillations occurring at the diode. The output LC
topologies share the same basic principles. The primary per- filter is tuned to the subharmonic frequency and pre-
formance discriminator between the two types of dividers is vents the pump energy from reaching the load.
bandwidth related. For the divider circuit in Fig. 2, we assume that some subhar-
The filter-based divider is limited in bandwidth because of monic current is already present in the noise for it to grow in
the high- selective filters, but offers the best possibility of pro- magnitude, rather like an oscillator. This is the essential differ-
ducing a minimum threshold design due to its narrow bandwidth ence between a frequency multiplier and divider. In a frequency
and single varactor loss. On the other hand, the balanced de- multiplier, there will also always be some harmonics present,
sign is more amenable to wideband performance and has better regardless of the magnitude of the input, but frequency dividers
transient response. The balanced divider, which requires dual have a power threshold level below which subharmonics cannot
varactors, has been analyzed by Harrison [16]. He shows that exist. This threshold level is the power required to overcome the
the even/odd modality of the device lends itself to closed-form losses in the output circuit for subharmonic oscillations to occur.
solutions, and has documented, in conjunction with Kalivas [4], This is the fundamental difference between a frequency divider
[17], several practical dividers, but all are passive designs, which and subharmonic oscillator.
require high input powers and show large conversion loss. The analysis of this circuit will provide an insight into the
The analysis presented here is in some ways similar to that of general operation of parametric frequency dividers. The circuit
Harrison [4], but replaces the nonlinear varactor with a pHEMT. is analyzed in terms of the input and output loops as
The input nonlinear junction capacitance of the pHEMT oper-
ates as a varactor divider producing subharmonics. The device
transconductance simultaneously provides amplification.
Higher order division can also be obtained by cascading (1)
several dividers. The associated gain of the active device com-
pensates for the conversion loss and enables frequency dividers and
to be cascaded without much concern about signal degradation
and power loss.
(2)
III. BASIC PARAMETRIC DIVIDER THEORY
The basic principles of operation of parametric frequency di- where and are the voltages across the input and
viders are based on the excitation of a nonlinear reactive element output RLC networks, respectively. The voltage across the var-
(in the simple case: a varactor). Fig. 1 shows a block diagram actor is
of a simple parametric frequency divider using a varactor (non-
linear voltage-dependent capacitor). Like other nonlinear reac- (3)
tances, varactors can generate power not only at harmonics, but
at subharmonics of the pumping frequency. The circuit consists where
of two input and output coupling networks, which, for frequency
division, must be properly adjusted. The coupling networks act
like filters, which, in their simplest form, consist of resonant LC
networks tuned at the required input and output frequency, as since
shown in Fig. 2. Theoretically, if the varactor is ideal and the
filters are extremely selective (i.e., high ), then it is possible
(4)
to achieve very high efficiencies with this circuit.
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
HESHMATI et al.: MICROWAVE PARAMETRIC FREQUENCY DIVIDERS WITH CONVERSION GAIN 2061
Fig. 3. Simulink simulation results showing: (a) input signal threshold level and (b) working frequency bandwidth of the divider circuit.
Also,
zero-voltage junction capacitance;
junction in-built potential;
charge at ;
instantaneous charge on the varactor;
Fig. 4. Basic balanced coupled line frequency divider circuit.
instantaneous voltage across varactor.
The circuit equations can be represented in MATLAB Simulink
using a mathematical block diagram. This is then simulated with
different input parameters for a divide-by-2 circuit. These sim-
ulations provide the numerical solution to the nonlinear circuit
equations of the basic parametric frequency divider and are used
to qualitatively explain the behavior of the divider circuit. Fig. 5. Simplified equivalent circuit of a pair of coupled lines.
The results clearly show frequency division at particular
power levels for a 1–0.5-GHz divider circuit. Fig. 3(a) shows
[i.e., the nonlinear input capacitance of the active device, repre-
the existence of an input signal threshold level in the divider
sented in Fig. 4 as ].
operation, and the operating frequency bandwidth is shown in
An input signal at entering the microstrip lines is divided
Fig. 3(b).
between the two lines so they have potentials equal in magnitude
These principles of a nonlinear reactance frequency divider
and sign. This excites the nonlinear capacitances in phase and
are now applied to a parametric pHEMT frequency divider with
the propagation is determined by the even-mode admittance .
a balanced topology. We can write a simplified model for the
The odd-mode resonance of the coupled lines supports oscil-
active device (in this case: pHEMT), which contains this type
lations at . This resonance behavior is determined by
of reactive nonlinearity on its input, as well as the output cur-
the odd-mode admittance, of the coupled lines. Due to the
rent source that provides the gain. The active divider circuit can
nonlinear coupling mechanism between the even and odd mode,
then be designed based on the above varactor parametric de-
energy is transferred from to via the nonlinear ca-
sign principles, and the output current source will provide the
pacitances.
simultaneous gain. This analogy has been adapted throughout
A simplified analysis of coupled transmission lines is given
the paper.
by Sato and Cristal [18] leading to the equivalent circuit shown
in Fig. 5 for the coupled lines, where .
IV. BALANCED CIRCUIT ANALYSIS This method applied to the divider circuit of Fig. 4, and leads
to the equivalent circuit of Fig. 6. Each of the coupled lines are
The balanced circuit, as with other parametric divider topolo- reactively loaded with the pHEMT with a capacitance of at
gies, requires two loops in the circuit, which are resonant at the the input bias voltage .
fundamental input frequency and the subharmonic output The following analysis is based on two separate modes of
frequency . The circuit is constructed in such a way as excitation for the circuit of Fig. 6, i.e., even and odd mode, for
to minimize coupling of the input frequency to the output port. which the line of symmetry is shown. Node A is the common
These requirements can be satisfied by a microstrip resonant input point to the coupled lines. In the even mode, a finite
structure consisting of a pair of symmetrical coupled transmis- voltage at frequency is presented at A and an open cir-
sion lines in combination with two nonlinear reactive elements cuit exists across the line of symmetry. Looking in from the
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
2062 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 55, NO. 10, OCTOBER 2007
Fig. 6. Equivalent circuit of the balanced parametric divider.
Fig. 8. Balanced active divide-by-2 circuit.
V. PRACTICAL EXAMPLE
Fig. 7. (a) Even- and (b) odd-mode equivalent resonance circuits. A 2–1-GHz frequency divider is designed in microstrip, on a
Rogers RT Duroid 5880. The active device used in this study is
the Filtronic FPD1500SOT89 pHEMT, which has a gate length
output, the equivalent circuit is the parallel combination of the
of 0.25 m. The small-signal input capacitance of the pHEMT,
nonlinear capacitance and the open-circuit stub of admittance
measured versus the input bias voltage , showed a capac-
and electrical length at , as shown in Fig. 7(a).
itance value , of approximately 3 pF at the required bias
Resonance condition, therefore, at the fundamental frequency
voltage.
, is
With substrate parameters of and thickness of
(5) 0.787 mm, and are chosen to be 130 and 65 , respec-
tively. This gives and . The
and will be the even-mode electrical length of the coupled coupled line dimensions are then calculated to have widths of
lines. 5.1 mm, and lengths of 38.8 mm with a spacing of 0.38 mm
Similarly in the odd-mode case, zero voltage exists at node A between the two lines.
with a short circuit across the line of symmetry. This reduces the Fig. 8 shows the fabricated pHEMT frequency divider. The
equivalent circuit in the odd mode to that shown in Fig. 7(b). The input gate bias of the pHEMTs ( ) is applied via a bias-tee
condition for resonance at the subharmonic frequency to the input of the circuit. The drain bias ( ) is applied on
is the output of the pHEMTs via two high-impedance lines, each
at the output frequency of 1 GHz. The radial stubs produce
broadband shorts at the junction of each high impedance line.
The nonlinear model TOM3 [20] is used to simulate the bi-
This gives ased active devices in Agilent’s ADS software to analyze the
output impedances. The pHEMT is biased at a gate voltage of
(6) V and a drain bias of V, and showed
an output impedance of , which is conjugately
as the odd-mode resonance condition with as the odd-mode
matched to the 50- output to maximize the power delivered to
electrical length of the coupled lines.
the load at the output frequency of 1 GHz. The matching net-
Equations (5) and (6) form the two resonance conditions and
work consists of a length of transmission line and an open-cir-
together will force only two frequency components of current to
cuit stub, as shown in Fig. 8. Two capacitors are also used as dc
flow in the nonlinearities. From these two equations, we derive
blocks on the output.
the ratio of the even- and odd-mode impedances as
The input port can also be matched to 50 in order to re-
duce any reflection from the circuit. This will also reduce the
threshold power, as more power will be delivered to the circuit
In order for the lines to be physically realizable [19], with optimum match.
(7) VI. MEASUREMENTS
A minimum level of input power ( ) is required in order for
Since the value of can be extracted from measurements frequency division to occur. For the 2–1-GHz active parametric
of the active devices, suitable values of and are chosen to divider, the threshold input level is 14 dBm, at which power
satisfy conditions (5)–(7). Given the frequency of operation and frequency division commences abruptly. This is clearly shown
substrate parameters, the physical dimensions and spacing of the in Fig. 9, where the output power is plotted against the input
coupled lines can be derived from and . For maximum power . As increases beyond this level, the bandwidth
bandwidth, the resonator size should be minimized. increases.
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
HESHMATI et al.: MICROWAVE PARAMETRIC FREQUENCY DIVIDERS WITH CONVERSION GAIN 2063
divider configuration using nonlinear semiconductor devices in
order to achieve a parametric frequency divider at microwave
frequencies, which exhibits conversion gain. A 2–1-GHz fre-
quency divider was designed and fabricated with demonstrated
working bandwidth of 200 MHz and a maximum conversion
gain of 18 dB. Harmonic rejection levels of more than 22 dBc
were achieved.
ACKNOWLEDGMENT
The authors thank the Electro-Magnetic Remote Sensing
(EMRS) Defence Technology Centre (DTC), for supporting
Fig. 9. Results for 2–1-GHz frequency divider showing the output power
versus the input power.
this study.
REFERENCES
[1] I. Bahl and P. Bhartia, Microwave Solid State Circuit Design, 2nd ed.
Hoboken, NJ: Wiley, 2003.
[2] W. D. Cornish, “Microwave frequency dividers, devices and appli-
cations,” in Proc. Military Microw. Conf., Microw. Exhibitions, Pub-
lishers Ltd., Oct. 1980, pp. 13–18.
[3] J. W. McConnel, “A parametric frequency divider using hyperabrupt
junction diode capacitance,” IEEE J. Solid-State Circuits, vol. SSC-3,
no. 3, pp. 311–312, Sep. 1968.
[4] R. G. Harrison, “A broadband frequency divider using varactors,” IEEE
Trans. Microw. Theory Tech., vol. MTT-25, no. 12, pp. 1055–1059,
Dec. 1977.
[5] R. L. Miller, “Fractional-frequency generators utilizing regenerative
modulation,” Proc. IRE, vol. 37, no. 7, pp. 446–457, Jul. 1939.
[6] C. Rauscher, “Regenerative frequency division with a GaAs FET,”
IEEE Trans. Microw. Theory Tech., vol. MTT-32, no. 11, pp.
1461–1468, Nov. 1984.
Fig. 10. Results of the divider showing the output power versus the input fre- [7] E. S. Ferre-Pikal and F. L. Walls, “Microwave regenerative frequency
quency. dividers with low phase noise,” IEEE Trans. Ultrason., Ferroelect.,
Freq. Control, vol. 46, no. 1, pp. 216–219, Jan. 1999.
[8] H. R. Rategh and T. H. Lee, “Superharmonic injection-locked fre-
quency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp.
The output power is optimized by bias adjustments to 813–821, Jun. 1999.
V and V. The output frequency response and [9] X. Zhang, X. Zhou, B. Aliener, and A. S. Daryoush, “A study of sub-
harmonic injection locking for local oscillators,” IEEE Microw. Guided
working bandwidth of the divider, tested at dBm, are Wave Lett., vol. 2, no. 3, pp. 97–99, Mar. 1992.
shown in Fig. 10. A wide bandwidth of approximately 20% is [10] R. J. Betancourt-Zamora, S. Verma, and T. H. Lee, “1-GHz and
achieved with harmonic rejection levels of more than 22 dBc. 2.8-GHz CMOS injection-locked ring oscillator prescalers,” in VLSI
Circuits Tech. Symp. Dig., Jun. 2001, pp. 47–50.
The average gain produced by this active divider is 13.5 dB at [11] H. A. Watson, Microwave Semiconductor Devices and Their Circuit
GHz, with a maximum gain of 18 dB occurring at Applications. New York: McGraw-Hill, 1969.
GHz for dBm. [12] J. Hilibrand and R. Beam, “Semiconductor diodes in parameric sub-
harmonic oscillators,” RCA Rev., pp. 229–253, Jun. 1959.
To the best of the authors’ knowledge, the results show a [13] P. Penfield and R. P. Rafuse, Varactor Applications. Cambridge, MA:
higher conversion gain compared to other types of analog fre- MIT Press, 1962.
quency dividers. The reduced bandwidth is a tradeoff for con- [14] Z. Nativ, “The application of a frequency multiplier design method to
the design of microwave parametric dividers,” IEEE Trans. Microw.
version gain. Also, since we have considered the resonance con- Theory Tech., vol. MTT-35, no. 2, pp. 189–194, Feb. 1987.
dition of the fundamental frequency in the design of the cou- [15] G. R. Sloan, “The modeling, analysis, and design of filter-based para-
pled lines structure, the bandwidth is reduced compared to the metric frequency dividers,” IEEE Trans. Microw. Theory Tech., vol. 41,
no. 2, pp. 224–228, Feb. 1993.
varactor frequency divider of Harrison [4]. This has the added [16] R. G. Harrison, “Theory of the varactor frequency divider,” in IEEE
benefit of improved spurious performance, as well as reduced MTT-S Int. Microw. Symp. Dig., Boston, MA, Jun. 1983, pp. 203–205.
signal-to-noise ratio performance. [17] G. A. Kalivas and R. G. Harrison, “A new slotline-microstrip fre-
quency halver,” in IEEE MTT-S Int. Microw. Symp. Dig., Jun. 1985,
pp. 683–686.
[18] R. Sato and E. G. Cristal, “Simplified analysis of coupled transmission-
line networks,” IEEE Trans. Microw. Theory Tech., vol. MTT-18, no.
VII. CONCLUSIONS 3, pp. 122–131, Mar. 1970.
[19] D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley,
A practical and efficient approach for the design of an active 1998.
[20] R. B. Hallgren and P. H. Litzenberg, “TOM3 capacitance model:
microwave frequency divider has been demonstrated. The para- Linking large- and small-signal MESFET models in SPICE,” IEEE
metric frequency division method has been applied to a balanced Trans. Microw. Theory Tech., vol. 47, no. 5, p. 556, May 1999.
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
2064 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 55, NO. 10, OCTOBER 2007
Zainabolhoda Heshmati (S’07) received the B.Eng. theory, electromagnetism, and microwave engineering. He authored Theory
Hons. degree (first class) in electronics and telecom- and Design of Microwave Filters (IEE Press, 2001). His research includes
munications engineering from the University of linear and nonlinear microwave filters. He also investigates applications of
Bradford, Bradford, U.K., in 2003, and is currently microwaves in biology.
working toward the Ph.D. degree in electronic
engineering at The University of Leeds, Leeds, U.K.
Her research interests include nonlinear mi-
crowave circuits, subharmonic generation, mi- Roger D. Pollard (M’77–SM’91–F’97) holds the
crowave frequency dividers, and parametric circuits. Agilent Technologies Chair in High Frequency
Ms. Heshmati was the recipient of the Institution of Measurements, is currently Dean of the Faculty
Electrical Engineers (IEE), U.K., Best Student Prize of Engineering, and was Head of the School of
(2003). She was also the recipient of Electro-Magnetic Remote Sensing (EMRS) Electronic and Electrical Engineering with The
Defense Technology Centre (DTC) sponsorship for postgraduate research. University of Leeds, Leeds, U.K., where he has
been a faculty member since 1974. Since 1981,
he has been a consultant to Agilent Technologies
(previously the Hewlett-Packard Company), Santa
Ian C. Hunter (M’92–SM’94–F’07) received the Rosa, CA. He has authored or coauthored over 100
B.Sc. (first-class honors) and Ph.D. degrees from technical papers. He holds three patents.
The University of Leeds, Leeds, U.K., in 1978 and Prof. Pollard is a Chartered Engineer and Fellow of the Institution of Elec-
1981, both in electrical engineering. trical Engineers (IEE) (U.K.). He was elected to the Royal Academy of Engi-
He has worked in industry for Aercom Industries neering in 2005. He is an active IEEE volunteer, serving a term as president of
Inc., Sunnyvale, CA, and KW Engineering, Oakland, the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) in 1998.
CA, and for Filtronic Components Ltd., Leeds, He has chaired numerous IEEE committees, including Strategic Planning for
U.K., during which time he developed broadband the Publications, Services and Products Board, Technical Activities Board Prod-
microwave filters for electronic warfare (EW) appli- ucts Committee, and the Electronic Products Committee, responsible for the de-
cations. From 1995 to 2001, he was with Filtronic velopment and introduction of IEEE-Xplore(r). He was the Technical Program
Comtek, where he was involveded with advanced fil- Committee (TPC) co-chair for the 2006 IEEE MTT-S International Microwave
ters for cellular radio. He is currently a Professor with the School of Electronic Symposium (IMS).
and Electrical Engineering, The University of Leeds, where he teaches circuit
Authorized licensed use limited to: University of Leeds. Downloaded on April 09,2010 at 11:40:51 UTC from IEEE Xplore. Restrictions apply.
View publication stats