IRF9610

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Vishay Siliconix
Power MOSFET
S
FEATURES
• Dynamic dV/dt rating
TO-220AB Available
• P-channel
G • Fast switching Available

• Ease of paralleling
• Simple drive requirements
S • Material categorization: for definitions of compliance
D
G D please see www.vishay.com/doc?99912
P-Channel MOSFET Note
* This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
PRODUCT SUMMARY example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
VDS (V) -200
RDS(on) (Ω) VGS = -10 V 3.0 DESCRIPTION
Qg max. (nC) 11 The power MOSFETs technology is the key to Vishay’s
Qgs (nC) 7.0 advanced line of Power MOSFET transistors. The efficient
Qgd (nC) 4.0 geometry and unique processing of the Power MOSFETs
Configuration Single design achieve very low on-state resistance combined with
high transconductance and extreme device ruggedness.
The TO-220AB package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220AB contribute to its
wide acceptance throughout the industry.

ORDERING INFORMATION
Package TO-220AB
Lead (Pb)-free IRF9610PbF
Lead (Pb)-free and halogen-free IRF9610PbF-BE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS -200
V
Gate-source voltage VGS ± 20
TC = 25 °C -1.8
Continuous drain current VGS at 10 V ID
TC = 100 °C -1.0 A
Pulsed drain current a IDM -7.0
Linear derating factor 0.16 W/°C
Single pulse avalanche energy b PD 20 W
Repetitive avalanche current a ILM -7.0 A
Repetitive avalanche energy a dV/dt -5.0 V/ns
Maximum power dissipation TC = 25 °C TJ, Tstg -55 to +150
°C
Peak diode recovery dV/dt c 300
Operating junction and storage temperature range 10 lbf · in
Soldering recommendations (peak temperature) d For 10 s 1.1 N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5)
b. Not applicable
c. ISD ≤ -1.8 A, dI/dt ≤ 70 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case

S21-0867-Rev. C, 16-Aug-2021 1 Document Number: 91080

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THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 62
Case-to-sink, flat, greased surface RthCS 0.50 - °C/W
Maximum junction-to-case (drain) RthJC - 6.4

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = -250 μA -200 - - V
VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = -1 mA - -0.23 - V/°C
Gate-source threshold voltage VGS(th) VDS = VGS, ID = -250 μA -2.0 - -4.0 V
Gate-source leakage IGSS VGS = ± 20 V - - ± 100 nA
VDS = -200 V, VGS = 0 V - - -100
Zero gate voltage drain current IDSS μA
VDS = -160 V, VGS = 0 V, TJ = 125 °C - - -500
Drain-source on-state resistance RDS(on) VGS = -10 V ID = -0.90 A b - - 3.0 Ω
Forward transconductance gfs VDS = -50 V, ID = -0.90 A b 0.90 - - S
Dynamic
Input capacitance Ciss VGS = 0 V, - 170 -
Output capacitance Coss VDS = -25 V, - 50 - pF
Reverse transfer capacitance Crss f = 1.0 MHz, see fig. 10 - 15 -
Total gate charge Qg - - 11
ID = -3.5 A, VDS = -160 V,
Gate-source charge Qgs VGS = -10 V - - 7.0 nC
see fig. 11 and 18 b
Gate-drain charge Qgd - - 4.0
Turn-on delay time td(on) - 8.0 -
Rise time tr VDD = -100 V, ID = -0.90 A, - 15 -
ns
Turn-off delay time td(off) Rg = 50 Ω, RD = 110 Ω, see fig. 17 b - 10 -
Fall time tf - 8.0 -
Gate input resistance Rg f = 1 MHz, open drain 2.5 - 14.3 Ω
Between lead, D
Internal drain inductance LD - 4.5 -
6 mm (0.25") from
package and center of G
nH
Internal source inductance LS die contact - 7.5 -
S

Drain-Source Body Diode Characteristics

MOSFET symbol
Continuous source-drain diode current IS D
- - -1.8
showing the
integral reverse G
A
Pulsed diode forward current a ISM p - n junction diode S
- - -7.0

Body diode voltage VSD TJ = 25 °C, IS = -1.8 A, VGS = 0 V b - - -5.8 V

Body diode reverse recovery time trr - 240 360 ns
TJ = 25 °C, IF = -1.8 A, dI/dt = 100 A/μs b
Body diode reverse recovery charge Qrr - 1.7 2.6 μC
Forward turn-on time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %

S21-0867-Rev. C, 16-Aug-2021 2 Document Number: 91080

For technical questions, contact: hvm@vishay.com
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 IRF9610
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

- 2.40 - 2.40
VGS = - 10, - 9, - 8 V -7V
VGS = - 10, - 9, - 8, - 7 V
- 1.92 - 1.92
ID, Drain Current (A)

ID, Drain Current (A)

- 1.44 -6V - 1.44 -6V

- 0.96 - 0.96

-5V -5V
- 0.48 - 0.48

80 µs Pulse Test -4V 80 µs Pulse Test

-4V
0.00 0.00
0 - 10 - 20 - 30 - 40 - 50 0 -2 -4 -6 -8 - 10

91080_01 VDS, Drain-to-Source Voltage (V) 91080_03 VDS, Drain-to-Source Voltage (V)

Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Saturation Characteristics

- 2.40 102
TJ = - 55 °C Operation in this area limited
5 by RDS(on)
Negative ID, Drain Current (A)

- 1.92 TJ = 25 °C 2
ID, Drain Current (A)

TJ = 125 °C 10
- 1.44
5
100 µs
2
- 0.96
1 1 ms

5
- 0.48 10 ms
TC = 25 °C
80 µs Pulse Test 2 TJ = 150 °C
VDS > ID(on) x RDS(on) max. Single Pulse
0.00 0.1
2 5 2 5 2 5
0 -2 -4 -6 -8 - 10 1 10 102 103

91080_02 VGS, Gate-to-Source Voltage (V) 91080_04 Negative VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Transfer Characteristics Fig. 4 - Maximum Safe Operating Area

ZthJC(t)/RthJC, Normalized Effective Transient

2.0
Thermal Impedence (Per Unit)

1.0

0.5 D = 0.5

PDM
0.2 0.2

0.1 0.1
t1
0.05 t2
0.05
Notes:
0.02 1. Duty Factor, D = t1/t2
Single Pulse (Transient
0.02 0.01 2. Per Unit Base = RthJC = 6.4 °C/W
Thermal Impedence)
3. TJM - TC = PDM ZthJC(t)
0.01
2 5 2 5 2 5 2 5 2 5 2 5
10-5 10-4 10-3 10-2 0.1 1.0 10

91080_05 t1, Square Wave Pulse Duration (s)

Fig. 5 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration

S21-0867-Rev. C, 16-Aug-2021 3 Document Number: 91080

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RDS(on), Drain-to-Source On Resistance

2.0 2.5
80 µs Pulse Test ID = - 0.6 A
VDS > ID(on) x RDS(on) max. VGS = - 10 V
gfs,Transconductance (S)

1.6 2.0

TJ = - 55 °C

(Normalized)
1.2 1.5
TJ = 25 °C
TJ = 125 °C
0.8 1.0

0.4 0.5

0.0 0.0
0 - 0.48 - 0.96 - 1.44 - 1.92 - 2.40 - 40 0 40 80 120 160

91080_06 ID, Drain Current (A) 91080_09 TJ, Junction Temperature (°C)

Fig. 6 - Typical Transconductance vs. Drain Current Fig. 9 - Normalized On-Resistance vs. Temperature

- 10.0 500
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
- 5.0 Crss = Cgd
400 C ,C
Coss = Cds + gs gd
ID, Drain Current (A)

C, Capacitance (pF)

Cgs + Cgd
- 2.0 ≈ Cgs + Cgd
300
- 1.0
TJ = 150 °C Ciss
200
- 0.5 TJ = 25 °C
Coss
100
- 0.2 Crss

- 0.1 0
- 2.0 - 3.2 - 4.4 - 5.6 - 6.8 - 8.0 0 - 10 - 20 - 30 - 40 - 50

91080_07 VSD, Source-to-Drain Voltage (V) 91080_10 VDS, Drain-to-Source Voltage (V)

Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 10 - Typical Capacitance vs. Drain-to-Source Voltage
Negative VGS, Gate-to-Source Voltage (V)

1.25 20
BVDSS, Drain-to-Source Breakdown

ID = - 1.8 A

VDS = - 100 V
1.15 16
Voltage (Normalized)

VDS = - 60 V
VDS = - 40 V
1.05 12

0.95 8

0.85 4
For test circuit
0.75 see figure 18
0
- 40 0 40 80 120 160 0 2 4 6 8
91080_08 TJ, Junction Temperature (°C) 91080_11 QG, Total Gate Charge (nC)

Fig. 8 - Breakdown Voltage vs. Temperature Fig. 11 - Typical Gate Charge vs. Gate-to-Source Voltage

S21-0867-Rev. C, 16-Aug-2021 4 Document Number: 91080

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 IRF9610
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7 L
RDS(on) measured with current pulse of
2.0 µs duration. Initial TJ = 25 °C. Vary tp to obtain
6
(Heating effect of 2.0 µs pulse is minimal.) required IL
RDS(on), Drain-to-Source

VDS -
V DD
On Resistance (Ω)

5
VGS = - 10 V +
D.U.T.
4 VGS = - 10 V tp EC
0.05 Ω
3 IL
VGS = - 20 V VDD = 0.5 VDS EC = 0.75 VDS
2
Fig. 15 - Clamped Inductive Test Circuit
1

0
0 -1 -2 -3 -4 -5 -6 -7
VDD
91080_12 ID, Drain Current (A)

Fig. 12 - Typical On-Resistance vs. Drain Current

IL

2.0
tp
Negative ID, Drain Current (A)

VDS
1.6 EC

Fig. 16 - Clamped Inductive Waveforms

1.2

RD
0.8 VDS

VGS
0.4 D.U.T.
RG -
+VDD

0.0
25 50 75 100 125 150 - 10 V
Pulse width ≤ 1 µs
91080_13 TC, Case Temperature (°C) Duty factor ≤ 0.1 %

Fig. 13 - Maximum Drain Current vs. Case Temperature Fig. 17a - Switching Time Test Circuit

20 td(on) tr td(off) tf
VGS
PD, Power Dissipation (W)

10 %
15

10 90 %
VDS

Fig. 17b - Switching Time Waveforms

5

0
0 20 40 60 80 100 120 140

91080_14 TC, Case Temperature (°C)

Fig. 14 - Power vs. Temperature Derating Curve

S21-0867-Rev. C, 16-Aug-2021 5 Document Number: 91080

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Current regulator
Same type as D.U.T.
QG
15 V 50 kΩ

12 V 0.2 µF
QGS QGD 0.3 µF
-

D.U.T. + VDS
VG

VGS

Charge - 3 mA

Fig. 18a - Basic Gate Charge Waveform IG ID

Current sampling resistors
Fig. 18b - Gate Charge Test Circuit

Peak Diode Recovery dV/dt Test Circuit

D.U.T. +
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- - +

Rg • dV/dt controlled by Rg +
• ISD controlled by duty factor “D” VDD
• D.U.T. - device under test -

Note
• Compliment N-Channel of D.U.T. for driver

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = - 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current

ISD
Ripple ≤ 5 %

Note
a. VGS = - 5 V for logic level and - 3 V drive devices

Fig. 19 - For P-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91080.

S21-0867-Rev. C, 16-Aug-2021 6 Document Number: 91080

For technical questions, contact: hvm@vishay.com
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 Package Information
www.vishay.com
Vishay Siliconix
TO-220-1

A
E
F

ØP

Q
H(1)
D

1 2 3
L(1)

M*

b(1)
L

C
b
e
J(1)
e(1)

MILLIMETERS INCHES
DIM.
MIN. MAX. MIN. MAX.
A 4.24 4.65 0.167 0.183
b 0.69 1.02 0.027 0.040
b(1) 1.14 1.78 0.045 0.070
c 0.36 0.61 0.014 0.024
D 14.33 15.85 0.564 0.624
E 9.96 10.52 0.392 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.10 6.71 0.240 0.264
J(1) 2.41 2.92 0.095 0.115
L 13.36 14.40 0.526 0.567
L(1) 3.33 4.04 0.131 0.159
ØP 3.53 3.94 0.139 0.155
Q 2.54 3.00 0.100 0.118
ECN: E21-0621-Rev. D, 04-Nov-2021
DWG: 6031
Note
• M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM

Revison: 04-Nov-2021 1 Document Number: 66542

For technical questions, contact: hvm@vishay.com
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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2023 1 Document Number: 91000