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Usbuf

The USBUF is an EMI filter and line termination device for USB upstream ports, designed to meet IEC 61000-4-2 level 4 ESD protection standards. It integrates series termination resistors and bypass capacitors to suppress EMI and ensure compliance with USB specifications. The device is packaged in a compact SOT323-6L format, making it suitable for high-density board designs in USB hubs and PC peripherals.

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0% found this document useful (0 votes)
42 views13 pages

Usbuf

The USBUF is an EMI filter and line termination device for USB upstream ports, designed to meet IEC 61000-4-2 level 4 ESD protection standards. It integrates series termination resistors and bypass capacitors to suppress EMI and ensure compliance with USB specifications. The device is packaged in a compact SOT323-6L format, making it suitable for high-density board designs in USB hubs and PC peripherals.

Uploaded by

RXRS
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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USBUF

EMI filter and line termination for USB upstream ports

Datasheet - production data

• Complies with the following standards IEC


61000-4-2, level 4
– ± 15 kV (air discharge)
– ± 8 kV (contact discharge)
– MIL STD 883E, Method 3015-7
SOT323-6L – Class 3 C = 100 pF; R = 1500 Ω
– 3 positive strikes and 3 negative strikes
(F = 1 Hz)

Figure 1. Functional diagram


Application
3.3 V EMI Filter and line termination for USB upstream
Rt Rp ports on:
D1 D4 • USB Hubs
Ct
• PC peripherals

Grd 3.3 V
Description
The USB specification requires upstream ports to
Rt be terminated with pull-up resistors from the D+
D2 D3
and D- lines to Vbus. On the implementation of
Ct
USB systems, the radiated and conducted EMI
should be kept within the required levels as stated
by the FCC regulations. In addition to the
requirements of termination and EMC
Features compatibility, the computing devices are required
to be tested for ESD susceptibility.
• Monolithic device with recommended line
termination for USB upstream ports The USBUF provides the recommended line
• Integrated Rt series termination and Ct termination while implementing a low pass filter to
bypassing capacitors. limit EMI levels and providing ESD protection
which exceeds IEC 61000-4-2 level 4 standard.
• Integrated ESD protection
The device is packaged in a SOT323-6L which is
• Small package size the smallest available lead frame package (50%
• Benefits smaller than the standard SOT23).
– EMI / RFI noise suppression
Table 1. Device summary
– Required line termination for USB
upstream ports Order codes Marking
– ESD protection exceeding IEC 61000-4-2 USBUF01W6 UU1
level 4
USBUF02W6 UU2
– High flexibility in the design of high density
boards
– Tailored to meet USB 1.1 standard

August 2015 DocID7041 Rev 8 1/13


This is information on a product in full production. www.st.com
Characteristics USBUF

1 Characteristics

Table 2. Absolute ratings (Tamb = 25° C)


Symbol Parameter Value Unit

ESD discharge IEC 61000-4-2, air discharge ± 16


VPP ESD discharge IEC 61000-4-2, contact discharge ±9 kV
ESD discharge - MIL STD 883E - Method 3015-7 ± 25
Tj Maximum junction temperature 150 °C
Tstg Storage temperature range - 55 to + 150 °C
TL Lead solder temperature (10 second duration) 260 °C
Top Operating temperature range -40 to 125 °C
P Power rating per resistor 100 mW

Table 3. Functional diagram


Rt Rp Ct

CODE 01 33 W 1.5 kΩ 47 pF
CODE 02 22 W 1.5 kΩ 47 pF
Tolerance ± 10% ± 10% ± 20%

2/13 DocID7041 Rev 8


USBUF Technical information

2 Technical information

Figure 2. USB standard requirements


3.3V

1.5k
Rt D+ D+ Rt
Full-speed or
Ct Ct Full-speed USB
Low-speed USB Twisted pair shielded
Rt Rt Transceiver
Transceiver
D- Zo = 90ohms D-
Ct 15k 15k 5m max Ct
Host or Hub 0 or
Hub port Full-speed function

FULL SPEED CONNECTION

3.3V

1.5k
Rt D+ D+ Rt
Full-speed or Low-speed USB
Ct Ct
Low-speed USB Untwisted unshielded Transceiver
Transceiver Rt Rt
D- 3m max D-
Ct 15k 15k Ct
Host or Hub 0 or
Hub port Low-speed function

LOW SPEED CONNECTION

DocID7041 Rev 8 3/13


13
Technical information USBUF

2.1 Application example


Figure 3. Implementation of ST solutions for USB ports
USBUF01W6
Downstream port USBDF01W5 Upstream port

D2 Gnd D1 D+
Host/Hub USB por transceivert

D+ Rt

Peripheral transceiver
CABLE
D+ in Ct Rd D+ out D+ D+

Gnd Ct Ct
Rt Rt
Gnd 3.3 V

Ct Rd D- D- Rp
D-
D- in Rt
D- out D3 D4
3.3V D-

FULL SPEED CONNECTION

USBUF01W6
Downstream port USBDF01W5 Upstream port
D+
D2 Gnd D1
Host/Hub USB por transceivert

D+ Rt

Peripheral transceiver
CABLE
D+ in Ct Rd D+ out D+ D+

Gnd Ct Ct
Rt Rt
Gnd 3.3 V

Ct Rd D- D- Rp
D-
D- in Rt
D- out D3 D4
3.3V D-

LOW SPEED CONNECTION

2.2 EMI filtering


Current FCC regulations requires that class B computing devices meet specified maximum
levels for both radiated and conducted EMI.
• Radiated EMI covers the frequency range from 30 MHz to 1 GHz.
• Conducted EMI covers the 450 kHz to 30 MHz range.
For the types of devices utilizing the USB, the most difficult test to pass is usually the
radiated EMI test. For this reason the USBUF device is aiming to minimize radiated EMI.
The differential signal (D+ and D-) of the USB does not contribute significantly to radiated or
conducted EMI because the magnetic field of both conductors cancels each other.
The inside of the PC environment is very noisy and designers must minimize noise coupling
from the different sources. D+ and D-must not be routed near high speed lines (clocks
spikes).
Induced common mode noise can be minimized by running pairs of USB signals parallel to
each other and running grounded guard trace on each side of the signal pair from the USB
controller to the USBUF device. If possible, locate the USBUF device physically near the

4/13 DocID7041 Rev 8


USBUF Technical information

USB connectors. Distance between the USB controller and the USB connector must be
minimized.
The 47 pF (Ct) capacitors are used to bypass high frequency energy to ground and for edge
control, and are placed between the driver chip and the series termination resistors (Rt).
Both Ct and Rt should be placed as close to the driver chip as is practicable.
The USBUF ensures a filtering protection against Electromagnetic and Radio-frequency
Interferences thanks to its low-pass filter structure. This filter is characterized by the
following parameters:
• cut-off frequency
• Insertion loss
• high frequency rejection.

Figure 4. USBUF typical attenuation Figure 5. Measurement configuration


S21 (dB)
0

TEST BOARD
-10 50Ω

UUx
Vg 50Ω
-20

-30
1 10 100 1,000
Frequency (MHz)

2.3 ESD protection


In addition to the requirements of termination and EMC compatibility, computing devices are
required to be tested for ESD susceptibility. This test is described in the IEC 61000-4-2 and
is already in place in Europe. This test requires that a device tolerates ESD events and
remains operational without user intervention.
The USBUF is particularly optimized to perform ESD protection. ESD protection is based on
the use of device which clamps at:
Vcl = VBR + Rd . IPP
This protection function is spitted in 2 stages. As shown in Figure 6, the ESD strikes are
clamped by the first stage S1 and then its remaining overvoltage is applied to the second
stage through the resistor Rt. Such a configuration makes the output voltage very low at the
output.

DocID7041 Rev 8 5/13


13
Technical information USBUF

Figure 6. USBUF ESD clamping behavior

Rg S1 Rt S2

Rd Rd
Vinput Rload
VPP
VBR Voutput VBR
Device
to be
ESD Surge USBUF01W6 protected

Figure 7. Measurement board

ESD
SURGE TEST BOARD

16kV

UUx
Air
Discharge Vin Vout

To have a good approximation of the remaining voltages at both Vin and Vout stages, we
give the typical dynamical resistance value Rd. By taking into account these following
hypothesis: Rt > Rd, Rg > Rd and Rload > Rd, it gives these formulas:

R g ⋅ V BR + R d ⋅ V g
Vinput = -----------------------------------------------
Rg

R t ⋅ V BR + R d ⋅ Vinput
V ouput = -------------------------------------------------------
Rt

The results of the calculation done for Vg = 8 kV, Rg = 330 Ω (IEC 61000-4-2 standard),
VBR = 7 V (typ.) and Rd = 1 Ω (typ.) give:
Vinput = 31.2 V
Voutput = 7.95 V
This confirms the very low remaining voltage across the device to be protected. It is also
important to note that in this approximation the parasitic inductance effect was not taken into
account. This could be few tenths of volts during few ns at the Vinput side. This parasitic
effect is not present at the Voutput side due the low current involved after the resistance Rt.
The measurements done hereafter show very clearly (figure 8) the high efficiency of the
ESD protection:
• no influence of the parasitic inductances on Voutput stage
• Voutput clamping voltage very close to VBR (breakdown voltage) in the positive way
and - VF (forward voltage) in the negative way

6/13 DocID7041 Rev 8


USBUF Technical information

Figure 8. Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD
surge

Vin

Vin

Vout
Vout

Positive surge Negative surge

Please note that the USBUF is not only acting for positive ESD surges but also for negative
ones. For these kinds of disturbances it clamps close to ground voltage as shown in Figure
8. (negative surge.

2.4 Latch-up phenomenon


The early aging and destruction of IC’s is often due to latch-up phenomenon which is mainly
induced by dV/dt. Thanks to its structure, the USBUF provides a high immunity to latch-up
phenomenon by smoothing very fast edges.

2.5 Crosstalk behavior


Figure 9. Crosstalk phenomenon
RG1
Line 1

VG1 RL1 α1 VG1 + β1 2VG2


RG2
Line 2

VG2 RL2 α2 VG2 + β2 1VG1

DRIVERS RECEIVERS

The crosstalk phenomenon is due to the coupling between 2 lines. The coupling factor (β12
or β21) increases when the gap across lines decreases, particularly in silicon dice. In the
example above the expected signal on load RL2 is α2VG2, in fact the real voltage at this
point has got an extra value β21VG1. This part of the VG1 signal represents the effect of the
crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into
account when the drivers impose fast digital data or high frequency analog signals in the
disturbing line. The perturbed line will be more affected if it works with low voltage signal or
high load impedance (few kΩ).

DocID7041 Rev 8 7/13


13
Technical information USBUF

Figure 10. Analog crosstalk Figure 11. Typical analog crosstalk


measurements results
Analog crosstalk (dB)
0

TEST BOARD -20


50Ω
UUx
-40

Vg 50Ω -60

-80

-100
1 10 100 1,000
Frequency (MHz)

Figure 10. gives the measurement circuit for the analog crosstalk application. In Figure 11.,
the curve shows the effect of the D+ cell on the D-cell. In usual frequency range of analog
signals (up to 100 MHz) the effect on disturbed line is less than -37 db.

Figure 12. Digital crosstalk measurements configuration


+5V +5V

74HC04 74HC04
3.3 V
D+ Rt Rp

D1 Ct D4

VG1
Square
Pulse +5V Gnd 3.3 V

Generator D- Rt

D2 Ct
D3

β21 VG1

Figure 12 shows the measurement circuit used to quantify the crosstalk effect in a classical
digital application.

Figure 13. Digital crosstalk results

VG1

β21VG1

Figure 13 shows, with a signal from 0 to 5 V and rise time of few ns, the impact on the
disturbed line is less than 250 mV peak to peak. No data disturbance was noted on the
other line.The measurements performed with falling edges gives an impact within the same
range.

8/13 DocID7041 Rev 8


USBUF Technical information

2.6 Transition times


This low pass filter has been designed in order to meet the USB 1.1 standard requirements
that implies the signal edges are maintained within the 4 -20 ns stipulated USB specification
limits. To verify this point, we have measured the rise time of VD+ voltage with and without
the USBUF device.

Figure 14. Typical rise and fall times: Figure 15. Typical rise times with and
measurement configuration without protection device

+5V +5V without


74HC04 74HC04

D+

USBDF
+5V 01W6
Square
Pulse D-
Generator
with

Figure 14. shows the circuit used to perform measurements of the transition times. In Figure
15., we see the results of such measurements:
trise = 3.8 ns driver alone
trise = 7.8 ns with protection device
The adding of the protection device causes the rise time increase of roughly 4ns.
Note: Rise time has been measured between 10% and 90% of the signal (resp. 90% and 10%)

DocID7041 Rev 8 9/13


13
Packaging information USBUF

3 Packaging information

Table 4. SOT323-6L Package mechanical data


DIMENSIONS
REF.
A
Millimeters Inches
E
Min. Max. Min. Max.

A 0.8 1.1 0.031 0.043


e A1 0 0.1 0 0.004
b D
A2 0.8 1 0.031 0.039
e
b 0.15 0.3 0.006 0.012

A1 c 0.1 0.18 0.004 0.007


A2 D 1.8 2.2 0.071 0.086
Q1 E 1.15 1.35 0.045 0.053
e 0.65 Typ. 0.025 Typ.
c
L HE 1.8 2.4 0.071 0.094
HE
L 0.1 0.4 0.004 0.016
Q1 0.1 0.4 0.004 0.016

Figure 16. Recommended footprint (dimensions in mm)


0.65

1.05

0.80 2.9

1.05

0.40

10/13 DocID7041 Rev 8


USBUF Packaging information

Table 5. Mechanical specifications


Lead Description

Lead plating Tin-lead


5 m min
Lead plating thickness
25 m max
Sn / Pb
Lead material
(70% to 90%Sn)
Lead coplanarity 10 m max
Body material Molded epoxy
Flammability UL94V-0

DocID7041 Rev 8 11/13


13
Ordering information USBUF

4 Ordering information

Table 6. Order code


Order code Marking Package Weight Base qty Delivery mode

USBUF01W6 UU1 SOT323-6L 5.4 mg 3000 Tape and reel


USBUF02W6 UU2 SOT323-6L 5.4 mg 3000 Tape and reel

5 Revision history

Table 7. Document revision history


Date Revision Description of Changes

Mar-2002 3A Last update.


Feb-2005 4 Layout update. No content change.
Operating temperature range updated to -40 to 70° C.
28-Feb-2006 5
Layout updated to current standard.
27-May-2009 6 Reformatted to the current standard.
14-Jan-2014 7 Updated Section 3: Packaging information
Updated Top parameter in Table 2.
24-Aug-2015 8
Minor text changes.

12/13 DocID7041 Rev 8


USBUF

IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2015 STMicroelectronics – All rights reserved

DocID7041 Rev 8 13/13


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