VARIABLE ENTERED MAPPING
◼ This technique is an extension of the
standard K-map technique
◼ Boolean variables and even boolean
expressions are entered into the map
◼ It reduces the map size
Example of VEM Plotting
AB
C
0 1 1
A B C F
0 1 0
0 0 0 0
0 0 1 0
0 1 0 1
F=A’B’C’F+A’B’CF+A’BC’F+A’BCF+AB’C”F+AB’CF+
0 1 1 1
ABC’F+ABCDF
1 0 0 1
1 0 1 0
1 1 0 F=A’B’(C’F+CF) + A’B(C’F+CF) + AB’(C’F+CF) +
1 1 1 AB(C’F+CF)
We can plot the map with the ASSERTED value for each
(C’F+CF)
A B C F
A
0 1
0 0 0 0 B
0 0 1 0 C’
0 0
0 1 0 1
0 1 1 1
1 1
1 0 0 1
1 0 1 0
1 1 0
1 1 1
VEM PLOTTING
n variable problems can be plotted in a n-1 variable map.
A B C D F1 F2
AB
0 0 0 0 0 1
C 0 D’ D’ 1
0 0 0 1 0 1
0 0 1 0 1 1 1 D’ 0 D
0 0 1 1 1
0 1 0 0 1
F1
0 1 0 1 0 0
0 1 1 0 1 AB
0 1 1 1 0 0 C
1 D’ D
1 0 0 0 1 0
1 0 0 1 1 1 D’+ D’ 0 1
D
1 0 1 0 0 1
1 0 1 1 1 1
F2
1 1 0 0
1 1 0 1 0
1 1 1 0 0 0
1 1 1 1 0 0
Expressions can also be entered in the map and
thus the 4 variable map size can be reduced to
2 variable map if C and D both are included as
the MEVs
C’D’ + C’D + CD’ + (CD) C’D + CD’ + CD
C’D’ + (CD’) C’D’ + (C’D)
VEM READING
◼ Step 1 Replace all 1 entries in the map by
MEV ORed with its complement
Looping Rules
a) First loop all single MEV entries that will not loop with
another identical MEV in an adjacent cell or with a 1 or
a
b) Loop all MEVs that will loop into duals only with another
identical MEV in an adjacent cell
c) Loop all MEVs that will loop into a dual only with a 1
d) Loop all MEVs that will loop into a dual only with a
d) Any MEV that will loop two ways with another
identical MEV, 1, or but wont loop into a quad,
leave until later
d) Continue looping in similar fashion for quads and
groups of eight until every single MEV has been
looped at least once
◼ Step 2 Transform the map according to
following transformations
a) Replace the MEV and MEV’ with 0
b) 0 - 0, -
c) 1 – 1( if not completely covered)
(if completely covered)
d) (MEV+MEV’ ) and (MEV’+MEV )-
1 (if not covered at all or only entry is covered)
(if completely covered or if the necessary term is
covered)
Then process as a standard K-map
VEM reading examples
A 0 1 A 0 1
B B
0 C 0 0 C 0
1 1 C 1 C+C’ C
F = A’C + BC + A’B
A 0 1 A 0 1
B B
A’C C 0 0 0
0 0
1 C+C’ C 1 1 0
BC
A B C F
A 0 1 A 0 1
0 0 0
B B
0 0 1 0
0 C’ 1 0 C’ C+C’
0 1 0
0 1 1 1 1 C+C’ C 1 C+C’ C
1 0 0 1
1 0 1 1 BC
1 1 0 0 A 0 1
1 1 1 1 B
1
F = BC + AB’ 0
0
1
◼ F = (2,4,5,10,11,13) + d(0,1,6,15)
◼ F = (2,3,5,6,7,14) + d(10,13)
MEV technique can also be used to minimise given
Boolean functions which involve infrequently used
variables.
F ( A, B, C, G, H ) = A B C H + A B CH + A BC + AB C G + AB CG + ABC + ABC
Where G and H are infrequently used variables,
which can be grouped as
F ( A, B, C, G, H ) = ( A B C )( H ) + ( A B C )( H ) + ( A BC ) + ( AB C )(G ) + ( AB C )(G ) + ( ABC ) + ( ABC )
AB
00 01 11 10
C
0 H’ 0 1 G’
F = A’B’H’ + AG’ + AB + BC
1 H’ 1 1 G’
COMBINATIONAL DESIGN
◼ Receive specifications
◼ Draw a block diagram
◼ Determine the magnitude of the design
problem
◼ Develop a TRUTH-TABLE
◼ Minimize the problem
◼ Select appropriate logic gates for
implementing the problem
◼ Develop the optimal circuit diagram
